13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32 ******************************************************************************/
33 /*$FreeBSD$*/
34
35 #include "ixgbe_api.h"
36 #include "ixgbe_common.h"
37
38 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);
39 extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw);
40
41 /**
42 * ixgbe_init_shared_code - Initialize the shared code
43 * @hw: pointer to hardware structure
44 *
45 * This will assign function pointers and assign the MAC type and PHY code.
46 * Does not touch the hardware. This function must be called prior to any
47 * other function in the shared code. The ixgbe_hw structure should be
48 * memset to 0 prior to calling this function. The following fields in
49 * hw structure should be filled in prior to calling this function:
50 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
51 * subsystem_vendor_id, and revision_id
52 **/
53 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
54 {
55 s32 status;
56
57 DEBUGFUNC("ixgbe_init_shared_code");
58
59 /*
60 * Set the mac type
61 */
62 (void) ixgbe_set_mac_type(hw);
63
64 switch (hw->mac.type) {
65 case ixgbe_mac_82598EB:
66 status = ixgbe_init_ops_82598(hw);
67 break;
68 case ixgbe_mac_82599EB:
69 status = ixgbe_init_ops_82599(hw);
70 break;
71 default:
72 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
73 break;
74 }
75
76 return status;
77 }
78
79 /**
80 * ixgbe_set_mac_type - Sets MAC type
81 * @hw: pointer to the HW structure
82 *
83 * This function sets the mac type of the adapter based on the
84 * vendor ID and device ID stored in the hw structure.
85 **/
86 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
87 {
88 s32 ret_val = IXGBE_SUCCESS;
89
90 DEBUGFUNC("ixgbe_set_mac_type\n");
103 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
104 case IXGBE_DEV_ID_82598EB_XF_LR:
105 case IXGBE_DEV_ID_82598EB_SFP_LOM:
106 hw->mac.type = ixgbe_mac_82598EB;
107 break;
108 case IXGBE_DEV_ID_82599_KX4:
109 case IXGBE_DEV_ID_82599_KX4_MEZZ:
110 case IXGBE_DEV_ID_82599_XAUI_LOM:
111 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
112 case IXGBE_DEV_ID_82599_KR:
113 case IXGBE_DEV_ID_82599_SFP:
114 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
115 case IXGBE_DEV_ID_82599_SFP_FCOE:
116 case IXGBE_DEV_ID_82599_SFP_EM:
117 case IXGBE_DEV_ID_82599_SFP_SF2:
118 case IXGBE_DEV_ID_82599EN_SFP:
119 case IXGBE_DEV_ID_82599_CX4:
120 case IXGBE_DEV_ID_82599_T3_LOM:
121 hw->mac.type = ixgbe_mac_82599EB;
122 break;
123 default:
124 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
125 break;
126 }
127 } else {
128 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
129 }
130
131 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
132 hw->mac.type, ret_val);
133 return ret_val;
134 }
135
136 /**
137 * ixgbe_init_hw - Initialize the hardware
138 * @hw: pointer to hardware structure
139 *
140 * Initialize the hardware by resetting and then starting the hardware
141 **/
142 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
346 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
347 {
348 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
349 IXGBE_NOT_IMPLEMENTED);
350 }
351
352 /**
353 * ixgbe_read_pba_string - Reads part number string from EEPROM
354 * @hw: pointer to hardware structure
355 * @pba_num: stores the part number string from the EEPROM
356 * @pba_num_size: part number string buffer length
357 *
358 * Reads the part number string from the EEPROM.
359 **/
360 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
361 {
362 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
363 }
364
365 /**
366 * ixgbe_read_pba_length - Reads part number string length from EEPROM
367 * @hw: pointer to hardware structure
368 * @pba_num_size: part number string buffer length
369 *
370 * Reads the part number length from the EEPROM.
371 * Returns expected buffer size in pba_num_size.
372 **/
373 s32 ixgbe_read_pba_length(struct ixgbe_hw *hw, u32 *pba_num_size)
374 {
375 return ixgbe_read_pba_length_generic(hw, pba_num_size);
376 }
377
378 /**
379 * ixgbe_read_pba_num - Reads part number from EEPROM
380 * @hw: pointer to hardware structure
381 * @pba_num: stores the part number from the EEPROM
382 *
383 * Reads the part number from the EEPROM.
384 **/
385 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
386 {
387 return ixgbe_read_pba_num_generic(hw, pba_num);
388 }
389
390 /**
391 * ixgbe_identify_phy - Get PHY type
392 * @hw: pointer to hardware structure
393 *
394 * Determines the physical layer module found on the current adapter.
395 **/
396 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
397 {
398 s32 status = IXGBE_SUCCESS;
435 s32 status = IXGBE_SUCCESS;
436
437 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
438 (hw, firmware_version),
439 IXGBE_NOT_IMPLEMENTED);
440 return status;
441 }
442
443 /**
444 * ixgbe_read_phy_reg - Read PHY register
445 * @hw: pointer to hardware structure
446 * @reg_addr: 32 bit address of PHY register to read
447 * @phy_data: Pointer to read data from PHY register
448 *
449 * Reads a value from a specified PHY register
450 **/
451 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
452 u16 *phy_data)
453 {
454 if (hw->phy.id == 0)
455 (void) ixgbe_identify_phy(hw);
456
457 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
458 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
459 }
460
461 /**
462 * ixgbe_write_phy_reg - Write PHY register
463 * @hw: pointer to hardware structure
464 * @reg_addr: 32 bit PHY register to write
465 * @phy_data: Data to write to the PHY register
466 *
467 * Writes a value to specified PHY register
468 **/
469 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
470 u16 phy_data)
471 {
472 if (hw->phy.id == 0)
473 (void) ixgbe_identify_phy(hw);
474
475 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
476 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
477 }
478
479 /**
480 * ixgbe_setup_phy_link - Restart PHY autoneg
481 * @hw: pointer to hardware structure
482 *
483 * Restart autonegotiation and PHY and waits for completion.
484 **/
485 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
486 {
487 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
488 IXGBE_NOT_IMPLEMENTED);
489 }
490
491 /**
492 * ixgbe_check_phy_link - Determine link and speed status
493 * @hw: pointer to hardware structure
667 }
668
669
670 /**
671 * ixgbe_write_eeprom - Write word to EEPROM
672 * @hw: pointer to hardware structure
673 * @offset: offset within the EEPROM to be written to
674 * @data: 16 bit word to be written to the EEPROM
675 *
676 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
677 * called after this function, the EEPROM will most likely contain an
678 * invalid checksum.
679 **/
680 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
681 {
682 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
683 IXGBE_NOT_IMPLEMENTED);
684 }
685
686 /**
687 * ixgbe_read_eeprom - Read word from EEPROM
688 * @hw: pointer to hardware structure
689 * @offset: offset within the EEPROM to be read
690 * @data: read 16 bit value from EEPROM
691 *
692 * Reads 16 bit value from EEPROM
693 **/
694 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
695 {
696 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
697 IXGBE_NOT_IMPLEMENTED);
698 }
699
700 /**
701 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
702 * @hw: pointer to hardware structure
703 * @checksum_val: calculated checksum
704 *
705 * Performs checksum calculation and validates the EEPROM checksum
706 **/
707 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
708 {
709 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
710 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
711 }
712
713 /**
714 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
715 * @hw: pointer to hardware structure
716 **/
717 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
718 {
719 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
720 IXGBE_NOT_IMPLEMENTED);
759 * @index: Receive address register to write
760 *
761 * Puts an ethernet address into a receive address register.
762 **/
763 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
764 {
765 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
766 IXGBE_NOT_IMPLEMENTED);
767 }
768
769 /**
770 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
771 * @hw: pointer to hardware structure
772 * @rar: receive address register index to associate with VMDq index
773 * @vmdq: VMDq set or pool index
774 **/
775 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
776 {
777 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
778 IXGBE_NOT_IMPLEMENTED);
779 }
780
781 /**
782 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
783 * @hw: pointer to hardware structure
784 * @rar: receive address register index to disassociate with VMDq index
785 * @vmdq: VMDq set or pool index
786 **/
787 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
788 {
789 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
790 IXGBE_NOT_IMPLEMENTED);
791 }
792
793 /**
794 * ixgbe_init_rx_addrs - Initializes receive address filters.
795 * @hw: pointer to hardware structure
796 *
797 * Places the MAC address in receive address register 0 and clears the rest
798 * of the receive address registers. Clears the multicast table. Assumes
799 * the receiver is in reset when the routine is called.
800 **/
801 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
828 u32 addr_count, ixgbe_mc_addr_itr func)
829 {
830 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
831 addr_list, addr_count, func),
832 IXGBE_NOT_IMPLEMENTED);
833 }
834
835 /**
836 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
837 * @hw: pointer to hardware structure
838 * @mc_addr_list: the list of new multicast addresses
839 * @mc_addr_count: number of addresses
840 * @func: iterator function to walk the multicast address list
841 *
842 * The given list replaces any existing list. Clears the MC addrs from receive
843 * address registers and the multicast table. Uses unused receive address
844 * registers for the first multicast addresses, and hashes the rest into the
845 * multicast table.
846 **/
847 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
848 u32 mc_addr_count, ixgbe_mc_addr_itr func)
849 {
850 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
851 mc_addr_list, mc_addr_count, func),
852 IXGBE_NOT_IMPLEMENTED);
853 }
854
855 /**
856 * ixgbe_enable_mc - Enable multicast address in RAR
857 * @hw: pointer to hardware structure
858 *
859 * Enables multicast address in RAR and the use of the multicast hash table.
860 **/
861 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
862 {
863 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
864 IXGBE_NOT_IMPLEMENTED);
865 }
866
867 /**
868 * ixgbe_disable_mc - Disable multicast address in RAR
869 * @hw: pointer to hardware structure
870 *
871 * Disables multicast address in RAR and the use of the multicast hash table.
887 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
888 IXGBE_NOT_IMPLEMENTED);
889 }
890
891 /**
892 * ixgbe_set_vfta - Set VLAN filter table
893 * @hw: pointer to hardware structure
894 * @vlan: VLAN id to write to VLAN filter
895 * @vind: VMDq output index that maps queue to VLAN id in VFTA
896 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
897 *
898 * Turn on/off specified VLAN in the VLAN filter table.
899 **/
900 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
901 {
902 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
903 vlan_on), IXGBE_NOT_IMPLEMENTED);
904 }
905
906 /**
907 * ixgbe_fc_enable - Enable flow control
908 * @hw: pointer to hardware structure
909 * @packetbuf_num: packet buffer number (0-7)
910 *
911 * Configures the flow control settings based on SW configuration.
912 **/
913 s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
914 {
915 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw, packetbuf_num),
916 IXGBE_NOT_IMPLEMENTED);
917 }
918
919 /**
920 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
921 * @hw: pointer to hardware structure
922 * @reg: analog register to read
923 * @val: read value
924 *
925 * Performs write operation to analog register specified.
926 **/
927 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
928 {
929 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
930 val), IXGBE_NOT_IMPLEMENTED);
931 }
932
933 /**
934 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
935 * @hw: pointer to hardware structure
936 * @reg: analog register to write
937 * @val: value to write
938 *
939 * Performs write operation to Atlas analog register specified.
1015 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1016 {
1017 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1018 (hw, byte_offset, eeprom_data),
1019 IXGBE_NOT_IMPLEMENTED);
1020 }
1021
1022 /**
1023 * ixgbe_get_supported_physical_layer - Returns physical layer type
1024 * @hw: pointer to hardware structure
1025 *
1026 * Determines physical layer capabilities of the current configuration.
1027 **/
1028 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1029 {
1030 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1031 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1032 }
1033
1034 /**
1035 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependant on device specifics
1036 * @hw: pointer to hardware structure
1037 * @regval: bitfield to write to the Rx DMA register
1038 *
1039 * Enables the Rx DMA unit of the device.
1040 **/
1041 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1042 {
1043 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1044 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1045 }
1046
1047 /**
1048 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1049 * @hw: pointer to hardware structure
1050 * @mask: Mask to specify which semaphore to acquire
1051 *
1052 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1053 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1054 **/
1055 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
1056 {
1057 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1058 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1059 }
1060
1061 /**
1062 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1063 * @hw: pointer to hardware structure
1064 * @mask: Mask to specify which semaphore to release
1065 *
1066 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
|
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32 ******************************************************************************/
33 /*$FreeBSD: src/sys/dev/ixgbe/ixgbe_api.c,v 1.13 2012/07/05 20:51:44 jfv Exp $*/
34
35 #include "ixgbe_api.h"
36 #include "ixgbe_common.h"
37
38 /**
39 * ixgbe_init_shared_code - Initialize the shared code
40 * @hw: pointer to hardware structure
41 *
42 * This will assign function pointers and assign the MAC type and PHY code.
43 * Does not touch the hardware. This function must be called prior to any
44 * other function in the shared code. The ixgbe_hw structure should be
45 * memset to 0 prior to calling this function. The following fields in
46 * hw structure should be filled in prior to calling this function:
47 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
48 * subsystem_vendor_id, and revision_id
49 **/
50 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
51 {
52 s32 status;
53
54 DEBUGFUNC("ixgbe_init_shared_code");
55
56 /*
57 * Set the mac type
58 */
59 ixgbe_set_mac_type(hw);
60
61 switch (hw->mac.type) {
62 case ixgbe_mac_82598EB:
63 status = ixgbe_init_ops_82598(hw);
64 break;
65 case ixgbe_mac_82599EB:
66 status = ixgbe_init_ops_82599(hw);
67 break;
68 #if 0
69 /* XXX KEBE ASKS - nuke this? */
70 case ixgbe_mac_82599_vf:
71 case ixgbe_mac_X540_vf:
72 status = ixgbe_init_ops_vf(hw);
73 break;
74 #endif
75 case ixgbe_mac_X540:
76 status = ixgbe_init_ops_X540(hw);
77 break;
78 default:
79 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
80 break;
81 }
82
83 return status;
84 }
85
86 /**
87 * ixgbe_set_mac_type - Sets MAC type
88 * @hw: pointer to the HW structure
89 *
90 * This function sets the mac type of the adapter based on the
91 * vendor ID and device ID stored in the hw structure.
92 **/
93 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
94 {
95 s32 ret_val = IXGBE_SUCCESS;
96
97 DEBUGFUNC("ixgbe_set_mac_type\n");
110 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
111 case IXGBE_DEV_ID_82598EB_XF_LR:
112 case IXGBE_DEV_ID_82598EB_SFP_LOM:
113 hw->mac.type = ixgbe_mac_82598EB;
114 break;
115 case IXGBE_DEV_ID_82599_KX4:
116 case IXGBE_DEV_ID_82599_KX4_MEZZ:
117 case IXGBE_DEV_ID_82599_XAUI_LOM:
118 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
119 case IXGBE_DEV_ID_82599_KR:
120 case IXGBE_DEV_ID_82599_SFP:
121 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
122 case IXGBE_DEV_ID_82599_SFP_FCOE:
123 case IXGBE_DEV_ID_82599_SFP_EM:
124 case IXGBE_DEV_ID_82599_SFP_SF2:
125 case IXGBE_DEV_ID_82599EN_SFP:
126 case IXGBE_DEV_ID_82599_CX4:
127 case IXGBE_DEV_ID_82599_T3_LOM:
128 hw->mac.type = ixgbe_mac_82599EB;
129 break;
130 case IXGBE_DEV_ID_82599_VF:
131 hw->mac.type = ixgbe_mac_82599_vf;
132 break;
133 case IXGBE_DEV_ID_X540_VF:
134 hw->mac.type = ixgbe_mac_X540_vf;
135 break;
136 case IXGBE_DEV_ID_X540T:
137 case IXGBE_DEV_ID_X540T1:
138 hw->mac.type = ixgbe_mac_X540;
139 break;
140 default:
141 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
142 break;
143 }
144 } else {
145 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
146 }
147
148 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
149 hw->mac.type, ret_val);
150 return ret_val;
151 }
152
153 /**
154 * ixgbe_init_hw - Initialize the hardware
155 * @hw: pointer to hardware structure
156 *
157 * Initialize the hardware by resetting and then starting the hardware
158 **/
159 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
363 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
364 {
365 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
366 IXGBE_NOT_IMPLEMENTED);
367 }
368
369 /**
370 * ixgbe_read_pba_string - Reads part number string from EEPROM
371 * @hw: pointer to hardware structure
372 * @pba_num: stores the part number string from the EEPROM
373 * @pba_num_size: part number string buffer length
374 *
375 * Reads the part number string from the EEPROM.
376 **/
377 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
378 {
379 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
380 }
381
382 /**
383 * ixgbe_read_pba_num - Reads part number from EEPROM
384 * @hw: pointer to hardware structure
385 * @pba_num: stores the part number from the EEPROM
386 *
387 * Reads the part number from the EEPROM.
388 **/
389 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
390 {
391 return ixgbe_read_pba_num_generic(hw, pba_num);
392 }
393
394 /**
395 * ixgbe_identify_phy - Get PHY type
396 * @hw: pointer to hardware structure
397 *
398 * Determines the physical layer module found on the current adapter.
399 **/
400 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
401 {
402 s32 status = IXGBE_SUCCESS;
439 s32 status = IXGBE_SUCCESS;
440
441 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
442 (hw, firmware_version),
443 IXGBE_NOT_IMPLEMENTED);
444 return status;
445 }
446
447 /**
448 * ixgbe_read_phy_reg - Read PHY register
449 * @hw: pointer to hardware structure
450 * @reg_addr: 32 bit address of PHY register to read
451 * @phy_data: Pointer to read data from PHY register
452 *
453 * Reads a value from a specified PHY register
454 **/
455 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
456 u16 *phy_data)
457 {
458 if (hw->phy.id == 0)
459 ixgbe_identify_phy(hw);
460
461 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
462 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
463 }
464
465 /**
466 * ixgbe_write_phy_reg - Write PHY register
467 * @hw: pointer to hardware structure
468 * @reg_addr: 32 bit PHY register to write
469 * @phy_data: Data to write to the PHY register
470 *
471 * Writes a value to specified PHY register
472 **/
473 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
474 u16 phy_data)
475 {
476 if (hw->phy.id == 0)
477 ixgbe_identify_phy(hw);
478
479 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
480 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
481 }
482
483 /**
484 * ixgbe_setup_phy_link - Restart PHY autoneg
485 * @hw: pointer to hardware structure
486 *
487 * Restart autonegotiation and PHY and waits for completion.
488 **/
489 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
490 {
491 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
492 IXGBE_NOT_IMPLEMENTED);
493 }
494
495 /**
496 * ixgbe_check_phy_link - Determine link and speed status
497 * @hw: pointer to hardware structure
671 }
672
673
674 /**
675 * ixgbe_write_eeprom - Write word to EEPROM
676 * @hw: pointer to hardware structure
677 * @offset: offset within the EEPROM to be written to
678 * @data: 16 bit word to be written to the EEPROM
679 *
680 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
681 * called after this function, the EEPROM will most likely contain an
682 * invalid checksum.
683 **/
684 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
685 {
686 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
687 IXGBE_NOT_IMPLEMENTED);
688 }
689
690 /**
691 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
692 * @hw: pointer to hardware structure
693 * @offset: offset within the EEPROM to be written to
694 * @data: 16 bit word(s) to be written to the EEPROM
695 * @words: number of words
696 *
697 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
698 * called after this function, the EEPROM will most likely contain an
699 * invalid checksum.
700 **/
701 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
702 u16 *data)
703 {
704 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
705 (hw, offset, words, data),
706 IXGBE_NOT_IMPLEMENTED);
707 }
708
709 /**
710 * ixgbe_read_eeprom - Read word from EEPROM
711 * @hw: pointer to hardware structure
712 * @offset: offset within the EEPROM to be read
713 * @data: read 16 bit value from EEPROM
714 *
715 * Reads 16 bit value from EEPROM
716 **/
717 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
718 {
719 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
720 IXGBE_NOT_IMPLEMENTED);
721 }
722
723 /**
724 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
725 * @hw: pointer to hardware structure
726 * @offset: offset within the EEPROM to be read
727 * @data: read 16 bit word(s) from EEPROM
728 * @words: number of words
729 *
730 * Reads 16 bit word(s) from EEPROM
731 **/
732 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
733 u16 words, u16 *data)
734 {
735 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
736 (hw, offset, words, data),
737 IXGBE_NOT_IMPLEMENTED);
738 }
739
740 /**
741 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
742 * @hw: pointer to hardware structure
743 * @checksum_val: calculated checksum
744 *
745 * Performs checksum calculation and validates the EEPROM checksum
746 **/
747 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
748 {
749 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
750 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
751 }
752
753 /**
754 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
755 * @hw: pointer to hardware structure
756 **/
757 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
758 {
759 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
760 IXGBE_NOT_IMPLEMENTED);
799 * @index: Receive address register to write
800 *
801 * Puts an ethernet address into a receive address register.
802 **/
803 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
804 {
805 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
806 IXGBE_NOT_IMPLEMENTED);
807 }
808
809 /**
810 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
811 * @hw: pointer to hardware structure
812 * @rar: receive address register index to associate with VMDq index
813 * @vmdq: VMDq set or pool index
814 **/
815 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
816 {
817 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
818 IXGBE_NOT_IMPLEMENTED);
819
820 }
821
822 /**
823 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
824 * @hw: pointer to hardware structure
825 * @vmdq: VMDq default pool index
826 **/
827 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
828 {
829 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
830 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
831 }
832
833 /**
834 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
835 * @hw: pointer to hardware structure
836 * @rar: receive address register index to disassociate with VMDq index
837 * @vmdq: VMDq set or pool index
838 **/
839 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
840 {
841 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
842 IXGBE_NOT_IMPLEMENTED);
843 }
844
845 /**
846 * ixgbe_init_rx_addrs - Initializes receive address filters.
847 * @hw: pointer to hardware structure
848 *
849 * Places the MAC address in receive address register 0 and clears the rest
850 * of the receive address registers. Clears the multicast table. Assumes
851 * the receiver is in reset when the routine is called.
852 **/
853 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
880 u32 addr_count, ixgbe_mc_addr_itr func)
881 {
882 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
883 addr_list, addr_count, func),
884 IXGBE_NOT_IMPLEMENTED);
885 }
886
887 /**
888 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
889 * @hw: pointer to hardware structure
890 * @mc_addr_list: the list of new multicast addresses
891 * @mc_addr_count: number of addresses
892 * @func: iterator function to walk the multicast address list
893 *
894 * The given list replaces any existing list. Clears the MC addrs from receive
895 * address registers and the multicast table. Uses unused receive address
896 * registers for the first multicast addresses, and hashes the rest into the
897 * multicast table.
898 **/
899 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
900 u32 mc_addr_count, ixgbe_mc_addr_itr func,
901 bool clear)
902 {
903 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
904 mc_addr_list, mc_addr_count, func, clear),
905 IXGBE_NOT_IMPLEMENTED);
906 }
907
908 /**
909 * ixgbe_enable_mc - Enable multicast address in RAR
910 * @hw: pointer to hardware structure
911 *
912 * Enables multicast address in RAR and the use of the multicast hash table.
913 **/
914 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
915 {
916 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
917 IXGBE_NOT_IMPLEMENTED);
918 }
919
920 /**
921 * ixgbe_disable_mc - Disable multicast address in RAR
922 * @hw: pointer to hardware structure
923 *
924 * Disables multicast address in RAR and the use of the multicast hash table.
940 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
941 IXGBE_NOT_IMPLEMENTED);
942 }
943
944 /**
945 * ixgbe_set_vfta - Set VLAN filter table
946 * @hw: pointer to hardware structure
947 * @vlan: VLAN id to write to VLAN filter
948 * @vind: VMDq output index that maps queue to VLAN id in VFTA
949 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
950 *
951 * Turn on/off specified VLAN in the VLAN filter table.
952 **/
953 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
954 {
955 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
956 vlan_on), IXGBE_NOT_IMPLEMENTED);
957 }
958
959 /**
960 * ixgbe_set_vlvf - Set VLAN Pool Filter
961 * @hw: pointer to hardware structure
962 * @vlan: VLAN id to write to VLAN filter
963 * @vind: VMDq output index that maps queue to VLAN id in VFVFB
964 * @vlan_on: boolean flag to turn on/off VLAN in VFVF
965 * @vfta_changed: pointer to boolean flag which indicates whether VFTA
966 * should be changed
967 *
968 * Turn on/off specified bit in VLVF table.
969 **/
970 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
971 bool *vfta_changed)
972 {
973 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
974 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
975 }
976
977 /**
978 * ixgbe_fc_enable - Enable flow control
979 * @hw: pointer to hardware structure
980 *
981 * Configures the flow control settings based on SW configuration.
982 **/
983 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
984 {
985 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
986 IXGBE_NOT_IMPLEMENTED);
987 }
988
989 /**
990 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
991 * @hw: pointer to hardware structure
992 * @maj: driver major number to be sent to firmware
993 * @min: driver minor number to be sent to firmware
994 * @build: driver build number to be sent to firmware
995 * @ver: driver version number to be sent to firmware
996 **/
997 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
998 u8 ver)
999 {
1000 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1001 build, ver), IXGBE_NOT_IMPLEMENTED);
1002 }
1003
1004
1005 /**
1006 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1007 * @hw: pointer to hardware structure
1008 * @reg: analog register to read
1009 * @val: read value
1010 *
1011 * Performs write operation to analog register specified.
1012 **/
1013 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1014 {
1015 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1016 val), IXGBE_NOT_IMPLEMENTED);
1017 }
1018
1019 /**
1020 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1021 * @hw: pointer to hardware structure
1022 * @reg: analog register to write
1023 * @val: value to write
1024 *
1025 * Performs write operation to Atlas analog register specified.
1101 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1102 {
1103 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1104 (hw, byte_offset, eeprom_data),
1105 IXGBE_NOT_IMPLEMENTED);
1106 }
1107
1108 /**
1109 * ixgbe_get_supported_physical_layer - Returns physical layer type
1110 * @hw: pointer to hardware structure
1111 *
1112 * Determines physical layer capabilities of the current configuration.
1113 **/
1114 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1115 {
1116 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1117 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1118 }
1119
1120 /**
1121 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1122 * @hw: pointer to hardware structure
1123 * @regval: bitfield to write to the Rx DMA register
1124 *
1125 * Enables the Rx DMA unit of the device.
1126 **/
1127 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1128 {
1129 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1130 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1131 }
1132
1133 /**
1134 * ixgbe_disable_sec_rx_path - Stops the receive data path
1135 * @hw: pointer to hardware structure
1136 *
1137 * Stops the receive data path.
1138 **/
1139 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1140 {
1141 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1142 (hw), IXGBE_NOT_IMPLEMENTED);
1143 }
1144
1145 /**
1146 * ixgbe_enable_sec_rx_path - Enables the receive data path
1147 * @hw: pointer to hardware structure
1148 *
1149 * Enables the receive data path.
1150 **/
1151 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1152 {
1153 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1154 (hw), IXGBE_NOT_IMPLEMENTED);
1155 }
1156
1157 /**
1158 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1159 * @hw: pointer to hardware structure
1160 * @mask: Mask to specify which semaphore to acquire
1161 *
1162 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1163 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1164 **/
1165 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
1166 {
1167 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1168 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1169 }
1170
1171 /**
1172 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1173 * @hw: pointer to hardware structure
1174 * @mask: Mask to specify which semaphore to release
1175 *
1176 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
|