1 /******************************************************************************
2
3 Copyright (c) 2001-2012, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32 ******************************************************************************/
33 /*$FreeBSD: src/sys/dev/ixgbe/ixgbe_api.c,v 1.13 2012/07/05 20:51:44 jfv Exp $*/
34
35 #include "ixgbe_api.h"
36 #include "ixgbe_common.h"
37
38 /**
39 * ixgbe_init_shared_code - Initialize the shared code
40 * @hw: pointer to hardware structure
41 *
42 * This will assign function pointers and assign the MAC type and PHY code.
43 * Does not touch the hardware. This function must be called prior to any
44 * other function in the shared code. The ixgbe_hw structure should be
45 * memset to 0 prior to calling this function. The following fields in
46 * hw structure should be filled in prior to calling this function:
47 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
48 * subsystem_vendor_id, and revision_id
49 **/
50 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
51 {
52 s32 status;
53
54 DEBUGFUNC("ixgbe_init_shared_code");
55
56 /*
57 * Set the mac type
58 */
59 ixgbe_set_mac_type(hw);
60
61 switch (hw->mac.type) {
62 case ixgbe_mac_82598EB:
63 status = ixgbe_init_ops_82598(hw);
64 break;
65 case ixgbe_mac_82599EB:
66 status = ixgbe_init_ops_82599(hw);
67 break;
68 #if 0
69 /* XXX KEBE ASKS - nuke this? */
70 case ixgbe_mac_82599_vf:
71 case ixgbe_mac_X540_vf:
72 status = ixgbe_init_ops_vf(hw);
73 break;
74 #endif
75 case ixgbe_mac_X540:
76 status = ixgbe_init_ops_X540(hw);
77 break;
78 default:
79 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
80 break;
81 }
82
83 return status;
84 }
85
86 /**
87 * ixgbe_set_mac_type - Sets MAC type
88 * @hw: pointer to the HW structure
89 *
90 * This function sets the mac type of the adapter based on the
91 * vendor ID and device ID stored in the hw structure.
92 **/
93 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
94 {
95 s32 ret_val = IXGBE_SUCCESS;
96
97 DEBUGFUNC("ixgbe_set_mac_type\n");
98
99 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) {
100 switch (hw->device_id) {
101 case IXGBE_DEV_ID_82598:
102 case IXGBE_DEV_ID_82598_BX:
103 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
104 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
105 case IXGBE_DEV_ID_82598AT:
106 case IXGBE_DEV_ID_82598AT2:
107 case IXGBE_DEV_ID_82598EB_CX4:
108 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
109 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
110 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
111 case IXGBE_DEV_ID_82598EB_XF_LR:
112 case IXGBE_DEV_ID_82598EB_SFP_LOM:
113 hw->mac.type = ixgbe_mac_82598EB;
114 break;
115 case IXGBE_DEV_ID_82599_KX4:
116 case IXGBE_DEV_ID_82599_KX4_MEZZ:
117 case IXGBE_DEV_ID_82599_XAUI_LOM:
118 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
119 case IXGBE_DEV_ID_82599_KR:
120 case IXGBE_DEV_ID_82599_SFP:
121 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
122 case IXGBE_DEV_ID_82599_SFP_FCOE:
123 case IXGBE_DEV_ID_82599_SFP_EM:
124 case IXGBE_DEV_ID_82599_SFP_SF2:
125 case IXGBE_DEV_ID_82599EN_SFP:
126 case IXGBE_DEV_ID_82599_CX4:
127 case IXGBE_DEV_ID_82599_T3_LOM:
128 hw->mac.type = ixgbe_mac_82599EB;
129 break;
130 case IXGBE_DEV_ID_82599_VF:
131 hw->mac.type = ixgbe_mac_82599_vf;
132 break;
133 case IXGBE_DEV_ID_X540_VF:
134 hw->mac.type = ixgbe_mac_X540_vf;
135 break;
136 case IXGBE_DEV_ID_X540T:
137 case IXGBE_DEV_ID_X540T1:
138 hw->mac.type = ixgbe_mac_X540;
139 break;
140 default:
141 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
142 break;
143 }
144 } else {
145 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
146 }
147
148 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
149 hw->mac.type, ret_val);
150 return ret_val;
151 }
152
153 /**
154 * ixgbe_init_hw - Initialize the hardware
155 * @hw: pointer to hardware structure
156 *
157 * Initialize the hardware by resetting and then starting the hardware
158 **/
159 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
160 {
161 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
162 IXGBE_NOT_IMPLEMENTED);
163 }
164
165 /**
166 * ixgbe_reset_hw - Performs a hardware reset
167 * @hw: pointer to hardware structure
168 *
169 * Resets the hardware by resetting the transmit and receive units, masks and
170 * clears all interrupts, performs a PHY reset, and performs a MAC reset
171 **/
172 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
173 {
174 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
175 IXGBE_NOT_IMPLEMENTED);
176 }
177
178 /**
179 * ixgbe_start_hw - Prepares hardware for Rx/Tx
180 * @hw: pointer to hardware structure
181 *
182 * Starts the hardware by filling the bus info structure and media type,
183 * clears all on chip counters, initializes receive address registers,
184 * multicast table, VLAN filter table, calls routine to setup link and
185 * flow control settings, and leaves transmit and receive units disabled
186 * and uninitialized.
187 **/
188 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
189 {
190 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
191 IXGBE_NOT_IMPLEMENTED);
192 }
193
194 /**
195 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
196 * which is disabled by default in ixgbe_start_hw();
197 *
198 * @hw: pointer to hardware structure
199 *
200 * Enable relaxed ordering;
201 **/
202 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
203 {
204 if (hw->mac.ops.enable_relaxed_ordering)
205 hw->mac.ops.enable_relaxed_ordering(hw);
206 }
207
208 /**
209 * ixgbe_clear_hw_cntrs - Clear hardware counters
210 * @hw: pointer to hardware structure
211 *
212 * Clears all hardware statistics counters by reading them from the hardware
213 * Statistics counters are clear on read.
214 **/
215 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
216 {
217 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
218 IXGBE_NOT_IMPLEMENTED);
219 }
220
221 /**
222 * ixgbe_get_media_type - Get media type
223 * @hw: pointer to hardware structure
224 *
225 * Returns the media type (fiber, copper, backplane)
226 **/
227 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
228 {
229 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
230 ixgbe_media_type_unknown);
231 }
232
233 /**
234 * ixgbe_get_mac_addr - Get MAC address
235 * @hw: pointer to hardware structure
236 * @mac_addr: Adapter MAC address
237 *
238 * Reads the adapter's MAC address from the first Receive Address Register
239 * (RAR0) A reset of the adapter must have been performed prior to calling
240 * this function in order for the MAC address to have been loaded from the
241 * EEPROM into RAR0
242 **/
243 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
244 {
245 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
246 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
247 }
248
249 /**
250 * ixgbe_get_san_mac_addr - Get SAN MAC address
251 * @hw: pointer to hardware structure
252 * @san_mac_addr: SAN MAC address
253 *
254 * Reads the SAN MAC address from the EEPROM, if it's available. This is
255 * per-port, so set_lan_id() must be called before reading the addresses.
256 **/
257 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
258 {
259 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
260 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
261 }
262
263 /**
264 * ixgbe_set_san_mac_addr - Write a SAN MAC address
265 * @hw: pointer to hardware structure
266 * @san_mac_addr: SAN MAC address
267 *
268 * Writes A SAN MAC address to the EEPROM.
269 **/
270 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
271 {
272 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
273 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
274 }
275
276 /**
277 * ixgbe_get_device_caps - Get additional device capabilities
278 * @hw: pointer to hardware structure
279 * @device_caps: the EEPROM word for device capabilities
280 *
281 * Reads the extra device capabilities from the EEPROM
282 **/
283 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
284 {
285 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
286 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
287 }
288
289 /**
290 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
291 * @hw: pointer to hardware structure
292 * @wwnn_prefix: the alternative WWNN prefix
293 * @wwpn_prefix: the alternative WWPN prefix
294 *
295 * This function will read the EEPROM from the alternative SAN MAC address
296 * block to check the support for the alternative WWNN/WWPN prefix support.
297 **/
298 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
299 u16 *wwpn_prefix)
300 {
301 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
302 (hw, wwnn_prefix, wwpn_prefix),
303 IXGBE_NOT_IMPLEMENTED);
304 }
305
306 /**
307 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
308 * @hw: pointer to hardware structure
309 * @bs: the fcoe boot status
310 *
311 * This function will read the FCOE boot status from the iSCSI FCOE block
312 **/
313 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
314 {
315 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
316 (hw, bs),
317 IXGBE_NOT_IMPLEMENTED);
318 }
319
320 /**
321 * ixgbe_get_bus_info - Set PCI bus info
322 * @hw: pointer to hardware structure
323 *
324 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
325 **/
326 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
327 {
328 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
329 IXGBE_NOT_IMPLEMENTED);
330 }
331
332 /**
333 * ixgbe_get_num_of_tx_queues - Get Tx queues
334 * @hw: pointer to hardware structure
335 *
336 * Returns the number of transmit queues for the given adapter.
337 **/
338 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
339 {
340 return hw->mac.max_tx_queues;
341 }
342
343 /**
344 * ixgbe_get_num_of_rx_queues - Get Rx queues
345 * @hw: pointer to hardware structure
346 *
347 * Returns the number of receive queues for the given adapter.
348 **/
349 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
350 {
351 return hw->mac.max_rx_queues;
352 }
353
354 /**
355 * ixgbe_stop_adapter - Disable Rx/Tx units
356 * @hw: pointer to hardware structure
357 *
358 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
359 * disables transmit and receive units. The adapter_stopped flag is used by
360 * the shared code and drivers to determine if the adapter is in a stopped
361 * state and should not touch the hardware.
362 **/
363 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
364 {
365 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
366 IXGBE_NOT_IMPLEMENTED);
367 }
368
369 /**
370 * ixgbe_read_pba_string - Reads part number string from EEPROM
371 * @hw: pointer to hardware structure
372 * @pba_num: stores the part number string from the EEPROM
373 * @pba_num_size: part number string buffer length
374 *
375 * Reads the part number string from the EEPROM.
376 **/
377 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
378 {
379 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
380 }
381
382 /**
383 * ixgbe_read_pba_num - Reads part number from EEPROM
384 * @hw: pointer to hardware structure
385 * @pba_num: stores the part number from the EEPROM
386 *
387 * Reads the part number from the EEPROM.
388 **/
389 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
390 {
391 return ixgbe_read_pba_num_generic(hw, pba_num);
392 }
393
394 /**
395 * ixgbe_identify_phy - Get PHY type
396 * @hw: pointer to hardware structure
397 *
398 * Determines the physical layer module found on the current adapter.
399 **/
400 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
401 {
402 s32 status = IXGBE_SUCCESS;
403
404 if (hw->phy.type == ixgbe_phy_unknown) {
405 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
406 IXGBE_NOT_IMPLEMENTED);
407 }
408
409 return status;
410 }
411
412 /**
413 * ixgbe_reset_phy - Perform a PHY reset
414 * @hw: pointer to hardware structure
415 **/
416 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
417 {
418 s32 status = IXGBE_SUCCESS;
419
420 if (hw->phy.type == ixgbe_phy_unknown) {
421 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
422 status = IXGBE_ERR_PHY;
423 }
424
425 if (status == IXGBE_SUCCESS) {
426 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
427 IXGBE_NOT_IMPLEMENTED);
428 }
429 return status;
430 }
431
432 /**
433 * ixgbe_get_phy_firmware_version -
434 * @hw: pointer to hardware structure
435 * @firmware_version: pointer to firmware version
436 **/
437 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
438 {
439 s32 status = IXGBE_SUCCESS;
440
441 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
442 (hw, firmware_version),
443 IXGBE_NOT_IMPLEMENTED);
444 return status;
445 }
446
447 /**
448 * ixgbe_read_phy_reg - Read PHY register
449 * @hw: pointer to hardware structure
450 * @reg_addr: 32 bit address of PHY register to read
451 * @phy_data: Pointer to read data from PHY register
452 *
453 * Reads a value from a specified PHY register
454 **/
455 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
456 u16 *phy_data)
457 {
458 if (hw->phy.id == 0)
459 ixgbe_identify_phy(hw);
460
461 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
462 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
463 }
464
465 /**
466 * ixgbe_write_phy_reg - Write PHY register
467 * @hw: pointer to hardware structure
468 * @reg_addr: 32 bit PHY register to write
469 * @phy_data: Data to write to the PHY register
470 *
471 * Writes a value to specified PHY register
472 **/
473 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
474 u16 phy_data)
475 {
476 if (hw->phy.id == 0)
477 ixgbe_identify_phy(hw);
478
479 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
480 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
481 }
482
483 /**
484 * ixgbe_setup_phy_link - Restart PHY autoneg
485 * @hw: pointer to hardware structure
486 *
487 * Restart autonegotiation and PHY and waits for completion.
488 **/
489 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
490 {
491 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
492 IXGBE_NOT_IMPLEMENTED);
493 }
494
495 /**
496 * ixgbe_check_phy_link - Determine link and speed status
497 * @hw: pointer to hardware structure
498 *
499 * Reads a PHY register to determine if link is up and the current speed for
500 * the PHY.
501 **/
502 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
503 bool *link_up)
504 {
505 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
506 link_up), IXGBE_NOT_IMPLEMENTED);
507 }
508
509 /**
510 * ixgbe_setup_phy_link_speed - Set auto advertise
511 * @hw: pointer to hardware structure
512 * @speed: new link speed
513 * @autoneg: TRUE if autonegotiation enabled
514 *
515 * Sets the auto advertised capabilities
516 **/
517 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
518 bool autoneg,
519 bool autoneg_wait_to_complete)
520 {
521 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
522 autoneg, autoneg_wait_to_complete),
523 IXGBE_NOT_IMPLEMENTED);
524 }
525
526 /**
527 * ixgbe_check_link - Get link and speed status
528 * @hw: pointer to hardware structure
529 *
530 * Reads the links register to determine if link is up and the current speed
531 **/
532 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
533 bool *link_up, bool link_up_wait_to_complete)
534 {
535 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
536 link_up, link_up_wait_to_complete),
537 IXGBE_NOT_IMPLEMENTED);
538 }
539
540 /**
541 * ixgbe_disable_tx_laser - Disable Tx laser
542 * @hw: pointer to hardware structure
543 *
544 * If the driver needs to disable the laser on SFI optics.
545 **/
546 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
547 {
548 if (hw->mac.ops.disable_tx_laser)
549 hw->mac.ops.disable_tx_laser(hw);
550 }
551
552 /**
553 * ixgbe_enable_tx_laser - Enable Tx laser
554 * @hw: pointer to hardware structure
555 *
556 * If the driver needs to enable the laser on SFI optics.
557 **/
558 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
559 {
560 if (hw->mac.ops.enable_tx_laser)
561 hw->mac.ops.enable_tx_laser(hw);
562 }
563
564 /**
565 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
566 * @hw: pointer to hardware structure
567 *
568 * When the driver changes the link speeds that it can support then
569 * flap the tx laser to alert the link partner to start autotry
570 * process on its end.
571 **/
572 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
573 {
574 if (hw->mac.ops.flap_tx_laser)
575 hw->mac.ops.flap_tx_laser(hw);
576 }
577
578 /**
579 * ixgbe_setup_link - Set link speed
580 * @hw: pointer to hardware structure
581 * @speed: new link speed
582 * @autoneg: TRUE if autonegotiation enabled
583 *
584 * Configures link settings. Restarts the link.
585 * Performs autonegotiation if needed.
586 **/
587 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
588 bool autoneg,
589 bool autoneg_wait_to_complete)
590 {
591 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
592 autoneg, autoneg_wait_to_complete),
593 IXGBE_NOT_IMPLEMENTED);
594 }
595
596 /**
597 * ixgbe_get_link_capabilities - Returns link capabilities
598 * @hw: pointer to hardware structure
599 *
600 * Determines the link capabilities of the current configuration.
601 **/
602 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
603 bool *autoneg)
604 {
605 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
606 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
607 }
608
609 /**
610 * ixgbe_led_on - Turn on LEDs
611 * @hw: pointer to hardware structure
612 * @index: led number to turn on
613 *
614 * Turns on the software controllable LEDs.
615 **/
616 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
617 {
618 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
619 IXGBE_NOT_IMPLEMENTED);
620 }
621
622 /**
623 * ixgbe_led_off - Turn off LEDs
624 * @hw: pointer to hardware structure
625 * @index: led number to turn off
626 *
627 * Turns off the software controllable LEDs.
628 **/
629 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
630 {
631 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
632 IXGBE_NOT_IMPLEMENTED);
633 }
634
635 /**
636 * ixgbe_blink_led_start - Blink LEDs
637 * @hw: pointer to hardware structure
638 * @index: led number to blink
639 *
640 * Blink LED based on index.
641 **/
642 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
643 {
644 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
645 IXGBE_NOT_IMPLEMENTED);
646 }
647
648 /**
649 * ixgbe_blink_led_stop - Stop blinking LEDs
650 * @hw: pointer to hardware structure
651 *
652 * Stop blinking LED based on index.
653 **/
654 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
655 {
656 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
657 IXGBE_NOT_IMPLEMENTED);
658 }
659
660 /**
661 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
662 * @hw: pointer to hardware structure
663 *
664 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
665 * ixgbe_hw struct in order to set up EEPROM access.
666 **/
667 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
668 {
669 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
670 IXGBE_NOT_IMPLEMENTED);
671 }
672
673
674 /**
675 * ixgbe_write_eeprom - Write word to EEPROM
676 * @hw: pointer to hardware structure
677 * @offset: offset within the EEPROM to be written to
678 * @data: 16 bit word to be written to the EEPROM
679 *
680 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
681 * called after this function, the EEPROM will most likely contain an
682 * invalid checksum.
683 **/
684 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
685 {
686 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
687 IXGBE_NOT_IMPLEMENTED);
688 }
689
690 /**
691 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
692 * @hw: pointer to hardware structure
693 * @offset: offset within the EEPROM to be written to
694 * @data: 16 bit word(s) to be written to the EEPROM
695 * @words: number of words
696 *
697 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
698 * called after this function, the EEPROM will most likely contain an
699 * invalid checksum.
700 **/
701 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
702 u16 *data)
703 {
704 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
705 (hw, offset, words, data),
706 IXGBE_NOT_IMPLEMENTED);
707 }
708
709 /**
710 * ixgbe_read_eeprom - Read word from EEPROM
711 * @hw: pointer to hardware structure
712 * @offset: offset within the EEPROM to be read
713 * @data: read 16 bit value from EEPROM
714 *
715 * Reads 16 bit value from EEPROM
716 **/
717 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
718 {
719 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
720 IXGBE_NOT_IMPLEMENTED);
721 }
722
723 /**
724 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
725 * @hw: pointer to hardware structure
726 * @offset: offset within the EEPROM to be read
727 * @data: read 16 bit word(s) from EEPROM
728 * @words: number of words
729 *
730 * Reads 16 bit word(s) from EEPROM
731 **/
732 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
733 u16 words, u16 *data)
734 {
735 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
736 (hw, offset, words, data),
737 IXGBE_NOT_IMPLEMENTED);
738 }
739
740 /**
741 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
742 * @hw: pointer to hardware structure
743 * @checksum_val: calculated checksum
744 *
745 * Performs checksum calculation and validates the EEPROM checksum
746 **/
747 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
748 {
749 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
750 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
751 }
752
753 /**
754 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
755 * @hw: pointer to hardware structure
756 **/
757 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
758 {
759 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
760 IXGBE_NOT_IMPLEMENTED);
761 }
762
763 /**
764 * ixgbe_insert_mac_addr - Find a RAR for this mac address
765 * @hw: pointer to hardware structure
766 * @addr: Address to put into receive address register
767 * @vmdq: VMDq pool to assign
768 *
769 * Puts an ethernet address into a receive address register, or
770 * finds the rar that it is aleady in; adds to the pool list
771 **/
772 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
773 {
774 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
775 (hw, addr, vmdq),
776 IXGBE_NOT_IMPLEMENTED);
777 }
778
779 /**
780 * ixgbe_set_rar - Set Rx address register
781 * @hw: pointer to hardware structure
782 * @index: Receive address register to write
783 * @addr: Address to put into receive address register
784 * @vmdq: VMDq "set"
785 * @enable_addr: set flag that address is active
786 *
787 * Puts an ethernet address into a receive address register.
788 **/
789 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
790 u32 enable_addr)
791 {
792 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
793 enable_addr), IXGBE_NOT_IMPLEMENTED);
794 }
795
796 /**
797 * ixgbe_clear_rar - Clear Rx address register
798 * @hw: pointer to hardware structure
799 * @index: Receive address register to write
800 *
801 * Puts an ethernet address into a receive address register.
802 **/
803 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
804 {
805 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
806 IXGBE_NOT_IMPLEMENTED);
807 }
808
809 /**
810 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
811 * @hw: pointer to hardware structure
812 * @rar: receive address register index to associate with VMDq index
813 * @vmdq: VMDq set or pool index
814 **/
815 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
816 {
817 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
818 IXGBE_NOT_IMPLEMENTED);
819
820 }
821
822 /**
823 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
824 * @hw: pointer to hardware structure
825 * @vmdq: VMDq default pool index
826 **/
827 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
828 {
829 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
830 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
831 }
832
833 /**
834 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
835 * @hw: pointer to hardware structure
836 * @rar: receive address register index to disassociate with VMDq index
837 * @vmdq: VMDq set or pool index
838 **/
839 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
840 {
841 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
842 IXGBE_NOT_IMPLEMENTED);
843 }
844
845 /**
846 * ixgbe_init_rx_addrs - Initializes receive address filters.
847 * @hw: pointer to hardware structure
848 *
849 * Places the MAC address in receive address register 0 and clears the rest
850 * of the receive address registers. Clears the multicast table. Assumes
851 * the receiver is in reset when the routine is called.
852 **/
853 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
854 {
855 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
856 IXGBE_NOT_IMPLEMENTED);
857 }
858
859 /**
860 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
861 * @hw: pointer to hardware structure
862 **/
863 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
864 {
865 return hw->mac.num_rar_entries;
866 }
867
868 /**
869 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
870 * @hw: pointer to hardware structure
871 * @addr_list: the list of new multicast addresses
872 * @addr_count: number of addresses
873 * @func: iterator function to walk the multicast address list
874 *
875 * The given list replaces any existing list. Clears the secondary addrs from
876 * receive address registers. Uses unused receive address registers for the
877 * first secondary addresses, and falls back to promiscuous mode as needed.
878 **/
879 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
880 u32 addr_count, ixgbe_mc_addr_itr func)
881 {
882 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
883 addr_list, addr_count, func),
884 IXGBE_NOT_IMPLEMENTED);
885 }
886
887 /**
888 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
889 * @hw: pointer to hardware structure
890 * @mc_addr_list: the list of new multicast addresses
891 * @mc_addr_count: number of addresses
892 * @func: iterator function to walk the multicast address list
893 *
894 * The given list replaces any existing list. Clears the MC addrs from receive
895 * address registers and the multicast table. Uses unused receive address
896 * registers for the first multicast addresses, and hashes the rest into the
897 * multicast table.
898 **/
899 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
900 u32 mc_addr_count, ixgbe_mc_addr_itr func,
901 bool clear)
902 {
903 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
904 mc_addr_list, mc_addr_count, func, clear),
905 IXGBE_NOT_IMPLEMENTED);
906 }
907
908 /**
909 * ixgbe_enable_mc - Enable multicast address in RAR
910 * @hw: pointer to hardware structure
911 *
912 * Enables multicast address in RAR and the use of the multicast hash table.
913 **/
914 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
915 {
916 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
917 IXGBE_NOT_IMPLEMENTED);
918 }
919
920 /**
921 * ixgbe_disable_mc - Disable multicast address in RAR
922 * @hw: pointer to hardware structure
923 *
924 * Disables multicast address in RAR and the use of the multicast hash table.
925 **/
926 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
927 {
928 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
929 IXGBE_NOT_IMPLEMENTED);
930 }
931
932 /**
933 * ixgbe_clear_vfta - Clear VLAN filter table
934 * @hw: pointer to hardware structure
935 *
936 * Clears the VLAN filer table, and the VMDq index associated with the filter
937 **/
938 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
939 {
940 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
941 IXGBE_NOT_IMPLEMENTED);
942 }
943
944 /**
945 * ixgbe_set_vfta - Set VLAN filter table
946 * @hw: pointer to hardware structure
947 * @vlan: VLAN id to write to VLAN filter
948 * @vind: VMDq output index that maps queue to VLAN id in VFTA
949 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
950 *
951 * Turn on/off specified VLAN in the VLAN filter table.
952 **/
953 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
954 {
955 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
956 vlan_on), IXGBE_NOT_IMPLEMENTED);
957 }
958
959 /**
960 * ixgbe_set_vlvf - Set VLAN Pool Filter
961 * @hw: pointer to hardware structure
962 * @vlan: VLAN id to write to VLAN filter
963 * @vind: VMDq output index that maps queue to VLAN id in VFVFB
964 * @vlan_on: boolean flag to turn on/off VLAN in VFVF
965 * @vfta_changed: pointer to boolean flag which indicates whether VFTA
966 * should be changed
967 *
968 * Turn on/off specified bit in VLVF table.
969 **/
970 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
971 bool *vfta_changed)
972 {
973 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
974 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
975 }
976
977 /**
978 * ixgbe_fc_enable - Enable flow control
979 * @hw: pointer to hardware structure
980 *
981 * Configures the flow control settings based on SW configuration.
982 **/
983 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
984 {
985 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
986 IXGBE_NOT_IMPLEMENTED);
987 }
988
989 /**
990 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
991 * @hw: pointer to hardware structure
992 * @maj: driver major number to be sent to firmware
993 * @min: driver minor number to be sent to firmware
994 * @build: driver build number to be sent to firmware
995 * @ver: driver version number to be sent to firmware
996 **/
997 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
998 u8 ver)
999 {
1000 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1001 build, ver), IXGBE_NOT_IMPLEMENTED);
1002 }
1003
1004
1005 /**
1006 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1007 * @hw: pointer to hardware structure
1008 * @reg: analog register to read
1009 * @val: read value
1010 *
1011 * Performs write operation to analog register specified.
1012 **/
1013 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1014 {
1015 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1016 val), IXGBE_NOT_IMPLEMENTED);
1017 }
1018
1019 /**
1020 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1021 * @hw: pointer to hardware structure
1022 * @reg: analog register to write
1023 * @val: value to write
1024 *
1025 * Performs write operation to Atlas analog register specified.
1026 **/
1027 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1028 {
1029 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1030 val), IXGBE_NOT_IMPLEMENTED);
1031 }
1032
1033 /**
1034 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1035 * @hw: pointer to hardware structure
1036 *
1037 * Initializes the Unicast Table Arrays to zero on device load. This
1038 * is part of the Rx init addr execution path.
1039 **/
1040 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1041 {
1042 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1043 IXGBE_NOT_IMPLEMENTED);
1044 }
1045
1046 /**
1047 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1048 * @hw: pointer to hardware structure
1049 * @byte_offset: byte offset to read
1050 * @data: value read
1051 *
1052 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1053 **/
1054 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1055 u8 *data)
1056 {
1057 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1058 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1059 }
1060
1061 /**
1062 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1063 * @hw: pointer to hardware structure
1064 * @byte_offset: byte offset to write
1065 * @data: value to write
1066 *
1067 * Performs byte write operation to SFP module's EEPROM over I2C interface
1068 * at a specified device address.
1069 **/
1070 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1071 u8 data)
1072 {
1073 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1074 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1075 }
1076
1077 /**
1078 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1079 * @hw: pointer to hardware structure
1080 * @byte_offset: EEPROM byte offset to write
1081 * @eeprom_data: value to write
1082 *
1083 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1084 **/
1085 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1086 u8 byte_offset, u8 eeprom_data)
1087 {
1088 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1089 (hw, byte_offset, eeprom_data),
1090 IXGBE_NOT_IMPLEMENTED);
1091 }
1092
1093 /**
1094 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1095 * @hw: pointer to hardware structure
1096 * @byte_offset: EEPROM byte offset to read
1097 * @eeprom_data: value read
1098 *
1099 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1100 **/
1101 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1102 {
1103 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1104 (hw, byte_offset, eeprom_data),
1105 IXGBE_NOT_IMPLEMENTED);
1106 }
1107
1108 /**
1109 * ixgbe_get_supported_physical_layer - Returns physical layer type
1110 * @hw: pointer to hardware structure
1111 *
1112 * Determines physical layer capabilities of the current configuration.
1113 **/
1114 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1115 {
1116 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1117 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1118 }
1119
1120 /**
1121 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1122 * @hw: pointer to hardware structure
1123 * @regval: bitfield to write to the Rx DMA register
1124 *
1125 * Enables the Rx DMA unit of the device.
1126 **/
1127 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1128 {
1129 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1130 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1131 }
1132
1133 /**
1134 * ixgbe_disable_sec_rx_path - Stops the receive data path
1135 * @hw: pointer to hardware structure
1136 *
1137 * Stops the receive data path.
1138 **/
1139 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1140 {
1141 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1142 (hw), IXGBE_NOT_IMPLEMENTED);
1143 }
1144
1145 /**
1146 * ixgbe_enable_sec_rx_path - Enables the receive data path
1147 * @hw: pointer to hardware structure
1148 *
1149 * Enables the receive data path.
1150 **/
1151 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1152 {
1153 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1154 (hw), IXGBE_NOT_IMPLEMENTED);
1155 }
1156
1157 /**
1158 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1159 * @hw: pointer to hardware structure
1160 * @mask: Mask to specify which semaphore to acquire
1161 *
1162 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1163 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1164 **/
1165 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
1166 {
1167 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1168 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1169 }
1170
1171 /**
1172 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1173 * @hw: pointer to hardware structure
1174 * @mask: Mask to specify which semaphore to release
1175 *
1176 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1177 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1178 **/
1179 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
1180 {
1181 if (hw->mac.ops.release_swfw_sync)
1182 hw->mac.ops.release_swfw_sync(hw, mask);
1183 }
1184