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3178 Support for LSI 2208 chipset in mr_sas
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--- old/usr/src/uts/common/io/mr_sas/mr_sas.c
+++ new/usr/src/uts/common/io/mr_sas/mr_sas.c
1 1 /*
2 2 * mr_sas.c: source for mr_sas driver
3 3 *
4 - * MegaRAID device driver for SAS2.0 controllers
5 - * Copyright (c) 2008-2010, LSI Logic Corporation.
4 + * Solaris MegaRAID device driver for SAS2.0 controllers
5 + * Copyright (c) 2008-2012, LSI Logic Corporation.
6 6 * All rights reserved.
7 7 *
8 8 * Version:
9 9 * Author:
10 + * Swaminathan K S
10 11 * Arun Chandrashekhar
11 12 * Manju R
12 - * Rajesh Prabhakaran
13 - * Seokmann Ju
13 + * Rasheed
14 + * Shakeel Bukhari
14 15 *
15 16 * Redistribution and use in source and binary forms, with or without
16 17 * modification, are permitted provided that the following conditions are met:
17 18 *
18 19 * 1. Redistributions of source code must retain the above copyright notice,
19 20 * this list of conditions and the following disclaimer.
20 21 *
21 22 * 2. Redistributions in binary form must reproduce the above copyright notice,
22 23 * this list of conditions and the following disclaimer in the documentation
23 24 * and/or other materials provided with the distribution.
24 25 *
25 26 * 3. Neither the name of the author nor the names of its contributors may be
26 27 * used to endorse or promote products derived from this software without
27 28 * specific prior written permission.
28 29 *
29 30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 31 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 32 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
32 33 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
33 34 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
34 35 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
35 36 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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36 37 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
37 38 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
38 39 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
39 40 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
40 41 * DAMAGE.
41 42 */
42 43
43 44 /*
44 45 * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
45 46 * Copyright (c) 2011 Bayard G. Bell. All rights reserved.
47 + * Copyright 2012 Nexenta System, Inc. All rights reserved.
46 48 */
47 49
48 50 #include <sys/types.h>
49 51 #include <sys/param.h>
50 52 #include <sys/file.h>
51 53 #include <sys/errno.h>
52 54 #include <sys/open.h>
53 55 #include <sys/cred.h>
54 56 #include <sys/modctl.h>
55 57 #include <sys/conf.h>
56 58 #include <sys/devops.h>
57 59 #include <sys/cmn_err.h>
58 60 #include <sys/kmem.h>
59 61 #include <sys/stat.h>
60 62 #include <sys/mkdev.h>
61 63 #include <sys/pci.h>
62 64 #include <sys/scsi/scsi.h>
63 65 #include <sys/ddi.h>
64 66 #include <sys/sunddi.h>
65 67 #include <sys/atomic.h>
66 68 #include <sys/signal.h>
67 69 #include <sys/byteorder.h>
68 70 #include <sys/sdt.h>
69 71 #include <sys/fs/dv_node.h> /* devfs_clean */
70 72
71 73 #include "mr_sas.h"
72 74
73 75 /*
74 76 * FMA header files
75 77 */
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76 78 #include <sys/ddifm.h>
77 79 #include <sys/fm/protocol.h>
78 80 #include <sys/fm/util.h>
79 81 #include <sys/fm/io/ddi.h>
80 82
81 83 /*
82 84 * Local static data
83 85 */
84 86 static void *mrsas_state = NULL;
85 87 static volatile boolean_t mrsas_relaxed_ordering = B_TRUE;
86 -static volatile int debug_level_g = CL_NONE;
87 -static volatile int msi_enable = 1;
88 +volatile int debug_level_g = CL_NONE;
89 +static volatile int msi_enable = 1;
88 90 static volatile int ctio_enable = 1;
89 91
90 92 /* Default Timeout value to issue online controller reset */
91 -static volatile int debug_timeout_g = 0xB4;
93 +volatile int debug_timeout_g = 0xF0; /* 0xB4; */
92 94 /* Simulate consecutive firmware fault */
93 95 static volatile int debug_fw_faults_after_ocr_g = 0;
94 -
95 96 #ifdef OCRDEBUG
96 97 /* Simulate three consecutive timeout for an IO */
97 98 static volatile int debug_consecutive_timeout_after_ocr_g = 0;
98 99 #endif
99 100
100 101 #pragma weak scsi_hba_open
101 102 #pragma weak scsi_hba_close
102 103 #pragma weak scsi_hba_ioctl
103 104
104 -static ddi_dma_attr_t mrsas_generic_dma_attr = {
105 +/* Local static prototypes. */
106 +static int mrsas_getinfo(dev_info_t *, ddi_info_cmd_t, void *, void **);
107 +static int mrsas_attach(dev_info_t *, ddi_attach_cmd_t);
108 +#ifdef __sparc
109 +static int mrsas_reset(dev_info_t *, ddi_reset_cmd_t);
110 +#else
111 +static int mrsas_quiesce(dev_info_t *);
112 +#endif
113 +static int mrsas_detach(dev_info_t *, ddi_detach_cmd_t);
114 +static int mrsas_open(dev_t *, int, int, cred_t *);
115 +static int mrsas_close(dev_t, int, int, cred_t *);
116 +static int mrsas_ioctl(dev_t, int, intptr_t, int, cred_t *, int *);
117 +
118 +static int mrsas_tran_tgt_init(dev_info_t *, dev_info_t *,
119 + scsi_hba_tran_t *, struct scsi_device *);
120 +static struct scsi_pkt *mrsas_tran_init_pkt(struct scsi_address *, register
121 + struct scsi_pkt *, struct buf *, int, int, int, int,
122 + int (*)(), caddr_t);
123 +static int mrsas_tran_start(struct scsi_address *,
124 + register struct scsi_pkt *);
125 +static int mrsas_tran_abort(struct scsi_address *, struct scsi_pkt *);
126 +static int mrsas_tran_reset(struct scsi_address *, int);
127 +static int mrsas_tran_getcap(struct scsi_address *, char *, int);
128 +static int mrsas_tran_setcap(struct scsi_address *, char *, int, int);
129 +static void mrsas_tran_destroy_pkt(struct scsi_address *,
130 + struct scsi_pkt *);
131 +static void mrsas_tran_dmafree(struct scsi_address *, struct scsi_pkt *);
132 +static void mrsas_tran_sync_pkt(struct scsi_address *, struct scsi_pkt *);
133 +static int mrsas_tran_quiesce(dev_info_t *dip);
134 +static int mrsas_tran_unquiesce(dev_info_t *dip);
135 +static uint_t mrsas_isr();
136 +static uint_t mrsas_softintr();
137 +static void mrsas_undo_resources(dev_info_t *, struct mrsas_instance *);
138 +static struct mrsas_cmd *get_mfi_pkt(struct mrsas_instance *);
139 +static void return_mfi_pkt(struct mrsas_instance *,
140 + struct mrsas_cmd *);
141 +
142 +static void free_space_for_mfi(struct mrsas_instance *);
143 +static uint32_t read_fw_status_reg_ppc(struct mrsas_instance *);
144 +static void issue_cmd_ppc(struct mrsas_cmd *, struct mrsas_instance *);
145 +static int issue_cmd_in_poll_mode_ppc(struct mrsas_instance *,
146 + struct mrsas_cmd *);
147 +static int issue_cmd_in_sync_mode_ppc(struct mrsas_instance *,
148 + struct mrsas_cmd *);
149 +static void enable_intr_ppc(struct mrsas_instance *);
150 +static void disable_intr_ppc(struct mrsas_instance *);
151 +static int intr_ack_ppc(struct mrsas_instance *);
152 +static void flush_cache(struct mrsas_instance *instance);
153 +void display_scsi_inquiry(caddr_t);
154 +static int start_mfi_aen(struct mrsas_instance *instance);
155 +static int handle_drv_ioctl(struct mrsas_instance *instance,
156 + struct mrsas_ioctl *ioctl, int mode);
157 +static int handle_mfi_ioctl(struct mrsas_instance *instance,
158 + struct mrsas_ioctl *ioctl, int mode);
159 +static int handle_mfi_aen(struct mrsas_instance *instance,
160 + struct mrsas_aen *aen);
161 +static struct mrsas_cmd *build_cmd(struct mrsas_instance *,
162 + struct scsi_address *, struct scsi_pkt *, uchar_t *);
163 +static int alloc_additional_dma_buffer(struct mrsas_instance *);
164 +static void complete_cmd_in_sync_mode(struct mrsas_instance *,
165 + struct mrsas_cmd *);
166 +static int mrsas_kill_adapter(struct mrsas_instance *);
167 +static int mrsas_issue_init_mfi(struct mrsas_instance *);
168 +static int mrsas_reset_ppc(struct mrsas_instance *);
169 +static uint32_t mrsas_initiate_ocr_if_fw_is_faulty(struct mrsas_instance *);
170 +static int wait_for_outstanding(struct mrsas_instance *instance);
171 +static int register_mfi_aen(struct mrsas_instance *instance,
172 + uint32_t seq_num, uint32_t class_locale_word);
173 +static int issue_mfi_pthru(struct mrsas_instance *instance, struct
174 + mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
175 +static int issue_mfi_dcmd(struct mrsas_instance *instance, struct
176 + mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
177 +static int issue_mfi_smp(struct mrsas_instance *instance, struct
178 + mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
179 +static int issue_mfi_stp(struct mrsas_instance *instance, struct
180 + mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
181 +static int abort_aen_cmd(struct mrsas_instance *instance,
182 + struct mrsas_cmd *cmd_to_abort);
183 +
184 +static void mrsas_rem_intrs(struct mrsas_instance *instance);
185 +static int mrsas_add_intrs(struct mrsas_instance *instance, int intr_type);
186 +
187 +static void mrsas_tran_tgt_free(dev_info_t *, dev_info_t *,
188 + scsi_hba_tran_t *, struct scsi_device *);
189 +static int mrsas_tran_bus_config(dev_info_t *, uint_t,
190 + ddi_bus_config_op_t, void *, dev_info_t **);
191 +static int mrsas_parse_devname(char *, int *, int *);
192 +static int mrsas_config_all_devices(struct mrsas_instance *);
193 +static int mrsas_config_ld(struct mrsas_instance *, uint16_t,
194 + uint8_t, dev_info_t **);
195 +static int mrsas_name_node(dev_info_t *, char *, int);
196 +static void mrsas_issue_evt_taskq(struct mrsas_eventinfo *);
197 +static void free_additional_dma_buffer(struct mrsas_instance *);
198 +static void io_timeout_checker(void *);
199 +static void mrsas_fm_init(struct mrsas_instance *);
200 +static void mrsas_fm_fini(struct mrsas_instance *);
201 +
202 +static struct mrsas_function_template mrsas_function_template_ppc = {
203 + .read_fw_status_reg = read_fw_status_reg_ppc,
204 + .issue_cmd = issue_cmd_ppc,
205 + .issue_cmd_in_sync_mode = issue_cmd_in_sync_mode_ppc,
206 + .issue_cmd_in_poll_mode = issue_cmd_in_poll_mode_ppc,
207 + .enable_intr = enable_intr_ppc,
208 + .disable_intr = disable_intr_ppc,
209 + .intr_ack = intr_ack_ppc,
210 + .init_adapter = mrsas_init_adapter_ppc
211 +};
212 +
213 +
214 +static struct mrsas_function_template mrsas_function_template_fusion = {
215 + .read_fw_status_reg = tbolt_read_fw_status_reg,
216 + .issue_cmd = tbolt_issue_cmd,
217 + .issue_cmd_in_sync_mode = tbolt_issue_cmd_in_sync_mode,
218 + .issue_cmd_in_poll_mode = tbolt_issue_cmd_in_poll_mode,
219 + .enable_intr = tbolt_enable_intr,
220 + .disable_intr = tbolt_disable_intr,
221 + .intr_ack = tbolt_intr_ack,
222 + .init_adapter = mrsas_init_adapter_tbolt
223 +};
224 +
225 +
226 +ddi_dma_attr_t mrsas_generic_dma_attr = {
105 227 DMA_ATTR_V0, /* dma_attr_version */
106 228 0, /* low DMA address range */
107 229 0xFFFFFFFFU, /* high DMA address range */
108 - 0xFFFFFFFFU, /* DMA counter register */
230 + 0xFFFFFFFFU, /* DMA counter register */
109 231 8, /* DMA address alignment */
110 232 0x07, /* DMA burstsizes */
111 233 1, /* min DMA size */
112 234 0xFFFFFFFFU, /* max DMA size */
113 235 0xFFFFFFFFU, /* segment boundary */
114 236 MRSAS_MAX_SGE_CNT, /* dma_attr_sglen */
115 237 512, /* granularity of device */
116 238 0 /* bus specific DMA flags */
117 239 };
118 240
119 241 int32_t mrsas_max_cap_maxxfer = 0x1000000;
120 242
121 243 /*
244 + * Fix for: Thunderbolt controller IO timeout when IO write size is 1MEG,
245 + * Limit size to 256K
246 + */
247 +uint32_t mrsas_tbolt_max_cap_maxxfer = (512 * 512);
248 +
249 +/*
122 250 * cb_ops contains base level routines
123 251 */
124 252 static struct cb_ops mrsas_cb_ops = {
125 253 mrsas_open, /* open */
126 254 mrsas_close, /* close */
127 255 nodev, /* strategy */
128 256 nodev, /* print */
129 257 nodev, /* dump */
130 258 nodev, /* read */
131 259 nodev, /* write */
132 260 mrsas_ioctl, /* ioctl */
133 261 nodev, /* devmap */
134 262 nodev, /* mmap */
135 263 nodev, /* segmap */
136 264 nochpoll, /* poll */
137 265 nodev, /* cb_prop_op */
138 266 0, /* streamtab */
139 267 D_NEW | D_HOTPLUG, /* cb_flag */
140 268 CB_REV, /* cb_rev */
141 269 nodev, /* cb_aread */
142 270 nodev /* cb_awrite */
143 271 };
144 272
145 273 /*
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146 274 * dev_ops contains configuration routines
147 275 */
148 276 static struct dev_ops mrsas_ops = {
149 277 DEVO_REV, /* rev, */
150 278 0, /* refcnt */
151 279 mrsas_getinfo, /* getinfo */
152 280 nulldev, /* identify */
153 281 nulldev, /* probe */
154 282 mrsas_attach, /* attach */
155 283 mrsas_detach, /* detach */
156 -#ifdef __sparc
284 +#ifdef __sparc
157 285 mrsas_reset, /* reset */
158 286 #else /* __sparc */
159 287 nodev,
160 -#endif /* __sparc */
288 +#endif /* __sparc */
161 289 &mrsas_cb_ops, /* char/block ops */
162 290 NULL, /* bus ops */
163 291 NULL, /* power */
164 -#ifdef __sparc
292 +#ifdef __sparc
165 293 ddi_quiesce_not_needed
166 294 #else /* __sparc */
167 - mrsas_quiesce /* quiesce */
295 + mrsas_quiesce /* quiesce */
168 296 #endif /* __sparc */
169 297 };
170 298
171 299 static struct modldrv modldrv = {
172 300 &mod_driverops, /* module type - driver */
173 301 MRSAS_VERSION,
174 302 &mrsas_ops, /* driver ops */
175 303 };
176 304
177 305 static struct modlinkage modlinkage = {
178 306 MODREV_1, /* ml_rev - must be MODREV_1 */
179 307 &modldrv, /* ml_linkage */
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180 308 NULL /* end of driver linkage */
181 309 };
182 310
183 311 static struct ddi_device_acc_attr endian_attr = {
184 312 DDI_DEVICE_ATTR_V1,
185 313 DDI_STRUCTURE_LE_ACC,
186 314 DDI_STRICTORDER_ACC,
187 315 DDI_DEFAULT_ACC
188 316 };
189 317
318 +/* Use the LSI Fast Path for the 2208 (tbolt) commands. */
319 +unsigned int enable_fp = 1;
190 320
321 +
191 322 /*
192 323 * ************************************************************************** *
193 - * *
194 - * common entry points - for loadable kernel modules *
195 - * *
324 + * *
325 + * common entry points - for loadable kernel modules *
326 + * *
196 327 * ************************************************************************** *
197 328 */
198 329
330 +/*
331 + * _init - initialize a loadable module
332 + * @void
333 + *
334 + * The driver should perform any one-time resource allocation or data
335 + * initialization during driver loading in _init(). For example, the driver
336 + * should initialize any mutexes global to the driver in this routine.
337 + * The driver should not, however, use _init() to allocate or initialize
338 + * anything that has to do with a particular instance of the device.
339 + * Per-instance initialization must be done in attach().
340 + */
199 341 int
200 342 _init(void)
201 343 {
202 344 int ret;
203 345
204 346 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
205 347
206 348 ret = ddi_soft_state_init(&mrsas_state,
207 349 sizeof (struct mrsas_instance), 0);
208 350
209 351 if (ret != DDI_SUCCESS) {
210 - con_log(CL_ANN, (CE_WARN, "mr_sas: could not init state"));
352 + cmn_err(CE_WARN, "mr_sas: could not init state");
211 353 return (ret);
212 354 }
213 355
214 356 if ((ret = scsi_hba_init(&modlinkage)) != DDI_SUCCESS) {
215 - con_log(CL_ANN, (CE_WARN, "mr_sas: could not init scsi hba"));
357 + cmn_err(CE_WARN, "mr_sas: could not init scsi hba");
216 358 ddi_soft_state_fini(&mrsas_state);
217 359 return (ret);
218 360 }
219 361
220 362 ret = mod_install(&modlinkage);
221 363
222 364 if (ret != DDI_SUCCESS) {
223 - con_log(CL_ANN, (CE_WARN, "mr_sas: mod_install failed"));
365 + cmn_err(CE_WARN, "mr_sas: mod_install failed");
224 366 scsi_hba_fini(&modlinkage);
225 367 ddi_soft_state_fini(&mrsas_state);
226 368 }
227 369
228 370 return (ret);
229 371 }
230 372
373 +/*
374 + * _info - returns information about a loadable module.
375 + * @void
376 + *
377 + * _info() is called to return module information. This is a typical entry
378 + * point that does predefined role. It simply calls mod_info().
379 + */
231 380 int
232 381 _info(struct modinfo *modinfop)
233 382 {
234 383 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
235 384
236 385 return (mod_info(&modlinkage, modinfop));
237 386 }
238 387
388 +/*
389 + * _fini - prepare a loadable module for unloading
390 + * @void
391 + *
392 + * In _fini(), the driver should release any resources that were allocated in
393 + * _init(). The driver must remove itself from the system module list.
394 + */
239 395 int
240 396 _fini(void)
241 397 {
242 398 int ret;
243 399
244 400 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
245 401
246 - if ((ret = mod_remove(&modlinkage)) != DDI_SUCCESS)
402 + if ((ret = mod_remove(&modlinkage)) != DDI_SUCCESS) {
403 + con_log(CL_ANN1,
404 + (CE_WARN, "_fini: mod_remove() failed, error 0x%X", ret));
247 405 return (ret);
406 + }
248 407
249 408 scsi_hba_fini(&modlinkage);
409 + con_log(CL_DLEVEL1, (CE_NOTE, "_fini: scsi_hba_fini() done."));
250 410
251 411 ddi_soft_state_fini(&mrsas_state);
412 + con_log(CL_DLEVEL1, (CE_NOTE, "_fini: ddi_soft_state_fini() done."));
252 413
253 414 return (ret);
254 415 }
255 416
256 417
257 418 /*
258 419 * ************************************************************************** *
259 - * *
260 - * common entry points - for autoconfiguration *
261 - * *
420 + * *
421 + * common entry points - for autoconfiguration *
422 + * *
262 423 * ************************************************************************** *
263 424 */
264 -
425 +/*
426 + * attach - adds a device to the system as part of initialization
427 + * @dip:
428 + * @cmd:
429 + *
430 + * The kernel calls a driver's attach() entry point to attach an instance of
431 + * a device (for MegaRAID, it is instance of a controller) or to resume
432 + * operation for an instance of a device that has been suspended or has been
433 + * shut down by the power management framework
434 + * The attach() entry point typically includes the following types of
435 + * processing:
436 + * - allocate a soft-state structure for the device instance (for MegaRAID,
437 + * controller instance)
438 + * - initialize per-instance mutexes
439 + * - initialize condition variables
440 + * - register the device's interrupts (for MegaRAID, controller's interrupts)
441 + * - map the registers and memory of the device instance (for MegaRAID,
442 + * controller instance)
443 + * - create minor device nodes for the device instance (for MegaRAID,
444 + * controller instance)
445 + * - report that the device instance (for MegaRAID, controller instance) has
446 + * attached
447 + */
265 448 static int
266 449 mrsas_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
267 450 {
268 451 int instance_no;
269 452 int nregs;
270 - uint8_t added_isr_f = 0;
271 - uint8_t added_soft_isr_f = 0;
272 - uint8_t create_devctl_node_f = 0;
273 - uint8_t create_scsi_node_f = 0;
274 - uint8_t create_ioc_node_f = 0;
275 - uint8_t tran_alloc_f = 0;
276 - uint8_t irq;
453 + int i = 0;
454 + uint8_t irq;
277 455 uint16_t vendor_id;
278 456 uint16_t device_id;
279 457 uint16_t subsysvid;
280 458 uint16_t subsysid;
281 459 uint16_t command;
282 460 off_t reglength = 0;
283 461 int intr_types = 0;
284 462 char *data;
285 463
286 464 scsi_hba_tran_t *tran;
287 - ddi_dma_attr_t tran_dma_attr;
465 + ddi_dma_attr_t tran_dma_attr;
288 466 struct mrsas_instance *instance;
289 467
290 468 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
291 469
292 470 /* CONSTCOND */
293 471 ASSERT(NO_COMPETING_THREADS);
294 472
295 473 instance_no = ddi_get_instance(dip);
296 474
297 475 /*
298 476 * check to see whether this device is in a DMA-capable slot.
299 477 */
300 478 if (ddi_slaveonly(dip) == DDI_SUCCESS) {
301 - con_log(CL_ANN, (CE_WARN,
479 + cmn_err(CE_WARN,
302 480 "mr_sas%d: Device in slave-only slot, unused",
303 - instance_no));
481 + instance_no);
304 482 return (DDI_FAILURE);
305 483 }
306 484
307 485 switch (cmd) {
308 - case DDI_ATTACH:
309 - con_log(CL_DLEVEL1, (CE_NOTE, "mr_sas: DDI_ATTACH"));
310 - /* allocate the soft state for the instance */
311 - if (ddi_soft_state_zalloc(mrsas_state, instance_no)
312 - != DDI_SUCCESS) {
313 - con_log(CL_ANN, (CE_WARN,
314 - "mr_sas%d: Failed to allocate soft state",
315 - instance_no));
486 + case DDI_ATTACH:
487 + /* allocate the soft state for the instance */
488 + if (ddi_soft_state_zalloc(mrsas_state, instance_no)
489 + != DDI_SUCCESS) {
490 + cmn_err(CE_WARN,
491 + "mr_sas%d: Failed to allocate soft state",
492 + instance_no);
493 + return (DDI_FAILURE);
494 + }
316 495
317 - return (DDI_FAILURE);
318 - }
496 + instance = (struct mrsas_instance *)ddi_get_soft_state
497 + (mrsas_state, instance_no);
319 498
320 - instance = (struct mrsas_instance *)ddi_get_soft_state
321 - (mrsas_state, instance_no);
499 + if (instance == NULL) {
500 + cmn_err(CE_WARN,
501 + "mr_sas%d: Bad soft state", instance_no);
502 + ddi_soft_state_free(mrsas_state, instance_no);
503 + return (DDI_FAILURE);
504 + }
322 505
323 - if (instance == NULL) {
324 - con_log(CL_ANN, (CE_WARN,
325 - "mr_sas%d: Bad soft state", instance_no));
506 + instance->unroll.softs = 1;
326 507
327 - ddi_soft_state_free(mrsas_state, instance_no);
508 + /* Setup the PCI configuration space handles */
509 + if (pci_config_setup(dip, &instance->pci_handle) !=
510 + DDI_SUCCESS) {
511 + cmn_err(CE_WARN,
512 + "mr_sas%d: pci config setup failed ",
513 + instance_no);
328 514
329 - return (DDI_FAILURE);
330 - }
515 + ddi_soft_state_free(mrsas_state, instance_no);
516 + return (DDI_FAILURE);
517 + }
331 518
332 - bzero((caddr_t)instance,
333 - sizeof (struct mrsas_instance));
519 + if (ddi_dev_nregs(dip, &nregs) != DDI_SUCCESS) {
520 + cmn_err(CE_WARN,
521 + "mr_sas: failed to get registers.");
334 522
335 - instance->func_ptr = kmem_zalloc(
336 - sizeof (struct mrsas_func_ptr), KM_SLEEP);
337 - ASSERT(instance->func_ptr);
523 + pci_config_teardown(&instance->pci_handle);
524 + ddi_soft_state_free(mrsas_state, instance_no);
525 + return (DDI_FAILURE);
526 + }
338 527
339 - /* Setup the PCI configuration space handles */
340 - if (pci_config_setup(dip, &instance->pci_handle) !=
341 - DDI_SUCCESS) {
342 - con_log(CL_ANN, (CE_WARN,
343 - "mr_sas%d: pci config setup failed ",
344 - instance_no));
528 + vendor_id = pci_config_get16(instance->pci_handle,
529 + PCI_CONF_VENID);
530 + device_id = pci_config_get16(instance->pci_handle,
531 + PCI_CONF_DEVID);
345 532
346 - kmem_free(instance->func_ptr,
347 - sizeof (struct mrsas_func_ptr));
348 - ddi_soft_state_free(mrsas_state, instance_no);
533 + subsysvid = pci_config_get16(instance->pci_handle,
534 + PCI_CONF_SUBVENID);
535 + subsysid = pci_config_get16(instance->pci_handle,
536 + PCI_CONF_SUBSYSID);
349 537
350 - return (DDI_FAILURE);
351 - }
538 + pci_config_put16(instance->pci_handle, PCI_CONF_COMM,
539 + (pci_config_get16(instance->pci_handle,
540 + PCI_CONF_COMM) | PCI_COMM_ME));
541 + irq = pci_config_get8(instance->pci_handle,
542 + PCI_CONF_ILINE);
352 543
353 - if (ddi_dev_nregs(dip, &nregs) != DDI_SUCCESS) {
354 - con_log(CL_ANN, (CE_WARN,
355 - "mr_sas: failed to get registers."));
544 + con_log(CL_DLEVEL1, (CE_CONT, "mr_sas%d: "
545 + "0x%x:0x%x 0x%x:0x%x, irq:%d drv-ver:%s",
546 + instance_no, vendor_id, device_id, subsysvid,
547 + subsysid, irq, MRSAS_VERSION));
356 548
357 - pci_config_teardown(&instance->pci_handle);
358 - kmem_free(instance->func_ptr,
359 - sizeof (struct mrsas_func_ptr));
360 - ddi_soft_state_free(mrsas_state, instance_no);
549 + /* enable bus-mastering */
550 + command = pci_config_get16(instance->pci_handle,
551 + PCI_CONF_COMM);
361 552
362 - return (DDI_FAILURE);
363 - }
553 + if (!(command & PCI_COMM_ME)) {
554 + command |= PCI_COMM_ME;
364 555
365 - vendor_id = pci_config_get16(instance->pci_handle,
366 - PCI_CONF_VENID);
367 - device_id = pci_config_get16(instance->pci_handle,
368 - PCI_CONF_DEVID);
556 + pci_config_put16(instance->pci_handle,
557 + PCI_CONF_COMM, command);
369 558
370 - subsysvid = pci_config_get16(instance->pci_handle,
371 - PCI_CONF_SUBVENID);
372 - subsysid = pci_config_get16(instance->pci_handle,
373 - PCI_CONF_SUBSYSID);
559 + con_log(CL_ANN, (CE_CONT, "mr_sas%d: "
560 + "enable bus-mastering", instance_no));
561 + } else {
562 + con_log(CL_DLEVEL1, (CE_CONT, "mr_sas%d: "
563 + "bus-mastering already set", instance_no));
564 + }
374 565
375 - pci_config_put16(instance->pci_handle, PCI_CONF_COMM,
376 - (pci_config_get16(instance->pci_handle,
377 - PCI_CONF_COMM) | PCI_COMM_ME));
378 - irq = pci_config_get8(instance->pci_handle,
379 - PCI_CONF_ILINE);
566 + /* initialize function pointers */
567 + switch (device_id) {
568 + case PCI_DEVICE_ID_LSI_TBOLT:
569 + case PCI_DEVICE_ID_LSI_INVADER:
570 + con_log(CL_ANN, (CE_NOTE,
571 + "mr_sas: 2208 T.B. device detected"));
380 572
381 - con_log(CL_DLEVEL1, (CE_CONT, "mr_sas%d: "
382 - "0x%x:0x%x 0x%x:0x%x, irq:%d drv-ver:%s",
383 - instance_no, vendor_id, device_id, subsysvid,
384 - subsysid, irq, MRSAS_VERSION));
573 + instance->func_ptr =
574 + &mrsas_function_template_fusion;
575 + instance->tbolt = 1;
576 + break;
385 577
386 - /* enable bus-mastering */
387 - command = pci_config_get16(instance->pci_handle,
388 - PCI_CONF_COMM);
578 + case PCI_DEVICE_ID_LSI_2108VDE:
579 + case PCI_DEVICE_ID_LSI_2108V:
580 + con_log(CL_ANN, (CE_NOTE,
581 + "mr_sas: 2108 Liberator device detected"));
389 582
390 - if (!(command & PCI_COMM_ME)) {
391 - command |= PCI_COMM_ME;
583 + instance->func_ptr =
584 + &mrsas_function_template_ppc;
585 + break;
392 586
393 - pci_config_put16(instance->pci_handle,
394 - PCI_CONF_COMM, command);
587 + default:
588 + cmn_err(CE_WARN,
589 + "mr_sas: Invalid device detected");
395 590
396 - con_log(CL_ANN, (CE_CONT, "mr_sas%d: "
397 - "enable bus-mastering", instance_no));
398 - } else {
399 - con_log(CL_DLEVEL1, (CE_CONT, "mr_sas%d: "
400 - "bus-mastering already set", instance_no));
401 - }
591 + pci_config_teardown(&instance->pci_handle);
592 + ddi_soft_state_free(mrsas_state, instance_no);
593 + return (DDI_FAILURE);
594 + }
402 595
403 - /* initialize function pointers */
404 - if ((device_id == PCI_DEVICE_ID_LSI_2108VDE) ||
405 - (device_id == PCI_DEVICE_ID_LSI_2108V)) {
406 - con_log(CL_DLEVEL1, (CE_CONT, "mr_sas%d: "
407 - "2108V/DE detected", instance_no));
408 - instance->func_ptr->read_fw_status_reg =
409 - read_fw_status_reg_ppc;
410 - instance->func_ptr->issue_cmd = issue_cmd_ppc;
411 - instance->func_ptr->issue_cmd_in_sync_mode =
412 - issue_cmd_in_sync_mode_ppc;
413 - instance->func_ptr->issue_cmd_in_poll_mode =
414 - issue_cmd_in_poll_mode_ppc;
415 - instance->func_ptr->enable_intr =
416 - enable_intr_ppc;
417 - instance->func_ptr->disable_intr =
418 - disable_intr_ppc;
419 - instance->func_ptr->intr_ack = intr_ack_ppc;
420 - } else {
421 - con_log(CL_ANN, (CE_WARN,
422 - "mr_sas: Invalid device detected"));
596 + instance->baseaddress = pci_config_get32(
597 + instance->pci_handle, PCI_CONF_BASE0);
598 + instance->baseaddress &= 0x0fffc;
423 599
424 - pci_config_teardown(&instance->pci_handle);
425 - kmem_free(instance->func_ptr,
426 - sizeof (struct mrsas_func_ptr));
427 - ddi_soft_state_free(mrsas_state, instance_no);
600 + instance->dip = dip;
601 + instance->vendor_id = vendor_id;
602 + instance->device_id = device_id;
603 + instance->subsysvid = subsysvid;
604 + instance->subsysid = subsysid;
605 + instance->instance = instance_no;
428 606
429 - return (DDI_FAILURE);
607 + /* Initialize FMA */
608 + instance->fm_capabilities = ddi_prop_get_int(
609 + DDI_DEV_T_ANY, instance->dip, DDI_PROP_DONTPASS,
610 + "fm-capable", DDI_FM_EREPORT_CAPABLE |
611 + DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE
612 + | DDI_FM_ERRCB_CAPABLE);
613 +
614 + mrsas_fm_init(instance);
615 +
616 + /* Setup register map */
617 + if ((ddi_dev_regsize(instance->dip,
618 + REGISTER_SET_IO_2108, ®length) != DDI_SUCCESS) ||
619 + reglength < MINIMUM_MFI_MEM_SZ) {
620 + goto fail_attach;
621 + }
622 + if (reglength > DEFAULT_MFI_MEM_SZ) {
623 + reglength = DEFAULT_MFI_MEM_SZ;
624 + con_log(CL_DLEVEL1, (CE_NOTE,
625 + "mr_sas: register length to map is 0x%lx bytes",
626 + reglength));
627 + }
628 + if (ddi_regs_map_setup(instance->dip,
629 + REGISTER_SET_IO_2108, &instance->regmap, 0,
630 + reglength, &endian_attr, &instance->regmap_handle)
631 + != DDI_SUCCESS) {
632 + cmn_err(CE_WARN,
633 + "mr_sas: couldn't map control registers");
634 + goto fail_attach;
635 + }
636 +
637 + instance->unroll.regs = 1;
638 +
639 + /*
640 + * Disable Interrupt Now.
641 + * Setup Software interrupt
642 + */
643 + instance->func_ptr->disable_intr(instance);
644 +
645 + if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
646 + "mrsas-enable-msi", &data) == DDI_SUCCESS) {
647 + if (strncmp(data, "no", 3) == 0) {
648 + msi_enable = 0;
649 + con_log(CL_ANN1, (CE_WARN,
650 + "msi_enable = %d disabled", msi_enable));
430 651 }
652 + ddi_prop_free(data);
653 + }
431 654
432 - instance->baseaddress = pci_config_get32(
433 - instance->pci_handle, PCI_CONF_BASE0);
434 - instance->baseaddress &= 0x0fffc;
655 + con_log(CL_DLEVEL1, (CE_NOTE, "msi_enable = %d", msi_enable));
435 656
436 - instance->dip = dip;
437 - instance->vendor_id = vendor_id;
438 - instance->device_id = device_id;
439 - instance->subsysvid = subsysvid;
440 - instance->subsysid = subsysid;
441 - instance->instance = instance_no;
657 + if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
658 + "mrsas-enable-fp", &data) == DDI_SUCCESS) {
659 + if (strncmp(data, "no", 3) == 0) {
660 + enable_fp = 0;
661 + cmn_err(CE_NOTE,
662 + "enable_fp = %d, Fast-Path disabled.\n",
663 + enable_fp);
664 + }
442 665
443 - /* Initialize FMA */
444 - instance->fm_capabilities = ddi_prop_get_int(
445 - DDI_DEV_T_ANY, instance->dip, DDI_PROP_DONTPASS,
446 - "fm-capable", DDI_FM_EREPORT_CAPABLE |
447 - DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE
448 - | DDI_FM_ERRCB_CAPABLE);
666 + ddi_prop_free(data);
667 + }
449 668
450 - mrsas_fm_init(instance);
669 + con_log(CL_DLEVEL1, (CE_NOTE, "enable_fp = %d\n", enable_fp));
451 670
452 - /* Initialize Interrupts */
453 - if ((ddi_dev_regsize(instance->dip,
454 - REGISTER_SET_IO_2108, ®length) != DDI_SUCCESS) ||
455 - reglength < MINIMUM_MFI_MEM_SZ) {
456 - return (DDI_FAILURE);
671 + /* Check for all supported interrupt types */
672 + if (ddi_intr_get_supported_types(
673 + dip, &intr_types) != DDI_SUCCESS) {
674 + cmn_err(CE_WARN,
675 + "ddi_intr_get_supported_types() failed");
676 + goto fail_attach;
677 + }
678 +
679 + con_log(CL_DLEVEL1, (CE_NOTE,
680 + "ddi_intr_get_supported_types() ret: 0x%x", intr_types));
681 +
682 + /* Initialize and Setup Interrupt handler */
683 + if (msi_enable && (intr_types & DDI_INTR_TYPE_MSIX)) {
684 + if (mrsas_add_intrs(instance, DDI_INTR_TYPE_MSIX) !=
685 + DDI_SUCCESS) {
686 + cmn_err(CE_WARN,
687 + "MSIX interrupt query failed");
688 + goto fail_attach;
457 689 }
458 - if (reglength > DEFAULT_MFI_MEM_SZ) {
459 - reglength = DEFAULT_MFI_MEM_SZ;
460 - con_log(CL_DLEVEL1, (CE_NOTE,
461 - "mr_sas: register length to map is "
462 - "0x%lx bytes", reglength));
690 + instance->intr_type = DDI_INTR_TYPE_MSIX;
691 + } else if (msi_enable && (intr_types & DDI_INTR_TYPE_MSI)) {
692 + if (mrsas_add_intrs(instance, DDI_INTR_TYPE_MSI) !=
693 + DDI_SUCCESS) {
694 + cmn_err(CE_WARN,
695 + "MSI interrupt query failed");
696 + goto fail_attach;
463 697 }
464 - if (ddi_regs_map_setup(instance->dip,
465 - REGISTER_SET_IO_2108, &instance->regmap, 0,
466 - reglength, &endian_attr, &instance->regmap_handle)
467 - != DDI_SUCCESS) {
468 - con_log(CL_ANN, (CE_NOTE,
469 - "mr_sas: couldn't map control registers"));
698 + instance->intr_type = DDI_INTR_TYPE_MSI;
699 + } else if (intr_types & DDI_INTR_TYPE_FIXED) {
700 + msi_enable = 0;
701 + if (mrsas_add_intrs(instance, DDI_INTR_TYPE_FIXED) !=
702 + DDI_SUCCESS) {
703 + cmn_err(CE_WARN,
704 + "FIXED interrupt query failed");
470 705 goto fail_attach;
471 706 }
707 + instance->intr_type = DDI_INTR_TYPE_FIXED;
708 + } else {
709 + cmn_err(CE_WARN, "Device cannot "
710 + "suppport either FIXED or MSI/X "
711 + "interrupts");
712 + goto fail_attach;
713 + }
472 714
473 - /*
474 - * Disable Interrupt Now.
475 - * Setup Software interrupt
476 - */
477 - instance->func_ptr->disable_intr(instance);
715 + instance->unroll.intr = 1;
478 716
479 - if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
480 - "mrsas-enable-msi", &data) == DDI_SUCCESS) {
481 - if (strncmp(data, "no", 3) == 0) {
482 - msi_enable = 0;
483 - con_log(CL_ANN1, (CE_WARN,
484 - "msi_enable = %d disabled",
485 - msi_enable));
486 - }
487 - ddi_prop_free(data);
717 + if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
718 + "mrsas-enable-ctio", &data) == DDI_SUCCESS) {
719 + if (strncmp(data, "no", 3) == 0) {
720 + ctio_enable = 0;
721 + con_log(CL_ANN1, (CE_WARN,
722 + "ctio_enable = %d disabled", ctio_enable));
488 723 }
724 + ddi_prop_free(data);
725 + }
489 726
490 - con_log(CL_DLEVEL1, (CE_WARN, "msi_enable = %d",
491 - msi_enable));
727 + con_log(CL_DLEVEL1, (CE_WARN, "ctio_enable = %d", ctio_enable));
492 728
493 - /* Check for all supported interrupt types */
494 - if (ddi_intr_get_supported_types(
495 - dip, &intr_types) != DDI_SUCCESS) {
496 - con_log(CL_ANN, (CE_WARN,
497 - "ddi_intr_get_supported_types() failed"));
498 - goto fail_attach;
499 - }
729 + /* setup the mfi based low level driver */
730 + if (mrsas_init_adapter(instance) != DDI_SUCCESS) {
731 + cmn_err(CE_WARN, "mr_sas: "
732 + "could not initialize the low level driver");
500 733
501 - con_log(CL_DLEVEL1, (CE_NOTE,
502 - "ddi_intr_get_supported_types() ret: 0x%x",
503 - intr_types));
734 + goto fail_attach;
735 + }
504 736
505 - /* Initialize and Setup Interrupt handler */
506 - if (msi_enable && (intr_types & DDI_INTR_TYPE_MSIX)) {
507 - if (mrsas_add_intrs(instance,
508 - DDI_INTR_TYPE_MSIX) != DDI_SUCCESS) {
509 - con_log(CL_ANN, (CE_WARN,
510 - "MSIX interrupt query failed"));
511 - goto fail_attach;
512 - }
513 - instance->intr_type = DDI_INTR_TYPE_MSIX;
514 - } else if (msi_enable && (intr_types &
515 - DDI_INTR_TYPE_MSI)) {
516 - if (mrsas_add_intrs(instance,
517 - DDI_INTR_TYPE_MSI) != DDI_SUCCESS) {
518 - con_log(CL_ANN, (CE_WARN,
519 - "MSI interrupt query failed"));
520 - goto fail_attach;
521 - }
522 - instance->intr_type = DDI_INTR_TYPE_MSI;
523 - } else if (intr_types & DDI_INTR_TYPE_FIXED) {
524 - msi_enable = 0;
525 - if (mrsas_add_intrs(instance,
526 - DDI_INTR_TYPE_FIXED) != DDI_SUCCESS) {
527 - con_log(CL_ANN, (CE_WARN,
528 - "FIXED interrupt query failed"));
529 - goto fail_attach;
530 - }
531 - instance->intr_type = DDI_INTR_TYPE_FIXED;
532 - } else {
533 - con_log(CL_ANN, (CE_WARN, "Device cannot "
534 - "suppport either FIXED or MSI/X "
535 - "interrupts"));
536 - goto fail_attach;
537 - }
737 + /* Initialize all Mutex */
738 + INIT_LIST_HEAD(&instance->completed_pool_list);
739 + mutex_init(&instance->completed_pool_mtx, NULL,
740 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
538 741
539 - added_isr_f = 1;
742 + mutex_init(&instance->sync_map_mtx, NULL,
743 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
540 744
541 - if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
542 - "mrsas-enable-ctio", &data) == DDI_SUCCESS) {
543 - if (strncmp(data, "no", 3) == 0) {
544 - ctio_enable = 0;
545 - con_log(CL_ANN1, (CE_WARN,
546 - "ctio_enable = %d disabled",
547 - ctio_enable));
548 - }
549 - ddi_prop_free(data);
550 - }
745 + mutex_init(&instance->app_cmd_pool_mtx, NULL,
746 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
551 747
552 - con_log(CL_DLEVEL1, (CE_WARN, "ctio_enable = %d",
553 - ctio_enable));
748 + mutex_init(&instance->config_dev_mtx, NULL,
749 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
554 750
555 - /* setup the mfi based low level driver */
556 - if (init_mfi(instance) != DDI_SUCCESS) {
557 - con_log(CL_ANN, (CE_WARN, "mr_sas: "
558 - "could not initialize the low level driver"));
751 + mutex_init(&instance->cmd_pend_mtx, NULL,
752 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
559 753
560 - goto fail_attach;
561 - }
754 + mutex_init(&instance->ocr_flags_mtx, NULL,
755 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
562 756
563 - /* Initialize all Mutex */
564 - INIT_LIST_HEAD(&instance->completed_pool_list);
565 - mutex_init(&instance->completed_pool_mtx,
566 - "completed_pool_mtx", MUTEX_DRIVER,
567 - DDI_INTR_PRI(instance->intr_pri));
757 + mutex_init(&instance->int_cmd_mtx, NULL,
758 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
759 + cv_init(&instance->int_cmd_cv, NULL, CV_DRIVER, NULL);
568 760
569 - mutex_init(&instance->app_cmd_pool_mtx,
570 - "app_cmd_pool_mtx", MUTEX_DRIVER,
571 - DDI_INTR_PRI(instance->intr_pri));
761 + mutex_init(&instance->cmd_pool_mtx, NULL,
762 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
572 763
573 - mutex_init(&instance->cmd_pend_mtx, "cmd_pend_mtx",
574 - MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
764 + mutex_init(&instance->reg_write_mtx, NULL,
765 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
575 766
576 - mutex_init(&instance->ocr_flags_mtx, "ocr_flags_mtx",
767 + if (instance->tbolt) {
768 + mutex_init(&instance->cmd_app_pool_mtx, NULL,
577 769 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
578 770
579 - mutex_init(&instance->int_cmd_mtx, "int_cmd_mtx",
771 + mutex_init(&instance->chip_mtx, NULL,
580 772 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
581 - cv_init(&instance->int_cmd_cv, NULL, CV_DRIVER, NULL);
582 773
583 - mutex_init(&instance->cmd_pool_mtx, "cmd_pool_mtx",
584 - MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
774 + }
585 775
586 - instance->timeout_id = (timeout_id_t)-1;
776 + instance->unroll.mutexs = 1;
587 777
588 - /* Register our soft-isr for highlevel interrupts. */
589 - instance->isr_level = instance->intr_pri;
778 + instance->timeout_id = (timeout_id_t)-1;
779 +
780 + /* Register our soft-isr for highlevel interrupts. */
781 + instance->isr_level = instance->intr_pri;
782 + if (!(instance->tbolt)) {
590 783 if (instance->isr_level == HIGH_LEVEL_INTR) {
591 - if (ddi_add_softintr(dip, DDI_SOFTINT_HIGH,
784 + if (ddi_add_softintr(dip,
785 + DDI_SOFTINT_HIGH,
592 786 &instance->soft_intr_id, NULL, NULL,
593 787 mrsas_softintr, (caddr_t)instance) !=
594 788 DDI_SUCCESS) {
595 - con_log(CL_ANN, (CE_WARN,
596 - " Software ISR did not register"));
789 + cmn_err(CE_WARN,
790 + "Software ISR did not register");
597 791
598 792 goto fail_attach;
599 793 }
600 794
601 - added_soft_isr_f = 1;
795 + instance->unroll.soft_isr = 1;
796 +
602 797 }
798 + }
603 799
604 - /* Allocate a transport structure */
605 - tran = scsi_hba_tran_alloc(dip, SCSI_HBA_CANSLEEP);
800 + instance->softint_running = 0;
606 801
607 - if (tran == NULL) {
608 - con_log(CL_ANN, (CE_WARN,
609 - "scsi_hba_tran_alloc failed"));
610 - goto fail_attach;
611 - }
802 + /* Allocate a transport structure */
803 + tran = scsi_hba_tran_alloc(dip, SCSI_HBA_CANSLEEP);
612 804
613 - tran_alloc_f = 1;
805 + if (tran == NULL) {
806 + cmn_err(CE_WARN,
807 + "scsi_hba_tran_alloc failed");
808 + goto fail_attach;
809 + }
614 810
615 - instance->tran = tran;
811 + instance->tran = tran;
812 + instance->unroll.tran = 1;
616 813
617 - tran->tran_hba_private = instance;
618 - tran->tran_tgt_init = mrsas_tran_tgt_init;
619 - tran->tran_tgt_probe = scsi_hba_probe;
620 - tran->tran_tgt_free = mrsas_tran_tgt_free;
814 + tran->tran_hba_private = instance;
815 + tran->tran_tgt_init = mrsas_tran_tgt_init;
816 + tran->tran_tgt_probe = scsi_hba_probe;
817 + tran->tran_tgt_free = mrsas_tran_tgt_free;
818 + if (instance->tbolt) {
819 + tran->tran_init_pkt =
820 + mrsas_tbolt_tran_init_pkt;
821 + tran->tran_start =
822 + mrsas_tbolt_tran_start;
823 + } else {
621 824 tran->tran_init_pkt = mrsas_tran_init_pkt;
622 825 tran->tran_start = mrsas_tran_start;
623 - tran->tran_abort = mrsas_tran_abort;
624 - tran->tran_reset = mrsas_tran_reset;
625 - tran->tran_getcap = mrsas_tran_getcap;
626 - tran->tran_setcap = mrsas_tran_setcap;
627 - tran->tran_destroy_pkt = mrsas_tran_destroy_pkt;
628 - tran->tran_dmafree = mrsas_tran_dmafree;
629 - tran->tran_sync_pkt = mrsas_tran_sync_pkt;
630 - tran->tran_bus_config = mrsas_tran_bus_config;
826 + }
827 + tran->tran_abort = mrsas_tran_abort;
828 + tran->tran_reset = mrsas_tran_reset;
829 + tran->tran_getcap = mrsas_tran_getcap;
830 + tran->tran_setcap = mrsas_tran_setcap;
831 + tran->tran_destroy_pkt = mrsas_tran_destroy_pkt;
832 + tran->tran_dmafree = mrsas_tran_dmafree;
833 + tran->tran_sync_pkt = mrsas_tran_sync_pkt;
834 + tran->tran_quiesce = mrsas_tran_quiesce;
835 + tran->tran_unquiesce = mrsas_tran_unquiesce;
836 + tran->tran_bus_config = mrsas_tran_bus_config;
631 837
632 - if (mrsas_relaxed_ordering)
633 - mrsas_generic_dma_attr.dma_attr_flags |=
634 - DDI_DMA_RELAXED_ORDERING;
838 + if (mrsas_relaxed_ordering)
839 + mrsas_generic_dma_attr.dma_attr_flags |=
840 + DDI_DMA_RELAXED_ORDERING;
635 841
636 842
637 - tran_dma_attr = mrsas_generic_dma_attr;
638 - tran_dma_attr.dma_attr_sgllen = instance->max_num_sge;
843 + tran_dma_attr = mrsas_generic_dma_attr;
844 + tran_dma_attr.dma_attr_sgllen = instance->max_num_sge;
639 845
640 - /* Attach this instance of the hba */
641 - if (scsi_hba_attach_setup(dip, &tran_dma_attr, tran, 0)
642 - != DDI_SUCCESS) {
643 - con_log(CL_ANN, (CE_WARN,
644 - "scsi_hba_attach failed"));
846 + /* Attach this instance of the hba */
847 + if (scsi_hba_attach_setup(dip, &tran_dma_attr, tran, 0)
848 + != DDI_SUCCESS) {
849 + cmn_err(CE_WARN,
850 + "scsi_hba_attach failed");
645 851
646 - goto fail_attach;
647 - }
852 + goto fail_attach;
853 + }
854 + instance->unroll.tranSetup = 1;
855 + con_log(CL_ANN1,
856 + (CE_CONT, "scsi_hba_attach_setup() done."));
648 857
649 - /* create devctl node for cfgadm command */
650 - if (ddi_create_minor_node(dip, "devctl",
651 - S_IFCHR, INST2DEVCTL(instance_no),
652 - DDI_NT_SCSI_NEXUS, 0) == DDI_FAILURE) {
653 - con_log(CL_ANN, (CE_WARN,
654 - "mr_sas: failed to create devctl node."));
858 + /* create devctl node for cfgadm command */
859 + if (ddi_create_minor_node(dip, "devctl",
860 + S_IFCHR, INST2DEVCTL(instance_no),
861 + DDI_NT_SCSI_NEXUS, 0) == DDI_FAILURE) {
862 + cmn_err(CE_WARN,
863 + "mr_sas: failed to create devctl node.");
655 864
656 - goto fail_attach;
657 - }
865 + goto fail_attach;
866 + }
658 867
659 - create_devctl_node_f = 1;
868 + instance->unroll.devctl = 1;
660 869
661 - /* create scsi node for cfgadm command */
662 - if (ddi_create_minor_node(dip, "scsi", S_IFCHR,
663 - INST2SCSI(instance_no),
664 - DDI_NT_SCSI_ATTACHMENT_POINT, 0) ==
665 - DDI_FAILURE) {
666 - con_log(CL_ANN, (CE_WARN,
667 - "mr_sas: failed to create scsi node."));
870 + /* create scsi node for cfgadm command */
871 + if (ddi_create_minor_node(dip, "scsi", S_IFCHR,
872 + INST2SCSI(instance_no), DDI_NT_SCSI_ATTACHMENT_POINT, 0) ==
873 + DDI_FAILURE) {
874 + cmn_err(CE_WARN,
875 + "mr_sas: failed to create scsi node.");
668 876
669 - goto fail_attach;
670 - }
877 + goto fail_attach;
878 + }
671 879
672 - create_scsi_node_f = 1;
880 + instance->unroll.scsictl = 1;
673 881
674 - (void) sprintf(instance->iocnode, "%d:lsirdctl",
675 - instance_no);
882 + (void) sprintf(instance->iocnode, "%d:lsirdctl",
883 + instance_no);
676 884
677 - /*
678 - * Create a node for applications
679 - * for issuing ioctl to the driver.
680 - */
681 - if (ddi_create_minor_node(dip, instance->iocnode,
682 - S_IFCHR, INST2LSIRDCTL(instance_no),
683 - DDI_PSEUDO, 0) == DDI_FAILURE) {
684 - con_log(CL_ANN, (CE_WARN,
685 - "mr_sas: failed to create ioctl node."));
885 + /*
886 + * Create a node for applications
887 + * for issuing ioctl to the driver.
888 + */
889 + if (ddi_create_minor_node(dip, instance->iocnode,
890 + S_IFCHR, INST2LSIRDCTL(instance_no), DDI_PSEUDO, 0) ==
891 + DDI_FAILURE) {
892 + cmn_err(CE_WARN,
893 + "mr_sas: failed to create ioctl node.");
686 894
687 - goto fail_attach;
688 - }
895 + goto fail_attach;
896 + }
689 897
690 - create_ioc_node_f = 1;
898 + instance->unroll.ioctl = 1;
691 899
692 - /* Create a taskq to handle dr events */
693 - if ((instance->taskq = ddi_taskq_create(dip,
694 - "mrsas_dr_taskq", 1,
695 - TASKQ_DEFAULTPRI, 0)) == NULL) {
696 - con_log(CL_ANN, (CE_WARN,
697 - "mr_sas: failed to create taskq "));
698 - instance->taskq = NULL;
699 - goto fail_attach;
700 - }
900 + /* Create a taskq to handle dr events */
901 + if ((instance->taskq = ddi_taskq_create(dip,
902 + "mrsas_dr_taskq", 1, TASKQ_DEFAULTPRI, 0)) == NULL) {
903 + cmn_err(CE_WARN,
904 + "mr_sas: failed to create taskq ");
905 + instance->taskq = NULL;
906 + goto fail_attach;
907 + }
908 + instance->unroll.taskq = 1;
909 + con_log(CL_ANN1, (CE_CONT, "ddi_taskq_create() done."));
701 910
702 - /* enable interrupt */
703 - instance->func_ptr->enable_intr(instance);
911 + /* enable interrupt */
912 + instance->func_ptr->enable_intr(instance);
704 913
705 - /* initiate AEN */
706 - if (start_mfi_aen(instance)) {
707 - con_log(CL_ANN, (CE_WARN,
708 - "mr_sas: failed to initiate AEN."));
709 - goto fail_initiate_aen;
710 - }
914 + /* initiate AEN */
915 + if (start_mfi_aen(instance)) {
916 + cmn_err(CE_WARN,
917 + "mr_sas: failed to initiate AEN.");
918 + goto fail_attach;
919 + }
920 + instance->unroll.aenPend = 1;
921 + con_log(CL_ANN1,
922 + (CE_CONT, "AEN started for instance %d.", instance_no));
711 923
712 - con_log(CL_DLEVEL1, (CE_NOTE,
713 - "AEN started for instance %d.", instance_no));
924 + /* Finally! We are on the air. */
925 + ddi_report_dev(dip);
714 926
715 - /* Finally! We are on the air. */
716 - ddi_report_dev(dip);
927 + /* FMA handle checking. */
928 + if (mrsas_check_acc_handle(instance->regmap_handle) !=
929 + DDI_SUCCESS) {
930 + goto fail_attach;
931 + }
932 + if (mrsas_check_acc_handle(instance->pci_handle) !=
933 + DDI_SUCCESS) {
934 + goto fail_attach;
935 + }
717 936
718 - if (mrsas_check_acc_handle(instance->regmap_handle) !=
719 - DDI_SUCCESS) {
720 - goto fail_attach;
937 + instance->mr_ld_list =
938 + kmem_zalloc(MRDRV_MAX_LD * sizeof (struct mrsas_ld),
939 + KM_SLEEP);
940 + instance->unroll.ldlist_buff = 1;
941 +
942 +#ifdef PDSUPPORT
943 + if (instance->tbolt) {
944 + instance->mr_tbolt_pd_max = MRSAS_TBOLT_PD_TGT_MAX;
945 + instance->mr_tbolt_pd_list =
946 + kmem_zalloc(MRSAS_TBOLT_GET_PD_MAX(instance) *
947 + sizeof (struct mrsas_tbolt_pd), KM_SLEEP);
948 + ASSERT(instance->mr_tbolt_pd_list);
949 + for (i = 0; i < instance->mr_tbolt_pd_max; i++) {
950 + instance->mr_tbolt_pd_list[i].lun_type =
951 + MRSAS_TBOLT_PD_LUN;
952 + instance->mr_tbolt_pd_list[i].dev_id =
953 + (uint8_t)i;
721 954 }
722 - if (mrsas_check_acc_handle(instance->pci_handle) !=
723 - DDI_SUCCESS) {
724 - goto fail_attach;
725 - }
726 - instance->mr_ld_list =
727 - kmem_zalloc(MRDRV_MAX_LD * sizeof (struct mrsas_ld),
728 - KM_SLEEP);
729 - break;
730 - case DDI_PM_RESUME:
731 - con_log(CL_ANN, (CE_NOTE,
732 - "mr_sas: DDI_PM_RESUME"));
733 - break;
734 - case DDI_RESUME:
735 - con_log(CL_ANN, (CE_NOTE,
736 - "mr_sas: DDI_RESUME"));
737 - break;
738 - default:
739 - con_log(CL_ANN, (CE_WARN,
740 - "mr_sas: invalid attach cmd=%x", cmd));
741 - return (DDI_FAILURE);
955 +
956 + instance->unroll.pdlist_buff = 1;
957 + }
958 +#endif
959 + break;
960 + case DDI_PM_RESUME:
961 + con_log(CL_ANN, (CE_NOTE, "mr_sas: DDI_PM_RESUME"));
962 + break;
963 + case DDI_RESUME:
964 + con_log(CL_ANN, (CE_NOTE, "mr_sas: DDI_RESUME"));
965 + break;
966 + default:
967 + con_log(CL_ANN,
968 + (CE_WARN, "mr_sas: invalid attach cmd=%x", cmd));
969 + return (DDI_FAILURE);
742 970 }
743 971
972 +
973 + con_log(CL_DLEVEL1,
974 + (CE_NOTE, "mrsas_attach() return SUCCESS instance_num %d",
975 + instance_no));
744 976 return (DDI_SUCCESS);
745 977
746 -fail_initiate_aen:
747 978 fail_attach:
748 - if (create_devctl_node_f) {
749 - ddi_remove_minor_node(dip, "devctl");
750 - }
751 979
752 - if (create_scsi_node_f) {
753 - ddi_remove_minor_node(dip, "scsi");
754 - }
980 + mrsas_undo_resources(dip, instance);
755 981
756 - if (create_ioc_node_f) {
757 - ddi_remove_minor_node(dip, instance->iocnode);
758 - }
759 -
760 - if (tran_alloc_f) {
761 - scsi_hba_tran_free(tran);
762 - }
763 -
764 -
765 - if (added_soft_isr_f) {
766 - ddi_remove_softintr(instance->soft_intr_id);
767 - }
768 -
769 - if (added_isr_f) {
770 - mrsas_rem_intrs(instance);
771 - }
772 -
773 - if (instance && instance->taskq) {
774 - ddi_taskq_destroy(instance->taskq);
775 - }
776 -
777 982 mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
778 983 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
779 984
780 985 mrsas_fm_fini(instance);
781 986
782 987 pci_config_teardown(&instance->pci_handle);
783 -
784 988 ddi_soft_state_free(mrsas_state, instance_no);
785 989
786 - con_log(CL_ANN, (CE_NOTE,
787 - "mr_sas: return failure from mrsas_attach"));
990 + con_log(CL_ANN, (CE_WARN, "mr_sas: return failure from mrsas_attach"));
788 991
992 + cmn_err(CE_WARN, "mrsas_attach() return FAILURE instance_num %d",
993 + instance_no);
994 +
789 995 return (DDI_FAILURE);
790 996 }
791 997
998 +/*
999 + * getinfo - gets device information
1000 + * @dip:
1001 + * @cmd:
1002 + * @arg:
1003 + * @resultp:
1004 + *
1005 + * The system calls getinfo() to obtain configuration information that only
1006 + * the driver knows. The mapping of minor numbers to device instance is
1007 + * entirely under the control of the driver. The system sometimes needs to ask
1008 + * the driver which device a particular dev_t represents.
1009 + * Given the device number return the devinfo pointer from the scsi_device
1010 + * structure.
1011 + */
792 1012 /*ARGSUSED*/
793 1013 static int
794 1014 mrsas_getinfo(dev_info_t *dip, ddi_info_cmd_t cmd, void *arg, void **resultp)
795 1015 {
796 1016 int rval;
797 1017 int mrsas_minor = getminor((dev_t)arg);
798 1018
799 1019 struct mrsas_instance *instance;
800 1020
801 1021 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
802 1022
803 1023 switch (cmd) {
804 1024 case DDI_INFO_DEVT2DEVINFO:
805 1025 instance = (struct mrsas_instance *)
806 1026 ddi_get_soft_state(mrsas_state,
807 1027 MINOR2INST(mrsas_minor));
808 1028
809 1029 if (instance == NULL) {
810 1030 *resultp = NULL;
811 1031 rval = DDI_FAILURE;
812 1032 } else {
813 1033 *resultp = instance->dip;
814 1034 rval = DDI_SUCCESS;
815 1035 }
816 1036 break;
817 1037 case DDI_INFO_DEVT2INSTANCE:
818 1038 *resultp = (void *)(intptr_t)
819 1039 (MINOR2INST(getminor((dev_t)arg)));
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820 1040 rval = DDI_SUCCESS;
821 1041 break;
822 1042 default:
823 1043 *resultp = NULL;
824 1044 rval = DDI_FAILURE;
825 1045 }
826 1046
827 1047 return (rval);
828 1048 }
829 1049
1050 +/*
1051 + * detach - detaches a device from the system
1052 + * @dip: pointer to the device's dev_info structure
1053 + * @cmd: type of detach
1054 + *
1055 + * A driver's detach() entry point is called to detach an instance of a device
1056 + * that is bound to the driver. The entry point is called with the instance of
1057 + * the device node to be detached and with DDI_DETACH, which is specified as
1058 + * the cmd argument to the entry point.
1059 + * This routine is called during driver unload. We free all the allocated
1060 + * resources and call the corresponding LLD so that it can also release all
1061 + * its resources.
1062 + */
830 1063 static int
831 1064 mrsas_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
832 1065 {
833 1066 int instance_no;
834 1067
835 1068 struct mrsas_instance *instance;
836 1069
837 - con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1070 + con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
838 1071
1072 +
839 1073 /* CONSTCOND */
840 1074 ASSERT(NO_COMPETING_THREADS);
841 1075
842 1076 instance_no = ddi_get_instance(dip);
843 1077
844 1078 instance = (struct mrsas_instance *)ddi_get_soft_state(mrsas_state,
845 1079 instance_no);
846 1080
847 1081 if (!instance) {
848 - con_log(CL_ANN, (CE_WARN,
1082 + cmn_err(CE_WARN,
849 1083 "mr_sas:%d could not get instance in detach",
850 - instance_no));
1084 + instance_no);
851 1085
852 1086 return (DDI_FAILURE);
853 1087 }
854 1088
855 1089 con_log(CL_ANN, (CE_NOTE,
856 1090 "mr_sas%d: detaching device 0x%4x:0x%4x:0x%4x:0x%4x",
857 1091 instance_no, instance->vendor_id, instance->device_id,
858 1092 instance->subsysvid, instance->subsysid));
859 1093
860 1094 switch (cmd) {
861 - case DDI_DETACH:
862 - con_log(CL_ANN, (CE_NOTE,
863 - "mrsas_detach: DDI_DETACH"));
1095 + case DDI_DETACH:
1096 + con_log(CL_ANN, (CE_NOTE,
1097 + "mrsas_detach: DDI_DETACH"));
864 1098
865 - if (scsi_hba_detach(dip) != DDI_SUCCESS) {
866 - con_log(CL_ANN, (CE_WARN,
867 - "mr_sas:%d failed to detach",
868 - instance_no));
1099 + mutex_enter(&instance->config_dev_mtx);
1100 + if (instance->timeout_id != (timeout_id_t)-1) {
1101 + mutex_exit(&instance->config_dev_mtx);
1102 + (void) untimeout(instance->timeout_id);
1103 + instance->timeout_id = (timeout_id_t)-1;
1104 + mutex_enter(&instance->config_dev_mtx);
1105 + instance->unroll.timer = 0;
1106 + }
1107 + mutex_exit(&instance->config_dev_mtx);
869 1108
1109 + if (instance->unroll.tranSetup == 1) {
1110 + if (scsi_hba_detach(dip) != DDI_SUCCESS) {
1111 + cmn_err(CE_WARN,
1112 + "mr_sas2%d: failed to detach",
1113 + instance_no);
1114 + return (DDI_FAILURE);
1115 + }
1116 + instance->unroll.tranSetup = 0;
1117 + con_log(CL_ANN1,
1118 + (CE_CONT, "scsi_hba_dettach() done."));
1119 + }
1120 +
1121 + flush_cache(instance);
1122 +
1123 + mrsas_undo_resources(dip, instance);
1124 +
1125 + mrsas_fm_fini(instance);
1126 +
1127 + pci_config_teardown(&instance->pci_handle);
1128 + ddi_soft_state_free(mrsas_state, instance_no);
1129 + break;
1130 +
1131 + case DDI_PM_SUSPEND:
1132 + con_log(CL_ANN, (CE_NOTE,
1133 + "mrsas_detach: DDI_PM_SUSPEND"));
1134 +
1135 + break;
1136 + case DDI_SUSPEND:
1137 + con_log(CL_ANN, (CE_NOTE,
1138 + "mrsas_detach: DDI_SUSPEND"));
1139 +
1140 + break;
1141 + default:
1142 + con_log(CL_ANN, (CE_WARN,
1143 + "invalid detach command:0x%x", cmd));
870 1144 return (DDI_FAILURE);
1145 + }
1146 +
1147 + return (DDI_SUCCESS);
1148 +}
1149 +
1150 +
1151 +static void
1152 +mrsas_undo_resources(dev_info_t *dip, struct mrsas_instance *instance)
1153 +{
1154 + int instance_no;
1155 +
1156 + con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1157 +
1158 +
1159 + instance_no = ddi_get_instance(dip);
1160 +
1161 +
1162 + if (instance->unroll.ioctl == 1) {
1163 + ddi_remove_minor_node(dip, instance->iocnode);
1164 + instance->unroll.ioctl = 0;
1165 + }
1166 +
1167 + if (instance->unroll.scsictl == 1) {
1168 + ddi_remove_minor_node(dip, "scsi");
1169 + instance->unroll.scsictl = 0;
1170 + }
1171 +
1172 + if (instance->unroll.devctl == 1) {
1173 + ddi_remove_minor_node(dip, "devctl");
1174 + instance->unroll.devctl = 0;
1175 + }
1176 +
1177 + if (instance->unroll.tranSetup == 1) {
1178 + if (scsi_hba_detach(dip) != DDI_SUCCESS) {
1179 + cmn_err(CE_WARN,
1180 + "mr_sas2%d: failed to detach", instance_no);
1181 + return; /* DDI_FAILURE */
871 1182 }
1183 + instance->unroll.tranSetup = 0;
1184 + con_log(CL_ANN1, (CE_CONT, "scsi_hba_dettach() done."));
1185 + }
872 1186
1187 + if (instance->unroll.tran == 1) {
873 1188 scsi_hba_tran_free(instance->tran);
1189 + instance->unroll.tran = 0;
1190 + con_log(CL_ANN1, (CE_CONT, "scsi_hba_tran_free() done."));
1191 + }
874 1192
875 - flush_cache(instance);
1193 + if (instance->unroll.syncCmd == 1) {
1194 + if (instance->tbolt) {
1195 + if (abort_syncmap_cmd(instance,
1196 + instance->map_update_cmd)) {
1197 + cmn_err(CE_WARN, "mrsas_detach: "
1198 + "failed to abort previous syncmap command");
1199 + }
876 1200
877 - if (abort_aen_cmd(instance, instance->aen_cmd)) {
878 - con_log(CL_ANN, (CE_WARN, "mrsas_detach: "
879 - "failed to abort prevous AEN command"));
1201 + instance->unroll.syncCmd = 0;
1202 + con_log(CL_ANN1, (CE_CONT, "sync cmd aborted, done."));
1203 + }
1204 + }
880 1205
881 - return (DDI_FAILURE);
1206 + if (instance->unroll.aenPend == 1) {
1207 + if (abort_aen_cmd(instance, instance->aen_cmd))
1208 + cmn_err(CE_WARN, "mrsas_detach: "
1209 + "failed to abort prevous AEN command");
1210 +
1211 + instance->unroll.aenPend = 0;
1212 + con_log(CL_ANN1, (CE_CONT, "aen cmd aborted, done."));
1213 + /* This means the controller is fully initialized and running */
1214 + /* Shutdown should be a last command to controller. */
1215 + /* shutdown_controller(); */
1216 + }
1217 +
1218 +
1219 + if (instance->unroll.timer == 1) {
1220 + if (instance->timeout_id != (timeout_id_t)-1) {
1221 + (void) untimeout(instance->timeout_id);
1222 + instance->timeout_id = (timeout_id_t)-1;
1223 +
1224 + instance->unroll.timer = 0;
882 1225 }
1226 + }
883 1227
884 - instance->func_ptr->disable_intr(instance);
1228 + instance->func_ptr->disable_intr(instance);
885 1229
886 - if (instance->isr_level == HIGH_LEVEL_INTR) {
887 - ddi_remove_softintr(instance->soft_intr_id);
1230 +
1231 + if (instance->unroll.mutexs == 1) {
1232 + mutex_destroy(&instance->cmd_pool_mtx);
1233 + mutex_destroy(&instance->app_cmd_pool_mtx);
1234 + mutex_destroy(&instance->cmd_pend_mtx);
1235 + mutex_destroy(&instance->completed_pool_mtx);
1236 + mutex_destroy(&instance->sync_map_mtx);
1237 + mutex_destroy(&instance->int_cmd_mtx);
1238 + cv_destroy(&instance->int_cmd_cv);
1239 + mutex_destroy(&instance->config_dev_mtx);
1240 + mutex_destroy(&instance->ocr_flags_mtx);
1241 + mutex_destroy(&instance->reg_write_mtx);
1242 +
1243 + if (instance->tbolt) {
1244 + mutex_destroy(&instance->cmd_app_pool_mtx);
1245 + mutex_destroy(&instance->chip_mtx);
888 1246 }
889 1247
1248 + instance->unroll.mutexs = 0;
1249 + con_log(CL_ANN1, (CE_CONT, "Destroy mutex & cv, done."));
1250 + }
1251 +
1252 +
1253 + if (instance->unroll.soft_isr == 1) {
1254 + ddi_remove_softintr(instance->soft_intr_id);
1255 + instance->unroll.soft_isr = 0;
1256 + }
1257 +
1258 + if (instance->unroll.intr == 1) {
890 1259 mrsas_rem_intrs(instance);
1260 + instance->unroll.intr = 0;
1261 + }
891 1262
1263 +
1264 + if (instance->unroll.taskq == 1) {
892 1265 if (instance->taskq) {
893 1266 ddi_taskq_destroy(instance->taskq);
1267 + instance->unroll.taskq = 0;
894 1268 }
895 - kmem_free(instance->mr_ld_list, MRDRV_MAX_LD
896 - * sizeof (struct mrsas_ld));
897 - free_space_for_mfi(instance);
898 1269
899 - mrsas_fm_fini(instance);
1270 + }
900 1271
901 - pci_config_teardown(&instance->pci_handle);
1272 + /*
1273 + * free dma memory allocated for
1274 + * cmds/frames/queues/driver version etc
1275 + */
1276 + if (instance->unroll.verBuff == 1) {
1277 + (void) mrsas_free_dma_obj(instance, instance->drv_ver_dma_obj);
1278 + instance->unroll.verBuff = 0;
1279 + }
902 1280
903 - kmem_free(instance->func_ptr,
904 - sizeof (struct mrsas_func_ptr));
1281 + if (instance->unroll.pdlist_buff == 1) {
1282 + if (instance->mr_tbolt_pd_list != NULL) {
1283 + kmem_free(instance->mr_tbolt_pd_list,
1284 + MRSAS_TBOLT_GET_PD_MAX(instance) *
1285 + sizeof (struct mrsas_tbolt_pd));
1286 + }
905 1287
906 - if (instance->timeout_id != (timeout_id_t)-1) {
907 - (void) untimeout(instance->timeout_id);
908 - instance->timeout_id = (timeout_id_t)-1;
1288 + instance->mr_tbolt_pd_list = NULL;
1289 + instance->unroll.pdlist_buff = 0;
1290 + }
1291 +
1292 + if (instance->unroll.ldlist_buff == 1) {
1293 + if (instance->mr_ld_list != NULL) {
1294 + kmem_free(instance->mr_ld_list, MRDRV_MAX_LD
1295 + * sizeof (struct mrsas_ld));
909 1296 }
910 - ddi_soft_state_free(mrsas_state, instance_no);
911 - break;
912 - case DDI_PM_SUSPEND:
913 - con_log(CL_ANN, (CE_NOTE,
914 - "mrsas_detach: DDI_PM_SUSPEND"));
915 1297
916 - break;
917 - case DDI_SUSPEND:
918 - con_log(CL_ANN, (CE_NOTE,
919 - "mrsas_detach: DDI_SUSPEND"));
1298 + instance->mr_ld_list = NULL;
1299 + instance->unroll.ldlist_buff = 0;
1300 + }
920 1301
921 - break;
922 - default:
923 - con_log(CL_ANN, (CE_WARN,
924 - "invalid detach command:0x%x", cmd));
925 - return (DDI_FAILURE);
1302 + if (instance->tbolt) {
1303 + if (instance->unroll.alloc_space_mpi2 == 1) {
1304 + free_space_for_mpi2(instance);
1305 + instance->unroll.alloc_space_mpi2 = 0;
1306 + }
1307 + } else {
1308 + if (instance->unroll.alloc_space_mfi == 1) {
1309 + free_space_for_mfi(instance);
1310 + instance->unroll.alloc_space_mfi = 0;
1311 + }
926 1312 }
927 1313
928 - return (DDI_SUCCESS);
1314 + if (instance->unroll.regs == 1) {
1315 + ddi_regs_map_free(&instance->regmap_handle);
1316 + instance->unroll.regs = 0;
1317 + con_log(CL_ANN1, (CE_CONT, "ddi_regs_map_free() done."));
1318 + }
929 1319 }
930 1320
1321 +
1322 +
931 1323 /*
932 1324 * ************************************************************************** *
933 - * *
934 - * common entry points - for character driver types *
935 - * *
1325 + * *
1326 + * common entry points - for character driver types *
1327 + * *
936 1328 * ************************************************************************** *
937 1329 */
938 -static int
1330 +/*
1331 + * open - gets access to a device
1332 + * @dev:
1333 + * @openflags:
1334 + * @otyp:
1335 + * @credp:
1336 + *
1337 + * Access to a device by one or more application programs is controlled
1338 + * through the open() and close() entry points. The primary function of
1339 + * open() is to verify that the open request is allowed.
1340 + */
1341 +static int
939 1342 mrsas_open(dev_t *dev, int openflags, int otyp, cred_t *credp)
940 1343 {
941 1344 int rval = 0;
942 1345
943 1346 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
944 1347
945 1348 /* Check root permissions */
946 1349 if (drv_priv(credp) != 0) {
947 1350 con_log(CL_ANN, (CE_WARN,
948 1351 "mr_sas: Non-root ioctl access denied!"));
949 1352 return (EPERM);
950 1353 }
951 1354
952 1355 /* Verify we are being opened as a character device */
953 1356 if (otyp != OTYP_CHR) {
954 1357 con_log(CL_ANN, (CE_WARN,
955 1358 "mr_sas: ioctl node must be a char node"));
956 1359 return (EINVAL);
957 1360 }
958 1361
959 1362 if (ddi_get_soft_state(mrsas_state, MINOR2INST(getminor(*dev)))
960 1363 == NULL) {
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961 1364 return (ENXIO);
962 1365 }
963 1366
964 1367 if (scsi_hba_open) {
965 1368 rval = scsi_hba_open(dev, openflags, otyp, credp);
966 1369 }
967 1370
968 1371 return (rval);
969 1372 }
970 1373
971 -static int
1374 +/*
1375 + * close - gives up access to a device
1376 + * @dev:
1377 + * @openflags:
1378 + * @otyp:
1379 + * @credp:
1380 + *
1381 + * close() should perform any cleanup necessary to finish using the minor
1382 + * device, and prepare the device (and driver) to be opened again.
1383 + */
1384 +static int
972 1385 mrsas_close(dev_t dev, int openflags, int otyp, cred_t *credp)
973 1386 {
974 1387 int rval = 0;
975 1388
976 1389 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
977 1390
978 1391 /* no need for locks! */
979 1392
980 1393 if (scsi_hba_close) {
981 1394 rval = scsi_hba_close(dev, openflags, otyp, credp);
982 1395 }
983 1396
984 1397 return (rval);
985 1398 }
986 1399
1400 +/*
1401 + * ioctl - performs a range of I/O commands for character drivers
1402 + * @dev:
1403 + * @cmd:
1404 + * @arg:
1405 + * @mode:
1406 + * @credp:
1407 + * @rvalp:
1408 + *
1409 + * ioctl() routine must make sure that user data is copied into or out of the
1410 + * kernel address space explicitly using copyin(), copyout(), ddi_copyin(),
1411 + * and ddi_copyout(), as appropriate.
1412 + * This is a wrapper routine to serialize access to the actual ioctl routine.
1413 + * ioctl() should return 0 on success, or the appropriate error number. The
1414 + * driver may also set the value returned to the calling process through rvalp.
1415 + */
1416 +
987 1417 static int
988 1418 mrsas_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp,
989 1419 int *rvalp)
990 1420 {
991 1421 int rval = 0;
992 1422
993 1423 struct mrsas_instance *instance;
994 1424 struct mrsas_ioctl *ioctl;
995 1425 struct mrsas_aen aen;
996 1426 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
997 1427
998 1428 instance = ddi_get_soft_state(mrsas_state, MINOR2INST(getminor(dev)));
999 1429
1000 1430 if (instance == NULL) {
1001 1431 /* invalid minor number */
1002 1432 con_log(CL_ANN, (CE_WARN, "mr_sas: adapter not found."));
1003 1433 return (ENXIO);
1004 1434 }
1005 1435
1006 1436 ioctl = (struct mrsas_ioctl *)kmem_zalloc(sizeof (struct mrsas_ioctl),
1007 1437 KM_SLEEP);
1008 1438 ASSERT(ioctl);
1009 1439
1010 1440 switch ((uint_t)cmd) {
1011 1441 case MRSAS_IOCTL_FIRMWARE:
1012 1442 if (ddi_copyin((void *)arg, ioctl,
1013 1443 sizeof (struct mrsas_ioctl), mode)) {
1014 1444 con_log(CL_ANN, (CE_WARN, "mrsas_ioctl: "
1015 1445 "ERROR IOCTL copyin"));
1016 1446 kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1017 1447 return (EFAULT);
1018 1448 }
1019 1449
1020 1450 if (ioctl->control_code == MRSAS_DRIVER_IOCTL_COMMON) {
1021 1451 rval = handle_drv_ioctl(instance, ioctl, mode);
1022 1452 } else {
1023 1453 rval = handle_mfi_ioctl(instance, ioctl, mode);
1024 1454 }
1025 1455
1026 1456 if (ddi_copyout((void *)ioctl, (void *)arg,
1027 1457 (sizeof (struct mrsas_ioctl) - 1), mode)) {
1028 1458 con_log(CL_ANN, (CE_WARN,
1029 1459 "mrsas_ioctl: copy_to_user failed"));
1030 1460 rval = 1;
1031 1461 }
1032 1462
1033 1463 break;
1034 1464 case MRSAS_IOCTL_AEN:
1035 1465 if (ddi_copyin((void *) arg, &aen,
1036 1466 sizeof (struct mrsas_aen), mode)) {
1037 1467 con_log(CL_ANN, (CE_WARN,
1038 1468 "mrsas_ioctl: ERROR AEN copyin"));
1039 1469 kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1040 1470 return (EFAULT);
1041 1471 }
1042 1472
1043 1473 rval = handle_mfi_aen(instance, &aen);
1044 1474
1045 1475 if (ddi_copyout((void *) &aen, (void *)arg,
1046 1476 sizeof (struct mrsas_aen), mode)) {
1047 1477 con_log(CL_ANN, (CE_WARN,
1048 1478 "mrsas_ioctl: copy_to_user failed"));
1049 1479 rval = 1;
1050 1480 }
1051 1481
1052 1482 break;
1053 1483 default:
1054 1484 rval = scsi_hba_ioctl(dev, cmd, arg,
1055 1485 mode, credp, rvalp);
1056 1486
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1057 1487 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_ioctl: "
1058 1488 "scsi_hba_ioctl called, ret = %x.", rval));
1059 1489 }
1060 1490
1061 1491 kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1062 1492 return (rval);
1063 1493 }
1064 1494
1065 1495 /*
1066 1496 * ************************************************************************** *
1067 - * *
1068 - * common entry points - for block driver types *
1069 - * *
1497 + * *
1498 + * common entry points - for block driver types *
1499 + * *
1070 1500 * ************************************************************************** *
1071 1501 */
1072 -#ifdef __sparc
1502 +#ifdef __sparc
1503 +/*
1504 + * reset - TBD
1505 + * @dip:
1506 + * @cmd:
1507 + *
1508 + * TBD
1509 + */
1073 1510 /*ARGSUSED*/
1074 1511 static int
1075 1512 mrsas_reset(dev_info_t *dip, ddi_reset_cmd_t cmd)
1076 1513 {
1077 1514 int instance_no;
1078 1515
1079 1516 struct mrsas_instance *instance;
1080 1517
1081 1518 instance_no = ddi_get_instance(dip);
1082 1519 instance = (struct mrsas_instance *)ddi_get_soft_state
1083 1520 (mrsas_state, instance_no);
1084 1521
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1085 1522 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1086 1523
1087 1524 if (!instance) {
1088 1525 con_log(CL_ANN, (CE_WARN, "mr_sas:%d could not get adapter "
1089 1526 "in reset", instance_no));
1090 1527 return (DDI_FAILURE);
1091 1528 }
1092 1529
1093 1530 instance->func_ptr->disable_intr(instance);
1094 1531
1095 - con_log(CL_ANN1, (CE_NOTE, "flushing cache for instance %d",
1532 + con_log(CL_ANN1, (CE_CONT, "flushing cache for instance %d",
1096 1533 instance_no));
1097 1534
1098 1535 flush_cache(instance);
1099 1536
1100 1537 return (DDI_SUCCESS);
1101 1538 }
1102 1539 #else /* __sparc */
1103 1540 /*ARGSUSED*/
1104 1541 static int
1105 1542 mrsas_quiesce(dev_info_t *dip)
1106 1543 {
1107 1544 int instance_no;
1108 1545
1109 1546 struct mrsas_instance *instance;
1110 1547
1111 1548 instance_no = ddi_get_instance(dip);
1112 1549 instance = (struct mrsas_instance *)ddi_get_soft_state
1113 1550 (mrsas_state, instance_no);
1114 1551
1115 1552 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1116 1553
1117 1554 if (!instance) {
1118 1555 con_log(CL_ANN1, (CE_WARN, "mr_sas:%d could not get adapter "
1119 1556 "in quiesce", instance_no));
1120 1557 return (DDI_FAILURE);
1121 1558 }
1122 1559 if (instance->deadadapter || instance->adapterresetinprogress) {
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1123 1560 con_log(CL_ANN1, (CE_WARN, "mr_sas:%d adapter is not in "
1124 1561 "healthy state", instance_no));
1125 1562 return (DDI_FAILURE);
1126 1563 }
1127 1564
1128 1565 if (abort_aen_cmd(instance, instance->aen_cmd)) {
1129 1566 con_log(CL_ANN1, (CE_WARN, "mrsas_quiesce: "
1130 1567 "failed to abort prevous AEN command QUIESCE"));
1131 1568 }
1132 1569
1570 + if (instance->tbolt) {
1571 + if (abort_syncmap_cmd(instance,
1572 + instance->map_update_cmd)) {
1573 + cmn_err(CE_WARN,
1574 + "mrsas_detach: failed to abort "
1575 + "previous syncmap command");
1576 + return (DDI_FAILURE);
1577 + }
1578 + }
1579 +
1133 1580 instance->func_ptr->disable_intr(instance);
1134 1581
1135 - con_log(CL_ANN1, (CE_NOTE, "flushing cache for instance %d",
1582 + con_log(CL_ANN1, (CE_CONT, "flushing cache for instance %d",
1136 1583 instance_no));
1137 1584
1138 1585 flush_cache(instance);
1139 1586
1140 1587 if (wait_for_outstanding(instance)) {
1588 + con_log(CL_ANN1,
1589 + (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
1141 1590 return (DDI_FAILURE);
1142 1591 }
1143 1592 return (DDI_SUCCESS);
1144 1593 }
1145 1594 #endif /* __sparc */
1146 1595
1147 1596 /*
1148 1597 * ************************************************************************** *
1149 - * *
1150 - * entry points (SCSI HBA) *
1151 - * *
1598 + * *
1599 + * entry points (SCSI HBA) *
1600 + * *
1152 1601 * ************************************************************************** *
1153 1602 */
1603 +/*
1604 + * tran_tgt_init - initialize a target device instance
1605 + * @hba_dip:
1606 + * @tgt_dip:
1607 + * @tran:
1608 + * @sd:
1609 + *
1610 + * The tran_tgt_init() entry point enables the HBA to allocate and initialize
1611 + * any per-target resources. tran_tgt_init() also enables the HBA to qualify
1612 + * the device's address as valid and supportable for that particular HBA.
1613 + * By returning DDI_FAILURE, the instance of the target driver for that device
1614 + * is not probed or attached.
1615 + */
1154 1616 /*ARGSUSED*/
1155 1617 static int
1156 1618 mrsas_tran_tgt_init(dev_info_t *hba_dip, dev_info_t *tgt_dip,
1157 1619 scsi_hba_tran_t *tran, struct scsi_device *sd)
1158 1620 {
1159 1621 struct mrsas_instance *instance;
1160 1622 uint16_t tgt = sd->sd_address.a_target;
1161 1623 uint8_t lun = sd->sd_address.a_lun;
1624 + dev_info_t *child = NULL;
1162 1625
1163 - con_log(CL_ANN1, (CE_NOTE, "mrsas_tgt_init target %d lun %d",
1626 + con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init target %d lun %d",
1164 1627 tgt, lun));
1165 1628
1166 1629 instance = ADDR2MR(&sd->sd_address);
1167 1630
1168 1631 if (ndi_dev_is_persistent_node(tgt_dip) == 0) {
1169 - (void) ndi_merge_node(tgt_dip, mrsas_name_node);
1170 - ddi_set_name_addr(tgt_dip, NULL);
1171 -
1172 - con_log(CL_ANN1, (CE_NOTE, "mrsas_tgt_init in "
1173 - "ndi_dev_is_persistent_node DDI_FAILURE t = %d l = %d",
1174 - tgt, lun));
1632 + /*
1633 + * If no persistent node exists, we don't allow .conf node
1634 + * to be created.
1635 + */
1636 + if ((child = mrsas_find_child(instance, tgt, lun)) != NULL) {
1637 + con_log(CL_DLEVEL2,
1638 + (CE_NOTE, "mrsas_tgt_init find child ="
1639 + " %p t = %d l = %d", (void *)child, tgt, lun));
1640 + if (ndi_merge_node(tgt_dip, mrsas_name_node) !=
1641 + DDI_SUCCESS)
1642 + /* Create this .conf node */
1643 + return (DDI_SUCCESS);
1644 + }
1645 + con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init in ndi_per "
1646 + "DDI_FAILURE t = %d l = %d", tgt, lun));
1175 1647 return (DDI_FAILURE);
1648 +
1176 1649 }
1177 1650
1178 - con_log(CL_ANN1, (CE_NOTE, "mrsas_tgt_init dev_dip %p tgt_dip %p",
1651 + con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init dev_dip %p tgt_dip %p",
1179 1652 (void *)instance->mr_ld_list[tgt].dip, (void *)tgt_dip));
1180 1653
1181 1654 if (tgt < MRDRV_MAX_LD && lun == 0) {
1182 1655 if (instance->mr_ld_list[tgt].dip == NULL &&
1183 1656 strcmp(ddi_driver_name(sd->sd_dev), "sd") == 0) {
1657 + mutex_enter(&instance->config_dev_mtx);
1184 1658 instance->mr_ld_list[tgt].dip = tgt_dip;
1185 1659 instance->mr_ld_list[tgt].lun_type = MRSAS_LD_LUN;
1660 + instance->mr_ld_list[tgt].flag = MRDRV_TGT_VALID;
1661 + mutex_exit(&instance->config_dev_mtx);
1186 1662 }
1187 1663 }
1664 +
1665 +#ifdef PDSUPPORT
1666 + else if (instance->tbolt) {
1667 + if (instance->mr_tbolt_pd_list[tgt].dip == NULL) {
1668 + mutex_enter(&instance->config_dev_mtx);
1669 + instance->mr_tbolt_pd_list[tgt].dip = tgt_dip;
1670 + instance->mr_tbolt_pd_list[tgt].flag =
1671 + MRDRV_TGT_VALID;
1672 + mutex_exit(&instance->config_dev_mtx);
1673 + con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_tgt_init:"
1674 + "t%xl%x", tgt, lun));
1675 + }
1676 + }
1677 +#endif
1678 +
1188 1679 return (DDI_SUCCESS);
1189 1680 }
1190 1681
1191 1682 /*ARGSUSED*/
1192 1683 static void
1193 1684 mrsas_tran_tgt_free(dev_info_t *hba_dip, dev_info_t *tgt_dip,
1194 1685 scsi_hba_tran_t *hba_tran, struct scsi_device *sd)
1195 1686 {
1196 1687 struct mrsas_instance *instance;
1197 1688 int tgt = sd->sd_address.a_target;
1198 1689 int lun = sd->sd_address.a_lun;
1199 1690
1200 1691 instance = ADDR2MR(&sd->sd_address);
1201 1692
1202 - con_log(CL_ANN1, (CE_NOTE, "tgt_free t = %d l = %d", tgt, lun));
1693 + con_log(CL_DLEVEL2, (CE_NOTE, "tgt_free t = %d l = %d", tgt, lun));
1203 1694
1204 1695 if (tgt < MRDRV_MAX_LD && lun == 0) {
1205 1696 if (instance->mr_ld_list[tgt].dip == tgt_dip) {
1697 + mutex_enter(&instance->config_dev_mtx);
1206 1698 instance->mr_ld_list[tgt].dip = NULL;
1699 + mutex_exit(&instance->config_dev_mtx);
1207 1700 }
1208 1701 }
1702 +
1703 +#ifdef PDSUPPORT
1704 + else if (instance->tbolt) {
1705 + mutex_enter(&instance->config_dev_mtx);
1706 + instance->mr_tbolt_pd_list[tgt].dip = NULL;
1707 + mutex_exit(&instance->config_dev_mtx);
1708 + con_log(CL_ANN1, (CE_NOTE, "tgt_free: Setting dip = NULL"
1709 + "for tgt:%x", tgt));
1710 + }
1711 +#endif
1712 +
1209 1713 }
1210 1714
1211 -static dev_info_t *
1715 +dev_info_t *
1212 1716 mrsas_find_child(struct mrsas_instance *instance, uint16_t tgt, uint8_t lun)
1213 1717 {
1214 1718 dev_info_t *child = NULL;
1215 1719 char addr[SCSI_MAXNAMELEN];
1216 1720 char tmp[MAXNAMELEN];
1217 1721
1218 1722 (void) sprintf(addr, "%x,%x", tgt, lun);
1219 1723 for (child = ddi_get_child(instance->dip); child;
1220 1724 child = ddi_get_next_sibling(child)) {
1221 1725
1726 + if (ndi_dev_is_persistent_node(child) == 0) {
1727 + continue;
1728 + }
1729 +
1222 1730 if (mrsas_name_node(child, tmp, MAXNAMELEN) !=
1223 1731 DDI_SUCCESS) {
1224 1732 continue;
1225 1733 }
1226 1734
1227 1735 if (strcmp(addr, tmp) == 0) {
1228 1736 break;
1229 1737 }
1230 1738 }
1231 - con_log(CL_ANN1, (CE_NOTE, "mrsas_find_child: return child = %p",
1739 + con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_find_child: return child = %p",
1232 1740 (void *)child));
1233 1741 return (child);
1234 1742 }
1235 1743
1744 +/*
1745 + * mrsas_name_node -
1746 + * @dip:
1747 + * @name:
1748 + * @len:
1749 + */
1236 1750 static int
1237 1751 mrsas_name_node(dev_info_t *dip, char *name, int len)
1238 1752 {
1239 1753 int tgt, lun;
1240 1754
1241 1755 tgt = ddi_prop_get_int(DDI_DEV_T_ANY, dip,
1242 1756 DDI_PROP_DONTPASS, "target", -1);
1243 - con_log(CL_ANN1, (CE_NOTE,
1757 + con_log(CL_DLEVEL2, (CE_NOTE,
1244 1758 "mrsas_name_node: dip %p tgt %d", (void *)dip, tgt));
1245 1759 if (tgt == -1) {
1246 1760 return (DDI_FAILURE);
1247 1761 }
1248 1762 lun = ddi_prop_get_int(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS,
1249 1763 "lun", -1);
1250 - con_log(CL_ANN1,
1764 + con_log(CL_DLEVEL2,
1251 1765 (CE_NOTE, "mrsas_name_node: tgt %d lun %d", tgt, lun));
1252 1766 if (lun == -1) {
1253 1767 return (DDI_FAILURE);
1254 1768 }
1255 1769 (void) snprintf(name, len, "%x,%x", tgt, lun);
1256 1770 return (DDI_SUCCESS);
1257 1771 }
1258 1772
1773 +/*
1774 + * tran_init_pkt - allocate & initialize a scsi_pkt structure
1775 + * @ap:
1776 + * @pkt:
1777 + * @bp:
1778 + * @cmdlen:
1779 + * @statuslen:
1780 + * @tgtlen:
1781 + * @flags:
1782 + * @callback:
1783 + *
1784 + * The tran_init_pkt() entry point allocates and initializes a scsi_pkt
1785 + * structure and DMA resources for a target driver request. The
1786 + * tran_init_pkt() entry point is called when the target driver calls the
1787 + * SCSA function scsi_init_pkt(). Each call of the tran_init_pkt() entry point
1788 + * is a request to perform one or more of three possible services:
1789 + * - allocation and initialization of a scsi_pkt structure
1790 + * - allocation of DMA resources for data transfer
1791 + * - reallocation of DMA resources for the next portion of the data transfer
1792 + */
1259 1793 static struct scsi_pkt *
1260 1794 mrsas_tran_init_pkt(struct scsi_address *ap, register struct scsi_pkt *pkt,
1261 1795 struct buf *bp, int cmdlen, int statuslen, int tgtlen,
1262 1796 int flags, int (*callback)(), caddr_t arg)
1263 1797 {
1264 1798 struct scsa_cmd *acmd;
1265 1799 struct mrsas_instance *instance;
1266 1800 struct scsi_pkt *new_pkt;
1267 1801
1268 - con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1802 + con_log(CL_DLEVEL1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1269 1803
1270 1804 instance = ADDR2MR(ap);
1271 1805
1272 1806 /* step #1 : pkt allocation */
1273 1807 if (pkt == NULL) {
1274 1808 pkt = scsi_hba_pkt_alloc(instance->dip, ap, cmdlen, statuslen,
1275 1809 tgtlen, sizeof (struct scsa_cmd), callback, arg);
1276 1810 if (pkt == NULL) {
1277 1811 return (NULL);
1278 1812 }
1279 1813
1280 1814 acmd = PKT2CMD(pkt);
1281 1815
1282 1816 /*
1283 1817 * Initialize the new pkt - we redundantly initialize
1284 1818 * all the fields for illustrative purposes.
1285 1819 */
1286 1820 acmd->cmd_pkt = pkt;
1287 1821 acmd->cmd_flags = 0;
1288 1822 acmd->cmd_scblen = statuslen;
1289 1823 acmd->cmd_cdblen = cmdlen;
1290 1824 acmd->cmd_dmahandle = NULL;
1291 1825 acmd->cmd_ncookies = 0;
1292 1826 acmd->cmd_cookie = 0;
1293 1827 acmd->cmd_cookiecnt = 0;
1294 1828 acmd->cmd_nwin = 0;
1295 1829
1296 1830 pkt->pkt_address = *ap;
1297 1831 pkt->pkt_comp = (void (*)())NULL;
1298 1832 pkt->pkt_flags = 0;
1299 1833 pkt->pkt_time = 0;
1300 1834 pkt->pkt_resid = 0;
1301 1835 pkt->pkt_state = 0;
1302 1836 pkt->pkt_statistics = 0;
1303 1837 pkt->pkt_reason = 0;
1304 1838 new_pkt = pkt;
1305 1839 } else {
1306 1840 acmd = PKT2CMD(pkt);
1307 1841 new_pkt = NULL;
1308 1842 }
1309 1843
1310 1844 /* step #2 : dma allocation/move */
1311 1845 if (bp && bp->b_bcount != 0) {
1312 1846 if (acmd->cmd_dmahandle == NULL) {
1313 1847 if (mrsas_dma_alloc(instance, pkt, bp, flags,
1314 1848 callback) == DDI_FAILURE) {
1315 1849 if (new_pkt) {
1316 1850 scsi_hba_pkt_free(ap, new_pkt);
1317 1851 }
1318 1852 return ((struct scsi_pkt *)NULL);
1319 1853 }
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1320 1854 } else {
1321 1855 if (mrsas_dma_move(instance, pkt, bp) == DDI_FAILURE) {
1322 1856 return ((struct scsi_pkt *)NULL);
1323 1857 }
1324 1858 }
1325 1859 }
1326 1860
1327 1861 return (pkt);
1328 1862 }
1329 1863
1864 +/*
1865 + * tran_start - transport a SCSI command to the addressed target
1866 + * @ap:
1867 + * @pkt:
1868 + *
1869 + * The tran_start() entry point for a SCSI HBA driver is called to transport a
1870 + * SCSI command to the addressed target. The SCSI command is described
1871 + * entirely within the scsi_pkt structure, which the target driver allocated
1872 + * through the HBA driver's tran_init_pkt() entry point. If the command
1873 + * involves a data transfer, DMA resources must also have been allocated for
1874 + * the scsi_pkt structure.
1875 + *
1876 + * Return Values :
1877 + * TRAN_BUSY - request queue is full, no more free scbs
1878 + * TRAN_ACCEPT - pkt has been submitted to the instance
1879 + */
1330 1880 static int
1331 1881 mrsas_tran_start(struct scsi_address *ap, register struct scsi_pkt *pkt)
1332 1882 {
1333 - uchar_t cmd_done = 0;
1883 + uchar_t cmd_done = 0;
1334 1884
1335 1885 struct mrsas_instance *instance = ADDR2MR(ap);
1336 1886 struct mrsas_cmd *cmd;
1337 1887
1888 + con_log(CL_DLEVEL1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1338 1889 if (instance->deadadapter == 1) {
1339 1890 con_log(CL_ANN1, (CE_WARN,
1340 1891 "mrsas_tran_start: return TRAN_FATAL_ERROR "
1341 1892 "for IO, as the HBA doesnt take any more IOs"));
1342 1893 if (pkt) {
1343 1894 pkt->pkt_reason = CMD_DEV_GONE;
1344 1895 pkt->pkt_statistics = STAT_DISCON;
1345 1896 }
1346 1897 return (TRAN_FATAL_ERROR);
1347 1898 }
1348 1899
1349 1900 if (instance->adapterresetinprogress) {
1350 - con_log(CL_ANN1, (CE_NOTE, "Reset flag set, "
1901 + con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_start: Reset flag set, "
1351 1902 "returning mfi_pkt and setting TRAN_BUSY\n"));
1352 1903 return (TRAN_BUSY);
1353 1904 }
1354 1905
1355 - con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d:SCSI CDB[0]=0x%x time:%x",
1906 + con_log(CL_ANN1, (CE_CONT, "chkpnt:%s:%d:SCSI CDB[0]=0x%x time:%x",
1356 1907 __func__, __LINE__, pkt->pkt_cdbp[0], pkt->pkt_time));
1357 1908
1358 1909 pkt->pkt_reason = CMD_CMPLT;
1359 1910 *pkt->pkt_scbp = STATUS_GOOD; /* clear arq scsi_status */
1360 1911
1361 1912 cmd = build_cmd(instance, ap, pkt, &cmd_done);
1362 1913
1363 1914 /*
1364 1915 * Check if the command is already completed by the mrsas_build_cmd()
1365 1916 * routine. In which case the busy_flag would be clear and scb will be
1366 1917 * NULL and appropriate reason provided in pkt_reason field
1367 1918 */
1368 1919 if (cmd_done) {
1369 1920 pkt->pkt_reason = CMD_CMPLT;
1370 1921 pkt->pkt_scbp[0] = STATUS_GOOD;
1371 1922 pkt->pkt_state |= STATE_GOT_BUS | STATE_GOT_TARGET
1372 1923 | STATE_SENT_CMD;
1373 1924 if (((pkt->pkt_flags & FLAG_NOINTR) == 0) && pkt->pkt_comp) {
1374 1925 (*pkt->pkt_comp)(pkt);
1375 1926 }
1376 1927
1377 1928 return (TRAN_ACCEPT);
1378 1929 }
1379 1930
1380 1931 if (cmd == NULL) {
1381 1932 return (TRAN_BUSY);
1382 1933 }
1383 1934
1384 1935 if ((pkt->pkt_flags & FLAG_NOINTR) == 0) {
1385 1936 if (instance->fw_outstanding > instance->max_fw_cmds) {
1386 1937 con_log(CL_ANN, (CE_CONT, "mr_sas:Firmware busy"));
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1387 1938 DTRACE_PROBE2(start_tran_err,
1388 1939 uint16_t, instance->fw_outstanding,
1389 1940 uint16_t, instance->max_fw_cmds);
1390 1941 return_mfi_pkt(instance, cmd);
1391 1942 return (TRAN_BUSY);
1392 1943 }
1393 1944
1394 1945 /* Synchronize the Cmd frame for the controller */
1395 1946 (void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle, 0, 0,
1396 1947 DDI_DMA_SYNC_FORDEV);
1397 - con_log(CL_ANN1, (CE_NOTE, "Push SCSI CDB[0]=0x%x"
1948 + con_log(CL_ANN, (CE_CONT, "issue_cmd_ppc: SCSI CDB[0]=0x%x"
1398 1949 "cmd->index:%x\n", pkt->pkt_cdbp[0], cmd->index));
1399 1950 instance->func_ptr->issue_cmd(cmd, instance);
1400 1951
1401 1952 } else {
1402 1953 struct mrsas_header *hdr = &cmd->frame->hdr;
1403 1954
1404 - cmd->sync_cmd = MRSAS_TRUE;
1955 + instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd);
1405 1956
1406 - instance->func_ptr-> issue_cmd_in_poll_mode(instance, cmd);
1407 -
1408 1957 pkt->pkt_reason = CMD_CMPLT;
1409 1958 pkt->pkt_statistics = 0;
1410 1959 pkt->pkt_state |= STATE_XFERRED_DATA | STATE_GOT_STATUS;
1411 1960
1412 1961 switch (ddi_get8(cmd->frame_dma_obj.acc_handle,
1413 1962 &hdr->cmd_status)) {
1414 1963 case MFI_STAT_OK:
1415 1964 pkt->pkt_scbp[0] = STATUS_GOOD;
1416 1965 break;
1417 1966
1418 1967 case MFI_STAT_SCSI_DONE_WITH_ERROR:
1419 -
1968 + con_log(CL_ANN, (CE_CONT,
1969 + "mrsas_tran_start: scsi done with error"));
1420 1970 pkt->pkt_reason = CMD_CMPLT;
1421 1971 pkt->pkt_statistics = 0;
1422 1972
1423 1973 ((struct scsi_status *)pkt->pkt_scbp)->sts_chk = 1;
1424 1974 break;
1425 1975
1426 1976 case MFI_STAT_DEVICE_NOT_FOUND:
1977 + con_log(CL_ANN, (CE_CONT,
1978 + "mrsas_tran_start: device not found error"));
1427 1979 pkt->pkt_reason = CMD_DEV_GONE;
1428 1980 pkt->pkt_statistics = STAT_DISCON;
1429 1981 break;
1430 1982
1431 1983 default:
1432 1984 ((struct scsi_status *)pkt->pkt_scbp)->sts_busy = 1;
1433 1985 }
1434 1986
1435 1987 (void) mrsas_common_check(instance, cmd);
1436 1988 DTRACE_PROBE2(start_nointr_done, uint8_t, hdr->cmd,
1437 1989 uint8_t, hdr->cmd_status);
1438 1990 return_mfi_pkt(instance, cmd);
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1439 1991
1440 1992 if (pkt->pkt_comp) {
1441 1993 (*pkt->pkt_comp)(pkt);
1442 1994 }
1443 1995
1444 1996 }
1445 1997
1446 1998 return (TRAN_ACCEPT);
1447 1999 }
1448 2000
2001 +/*
2002 + * tran_abort - Abort any commands that are currently in transport
2003 + * @ap:
2004 + * @pkt:
2005 + *
2006 + * The tran_abort() entry point for a SCSI HBA driver is called to abort any
2007 + * commands that are currently in transport for a particular target. This entry
2008 + * point is called when a target driver calls scsi_abort(). The tran_abort()
2009 + * entry point should attempt to abort the command denoted by the pkt
2010 + * parameter. If the pkt parameter is NULL, tran_abort() should attempt to
2011 + * abort all outstanding commands in the transport layer for the particular
2012 + * target or logical unit.
2013 + */
1449 2014 /*ARGSUSED*/
1450 2015 static int
1451 2016 mrsas_tran_abort(struct scsi_address *ap, struct scsi_pkt *pkt)
1452 2017 {
1453 2018 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1454 2019
1455 2020 /* abort command not supported by H/W */
1456 2021
1457 2022 return (DDI_FAILURE);
1458 2023 }
1459 2024
2025 +/*
2026 + * tran_reset - reset either the SCSI bus or target
2027 + * @ap:
2028 + * @level:
2029 + *
2030 + * The tran_reset() entry point for a SCSI HBA driver is called to reset either
2031 + * the SCSI bus or a particular SCSI target device. This entry point is called
2032 + * when a target driver calls scsi_reset(). The tran_reset() entry point must
2033 + * reset the SCSI bus if level is RESET_ALL. If level is RESET_TARGET, just the
2034 + * particular target or logical unit must be reset.
2035 + */
1460 2036 /*ARGSUSED*/
1461 2037 static int
1462 2038 mrsas_tran_reset(struct scsi_address *ap, int level)
1463 2039 {
2040 + struct mrsas_instance *instance = ADDR2MR(ap);
2041 +
1464 2042 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1465 2043
1466 - /* reset command not supported by H/W */
2044 + if (wait_for_outstanding(instance)) {
2045 + con_log(CL_ANN1,
2046 + (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
2047 + return (DDI_FAILURE);
2048 + } else {
2049 + return (DDI_SUCCESS);
2050 + }
2051 +}
1467 2052
1468 - return (DDI_FAILURE);
2053 +#if 0
2054 +/*
2055 + * tran_bus_reset - reset the SCSI bus
2056 + * @dip:
2057 + * @level:
2058 + *
2059 + * The tran_bus_reset() vector in the scsi_hba_tran structure should be
2060 + * initialized during the HBA driver's attach(). The vector should point to
2061 + * an HBA entry point that is to be called when a user initiates a bus reset.
2062 + * Implementation is hardware specific. If the HBA driver cannot reset the
2063 + * SCSI bus without affecting the targets, the driver should fail RESET_BUS
2064 + * or not initialize this vector.
2065 + */
2066 +/*ARGSUSED*/
2067 +static int
2068 +mrsas_tran_bus_reset(dev_info_t *dip, int level)
2069 +{
2070 + int instance_no = ddi_get_instance(dip);
1469 2071
2072 + struct mrsas_instance *instance = ddi_get_soft_state(mrsas_state,
2073 + instance_no);
2074 +
2075 + con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2076 +
2077 + if (wait_for_outstanding(instance)) {
2078 + con_log(CL_ANN1,
2079 + (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
2080 + return (DDI_FAILURE);
2081 + } else {
2082 + return (DDI_SUCCESS);
2083 + }
1470 2084 }
2085 +#endif
1471 2086
2087 +/*
2088 + * tran_getcap - get one of a set of SCSA-defined capabilities
2089 + * @ap:
2090 + * @cap:
2091 + * @whom:
2092 + *
2093 + * The target driver can request the current setting of the capability for a
2094 + * particular target by setting the whom parameter to nonzero. A whom value of
2095 + * zero indicates a request for the current setting of the general capability
2096 + * for the SCSI bus or for adapter hardware. The tran_getcap() should return -1
2097 + * for undefined capabilities or the current value of the requested capability.
2098 + */
1472 2099 /*ARGSUSED*/
1473 2100 static int
1474 2101 mrsas_tran_getcap(struct scsi_address *ap, char *cap, int whom)
1475 2102 {
1476 2103 int rval = 0;
1477 2104
1478 2105 struct mrsas_instance *instance = ADDR2MR(ap);
1479 2106
1480 - con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2107 + con_log(CL_DLEVEL2, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1481 2108
1482 2109 /* we do allow inquiring about capabilities for other targets */
1483 2110 if (cap == NULL) {
1484 2111 return (-1);
1485 2112 }
1486 2113
1487 2114 switch (scsi_hba_lookup_capstr(cap)) {
1488 2115 case SCSI_CAP_DMA_MAX:
1489 - /* Limit to 16MB max transfer */
1490 - rval = mrsas_max_cap_maxxfer;
2116 + if (instance->tbolt) {
2117 + /* Limit to 256k max transfer */
2118 + rval = mrsas_tbolt_max_cap_maxxfer;
2119 + } else {
2120 + /* Limit to 16MB max transfer */
2121 + rval = mrsas_max_cap_maxxfer;
2122 + }
1491 2123 break;
1492 2124 case SCSI_CAP_MSG_OUT:
1493 2125 rval = 1;
1494 2126 break;
1495 2127 case SCSI_CAP_DISCONNECT:
1496 2128 rval = 0;
1497 2129 break;
1498 2130 case SCSI_CAP_SYNCHRONOUS:
1499 2131 rval = 0;
1500 2132 break;
1501 2133 case SCSI_CAP_WIDE_XFER:
1502 2134 rval = 1;
1503 2135 break;
1504 2136 case SCSI_CAP_TAGGED_QING:
1505 2137 rval = 1;
1506 2138 break;
1507 2139 case SCSI_CAP_UNTAGGED_QING:
1508 2140 rval = 1;
1509 2141 break;
1510 2142 case SCSI_CAP_PARITY:
1511 2143 rval = 1;
1512 2144 break;
1513 2145 case SCSI_CAP_INITIATOR_ID:
1514 2146 rval = instance->init_id;
1515 2147 break;
1516 2148 case SCSI_CAP_ARQ:
1517 2149 rval = 1;
1518 2150 break;
1519 2151 case SCSI_CAP_LINKED_CMDS:
1520 2152 rval = 0;
1521 2153 break;
1522 2154 case SCSI_CAP_RESET_NOTIFICATION:
1523 2155 rval = 1;
1524 2156 break;
1525 2157 case SCSI_CAP_GEOMETRY:
1526 2158 rval = -1;
1527 2159
1528 2160 break;
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1529 2161 default:
1530 2162 con_log(CL_DLEVEL2, (CE_NOTE, "Default cap coming 0x%x",
1531 2163 scsi_hba_lookup_capstr(cap)));
1532 2164 rval = -1;
1533 2165 break;
1534 2166 }
1535 2167
1536 2168 return (rval);
1537 2169 }
1538 2170
2171 +/*
2172 + * tran_setcap - set one of a set of SCSA-defined capabilities
2173 + * @ap:
2174 + * @cap:
2175 + * @value:
2176 + * @whom:
2177 + *
2178 + * The target driver might request that the new value be set for a particular
2179 + * target by setting the whom parameter to nonzero. A whom value of zero
2180 + * means that request is to set the new value for the SCSI bus or for adapter
2181 + * hardware in general.
2182 + * The tran_setcap() should return the following values as appropriate:
2183 + * - -1 for undefined capabilities
2184 + * - 0 if the HBA driver cannot set the capability to the requested value
2185 + * - 1 if the HBA driver is able to set the capability to the requested value
2186 + */
1539 2187 /*ARGSUSED*/
1540 2188 static int
1541 2189 mrsas_tran_setcap(struct scsi_address *ap, char *cap, int value, int whom)
1542 2190 {
1543 2191 int rval = 1;
1544 2192
1545 - con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2193 + con_log(CL_DLEVEL2, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1546 2194
1547 2195 /* We don't allow setting capabilities for other targets */
1548 2196 if (cap == NULL || whom == 0) {
1549 2197 return (-1);
1550 2198 }
1551 2199
1552 2200 switch (scsi_hba_lookup_capstr(cap)) {
1553 2201 case SCSI_CAP_DMA_MAX:
1554 2202 case SCSI_CAP_MSG_OUT:
1555 2203 case SCSI_CAP_PARITY:
1556 2204 case SCSI_CAP_LINKED_CMDS:
1557 2205 case SCSI_CAP_RESET_NOTIFICATION:
1558 2206 case SCSI_CAP_DISCONNECT:
1559 2207 case SCSI_CAP_SYNCHRONOUS:
1560 2208 case SCSI_CAP_UNTAGGED_QING:
1561 2209 case SCSI_CAP_WIDE_XFER:
1562 2210 case SCSI_CAP_INITIATOR_ID:
1563 2211 case SCSI_CAP_ARQ:
1564 2212 /*
1565 2213 * None of these are settable via
1566 2214 * the capability interface.
1567 2215 */
1568 2216 break;
1569 2217 case SCSI_CAP_TAGGED_QING:
1570 2218 rval = 1;
1571 2219 break;
1572 2220 case SCSI_CAP_SECTOR_SIZE:
1573 2221 rval = 1;
1574 2222 break;
1575 2223
1576 2224 case SCSI_CAP_TOTAL_SECTORS:
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1577 2225 rval = 1;
1578 2226 break;
1579 2227 default:
1580 2228 rval = -1;
1581 2229 break;
1582 2230 }
1583 2231
1584 2232 return (rval);
1585 2233 }
1586 2234
2235 +/*
2236 + * tran_destroy_pkt - deallocate scsi_pkt structure
2237 + * @ap:
2238 + * @pkt:
2239 + *
2240 + * The tran_destroy_pkt() entry point is the HBA driver function that
2241 + * deallocates scsi_pkt structures. The tran_destroy_pkt() entry point is
2242 + * called when the target driver calls scsi_destroy_pkt(). The
2243 + * tran_destroy_pkt() entry point must free any DMA resources that have been
2244 + * allocated for the packet. An implicit DMA synchronization occurs if the
2245 + * DMA resources are freed and any cached data remains after the completion
2246 + * of the transfer.
2247 + */
1587 2248 static void
1588 2249 mrsas_tran_destroy_pkt(struct scsi_address *ap, struct scsi_pkt *pkt)
1589 2250 {
1590 2251 struct scsa_cmd *acmd = PKT2CMD(pkt);
1591 2252
1592 - con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2253 + con_log(CL_DLEVEL2, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1593 2254
1594 2255 if (acmd->cmd_flags & CFLAG_DMAVALID) {
1595 2256 acmd->cmd_flags &= ~CFLAG_DMAVALID;
1596 2257
1597 2258 (void) ddi_dma_unbind_handle(acmd->cmd_dmahandle);
1598 2259
1599 2260 ddi_dma_free_handle(&acmd->cmd_dmahandle);
1600 2261
1601 2262 acmd->cmd_dmahandle = NULL;
1602 2263 }
1603 2264
1604 2265 /* free the pkt */
1605 2266 scsi_hba_pkt_free(ap, pkt);
1606 2267 }
1607 2268
2269 +/*
2270 + * tran_dmafree - deallocates DMA resources
2271 + * @ap:
2272 + * @pkt:
2273 + *
2274 + * The tran_dmafree() entry point deallocates DMAQ resources that have been
2275 + * allocated for a scsi_pkt structure. The tran_dmafree() entry point is
2276 + * called when the target driver calls scsi_dmafree(). The tran_dmafree() must
2277 + * free only DMA resources allocated for a scsi_pkt structure, not the
2278 + * scsi_pkt itself. When DMA resources are freed, a DMA synchronization is
2279 + * implicitly performed.
2280 + */
1608 2281 /*ARGSUSED*/
1609 2282 static void
1610 2283 mrsas_tran_dmafree(struct scsi_address *ap, struct scsi_pkt *pkt)
1611 2284 {
1612 2285 register struct scsa_cmd *acmd = PKT2CMD(pkt);
1613 2286
1614 2287 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1615 2288
1616 2289 if (acmd->cmd_flags & CFLAG_DMAVALID) {
1617 2290 acmd->cmd_flags &= ~CFLAG_DMAVALID;
1618 2291
1619 2292 (void) ddi_dma_unbind_handle(acmd->cmd_dmahandle);
1620 2293
1621 2294 ddi_dma_free_handle(&acmd->cmd_dmahandle);
1622 2295
1623 2296 acmd->cmd_dmahandle = NULL;
1624 2297 }
1625 2298 }
1626 2299
2300 +/*
2301 + * tran_sync_pkt - synchronize the DMA object allocated
2302 + * @ap:
2303 + * @pkt:
2304 + *
2305 + * The tran_sync_pkt() entry point synchronizes the DMA object allocated for
2306 + * the scsi_pkt structure before or after a DMA transfer. The tran_sync_pkt()
2307 + * entry point is called when the target driver calls scsi_sync_pkt(). If the
2308 + * data transfer direction is a DMA read from device to memory, tran_sync_pkt()
2309 + * must synchronize the CPU's view of the data. If the data transfer direction
2310 + * is a DMA write from memory to device, tran_sync_pkt() must synchronize the
2311 + * device's view of the data.
2312 + */
1627 2313 /*ARGSUSED*/
1628 2314 static void
1629 2315 mrsas_tran_sync_pkt(struct scsi_address *ap, struct scsi_pkt *pkt)
1630 2316 {
1631 2317 register struct scsa_cmd *acmd = PKT2CMD(pkt);
1632 2318
1633 2319 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1634 2320
1635 2321 if (acmd->cmd_flags & CFLAG_DMAVALID) {
1636 2322 (void) ddi_dma_sync(acmd->cmd_dmahandle, acmd->cmd_dma_offset,
1637 2323 acmd->cmd_dma_len, (acmd->cmd_flags & CFLAG_DMASEND) ?
1638 2324 DDI_DMA_SYNC_FORDEV : DDI_DMA_SYNC_FORCPU);
1639 2325 }
1640 2326 }
1641 2327
2328 +/*ARGSUSED*/
2329 +static int
2330 +mrsas_tran_quiesce(dev_info_t *dip)
2331 +{
2332 + con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2333 +
2334 + return (1);
2335 +}
2336 +
2337 +/*ARGSUSED*/
2338 +static int
2339 +mrsas_tran_unquiesce(dev_info_t *dip)
2340 +{
2341 + con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2342 +
2343 + return (1);
2344 +}
2345 +
2346 +
1642 2347 /*
1643 2348 * mrsas_isr(caddr_t)
1644 2349 *
1645 2350 * The Interrupt Service Routine
1646 2351 *
1647 2352 * Collect status for all completed commands and do callback
1648 2353 *
1649 2354 */
1650 2355 static uint_t
1651 2356 mrsas_isr(struct mrsas_instance *instance)
1652 2357 {
1653 2358 int need_softintr;
1654 2359 uint32_t producer;
1655 2360 uint32_t consumer;
1656 2361 uint32_t context;
2362 + int retval;
1657 2363
1658 2364 struct mrsas_cmd *cmd;
1659 2365 struct mrsas_header *hdr;
1660 2366 struct scsi_pkt *pkt;
1661 2367
2368 + con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1662 2369 ASSERT(instance);
1663 - if ((instance->intr_type == DDI_INTR_TYPE_FIXED) &&
1664 - !instance->func_ptr->intr_ack(instance)) {
1665 - return (DDI_INTR_UNCLAIMED);
2370 + if (instance->tbolt) {
2371 + mutex_enter(&instance->chip_mtx);
2372 + if ((instance->intr_type == DDI_INTR_TYPE_FIXED) &&
2373 + !(instance->func_ptr->intr_ack(instance))) {
2374 + mutex_exit(&instance->chip_mtx);
2375 + return (DDI_INTR_UNCLAIMED);
2376 + }
2377 + retval = mr_sas_tbolt_process_outstanding_cmd(instance);
2378 + mutex_exit(&instance->chip_mtx);
2379 + return (retval);
2380 + } else {
2381 + if ((instance->intr_type == DDI_INTR_TYPE_FIXED) &&
2382 + !instance->func_ptr->intr_ack(instance)) {
2383 + return (DDI_INTR_UNCLAIMED);
2384 + }
1666 2385 }
1667 2386
1668 2387 (void) ddi_dma_sync(instance->mfi_internal_dma_obj.dma_handle,
1669 2388 0, 0, DDI_DMA_SYNC_FORCPU);
1670 2389
1671 2390 if (mrsas_check_dma_handle(instance->mfi_internal_dma_obj.dma_handle)
1672 2391 != DDI_SUCCESS) {
1673 2392 mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
1674 2393 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
1675 2394 con_log(CL_ANN1, (CE_WARN,
1676 2395 "mr_sas_isr(): FMA check, returning DDI_INTR_UNCLAIMED"));
1677 2396 return (DDI_INTR_CLAIMED);
1678 2397 }
1679 2398 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1680 2399
1681 2400 #ifdef OCRDEBUG
1682 2401 if (debug_consecutive_timeout_after_ocr_g == 1) {
1683 2402 con_log(CL_ANN1, (CE_NOTE,
1684 - "simulating consecutive timeout after ocr"));
2403 + "simulating consecutive timeout after ocr"));
1685 2404 return (DDI_INTR_CLAIMED);
1686 2405 }
1687 2406 #endif
1688 2407
1689 2408 mutex_enter(&instance->completed_pool_mtx);
1690 2409 mutex_enter(&instance->cmd_pend_mtx);
1691 2410
1692 2411 producer = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
1693 2412 instance->producer);
1694 2413 consumer = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
1695 2414 instance->consumer);
1696 2415
1697 - con_log(CL_ANN1, (CE_NOTE, " producer %x consumer %x ",
2416 + con_log(CL_ANN, (CE_CONT, " producer %x consumer %x ",
1698 2417 producer, consumer));
1699 2418 if (producer == consumer) {
1700 - con_log(CL_ANN1, (CE_WARN, "producer = consumer case"));
2419 + con_log(CL_ANN, (CE_WARN, "producer == consumer case"));
1701 2420 DTRACE_PROBE2(isr_pc_err, uint32_t, producer,
1702 2421 uint32_t, consumer);
1703 2422 mutex_exit(&instance->cmd_pend_mtx);
1704 2423 mutex_exit(&instance->completed_pool_mtx);
1705 2424 return (DDI_INTR_CLAIMED);
1706 2425 }
1707 2426
1708 2427 while (consumer != producer) {
1709 2428 context = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
1710 2429 &instance->reply_queue[consumer]);
1711 2430 cmd = instance->cmd_list[context];
1712 2431
1713 2432 if (cmd->sync_cmd == MRSAS_TRUE) {
1714 - hdr = (struct mrsas_header *)&cmd->frame->hdr;
1715 - if (hdr) {
1716 - mlist_del_init(&cmd->list);
1717 - }
2433 + hdr = (struct mrsas_header *)&cmd->frame->hdr;
2434 + if (hdr) {
2435 + mlist_del_init(&cmd->list);
2436 + }
1718 2437 } else {
1719 2438 pkt = cmd->pkt;
1720 2439 if (pkt) {
1721 2440 mlist_del_init(&cmd->list);
1722 2441 }
1723 2442 }
1724 2443
1725 2444 mlist_add_tail(&cmd->list, &instance->completed_pool_list);
1726 2445
1727 2446 consumer++;
1728 2447 if (consumer == (instance->max_fw_cmds + 1)) {
1729 2448 consumer = 0;
1730 2449 }
1731 2450 }
1732 2451 ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
1733 2452 instance->consumer, consumer);
1734 2453 mutex_exit(&instance->cmd_pend_mtx);
1735 2454 mutex_exit(&instance->completed_pool_mtx);
1736 2455
1737 2456 (void) ddi_dma_sync(instance->mfi_internal_dma_obj.dma_handle,
1738 2457 0, 0, DDI_DMA_SYNC_FORDEV);
1739 2458
1740 2459 if (instance->softint_running) {
1741 2460 need_softintr = 0;
1742 2461 } else {
1743 2462 need_softintr = 1;
1744 2463 }
1745 2464
1746 2465 if (instance->isr_level == HIGH_LEVEL_INTR) {
1747 2466 if (need_softintr) {
1748 2467 ddi_trigger_softintr(instance->soft_intr_id);
1749 2468 }
1750 2469 } else {
1751 2470 /*
1752 2471 * Not a high-level interrupt, therefore call the soft level
1753 2472 * interrupt explicitly
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1754 2473 */
1755 2474 (void) mrsas_softintr(instance);
1756 2475 }
1757 2476
1758 2477 return (DDI_INTR_CLAIMED);
1759 2478 }
1760 2479
1761 2480
1762 2481 /*
1763 2482 * ************************************************************************** *
1764 - * *
1765 - * libraries *
1766 - * *
2483 + * *
2484 + * libraries *
2485 + * *
1767 2486 * ************************************************************************** *
1768 2487 */
1769 2488 /*
1770 2489 * get_mfi_pkt : Get a command from the free pool
1771 2490 * After successful allocation, the caller of this routine
1772 2491 * must clear the frame buffer (memset to zero) before
1773 2492 * using the packet further.
1774 2493 *
1775 2494 * ***** Note *****
1776 2495 * After clearing the frame buffer the context id of the
1777 2496 * frame buffer SHOULD be restored back.
1778 2497 */
1779 2498 static struct mrsas_cmd *
1780 2499 get_mfi_pkt(struct mrsas_instance *instance)
1781 2500 {
1782 - mlist_t *head = &instance->cmd_pool_list;
2501 + mlist_t *head = &instance->cmd_pool_list;
1783 2502 struct mrsas_cmd *cmd = NULL;
1784 2503
1785 2504 mutex_enter(&instance->cmd_pool_mtx);
1786 - ASSERT(mutex_owned(&instance->cmd_pool_mtx));
1787 2505
1788 2506 if (!mlist_empty(head)) {
1789 2507 cmd = mlist_entry(head->next, struct mrsas_cmd, list);
1790 2508 mlist_del_init(head->next);
1791 2509 }
1792 2510 if (cmd != NULL) {
1793 2511 cmd->pkt = NULL;
1794 2512 cmd->retry_count_for_ocr = 0;
1795 2513 cmd->drv_pkt_time = 0;
2514 +
1796 2515 }
1797 2516 mutex_exit(&instance->cmd_pool_mtx);
1798 2517
1799 2518 return (cmd);
1800 2519 }
1801 2520
1802 2521 static struct mrsas_cmd *
1803 2522 get_mfi_app_pkt(struct mrsas_instance *instance)
1804 2523 {
1805 2524 mlist_t *head = &instance->app_cmd_pool_list;
1806 2525 struct mrsas_cmd *cmd = NULL;
1807 2526
1808 2527 mutex_enter(&instance->app_cmd_pool_mtx);
1809 - ASSERT(mutex_owned(&instance->app_cmd_pool_mtx));
1810 2528
1811 2529 if (!mlist_empty(head)) {
1812 2530 cmd = mlist_entry(head->next, struct mrsas_cmd, list);
1813 2531 mlist_del_init(head->next);
1814 2532 }
1815 - if (cmd != NULL)
2533 + if (cmd != NULL) {
1816 2534 cmd->pkt = NULL;
2535 + cmd->retry_count_for_ocr = 0;
2536 + cmd->drv_pkt_time = 0;
2537 + }
2538 +
1817 2539 mutex_exit(&instance->app_cmd_pool_mtx);
1818 2540
1819 2541 return (cmd);
1820 2542 }
1821 2543 /*
1822 2544 * return_mfi_pkt : Return a cmd to free command pool
1823 2545 */
1824 2546 static void
1825 2547 return_mfi_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
1826 2548 {
1827 2549 mutex_enter(&instance->cmd_pool_mtx);
1828 - ASSERT(mutex_owned(&instance->cmd_pool_mtx));
1829 2550 /* use mlist_add_tail for debug assistance */
1830 2551 mlist_add_tail(&cmd->list, &instance->cmd_pool_list);
1831 2552
1832 2553 mutex_exit(&instance->cmd_pool_mtx);
1833 2554 }
1834 2555
1835 2556 static void
1836 2557 return_mfi_app_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
1837 2558 {
1838 2559 mutex_enter(&instance->app_cmd_pool_mtx);
1839 - ASSERT(mutex_owned(&instance->app_cmd_pool_mtx));
1840 2560
1841 2561 mlist_add(&cmd->list, &instance->app_cmd_pool_list);
1842 2562
1843 2563 mutex_exit(&instance->app_cmd_pool_mtx);
1844 2564 }
1845 -static void
2565 +void
1846 2566 push_pending_mfi_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
1847 2567 {
1848 2568 struct scsi_pkt *pkt;
1849 2569 struct mrsas_header *hdr;
1850 - con_log(CL_ANN1, (CE_NOTE, "push_pending_pkt(): Called\n"));
2570 + con_log(CL_DLEVEL2, (CE_NOTE, "push_pending_pkt(): Called\n"));
1851 2571 mutex_enter(&instance->cmd_pend_mtx);
1852 - ASSERT(mutex_owned(&instance->cmd_pend_mtx));
1853 2572 mlist_del_init(&cmd->list);
1854 2573 mlist_add_tail(&cmd->list, &instance->cmd_pend_list);
1855 2574 if (cmd->sync_cmd == MRSAS_TRUE) {
1856 2575 hdr = (struct mrsas_header *)&cmd->frame->hdr;
1857 2576 if (hdr) {
1858 2577 con_log(CL_ANN1, (CE_CONT,
1859 2578 "push_pending_mfi_pkt: "
1860 2579 "cmd %p index %x "
1861 2580 "time %llx",
1862 2581 (void *)cmd, cmd->index,
1863 2582 gethrtime()));
1864 - /* Wait for specified interval */
2583 + /* Wait for specified interval */
1865 2584 cmd->drv_pkt_time = ddi_get16(
1866 2585 cmd->frame_dma_obj.acc_handle, &hdr->timeout);
1867 2586 if (cmd->drv_pkt_time < debug_timeout_g)
1868 2587 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
1869 - con_log(CL_ANN1, (CE_CONT,
1870 - "push_pending_pkt(): "
1871 - "Called IO Timeout Value %x\n",
1872 - cmd->drv_pkt_time));
2588 + con_log(CL_ANN1, (CE_CONT,
2589 + "push_pending_pkt(): "
2590 + "Called IO Timeout Value %x\n",
2591 + cmd->drv_pkt_time));
1873 2592 }
1874 2593 if (hdr && instance->timeout_id == (timeout_id_t)-1) {
1875 2594 instance->timeout_id = timeout(io_timeout_checker,
1876 2595 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
1877 2596 }
1878 2597 } else {
1879 2598 pkt = cmd->pkt;
1880 2599 if (pkt) {
1881 2600 con_log(CL_ANN1, (CE_CONT,
1882 2601 "push_pending_mfi_pkt: "
1883 2602 "cmd %p index %x pkt %p, "
1884 2603 "time %llx",
1885 2604 (void *)cmd, cmd->index, (void *)pkt,
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1886 2605 gethrtime()));
1887 2606 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
1888 2607 }
1889 2608 if (pkt && instance->timeout_id == (timeout_id_t)-1) {
1890 2609 instance->timeout_id = timeout(io_timeout_checker,
1891 2610 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
1892 2611 }
1893 2612 }
1894 2613
1895 2614 mutex_exit(&instance->cmd_pend_mtx);
2615 +
1896 2616 }
1897 2617
1898 -static int
2618 +int
1899 2619 mrsas_print_pending_cmds(struct mrsas_instance *instance)
1900 2620 {
1901 2621 mlist_t *head = &instance->cmd_pend_list;
1902 2622 mlist_t *tmp = head;
1903 2623 struct mrsas_cmd *cmd = NULL;
1904 2624 struct mrsas_header *hdr;
1905 2625 unsigned int flag = 1;
1906 -
1907 2626 struct scsi_pkt *pkt;
1908 - con_log(CL_ANN1, (CE_NOTE,
1909 - "mrsas_print_pending_cmds(): Called"));
2627 + int saved_level;
2628 + int cmd_count = 0;
2629 +
2630 + saved_level = debug_level_g;
2631 + debug_level_g = CL_ANN1;
2632 +
2633 + cmn_err(CE_NOTE, "mrsas_print_pending_cmds(): Called\n");
2634 +
1910 2635 while (flag) {
1911 2636 mutex_enter(&instance->cmd_pend_mtx);
1912 2637 tmp = tmp->next;
1913 2638 if (tmp == head) {
1914 2639 mutex_exit(&instance->cmd_pend_mtx);
1915 2640 flag = 0;
2641 + con_log(CL_ANN1, (CE_CONT, "mrsas_print_pending_cmds():"
2642 + " NO MORE CMDS PENDING....\n"));
1916 2643 break;
1917 2644 } else {
1918 2645 cmd = mlist_entry(tmp, struct mrsas_cmd, list);
1919 2646 mutex_exit(&instance->cmd_pend_mtx);
1920 2647 if (cmd) {
1921 2648 if (cmd->sync_cmd == MRSAS_TRUE) {
1922 - hdr = (struct mrsas_header *)&cmd->frame->hdr;
2649 + hdr = (struct mrsas_header *)
2650 + &cmd->frame->hdr;
1923 2651 if (hdr) {
1924 - con_log(CL_ANN1, (CE_CONT,
1925 - "print: cmd %p index %x hdr %p",
1926 - (void *)cmd, cmd->index,
1927 - (void *)hdr));
2652 + con_log(CL_ANN1, (CE_CONT,
2653 + "print: cmd %p index 0x%x "
2654 + "drv_pkt_time 0x%x (NO-PKT)"
2655 + " hdr %p\n", (void *)cmd,
2656 + cmd->index,
2657 + cmd->drv_pkt_time,
2658 + (void *)hdr));
1928 2659 }
1929 2660 } else {
1930 2661 pkt = cmd->pkt;
1931 2662 if (pkt) {
1932 2663 con_log(CL_ANN1, (CE_CONT,
1933 - "print: cmd %p index %x "
1934 - "pkt %p", (void *)cmd, cmd->index,
1935 - (void *)pkt));
2664 + "print: cmd %p index 0x%x "
2665 + "drv_pkt_time 0x%x pkt %p \n",
2666 + (void *)cmd, cmd->index,
2667 + cmd->drv_pkt_time, (void *)pkt));
1936 2668 }
1937 2669 }
2670 +
2671 + if (++cmd_count == 1) {
2672 + mrsas_print_cmd_details(instance, cmd,
2673 + 0xDD);
2674 + } else {
2675 + mrsas_print_cmd_details(instance, cmd,
2676 + 1);
2677 + }
2678 +
1938 2679 }
1939 2680 }
1940 2681 }
1941 - con_log(CL_ANN1, (CE_NOTE, "mrsas_print_pending_cmds(): Done\n"));
2682 + con_log(CL_ANN1, (CE_CONT, "mrsas_print_pending_cmds(): Done\n"));
2683 +
2684 +
2685 + debug_level_g = saved_level;
2686 +
1942 2687 return (DDI_SUCCESS);
1943 2688 }
1944 2689
1945 2690
1946 -static int
2691 +int
1947 2692 mrsas_complete_pending_cmds(struct mrsas_instance *instance)
1948 2693 {
1949 2694
1950 2695 struct mrsas_cmd *cmd = NULL;
1951 2696 struct scsi_pkt *pkt;
1952 2697 struct mrsas_header *hdr;
1953 2698
1954 2699 struct mlist_head *pos, *next;
1955 2700
1956 2701 con_log(CL_ANN1, (CE_NOTE,
1957 2702 "mrsas_complete_pending_cmds(): Called"));
1958 2703
1959 2704 mutex_enter(&instance->cmd_pend_mtx);
1960 2705 mlist_for_each_safe(pos, next, &instance->cmd_pend_list) {
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1961 2706 cmd = mlist_entry(pos, struct mrsas_cmd, list);
1962 2707 if (cmd) {
1963 2708 pkt = cmd->pkt;
1964 2709 if (pkt) { /* for IO */
1965 2710 if (((pkt->pkt_flags & FLAG_NOINTR)
1966 2711 == 0) && pkt->pkt_comp) {
1967 2712 pkt->pkt_reason
1968 2713 = CMD_DEV_GONE;
1969 2714 pkt->pkt_statistics
1970 2715 = STAT_DISCON;
1971 - con_log(CL_ANN1, (CE_NOTE,
2716 + con_log(CL_ANN1, (CE_CONT,
1972 2717 "fail and posting to scsa "
1973 2718 "cmd %p index %x"
1974 2719 " pkt %p "
1975 2720 "time : %llx",
1976 2721 (void *)cmd, cmd->index,
1977 2722 (void *)pkt, gethrtime()));
1978 2723 (*pkt->pkt_comp)(pkt);
1979 2724 }
1980 2725 } else { /* for DCMDS */
1981 2726 if (cmd->sync_cmd == MRSAS_TRUE) {
1982 2727 hdr = (struct mrsas_header *)&cmd->frame->hdr;
1983 - con_log(CL_ANN1, (CE_NOTE,
2728 + con_log(CL_ANN1, (CE_CONT,
1984 2729 "posting invalid status to application "
1985 2730 "cmd %p index %x"
1986 2731 " hdr %p "
1987 2732 "time : %llx",
1988 2733 (void *)cmd, cmd->index,
1989 2734 (void *)hdr, gethrtime()));
1990 2735 hdr->cmd_status = MFI_STAT_INVALID_STATUS;
1991 2736 complete_cmd_in_sync_mode(instance, cmd);
1992 2737 }
1993 2738 }
1994 2739 mlist_del_init(&cmd->list);
1995 2740 } else {
1996 - con_log(CL_ANN1, (CE_NOTE,
2741 + con_log(CL_ANN1, (CE_CONT,
1997 2742 "mrsas_complete_pending_cmds:"
1998 2743 "NULL command\n"));
1999 2744 }
2000 - con_log(CL_ANN1, (CE_NOTE,
2745 + con_log(CL_ANN1, (CE_CONT,
2001 2746 "mrsas_complete_pending_cmds:"
2002 2747 "looping for more commands\n"));
2003 2748 }
2004 2749 mutex_exit(&instance->cmd_pend_mtx);
2005 2750
2006 - con_log(CL_ANN1, (CE_NOTE, "mrsas_complete_pending_cmds(): DONE\n"));
2751 + con_log(CL_ANN1, (CE_CONT, "mrsas_complete_pending_cmds(): DONE\n"));
2007 2752 return (DDI_SUCCESS);
2008 2753 }
2009 2754
2755 +void
2756 +mrsas_print_cmd_details(struct mrsas_instance *instance, struct mrsas_cmd *cmd,
2757 + int detail)
2758 +{
2759 + struct scsi_pkt *pkt = cmd->pkt;
2760 + Mpi2RaidSCSIIORequest_t *scsi_io = cmd->scsi_io_request;
2761 + int i;
2762 + int saved_level;
2763 + ddi_acc_handle_t acc_handle =
2764 + instance->mpi2_frame_pool_dma_obj.acc_handle;
2010 2765
2011 -static int
2766 + if (detail == 0xDD) {
2767 + saved_level = debug_level_g;
2768 + debug_level_g = CL_ANN1;
2769 + }
2770 +
2771 +
2772 + if (instance->tbolt) {
2773 + con_log(CL_ANN1, (CE_CONT, "print_cmd_details: cmd %p "
2774 + "cmd->index 0x%x SMID 0x%x timer 0x%x sec\n",
2775 + (void *)cmd, cmd->index, cmd->SMID, cmd->drv_pkt_time));
2776 + } else {
2777 + con_log(CL_ANN1, (CE_CONT, "print_cmd_details: cmd %p "
2778 + "cmd->index 0x%x timer 0x%x sec\n",
2779 + (void *)cmd, cmd->index, cmd->drv_pkt_time));
2780 + }
2781 +
2782 + if (pkt) {
2783 + con_log(CL_ANN1, (CE_CONT, "scsi_pkt CDB[0]=0x%x",
2784 + pkt->pkt_cdbp[0]));
2785 + } else {
2786 + con_log(CL_ANN1, (CE_CONT, "NO-PKT"));
2787 + }
2788 +
2789 + if ((detail == 0xDD) && instance->tbolt) {
2790 + con_log(CL_ANN1, (CE_CONT, "RAID_SCSI_IO_REQUEST\n"));
2791 + con_log(CL_ANN1, (CE_CONT, "DevHandle=0x%X Function=0x%X "
2792 + "IoFlags=0x%X SGLFlags=0x%X DataLength=0x%X\n",
2793 + ddi_get16(acc_handle, &scsi_io->DevHandle),
2794 + ddi_get8(acc_handle, &scsi_io->Function),
2795 + ddi_get16(acc_handle, &scsi_io->IoFlags),
2796 + ddi_get16(acc_handle, &scsi_io->SGLFlags),
2797 + ddi_get32(acc_handle, &scsi_io->DataLength)));
2798 +
2799 + for (i = 0; i < 32; i++) {
2800 + con_log(CL_ANN1, (CE_CONT, "CDB[%d]=0x%x ", i,
2801 + ddi_get8(acc_handle, &scsi_io->CDB.CDB32[i])));
2802 + }
2803 +
2804 + con_log(CL_ANN1, (CE_CONT, "RAID-CONTEXT\n"));
2805 + con_log(CL_ANN1, (CE_CONT, "status=0x%X extStatus=0x%X "
2806 + "ldTargetId=0x%X timeoutValue=0x%X regLockFlags=0x%X "
2807 + "RAIDFlags=0x%X regLockRowLBA=0x%" PRIu64
2808 + " regLockLength=0x%X spanArm=0x%X\n",
2809 + ddi_get8(acc_handle, &scsi_io->RaidContext.status),
2810 + ddi_get8(acc_handle, &scsi_io->RaidContext.extStatus),
2811 + ddi_get16(acc_handle, &scsi_io->RaidContext.ldTargetId),
2812 + ddi_get16(acc_handle, &scsi_io->RaidContext.timeoutValue),
2813 + ddi_get8(acc_handle, &scsi_io->RaidContext.regLockFlags),
2814 + ddi_get8(acc_handle, &scsi_io->RaidContext.RAIDFlags),
2815 + ddi_get64(acc_handle, &scsi_io->RaidContext.regLockRowLBA),
2816 + ddi_get32(acc_handle, &scsi_io->RaidContext.regLockLength),
2817 + ddi_get8(acc_handle, &scsi_io->RaidContext.spanArm)));
2818 + }
2819 +
2820 + if (detail == 0xDD) {
2821 + debug_level_g = saved_level;
2822 + }
2823 +}
2824 +
2825 +
2826 +int
2012 2827 mrsas_issue_pending_cmds(struct mrsas_instance *instance)
2013 2828 {
2014 2829 mlist_t *head = &instance->cmd_pend_list;
2015 2830 mlist_t *tmp = head->next;
2016 2831 struct mrsas_cmd *cmd = NULL;
2017 2832 struct scsi_pkt *pkt;
2018 2833
2019 2834 con_log(CL_ANN1, (CE_NOTE, "mrsas_issue_pending_cmds(): Called"));
2020 2835 while (tmp != head) {
2021 2836 mutex_enter(&instance->cmd_pend_mtx);
2022 2837 cmd = mlist_entry(tmp, struct mrsas_cmd, list);
2023 2838 tmp = tmp->next;
2024 2839 mutex_exit(&instance->cmd_pend_mtx);
2025 2840 if (cmd) {
2026 - con_log(CL_ANN1, (CE_NOTE,
2841 + con_log(CL_ANN1, (CE_CONT,
2027 2842 "mrsas_issue_pending_cmds(): "
2028 - "Got a cmd: cmd:%p\n", (void *)cmd));
2843 + "Got a cmd: cmd %p index 0x%x drv_pkt_time 0x%x ",
2844 + (void *)cmd, cmd->index, cmd->drv_pkt_time));
2845 +
2846 + /* Reset command timeout value */
2847 + if (cmd->drv_pkt_time < debug_timeout_g)
2848 + cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
2849 +
2029 2850 cmd->retry_count_for_ocr++;
2030 - con_log(CL_ANN1, (CE_NOTE,
2031 - "mrsas_issue_pending_cmds(): "
2032 - "cmd retry count = %d\n",
2033 - cmd->retry_count_for_ocr));
2851 +
2852 + cmn_err(CE_CONT, "cmd retry count = %d\n",
2853 + cmd->retry_count_for_ocr);
2854 +
2034 2855 if (cmd->retry_count_for_ocr > IO_RETRY_COUNT) {
2035 - con_log(CL_ANN1, (CE_NOTE,
2856 + cmn_err(CE_WARN, "mrsas_issue_pending_cmds(): "
2857 + "cmd->retry_count exceeded limit >%d\n",
2858 + IO_RETRY_COUNT);
2859 + mrsas_print_cmd_details(instance, cmd, 0xDD);
2860 +
2861 + cmn_err(CE_WARN,
2036 2862 "mrsas_issue_pending_cmds():"
2037 - "Calling Kill Adapter\n"));
2038 - (void) mrsas_kill_adapter(instance);
2863 + "Calling KILL Adapter\n");
2864 + if (instance->tbolt)
2865 + mrsas_tbolt_kill_adapter(instance);
2866 + else
2867 + (void) mrsas_kill_adapter(instance);
2039 2868 return (DDI_FAILURE);
2040 2869 }
2870 +
2041 2871 pkt = cmd->pkt;
2042 2872 if (pkt) {
2043 - con_log(CL_ANN1, (CE_NOTE,
2044 - "PENDING ISSUE: cmd %p index %x "
2873 + con_log(CL_ANN1, (CE_CONT,
2874 + "PENDING PKT-CMD ISSUE: cmd %p index %x "
2045 2875 "pkt %p time %llx",
2046 2876 (void *)cmd, cmd->index,
2047 2877 (void *)pkt,
2048 2878 gethrtime()));
2049 2879
2880 + } else {
2881 + cmn_err(CE_CONT,
2882 + "mrsas_issue_pending_cmds(): NO-PKT, "
2883 + "cmd %p index 0x%x drv_pkt_time 0x%x ",
2884 + (void *)cmd, cmd->index, cmd->drv_pkt_time);
2050 2885 }
2886 +
2887 +
2051 2888 if (cmd->sync_cmd == MRSAS_TRUE) {
2889 + cmn_err(CE_CONT, "mrsas_issue_pending_cmds(): "
2890 + "SYNC_CMD == TRUE \n");
2052 2891 instance->func_ptr->issue_cmd_in_sync_mode(
2053 2892 instance, cmd);
2054 2893 } else {
2055 2894 instance->func_ptr->issue_cmd(cmd, instance);
2056 2895 }
2057 2896 } else {
2058 - con_log(CL_ANN1, (CE_NOTE,
2897 + con_log(CL_ANN1, (CE_CONT,
2059 2898 "mrsas_issue_pending_cmds: NULL command\n"));
2060 2899 }
2061 - con_log(CL_ANN1, (CE_NOTE,
2900 + con_log(CL_ANN1, (CE_CONT,
2062 2901 "mrsas_issue_pending_cmds:"
2063 2902 "looping for more commands"));
2064 2903 }
2065 - con_log(CL_ANN1, (CE_NOTE, "mrsas_issue_pending_cmds(): DONE\n"));
2904 + con_log(CL_ANN1, (CE_CONT, "mrsas_issue_pending_cmds(): DONE\n"));
2066 2905 return (DDI_SUCCESS);
2067 2906 }
2068 2907
2908 +
2909 +
2069 2910 /*
2070 2911 * destroy_mfi_frame_pool
2071 2912 */
2072 -static void
2913 +void
2073 2914 destroy_mfi_frame_pool(struct mrsas_instance *instance)
2074 2915 {
2075 2916 int i;
2076 2917 uint32_t max_cmd = instance->max_fw_cmds;
2077 2918
2078 2919 struct mrsas_cmd *cmd;
2079 2920
2080 2921 /* return all frames to pool */
2081 - for (i = 0; i < max_cmd+1; i++) {
2082 2922
2923 + for (i = 0; i < max_cmd; i++) {
2924 +
2083 2925 cmd = instance->cmd_list[i];
2084 2926
2085 2927 if (cmd->frame_dma_obj_status == DMA_OBJ_ALLOCATED)
2086 2928 (void) mrsas_free_dma_obj(instance, cmd->frame_dma_obj);
2087 2929
2088 2930 cmd->frame_dma_obj_status = DMA_OBJ_FREED;
2089 2931 }
2090 2932
2091 2933 }
2092 2934
2093 2935 /*
2094 2936 * create_mfi_frame_pool
2095 2937 */
2096 -static int
2938 +int
2097 2939 create_mfi_frame_pool(struct mrsas_instance *instance)
2098 2940 {
2099 2941 int i = 0;
2100 2942 int cookie_cnt;
2101 2943 uint16_t max_cmd;
2102 2944 uint16_t sge_sz;
2103 2945 uint32_t sgl_sz;
2104 2946 uint32_t tot_frame_size;
2105 2947 struct mrsas_cmd *cmd;
2948 + int retval = DDI_SUCCESS;
2106 2949
2107 2950 max_cmd = instance->max_fw_cmds;
2108 -
2109 2951 sge_sz = sizeof (struct mrsas_sge_ieee);
2110 -
2111 2952 /* calculated the number of 64byte frames required for SGL */
2112 2953 sgl_sz = sge_sz * instance->max_num_sge;
2113 2954 tot_frame_size = sgl_sz + MRMFI_FRAME_SIZE + SENSE_LENGTH;
2114 2955
2115 2956 con_log(CL_DLEVEL3, (CE_NOTE, "create_mfi_frame_pool: "
2116 2957 "sgl_sz %x tot_frame_size %x", sgl_sz, tot_frame_size));
2117 2958
2118 - while (i < max_cmd+1) {
2959 + while (i < max_cmd) {
2119 2960 cmd = instance->cmd_list[i];
2120 2961
2121 2962 cmd->frame_dma_obj.size = tot_frame_size;
2122 2963 cmd->frame_dma_obj.dma_attr = mrsas_generic_dma_attr;
2123 2964 cmd->frame_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
2124 2965 cmd->frame_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
2125 2966 cmd->frame_dma_obj.dma_attr.dma_attr_sgllen = 1;
2126 2967 cmd->frame_dma_obj.dma_attr.dma_attr_align = 64;
2127 2968
2128 -
2129 2969 cookie_cnt = mrsas_alloc_dma_obj(instance, &cmd->frame_dma_obj,
2130 2970 (uchar_t)DDI_STRUCTURE_LE_ACC);
2131 2971
2132 2972 if (cookie_cnt == -1 || cookie_cnt > 1) {
2133 - con_log(CL_ANN, (CE_WARN,
2134 - "create_mfi_frame_pool: could not alloc."));
2135 - return (DDI_FAILURE);
2973 + cmn_err(CE_WARN,
2974 + "create_mfi_frame_pool: could not alloc.");
2975 + retval = DDI_FAILURE;
2976 + goto mrsas_undo_frame_pool;
2136 2977 }
2137 2978
2138 2979 bzero(cmd->frame_dma_obj.buffer, tot_frame_size);
2139 2980
2140 2981 cmd->frame_dma_obj_status = DMA_OBJ_ALLOCATED;
2141 2982 cmd->frame = (union mrsas_frame *)cmd->frame_dma_obj.buffer;
2142 2983 cmd->frame_phys_addr =
2143 2984 cmd->frame_dma_obj.dma_cookie[0].dmac_address;
2144 2985
2145 2986 cmd->sense = (uint8_t *)(((unsigned long)
2146 2987 cmd->frame_dma_obj.buffer) +
2147 2988 tot_frame_size - SENSE_LENGTH);
2148 2989 cmd->sense_phys_addr =
2149 2990 cmd->frame_dma_obj.dma_cookie[0].dmac_address +
2150 2991 tot_frame_size - SENSE_LENGTH;
2151 2992
2152 2993 if (!cmd->frame || !cmd->sense) {
2153 - con_log(CL_ANN, (CE_NOTE,
2154 - "mr_sas: pci_pool_alloc failed"));
2155 -
2156 - return (ENOMEM);
2994 + cmn_err(CE_WARN,
2995 + "mr_sas: pci_pool_alloc failed");
2996 + retval = ENOMEM;
2997 + goto mrsas_undo_frame_pool;
2157 2998 }
2158 2999
2159 3000 ddi_put32(cmd->frame_dma_obj.acc_handle,
2160 3001 &cmd->frame->io.context, cmd->index);
2161 3002 i++;
2162 3003
2163 3004 con_log(CL_DLEVEL3, (CE_NOTE, "[%x]-%x",
2164 3005 cmd->index, cmd->frame_phys_addr));
2165 3006 }
2166 3007
2167 3008 return (DDI_SUCCESS);
3009 +
3010 +mrsas_undo_frame_pool:
3011 + if (i > 0)
3012 + destroy_mfi_frame_pool(instance);
3013 +
3014 + return (retval);
2168 3015 }
2169 3016
2170 3017 /*
2171 3018 * free_additional_dma_buffer
2172 3019 */
2173 3020 static void
2174 3021 free_additional_dma_buffer(struct mrsas_instance *instance)
2175 3022 {
2176 3023 if (instance->mfi_internal_dma_obj.status == DMA_OBJ_ALLOCATED) {
2177 3024 (void) mrsas_free_dma_obj(instance,
2178 3025 instance->mfi_internal_dma_obj);
2179 3026 instance->mfi_internal_dma_obj.status = DMA_OBJ_FREED;
2180 3027 }
2181 3028
2182 3029 if (instance->mfi_evt_detail_obj.status == DMA_OBJ_ALLOCATED) {
2183 3030 (void) mrsas_free_dma_obj(instance,
2184 3031 instance->mfi_evt_detail_obj);
2185 3032 instance->mfi_evt_detail_obj.status = DMA_OBJ_FREED;
2186 3033 }
2187 3034 }
2188 3035
2189 3036 /*
2190 3037 * alloc_additional_dma_buffer
2191 3038 */
2192 3039 static int
2193 3040 alloc_additional_dma_buffer(struct mrsas_instance *instance)
2194 3041 {
2195 3042 uint32_t reply_q_sz;
2196 3043 uint32_t internal_buf_size = PAGESIZE*2;
2197 3044
2198 3045 /* max cmds plus 1 + producer & consumer */
2199 3046 reply_q_sz = sizeof (uint32_t) * (instance->max_fw_cmds + 1 + 2);
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2200 3047
2201 3048 instance->mfi_internal_dma_obj.size = internal_buf_size;
2202 3049 instance->mfi_internal_dma_obj.dma_attr = mrsas_generic_dma_attr;
2203 3050 instance->mfi_internal_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
2204 3051 instance->mfi_internal_dma_obj.dma_attr.dma_attr_count_max =
2205 3052 0xFFFFFFFFU;
2206 3053 instance->mfi_internal_dma_obj.dma_attr.dma_attr_sgllen = 1;
2207 3054
2208 3055 if (mrsas_alloc_dma_obj(instance, &instance->mfi_internal_dma_obj,
2209 3056 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
2210 - con_log(CL_ANN, (CE_WARN,
2211 - "mr_sas: could not alloc reply queue"));
3057 + cmn_err(CE_WARN,
3058 + "mr_sas: could not alloc reply queue");
2212 3059 return (DDI_FAILURE);
2213 3060 }
2214 3061
2215 3062 bzero(instance->mfi_internal_dma_obj.buffer, internal_buf_size);
2216 3063
2217 3064 instance->mfi_internal_dma_obj.status |= DMA_OBJ_ALLOCATED;
2218 3065
2219 3066 instance->producer = (uint32_t *)((unsigned long)
2220 3067 instance->mfi_internal_dma_obj.buffer);
2221 3068 instance->consumer = (uint32_t *)((unsigned long)
2222 3069 instance->mfi_internal_dma_obj.buffer + 4);
2223 3070 instance->reply_queue = (uint32_t *)((unsigned long)
2224 3071 instance->mfi_internal_dma_obj.buffer + 8);
2225 3072 instance->internal_buf = (caddr_t)(((unsigned long)
2226 3073 instance->mfi_internal_dma_obj.buffer) + reply_q_sz + 8);
2227 3074 instance->internal_buf_dmac_add =
2228 3075 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address +
2229 3076 (reply_q_sz + 8);
2230 3077 instance->internal_buf_size = internal_buf_size -
2231 3078 (reply_q_sz + 8);
2232 3079
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2233 3080 /* allocate evt_detail */
2234 3081 instance->mfi_evt_detail_obj.size = sizeof (struct mrsas_evt_detail);
2235 3082 instance->mfi_evt_detail_obj.dma_attr = mrsas_generic_dma_attr;
2236 3083 instance->mfi_evt_detail_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
2237 3084 instance->mfi_evt_detail_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
2238 3085 instance->mfi_evt_detail_obj.dma_attr.dma_attr_sgllen = 1;
2239 3086 instance->mfi_evt_detail_obj.dma_attr.dma_attr_align = 1;
2240 3087
2241 3088 if (mrsas_alloc_dma_obj(instance, &instance->mfi_evt_detail_obj,
2242 3089 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
2243 - con_log(CL_ANN, (CE_WARN, "alloc_additional_dma_buffer: "
2244 - "could not allocate data transfer buffer."));
2245 - return (DDI_FAILURE);
3090 + cmn_err(CE_WARN, "alloc_additional_dma_buffer: "
3091 + "could not allocate data transfer buffer.");
3092 + goto mrsas_undo_internal_buff;
2246 3093 }
2247 3094
2248 3095 bzero(instance->mfi_evt_detail_obj.buffer,
2249 3096 sizeof (struct mrsas_evt_detail));
2250 3097
2251 3098 instance->mfi_evt_detail_obj.status |= DMA_OBJ_ALLOCATED;
2252 3099
2253 3100 return (DDI_SUCCESS);
3101 +
3102 +mrsas_undo_internal_buff:
3103 + if (instance->mfi_internal_dma_obj.status == DMA_OBJ_ALLOCATED) {
3104 + (void) mrsas_free_dma_obj(instance,
3105 + instance->mfi_internal_dma_obj);
3106 + instance->mfi_internal_dma_obj.status = DMA_OBJ_FREED;
3107 + }
3108 +
3109 + return (DDI_FAILURE);
2254 3110 }
2255 3111
2256 -/*
2257 - * free_space_for_mfi
2258 - */
2259 -static void
2260 -free_space_for_mfi(struct mrsas_instance *instance)
3112 +
3113 +void
3114 +mrsas_free_cmd_pool(struct mrsas_instance *instance)
2261 3115 {
2262 3116 int i;
2263 - uint32_t max_cmd = instance->max_fw_cmds;
3117 + uint32_t max_cmd;
3118 + size_t sz;
2264 3119
2265 3120 /* already freed */
2266 3121 if (instance->cmd_list == NULL) {
2267 3122 return;
2268 3123 }
2269 3124
2270 - free_additional_dma_buffer(instance);
3125 + max_cmd = instance->max_fw_cmds;
2271 3126
2272 - /* first free the MFI frame pool */
2273 - destroy_mfi_frame_pool(instance);
3127 + /* size of cmd_list array */
3128 + sz = sizeof (struct mrsas_cmd *) * max_cmd;
2274 3129
2275 - /* free all the commands in the cmd_list */
2276 - for (i = 0; i < instance->max_fw_cmds+1; i++) {
2277 - kmem_free(instance->cmd_list[i],
2278 - sizeof (struct mrsas_cmd));
3130 + /* First free each cmd */
3131 + for (i = 0; i < max_cmd; i++) {
3132 + if (instance->cmd_list[i] != NULL) {
3133 + kmem_free(instance->cmd_list[i],
3134 + sizeof (struct mrsas_cmd));
3135 + }
2279 3136
2280 3137 instance->cmd_list[i] = NULL;
2281 3138 }
2282 3139
2283 - /* free the cmd_list buffer itself */
2284 - kmem_free(instance->cmd_list,
2285 - sizeof (struct mrsas_cmd *) * (max_cmd+1));
3140 + /* Now, free cmd_list array */
3141 + if (instance->cmd_list != NULL)
3142 + kmem_free(instance->cmd_list, sz);
2286 3143
2287 3144 instance->cmd_list = NULL;
2288 3145
2289 3146 INIT_LIST_HEAD(&instance->cmd_pool_list);
2290 - INIT_LIST_HEAD(&instance->app_cmd_pool_list);
2291 3147 INIT_LIST_HEAD(&instance->cmd_pend_list);
3148 + if (instance->tbolt) {
3149 + INIT_LIST_HEAD(&instance->cmd_app_pool_list);
3150 + } else {
3151 + INIT_LIST_HEAD(&instance->app_cmd_pool_list);
3152 + }
3153 +
2292 3154 }
2293 3155
3156 +
2294 3157 /*
2295 - * alloc_space_for_mfi
3158 + * mrsas_alloc_cmd_pool
2296 3159 */
2297 -static int
2298 -alloc_space_for_mfi(struct mrsas_instance *instance)
3160 +int
3161 +mrsas_alloc_cmd_pool(struct mrsas_instance *instance)
2299 3162 {
2300 3163 int i;
3164 + int count;
2301 3165 uint32_t max_cmd;
2302 3166 uint32_t reserve_cmd;
2303 3167 size_t sz;
2304 3168
2305 3169 struct mrsas_cmd *cmd;
2306 3170
2307 3171 max_cmd = instance->max_fw_cmds;
3172 + con_log(CL_ANN1, (CE_NOTE, "mrsas_alloc_cmd_pool: "
3173 + "max_cmd %x", max_cmd));
2308 3174
2309 - /* reserve 1 more slot for flush_cache */
2310 - sz = sizeof (struct mrsas_cmd *) * (max_cmd+1);
2311 3175
3176 + sz = sizeof (struct mrsas_cmd *) * max_cmd;
3177 +
2312 3178 /*
2313 3179 * instance->cmd_list is an array of struct mrsas_cmd pointers.
2314 3180 * Allocate the dynamic array first and then allocate individual
2315 3181 * commands.
2316 3182 */
2317 3183 instance->cmd_list = kmem_zalloc(sz, KM_SLEEP);
2318 3184 ASSERT(instance->cmd_list);
2319 3185
2320 - for (i = 0; i < max_cmd+1; i++) {
2321 - instance->cmd_list[i] = kmem_zalloc(sizeof (struct mrsas_cmd),
2322 - KM_SLEEP);
2323 - ASSERT(instance->cmd_list[i]);
3186 + /* create a frame pool and assign one frame to each cmd */
3187 + for (count = 0; count < max_cmd; count++) {
3188 + instance->cmd_list[count] =
3189 + kmem_zalloc(sizeof (struct mrsas_cmd), KM_SLEEP);
3190 + ASSERT(instance->cmd_list[count]);
2324 3191 }
2325 3192
3193 + /* add all the commands to command pool */
3194 +
2326 3195 INIT_LIST_HEAD(&instance->cmd_pool_list);
2327 3196 INIT_LIST_HEAD(&instance->cmd_pend_list);
2328 - /* add all the commands to command pool (instance->cmd_pool) */
2329 - reserve_cmd = APP_RESERVE_CMDS;
2330 3197 INIT_LIST_HEAD(&instance->app_cmd_pool_list);
2331 - for (i = 0; i < reserve_cmd-1; i++) {
2332 - cmd = instance->cmd_list[i];
2333 - cmd->index = i;
3198 +
3199 + reserve_cmd = MRSAS_APP_RESERVED_CMDS;
3200 +
3201 + for (i = 0; i < reserve_cmd; i++) {
3202 + cmd = instance->cmd_list[i];
3203 + cmd->index = i;
2334 3204 mlist_add_tail(&cmd->list, &instance->app_cmd_pool_list);
2335 3205 }
2336 - /*
2337 - * reserve slot instance->cmd_list[APP_RESERVE_CMDS-1]
2338 - * for abort_aen_cmd
2339 - */
3206 +
3207 +
2340 3208 for (i = reserve_cmd; i < max_cmd; i++) {
2341 - cmd = instance->cmd_list[i];
2342 - cmd->index = i;
3209 + cmd = instance->cmd_list[i];
3210 + cmd->index = i;
2343 3211 mlist_add_tail(&cmd->list, &instance->cmd_pool_list);
2344 3212 }
2345 3213
2346 - /* single slot for flush_cache won't be added in command pool */
2347 - cmd = instance->cmd_list[max_cmd];
2348 - cmd->index = i;
3214 + return (DDI_SUCCESS);
2349 3215
2350 - /* create a frame pool and assign one frame to each cmd */
2351 - if (create_mfi_frame_pool(instance)) {
2352 - con_log(CL_ANN, (CE_NOTE, "error creating frame DMA pool"));
3216 +mrsas_undo_cmds:
3217 + if (count > 0) {
3218 + /* free each cmd */
3219 + for (i = 0; i < count; i++) {
3220 + if (instance->cmd_list[i] != NULL) {
3221 + kmem_free(instance->cmd_list[i],
3222 + sizeof (struct mrsas_cmd));
3223 + }
3224 + instance->cmd_list[i] = NULL;
3225 + }
3226 + }
3227 +
3228 +mrsas_undo_cmd_list:
3229 + if (instance->cmd_list != NULL)
3230 + kmem_free(instance->cmd_list, sz);
3231 + instance->cmd_list = NULL;
3232 +
3233 + return (DDI_FAILURE);
3234 +}
3235 +
3236 +
3237 +/*
3238 + * free_space_for_mfi
3239 + */
3240 +static void
3241 +free_space_for_mfi(struct mrsas_instance *instance)
3242 +{
3243 +
3244 + /* already freed */
3245 + if (instance->cmd_list == NULL) {
3246 + return;
3247 + }
3248 +
3249 + /* Free additional dma buffer */
3250 + free_additional_dma_buffer(instance);
3251 +
3252 + /* Free the MFI frame pool */
3253 + destroy_mfi_frame_pool(instance);
3254 +
3255 + /* Free all the commands in the cmd_list */
3256 + /* Free the cmd_list buffer itself */
3257 + mrsas_free_cmd_pool(instance);
3258 +}
3259 +
3260 +/*
3261 + * alloc_space_for_mfi
3262 + */
3263 +static int
3264 +alloc_space_for_mfi(struct mrsas_instance *instance)
3265 +{
3266 + /* Allocate command pool (memory for cmd_list & individual commands) */
3267 + if (mrsas_alloc_cmd_pool(instance)) {
3268 + cmn_err(CE_WARN, "error creating cmd pool");
2353 3269 return (DDI_FAILURE);
2354 3270 }
2355 3271
2356 - /* create a frame pool and assign one frame to each cmd */
3272 + /* Allocate MFI Frame pool */
3273 + if (create_mfi_frame_pool(instance)) {
3274 + cmn_err(CE_WARN, "error creating frame DMA pool");
3275 + goto mfi_undo_cmd_pool;
3276 + }
3277 +
3278 + /* Allocate additional DMA buffer */
2357 3279 if (alloc_additional_dma_buffer(instance)) {
2358 - con_log(CL_ANN, (CE_NOTE, "error creating frame DMA pool"));
2359 - return (DDI_FAILURE);
3280 + cmn_err(CE_WARN, "error creating frame DMA pool");
3281 + goto mfi_undo_frame_pool;
2360 3282 }
2361 3283
2362 3284 return (DDI_SUCCESS);
3285 +
3286 +mfi_undo_frame_pool:
3287 + destroy_mfi_frame_pool(instance);
3288 +
3289 +mfi_undo_cmd_pool:
3290 + mrsas_free_cmd_pool(instance);
3291 +
3292 + return (DDI_FAILURE);
2363 3293 }
2364 3294
2365 3295
3296 +
2366 3297 /*
2367 3298 * get_ctrl_info
2368 3299 */
2369 3300 static int
2370 3301 get_ctrl_info(struct mrsas_instance *instance,
2371 3302 struct mrsas_ctrl_info *ctrl_info)
2372 3303 {
2373 3304 int ret = 0;
2374 3305
2375 3306 struct mrsas_cmd *cmd;
2376 3307 struct mrsas_dcmd_frame *dcmd;
2377 3308 struct mrsas_ctrl_info *ci;
2378 3309
2379 - cmd = get_mfi_pkt(instance);
3310 + if (instance->tbolt) {
3311 + cmd = get_raid_msg_mfi_pkt(instance);
3312 + } else {
3313 + cmd = get_mfi_pkt(instance);
3314 + }
2380 3315
2381 3316 if (!cmd) {
2382 3317 con_log(CL_ANN, (CE_WARN,
2383 3318 "Failed to get a cmd for ctrl info"));
2384 3319 DTRACE_PROBE2(info_mfi_err, uint16_t, instance->fw_outstanding,
2385 3320 uint16_t, instance->max_fw_cmds);
2386 3321 return (DDI_FAILURE);
2387 3322 }
2388 - cmd->retry_count_for_ocr = 0;
3323 +
2389 3324 /* Clear the frame buffer and assign back the context id */
2390 3325 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
2391 3326 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
2392 3327 cmd->index);
2393 3328
2394 3329 dcmd = &cmd->frame->dcmd;
2395 3330
2396 3331 ci = (struct mrsas_ctrl_info *)instance->internal_buf;
2397 3332
2398 3333 if (!ci) {
2399 - con_log(CL_ANN, (CE_WARN,
2400 - "Failed to alloc mem for ctrl info"));
3334 + cmn_err(CE_WARN,
3335 + "Failed to alloc mem for ctrl info");
2401 3336 return_mfi_pkt(instance, cmd);
2402 3337 return (DDI_FAILURE);
2403 3338 }
2404 3339
2405 3340 (void) memset(ci, 0, sizeof (struct mrsas_ctrl_info));
2406 3341
2407 3342 /* for( i = 0; i < DCMD_MBOX_SZ; i++ ) dcmd->mbox.b[i] = 0; */
2408 3343 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
2409 3344
2410 3345 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
2411 3346 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status,
2412 3347 MFI_CMD_STATUS_POLL_MODE);
2413 3348 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 1);
2414 3349 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
2415 3350 MFI_FRAME_DIR_READ);
2416 3351 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
2417 3352 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len,
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2418 3353 sizeof (struct mrsas_ctrl_info));
2419 3354 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
2420 3355 MR_DCMD_CTRL_GET_INFO);
2421 3356 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].phys_addr,
2422 3357 instance->internal_buf_dmac_add);
2423 3358 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].length,
2424 3359 sizeof (struct mrsas_ctrl_info));
2425 3360
2426 3361 cmd->frame_count = 1;
2427 3362
3363 + if (instance->tbolt) {
3364 + mr_sas_tbolt_build_mfi_cmd(instance, cmd);
3365 + }
3366 +
2428 3367 if (!instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
2429 - ret = 0;
3368 + ret = 0;
2430 3369
2431 - ctrl_info->max_request_size = ddi_get32(
2432 - cmd->frame_dma_obj.acc_handle, &ci->max_request_size);
3370 + ctrl_info->max_request_size = ddi_get32(
3371 + cmd->frame_dma_obj.acc_handle, &ci->max_request_size);
2433 3372
2434 - ctrl_info->ld_present_count = ddi_get16(
2435 - cmd->frame_dma_obj.acc_handle, &ci->ld_present_count);
3373 + ctrl_info->ld_present_count = ddi_get16(
3374 + cmd->frame_dma_obj.acc_handle, &ci->ld_present_count);
2436 3375
2437 - ctrl_info->properties.on_off_properties =
2438 - ddi_get32(cmd->frame_dma_obj.acc_handle,
2439 - &ci->properties.on_off_properties);
2440 -
2441 - ddi_rep_get8(cmd->frame_dma_obj.acc_handle,
2442 - (uint8_t *)(ctrl_info->product_name),
2443 - (uint8_t *)(ci->product_name), 80 * sizeof (char),
2444 - DDI_DEV_AUTOINCR);
2445 - /* should get more members of ci with ddi_get when needed */
3376 + ctrl_info->properties.on_off_properties = ddi_get32(
3377 + cmd->frame_dma_obj.acc_handle,
3378 + &ci->properties.on_off_properties);
3379 + ddi_rep_get8(cmd->frame_dma_obj.acc_handle,
3380 + (uint8_t *)(ctrl_info->product_name),
3381 + (uint8_t *)(ci->product_name), 80 * sizeof (char),
3382 + DDI_DEV_AUTOINCR);
3383 + /* should get more members of ci with ddi_get when needed */
2446 3384 } else {
2447 - con_log(CL_ANN, (CE_WARN, "get_ctrl_info: Ctrl info failed"));
3385 + cmn_err(CE_WARN, "get_ctrl_info: Ctrl info failed");
2448 3386 ret = -1;
2449 3387 }
2450 3388
2451 3389 if (mrsas_common_check(instance, cmd) != DDI_SUCCESS) {
2452 3390 ret = -1;
2453 3391 }
2454 - return_mfi_pkt(instance, cmd);
3392 + if (instance->tbolt) {
3393 + return_raid_msg_mfi_pkt(instance, cmd);
3394 + } else {
3395 + return_mfi_pkt(instance, cmd);
3396 + }
2455 3397
2456 3398 return (ret);
2457 3399 }
2458 3400
2459 3401 /*
2460 3402 * abort_aen_cmd
2461 3403 */
2462 3404 static int
2463 3405 abort_aen_cmd(struct mrsas_instance *instance,
2464 3406 struct mrsas_cmd *cmd_to_abort)
2465 3407 {
2466 3408 int ret = 0;
2467 3409
2468 3410 struct mrsas_cmd *cmd;
2469 3411 struct mrsas_abort_frame *abort_fr;
2470 3412
2471 - cmd = instance->cmd_list[APP_RESERVE_CMDS-1];
3413 + con_log(CL_ANN1, (CE_NOTE, "chkpnt: abort_aen:%d", __LINE__));
2472 3414
3415 + if (instance->tbolt) {
3416 + cmd = get_raid_msg_mfi_pkt(instance);
3417 + } else {
3418 + cmd = get_mfi_pkt(instance);
3419 + }
3420 +
2473 3421 if (!cmd) {
2474 3422 con_log(CL_ANN1, (CE_WARN,
2475 3423 "abort_aen_cmd():Failed to get a cmd for abort_aen_cmd"));
2476 3424 DTRACE_PROBE2(abort_mfi_err, uint16_t, instance->fw_outstanding,
2477 3425 uint16_t, instance->max_fw_cmds);
2478 3426 return (DDI_FAILURE);
2479 3427 }
2480 - cmd->retry_count_for_ocr = 0;
3428 +
2481 3429 /* Clear the frame buffer and assign back the context id */
2482 3430 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
2483 3431 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
2484 3432 cmd->index);
2485 3433
2486 3434 abort_fr = &cmd->frame->abort;
2487 3435
2488 3436 /* prepare and issue the abort frame */
2489 3437 ddi_put8(cmd->frame_dma_obj.acc_handle,
2490 3438 &abort_fr->cmd, MFI_CMD_OP_ABORT);
2491 3439 ddi_put8(cmd->frame_dma_obj.acc_handle, &abort_fr->cmd_status,
2492 3440 MFI_CMD_STATUS_SYNC_MODE);
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2493 3441 ddi_put16(cmd->frame_dma_obj.acc_handle, &abort_fr->flags, 0);
2494 3442 ddi_put32(cmd->frame_dma_obj.acc_handle, &abort_fr->abort_context,
2495 3443 cmd_to_abort->index);
2496 3444 ddi_put32(cmd->frame_dma_obj.acc_handle,
2497 3445 &abort_fr->abort_mfi_phys_addr_lo, cmd_to_abort->frame_phys_addr);
2498 3446 ddi_put32(cmd->frame_dma_obj.acc_handle,
2499 3447 &abort_fr->abort_mfi_phys_addr_hi, 0);
2500 3448
2501 3449 instance->aen_cmd->abort_aen = 1;
2502 3450
2503 - cmd->sync_cmd = MRSAS_TRUE;
2504 3451 cmd->frame_count = 1;
2505 3452
3453 + if (instance->tbolt) {
3454 + mr_sas_tbolt_build_mfi_cmd(instance, cmd);
3455 + }
3456 +
2506 3457 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
2507 3458 con_log(CL_ANN1, (CE_WARN,
2508 3459 "abort_aen_cmd: issue_cmd_in_poll_mode failed"));
2509 3460 ret = -1;
2510 3461 } else {
2511 3462 ret = 0;
2512 3463 }
2513 3464
2514 3465 instance->aen_cmd->abort_aen = 1;
2515 3466 instance->aen_cmd = 0;
2516 3467
3468 + if (instance->tbolt) {
3469 + return_raid_msg_mfi_pkt(instance, cmd);
3470 + } else {
3471 + return_mfi_pkt(instance, cmd);
3472 + }
3473 +
2517 3474 atomic_add_16(&instance->fw_outstanding, (-1));
2518 3475
2519 3476 return (ret);
2520 3477 }
2521 3478
2522 3479
2523 -/*
2524 - * init_mfi
2525 - */
2526 3480 static int
2527 -init_mfi(struct mrsas_instance *instance)
3481 +mrsas_build_init_cmd(struct mrsas_instance *instance,
3482 + struct mrsas_cmd **cmd_ptr)
2528 3483 {
2529 3484 struct mrsas_cmd *cmd;
2530 - struct mrsas_ctrl_info ctrl_info;
2531 3485 struct mrsas_init_frame *init_frame;
2532 3486 struct mrsas_init_queue_info *initq_info;
3487 + struct mrsas_drv_ver drv_ver_info;
2533 3488
2534 - /* we expect the FW state to be READY */
2535 - if (mfi_state_transition_to_ready(instance)) {
2536 - con_log(CL_ANN, (CE_WARN, "mr_sas: F/W is not ready"));
2537 - goto fail_ready_state;
2538 - }
2539 3489
2540 - /* get various operational parameters from status register */
2541 - instance->max_num_sge =
2542 - (instance->func_ptr->read_fw_status_reg(instance) &
2543 - 0xFF0000) >> 0x10;
2544 3490 /*
2545 - * Reduce the max supported cmds by 1. This is to ensure that the
2546 - * reply_q_sz (1 more than the max cmd that driver may send)
2547 - * does not exceed max cmds that the FW can support
2548 - */
2549 - instance->max_fw_cmds =
2550 - instance->func_ptr->read_fw_status_reg(instance) & 0xFFFF;
2551 - instance->max_fw_cmds = instance->max_fw_cmds - 1;
2552 -
2553 - instance->max_num_sge =
2554 - (instance->max_num_sge > MRSAS_MAX_SGE_CNT) ?
2555 - MRSAS_MAX_SGE_CNT : instance->max_num_sge;
2556 -
2557 - /* create a pool of commands */
2558 - if (alloc_space_for_mfi(instance) != DDI_SUCCESS)
2559 - goto fail_alloc_fw_space;
2560 -
2561 - /*
2562 3491 * Prepare a init frame. Note the init frame points to queue info
2563 3492 * structure. Each frame has SGL allocated after first 64 bytes. For
2564 3493 * this frame - since we don't need any SGL - we use SGL's space as
2565 3494 * queue info structure
2566 3495 */
2567 - cmd = get_mfi_pkt(instance);
2568 - cmd->retry_count_for_ocr = 0;
3496 + cmd = *cmd_ptr;
2569 3497
3498 +
2570 3499 /* Clear the frame buffer and assign back the context id */
2571 3500 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
2572 3501 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
2573 3502 cmd->index);
2574 3503
2575 3504 init_frame = (struct mrsas_init_frame *)cmd->frame;
2576 3505 initq_info = (struct mrsas_init_queue_info *)
2577 3506 ((unsigned long)init_frame + 64);
2578 3507
2579 3508 (void) memset(init_frame, 0, MRMFI_FRAME_SIZE);
2580 3509 (void) memset(initq_info, 0, sizeof (struct mrsas_init_queue_info));
2581 3510
2582 3511 ddi_put32(cmd->frame_dma_obj.acc_handle, &initq_info->init_flags, 0);
2583 3512
2584 3513 ddi_put32(cmd->frame_dma_obj.acc_handle,
2585 3514 &initq_info->reply_queue_entries, instance->max_fw_cmds + 1);
2586 3515
2587 3516 ddi_put32(cmd->frame_dma_obj.acc_handle,
2588 3517 &initq_info->producer_index_phys_addr_hi, 0);
2589 3518 ddi_put32(cmd->frame_dma_obj.acc_handle,
2590 3519 &initq_info->producer_index_phys_addr_lo,
2591 3520 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address);
2592 3521
2593 3522 ddi_put32(cmd->frame_dma_obj.acc_handle,
2594 3523 &initq_info->consumer_index_phys_addr_hi, 0);
2595 3524 ddi_put32(cmd->frame_dma_obj.acc_handle,
2596 3525 &initq_info->consumer_index_phys_addr_lo,
2597 3526 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 4);
2598 3527
2599 3528 ddi_put32(cmd->frame_dma_obj.acc_handle,
2600 3529 &initq_info->reply_queue_start_phys_addr_hi, 0);
2601 3530 ddi_put32(cmd->frame_dma_obj.acc_handle,
2602 3531 &initq_info->reply_queue_start_phys_addr_lo,
2603 3532 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 8);
2604 3533
2605 3534 ddi_put8(cmd->frame_dma_obj.acc_handle,
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2606 3535 &init_frame->cmd, MFI_CMD_OP_INIT);
2607 3536 ddi_put8(cmd->frame_dma_obj.acc_handle, &init_frame->cmd_status,
2608 3537 MFI_CMD_STATUS_POLL_MODE);
2609 3538 ddi_put16(cmd->frame_dma_obj.acc_handle, &init_frame->flags, 0);
2610 3539 ddi_put32(cmd->frame_dma_obj.acc_handle,
2611 3540 &init_frame->queue_info_new_phys_addr_lo,
2612 3541 cmd->frame_phys_addr + 64);
2613 3542 ddi_put32(cmd->frame_dma_obj.acc_handle,
2614 3543 &init_frame->queue_info_new_phys_addr_hi, 0);
2615 3544
3545 +
3546 + /* fill driver version information */
3547 + fill_up_drv_ver(&drv_ver_info);
3548 +
3549 + /* allocate the driver version data transfer buffer */
3550 + instance->drv_ver_dma_obj.size = sizeof (drv_ver_info.drv_ver);
3551 + instance->drv_ver_dma_obj.dma_attr = mrsas_generic_dma_attr;
3552 + instance->drv_ver_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
3553 + instance->drv_ver_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
3554 + instance->drv_ver_dma_obj.dma_attr.dma_attr_sgllen = 1;
3555 + instance->drv_ver_dma_obj.dma_attr.dma_attr_align = 1;
3556 +
3557 + if (mrsas_alloc_dma_obj(instance, &instance->drv_ver_dma_obj,
3558 + (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
3559 + con_log(CL_ANN, (CE_WARN,
3560 + "init_mfi : Could not allocate driver version buffer."));
3561 + return (DDI_FAILURE);
3562 + }
3563 + /* copy driver version to dma buffer */
3564 + (void) memset(instance->drv_ver_dma_obj.buffer, 0,
3565 + sizeof (drv_ver_info.drv_ver));
3566 + ddi_rep_put8(cmd->frame_dma_obj.acc_handle,
3567 + (uint8_t *)drv_ver_info.drv_ver,
3568 + (uint8_t *)instance->drv_ver_dma_obj.buffer,
3569 + sizeof (drv_ver_info.drv_ver), DDI_DEV_AUTOINCR);
3570 +
3571 +
3572 + /* copy driver version physical address to init frame */
3573 + ddi_put64(cmd->frame_dma_obj.acc_handle, &init_frame->driverversion,
3574 + instance->drv_ver_dma_obj.dma_cookie[0].dmac_address);
3575 +
2616 3576 ddi_put32(cmd->frame_dma_obj.acc_handle, &init_frame->data_xfer_len,
2617 3577 sizeof (struct mrsas_init_queue_info));
2618 3578
2619 3579 cmd->frame_count = 1;
2620 3580
2621 - /* issue the init frame in polled mode */
3581 + *cmd_ptr = cmd;
3582 +
3583 + return (DDI_SUCCESS);
3584 +}
3585 +
3586 +
3587 +/*
3588 + * mrsas_init_adapter_ppc - Initialize MFI interface adapter.
3589 + */
3590 +int
3591 +mrsas_init_adapter_ppc(struct mrsas_instance *instance)
3592 +{
3593 + struct mrsas_cmd *cmd;
3594 +
3595 + /*
3596 + * allocate memory for mfi adapter(cmd pool, individual commands, mfi
3597 + * frames etc
3598 + */
3599 + if (alloc_space_for_mfi(instance) != DDI_SUCCESS) {
3600 + con_log(CL_ANN, (CE_NOTE,
3601 + "Error, failed to allocate memory for MFI adapter"));
3602 + return (DDI_FAILURE);
3603 + }
3604 +
3605 + /* Build INIT command */
3606 + cmd = get_mfi_pkt(instance);
3607 +
3608 + if (mrsas_build_init_cmd(instance, &cmd) != DDI_SUCCESS) {
3609 + con_log(CL_ANN,
3610 + (CE_NOTE, "Error, failed to build INIT command"));
3611 +
3612 + goto fail_undo_alloc_mfi_space;
3613 + }
3614 +
3615 + /*
3616 + * Disable interrupt before sending init frame ( see linux driver code)
3617 + * send INIT MFI frame in polled mode
3618 + */
2622 3619 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
2623 3620 con_log(CL_ANN, (CE_WARN, "failed to init firmware"));
2624 - return_mfi_pkt(instance, cmd);
2625 3621 goto fail_fw_init;
2626 3622 }
2627 3623
2628 - if (mrsas_common_check(instance, cmd) != DDI_SUCCESS) {
2629 - return_mfi_pkt(instance, cmd);
3624 + if (mrsas_common_check(instance, cmd) != DDI_SUCCESS)
2630 3625 goto fail_fw_init;
2631 - }
2632 3626 return_mfi_pkt(instance, cmd);
2633 3627
2634 3628 if (ctio_enable &&
2635 3629 (instance->func_ptr->read_fw_status_reg(instance) & 0x04000000)) {
2636 3630 con_log(CL_ANN, (CE_NOTE, "mr_sas: IEEE SGL's supported"));
2637 3631 instance->flag_ieee = 1;
2638 3632 } else {
2639 3633 instance->flag_ieee = 0;
2640 3634 }
2641 3635
2642 - instance->disable_online_ctrl_reset = 0;
3636 + instance->unroll.alloc_space_mfi = 1;
3637 + instance->unroll.verBuff = 1;
3638 +
3639 + return (DDI_SUCCESS);
3640 +
3641 +
3642 +fail_fw_init:
3643 + (void) mrsas_free_dma_obj(instance, instance->drv_ver_dma_obj);
3644 +
3645 +fail_undo_alloc_mfi_space:
3646 + return_mfi_pkt(instance, cmd);
3647 + free_space_for_mfi(instance);
3648 +
3649 + return (DDI_FAILURE);
3650 +
3651 +}
3652 +
3653 +/*
3654 + * mrsas_init_adapter - Initialize adapter.
3655 + */
3656 +int
3657 +mrsas_init_adapter(struct mrsas_instance *instance)
3658 +{
3659 + struct mrsas_ctrl_info ctrl_info;
3660 +
3661 +
3662 + /* we expect the FW state to be READY */
3663 + if (mfi_state_transition_to_ready(instance)) {
3664 + con_log(CL_ANN, (CE_WARN, "mr_sas: F/W is not ready"));
3665 + return (DDI_FAILURE);
3666 + }
3667 +
3668 + /* get various operational parameters from status register */
3669 + instance->max_num_sge =
3670 + (instance->func_ptr->read_fw_status_reg(instance) &
3671 + 0xFF0000) >> 0x10;
3672 + instance->max_num_sge =
3673 + (instance->max_num_sge > MRSAS_MAX_SGE_CNT) ?
3674 + MRSAS_MAX_SGE_CNT : instance->max_num_sge;
3675 +
3676 + /*
3677 + * Reduce the max supported cmds by 1. This is to ensure that the
3678 + * reply_q_sz (1 more than the max cmd that driver may send)
3679 + * does not exceed max cmds that the FW can support
3680 + */
3681 + instance->max_fw_cmds =
3682 + instance->func_ptr->read_fw_status_reg(instance) & 0xFFFF;
3683 + instance->max_fw_cmds = instance->max_fw_cmds - 1;
3684 +
3685 +
3686 +
3687 + /* Initialize adapter */
3688 + if (instance->func_ptr->init_adapter(instance) != DDI_SUCCESS) {
3689 + con_log(CL_ANN,
3690 + (CE_WARN, "mr_sas: could not initialize adapter"));
3691 + return (DDI_FAILURE);
3692 + }
3693 +
2643 3694 /* gather misc FW related information */
3695 + instance->disable_online_ctrl_reset = 0;
3696 +
2644 3697 if (!get_ctrl_info(instance, &ctrl_info)) {
2645 3698 instance->max_sectors_per_req = ctrl_info.max_request_size;
2646 3699 con_log(CL_ANN1, (CE_NOTE,
2647 3700 "product name %s ld present %d",
2648 3701 ctrl_info.product_name, ctrl_info.ld_present_count));
2649 3702 } else {
2650 3703 instance->max_sectors_per_req = instance->max_num_sge *
2651 3704 PAGESIZE / 512;
2652 3705 }
2653 3706
2654 3707 if (ctrl_info.properties.on_off_properties & DISABLE_OCR_PROP_FLAG)
2655 3708 instance->disable_online_ctrl_reset = 1;
2656 3709
2657 3710 return (DDI_SUCCESS);
2658 3711
2659 -fail_fw_init:
2660 -fail_alloc_fw_space:
2661 -
2662 - free_space_for_mfi(instance);
2663 -
2664 -fail_ready_state:
2665 - ddi_regs_map_free(&instance->regmap_handle);
2666 -
2667 -fail_mfi_reg_setup:
2668 - return (DDI_FAILURE);
2669 3712 }
2670 3713
2671 3714
2672 3715
2673 -
2674 -
2675 -
2676 3716 static int
2677 3717 mrsas_issue_init_mfi(struct mrsas_instance *instance)
2678 3718 {
2679 3719 struct mrsas_cmd *cmd;
2680 3720 struct mrsas_init_frame *init_frame;
2681 3721 struct mrsas_init_queue_info *initq_info;
2682 3722
2683 3723 /*
2684 3724 * Prepare a init frame. Note the init frame points to queue info
2685 3725 * structure. Each frame has SGL allocated after first 64 bytes. For
2686 3726 * this frame - since we don't need any SGL - we use SGL's space as
2687 3727 * queue info structure
2688 3728 */
2689 3729 con_log(CL_ANN1, (CE_NOTE,
2690 3730 "mrsas_issue_init_mfi: entry\n"));
2691 3731 cmd = get_mfi_app_pkt(instance);
2692 3732
2693 3733 if (!cmd) {
2694 - con_log(CL_ANN1, (CE_NOTE,
3734 + con_log(CL_ANN1, (CE_WARN,
2695 3735 "mrsas_issue_init_mfi: get_pkt failed\n"));
2696 3736 return (DDI_FAILURE);
2697 3737 }
2698 3738
2699 3739 /* Clear the frame buffer and assign back the context id */
2700 3740 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
2701 3741 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
2702 3742 cmd->index);
2703 3743
2704 3744 init_frame = (struct mrsas_init_frame *)cmd->frame;
2705 3745 initq_info = (struct mrsas_init_queue_info *)
2706 3746 ((unsigned long)init_frame + 64);
2707 3747
2708 3748 (void) memset(init_frame, 0, MRMFI_FRAME_SIZE);
2709 3749 (void) memset(initq_info, 0, sizeof (struct mrsas_init_queue_info));
2710 3750
2711 3751 ddi_put32(cmd->frame_dma_obj.acc_handle, &initq_info->init_flags, 0);
2712 3752
2713 3753 ddi_put32(cmd->frame_dma_obj.acc_handle,
2714 3754 &initq_info->reply_queue_entries, instance->max_fw_cmds + 1);
2715 3755 ddi_put32(cmd->frame_dma_obj.acc_handle,
2716 3756 &initq_info->producer_index_phys_addr_hi, 0);
2717 3757 ddi_put32(cmd->frame_dma_obj.acc_handle,
2718 3758 &initq_info->producer_index_phys_addr_lo,
2719 3759 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address);
2720 3760 ddi_put32(cmd->frame_dma_obj.acc_handle,
2721 3761 &initq_info->consumer_index_phys_addr_hi, 0);
2722 3762 ddi_put32(cmd->frame_dma_obj.acc_handle,
2723 3763 &initq_info->consumer_index_phys_addr_lo,
2724 3764 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 4);
2725 3765
2726 3766 ddi_put32(cmd->frame_dma_obj.acc_handle,
2727 3767 &initq_info->reply_queue_start_phys_addr_hi, 0);
2728 3768 ddi_put32(cmd->frame_dma_obj.acc_handle,
2729 3769 &initq_info->reply_queue_start_phys_addr_lo,
2730 3770 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 8);
2731 3771
2732 3772 ddi_put8(cmd->frame_dma_obj.acc_handle,
2733 3773 &init_frame->cmd, MFI_CMD_OP_INIT);
2734 3774 ddi_put8(cmd->frame_dma_obj.acc_handle, &init_frame->cmd_status,
2735 3775 MFI_CMD_STATUS_POLL_MODE);
2736 3776 ddi_put16(cmd->frame_dma_obj.acc_handle, &init_frame->flags, 0);
2737 3777 ddi_put32(cmd->frame_dma_obj.acc_handle,
2738 3778 &init_frame->queue_info_new_phys_addr_lo,
2739 3779 cmd->frame_phys_addr + 64);
2740 3780 ddi_put32(cmd->frame_dma_obj.acc_handle,
2741 3781 &init_frame->queue_info_new_phys_addr_hi, 0);
2742 3782
2743 3783 ddi_put32(cmd->frame_dma_obj.acc_handle, &init_frame->data_xfer_len,
2744 3784 sizeof (struct mrsas_init_queue_info));
2745 3785
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2746 3786 cmd->frame_count = 1;
2747 3787
2748 3788 /* issue the init frame in polled mode */
2749 3789 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
2750 3790 con_log(CL_ANN1, (CE_WARN,
2751 3791 "mrsas_issue_init_mfi():failed to "
2752 3792 "init firmware"));
2753 3793 return_mfi_app_pkt(instance, cmd);
2754 3794 return (DDI_FAILURE);
2755 3795 }
3796 +
3797 + if (mrsas_common_check(instance, cmd) != DDI_SUCCESS) {
3798 + return_mfi_pkt(instance, cmd);
3799 + return (DDI_FAILURE);
3800 + }
3801 +
2756 3802 return_mfi_app_pkt(instance, cmd);
2757 - con_log(CL_ANN1, (CE_NOTE, "mrsas_issue_init_mfi: Done"));
3803 + con_log(CL_ANN1, (CE_CONT, "mrsas_issue_init_mfi: Done"));
3804 +
2758 3805 return (DDI_SUCCESS);
2759 3806 }
2760 3807 /*
2761 3808 * mfi_state_transition_to_ready : Move the FW to READY state
2762 3809 *
2763 3810 * @reg_set : MFI register set
2764 3811 */
2765 -static int
3812 +int
2766 3813 mfi_state_transition_to_ready(struct mrsas_instance *instance)
2767 3814 {
2768 3815 int i;
2769 3816 uint8_t max_wait;
2770 - uint32_t fw_ctrl;
3817 + uint32_t fw_ctrl = 0;
2771 3818 uint32_t fw_state;
2772 3819 uint32_t cur_state;
2773 3820 uint32_t cur_abs_reg_val;
2774 3821 uint32_t prev_abs_reg_val;
3822 + uint32_t status;
2775 3823
2776 3824 cur_abs_reg_val =
2777 3825 instance->func_ptr->read_fw_status_reg(instance);
2778 3826 fw_state =
2779 3827 cur_abs_reg_val & MFI_STATE_MASK;
2780 - con_log(CL_ANN1, (CE_NOTE,
3828 + con_log(CL_ANN1, (CE_CONT,
2781 3829 "mfi_state_transition_to_ready:FW state = 0x%x", fw_state));
2782 3830
2783 3831 while (fw_state != MFI_STATE_READY) {
2784 - con_log(CL_ANN, (CE_NOTE,
3832 + con_log(CL_ANN, (CE_CONT,
2785 3833 "mfi_state_transition_to_ready:FW state%x", fw_state));
2786 3834
2787 3835 switch (fw_state) {
2788 3836 case MFI_STATE_FAULT:
2789 - con_log(CL_ANN1, (CE_NOTE,
3837 + con_log(CL_ANN, (CE_NOTE,
2790 3838 "mr_sas: FW in FAULT state!!"));
2791 3839
2792 3840 return (ENODEV);
2793 3841 case MFI_STATE_WAIT_HANDSHAKE:
2794 3842 /* set the CLR bit in IMR0 */
2795 3843 con_log(CL_ANN1, (CE_NOTE,
2796 3844 "mr_sas: FW waiting for HANDSHAKE"));
2797 3845 /*
2798 3846 * PCI_Hot Plug: MFI F/W requires
2799 3847 * (MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG)
2800 3848 * to be set
2801 3849 */
2802 3850 /* WR_IB_MSG_0(MFI_INIT_CLEAR_HANDSHAKE, instance); */
2803 - WR_IB_DOORBELL(MFI_INIT_CLEAR_HANDSHAKE |
2804 - MFI_INIT_HOTPLUG, instance);
2805 -
2806 - max_wait = 2;
3851 + if (!instance->tbolt) {
3852 + WR_IB_DOORBELL(MFI_INIT_CLEAR_HANDSHAKE |
3853 + MFI_INIT_HOTPLUG, instance);
3854 + } else {
3855 + WR_RESERVED0_REGISTER(MFI_INIT_CLEAR_HANDSHAKE |
3856 + MFI_INIT_HOTPLUG, instance);
3857 + }
3858 + max_wait = (instance->tbolt == 1) ? 180 : 2;
2807 3859 cur_state = MFI_STATE_WAIT_HANDSHAKE;
2808 3860 break;
2809 3861 case MFI_STATE_BOOT_MESSAGE_PENDING:
2810 3862 /* set the CLR bit in IMR0 */
2811 3863 con_log(CL_ANN1, (CE_NOTE,
2812 3864 "mr_sas: FW state boot message pending"));
2813 3865 /*
2814 3866 * PCI_Hot Plug: MFI F/W requires
2815 3867 * (MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG)
2816 3868 * to be set
2817 3869 */
2818 - WR_IB_DOORBELL(MFI_INIT_HOTPLUG, instance);
2819 -
2820 - max_wait = 10;
3870 + if (!instance->tbolt) {
3871 + WR_IB_DOORBELL(MFI_INIT_HOTPLUG, instance);
3872 + } else {
3873 + WR_RESERVED0_REGISTER(MFI_INIT_HOTPLUG,
3874 + instance);
3875 + }
3876 + max_wait = (instance->tbolt == 1) ? 180 : 10;
2821 3877 cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
2822 3878 break;
2823 3879 case MFI_STATE_OPERATIONAL:
2824 3880 /* bring it to READY state; assuming max wait 2 secs */
2825 3881 instance->func_ptr->disable_intr(instance);
2826 3882 con_log(CL_ANN1, (CE_NOTE,
2827 3883 "mr_sas: FW in OPERATIONAL state"));
2828 3884 /*
2829 3885 * PCI_Hot Plug: MFI F/W requires
2830 3886 * (MFI_INIT_READY | MFI_INIT_MFIMODE | MFI_INIT_ABORT)
2831 3887 * to be set
2832 3888 */
2833 3889 /* WR_IB_DOORBELL(MFI_INIT_READY, instance); */
2834 - WR_IB_DOORBELL(MFI_RESET_FLAGS, instance);
3890 + if (!instance->tbolt) {
3891 + WR_IB_DOORBELL(MFI_RESET_FLAGS, instance);
3892 + } else {
3893 + WR_RESERVED0_REGISTER(MFI_RESET_FLAGS,
3894 + instance);
2835 3895
2836 - max_wait = 10;
3896 + for (i = 0; i < (10 * 1000); i++) {
3897 + status =
3898 + RD_RESERVED0_REGISTER(instance);
3899 + if (status & 1) {
3900 + delay(1 *
3901 + drv_usectohz(MILLISEC));
3902 + } else {
3903 + break;
3904 + }
3905 + }
3906 +
3907 + }
3908 + max_wait = (instance->tbolt == 1) ? 180 : 10;
2837 3909 cur_state = MFI_STATE_OPERATIONAL;
2838 3910 break;
2839 3911 case MFI_STATE_UNDEFINED:
2840 3912 /* this state should not last for more than 2 seconds */
2841 3913 con_log(CL_ANN1, (CE_NOTE, "FW state undefined"));
2842 3914
2843 - max_wait = 2;
3915 + max_wait = (instance->tbolt == 1) ? 180 : 2;
2844 3916 cur_state = MFI_STATE_UNDEFINED;
2845 3917 break;
2846 3918 case MFI_STATE_BB_INIT:
2847 - max_wait = 2;
3919 + max_wait = (instance->tbolt == 1) ? 180 : 2;
2848 3920 cur_state = MFI_STATE_BB_INIT;
2849 3921 break;
2850 3922 case MFI_STATE_FW_INIT:
2851 - max_wait = 2;
3923 + max_wait = (instance->tbolt == 1) ? 180 : 2;
2852 3924 cur_state = MFI_STATE_FW_INIT;
2853 3925 break;
3926 + case MFI_STATE_FW_INIT_2:
3927 + max_wait = 180;
3928 + cur_state = MFI_STATE_FW_INIT_2;
3929 + break;
2854 3930 case MFI_STATE_DEVICE_SCAN:
2855 3931 max_wait = 180;
2856 3932 cur_state = MFI_STATE_DEVICE_SCAN;
2857 3933 prev_abs_reg_val = cur_abs_reg_val;
2858 3934 con_log(CL_NONE, (CE_NOTE,
2859 3935 "Device scan in progress ...\n"));
2860 3936 break;
3937 + case MFI_STATE_FLUSH_CACHE:
3938 + max_wait = 180;
3939 + cur_state = MFI_STATE_FLUSH_CACHE;
3940 + break;
2861 3941 default:
2862 3942 con_log(CL_ANN1, (CE_NOTE,
2863 3943 "mr_sas: Unknown state 0x%x", fw_state));
2864 3944 return (ENODEV);
2865 3945 }
2866 3946
2867 3947 /* the cur_state should not last for more than max_wait secs */
2868 3948 for (i = 0; i < (max_wait * MILLISEC); i++) {
2869 3949 /* fw_state = RD_OB_MSG_0(instance) & MFI_STATE_MASK; */
2870 3950 cur_abs_reg_val =
2871 3951 instance->func_ptr->read_fw_status_reg(instance);
2872 3952 fw_state = cur_abs_reg_val & MFI_STATE_MASK;
2873 3953
2874 3954 if (fw_state == cur_state) {
2875 3955 delay(1 * drv_usectohz(MILLISEC));
2876 3956 } else {
2877 3957 break;
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2878 3958 }
2879 3959 }
2880 3960 if (fw_state == MFI_STATE_DEVICE_SCAN) {
2881 3961 if (prev_abs_reg_val != cur_abs_reg_val) {
2882 3962 continue;
2883 3963 }
2884 3964 }
2885 3965
2886 3966 /* return error if fw_state hasn't changed after max_wait */
2887 3967 if (fw_state == cur_state) {
2888 - con_log(CL_ANN1, (CE_NOTE,
3968 + con_log(CL_ANN1, (CE_WARN,
2889 3969 "FW state hasn't changed in %d secs", max_wait));
2890 3970 return (ENODEV);
2891 3971 }
2892 3972 };
2893 3973
2894 - fw_ctrl = RD_IB_DOORBELL(instance);
3974 + if (!instance->tbolt) {
3975 + fw_ctrl = RD_IB_DOORBELL(instance);
3976 + con_log(CL_ANN1, (CE_CONT,
3977 + "mfi_state_transition_to_ready:FW ctrl = 0x%x", fw_ctrl));
2895 3978
2896 - con_log(CL_ANN1, (CE_NOTE,
2897 - "mfi_state_transition_to_ready:FW ctrl = 0x%x", fw_ctrl));
3979 + /*
3980 + * Write 0xF to the doorbell register to do the following.
3981 + * - Abort all outstanding commands (bit 0).
3982 + * - Transition from OPERATIONAL to READY state (bit 1).
3983 + * - Discard (possible) low MFA posted in 64-bit mode (bit-2).
3984 + * - Set to release FW to continue running (i.e. BIOS handshake
3985 + * (bit 3).
3986 + */
3987 + WR_IB_DOORBELL(0xF, instance);
3988 + }
2898 3989
2899 - /*
2900 - * Write 0xF to the doorbell register to do the following.
2901 - * - Abort all outstanding commands (bit 0).
2902 - * - Transition from OPERATIONAL to READY state (bit 1).
2903 - * - Discard (possible) low MFA posted in 64-bit mode (bit-2).
2904 - * - Set to release FW to continue running (i.e. BIOS handshake
2905 - * (bit 3).
2906 - */
2907 - WR_IB_DOORBELL(0xF, instance);
2908 -
2909 3990 if (mrsas_check_acc_handle(instance->regmap_handle) != DDI_SUCCESS) {
2910 - return (ENODEV);
3991 + return (EIO);
2911 3992 }
3993 +
2912 3994 return (DDI_SUCCESS);
2913 3995 }
2914 3996
2915 3997 /*
2916 3998 * get_seq_num
2917 3999 */
2918 4000 static int
2919 4001 get_seq_num(struct mrsas_instance *instance,
2920 4002 struct mrsas_evt_log_info *eli)
2921 4003 {
2922 4004 int ret = DDI_SUCCESS;
2923 4005
2924 4006 dma_obj_t dcmd_dma_obj;
2925 4007 struct mrsas_cmd *cmd;
2926 4008 struct mrsas_dcmd_frame *dcmd;
2927 4009 struct mrsas_evt_log_info *eli_tmp;
2928 - cmd = get_mfi_pkt(instance);
4010 + if (instance->tbolt) {
4011 + cmd = get_raid_msg_mfi_pkt(instance);
4012 + } else {
4013 + cmd = get_mfi_pkt(instance);
4014 + }
2929 4015
2930 4016 if (!cmd) {
2931 4017 cmn_err(CE_WARN, "mr_sas: failed to get a cmd");
2932 4018 DTRACE_PROBE2(seq_num_mfi_err, uint16_t,
2933 4019 instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
2934 4020 return (ENOMEM);
2935 4021 }
2936 - cmd->retry_count_for_ocr = 0;
4022 +
2937 4023 /* Clear the frame buffer and assign back the context id */
2938 4024 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
2939 4025 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
2940 4026 cmd->index);
2941 4027
2942 - dcmd = &cmd->frame->dcmd;
4028 + dcmd = &cmd->frame->dcmd;
2943 4029
2944 4030 /* allocate the data transfer buffer */
2945 4031 dcmd_dma_obj.size = sizeof (struct mrsas_evt_log_info);
2946 4032 dcmd_dma_obj.dma_attr = mrsas_generic_dma_attr;
2947 4033 dcmd_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
2948 4034 dcmd_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
2949 4035 dcmd_dma_obj.dma_attr.dma_attr_sgllen = 1;
2950 4036 dcmd_dma_obj.dma_attr.dma_attr_align = 1;
2951 4037
2952 4038 if (mrsas_alloc_dma_obj(instance, &dcmd_dma_obj,
2953 4039 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
2954 - con_log(CL_ANN, (CE_WARN,
2955 - "get_seq_num: could not allocate data transfer buffer."));
4040 + cmn_err(CE_WARN,
4041 + "get_seq_num: could not allocate data transfer buffer.");
2956 4042 return (DDI_FAILURE);
2957 4043 }
2958 4044
2959 4045 (void) memset(dcmd_dma_obj.buffer, 0,
2960 4046 sizeof (struct mrsas_evt_log_info));
2961 4047
2962 4048 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
2963 4049
2964 4050 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
2965 4051 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0);
2966 4052 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 1);
2967 4053 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
2968 4054 MFI_FRAME_DIR_READ);
2969 4055 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
2970 4056 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len,
2971 4057 sizeof (struct mrsas_evt_log_info));
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2972 4058 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
2973 4059 MR_DCMD_CTRL_EVENT_GET_INFO);
2974 4060 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].length,
2975 4061 sizeof (struct mrsas_evt_log_info));
2976 4062 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].phys_addr,
2977 4063 dcmd_dma_obj.dma_cookie[0].dmac_address);
2978 4064
2979 4065 cmd->sync_cmd = MRSAS_TRUE;
2980 4066 cmd->frame_count = 1;
2981 4067
4068 + if (instance->tbolt) {
4069 + mr_sas_tbolt_build_mfi_cmd(instance, cmd);
4070 + }
4071 +
2982 4072 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
2983 4073 cmn_err(CE_WARN, "get_seq_num: "
2984 4074 "failed to issue MRSAS_DCMD_CTRL_EVENT_GET_INFO");
2985 4075 ret = DDI_FAILURE;
2986 4076 } else {
2987 4077 eli_tmp = (struct mrsas_evt_log_info *)dcmd_dma_obj.buffer;
2988 4078 eli->newest_seq_num = ddi_get32(cmd->frame_dma_obj.acc_handle,
2989 4079 &eli_tmp->newest_seq_num);
2990 4080 ret = DDI_SUCCESS;
2991 4081 }
2992 4082
2993 4083 if (mrsas_free_dma_obj(instance, dcmd_dma_obj) != DDI_SUCCESS)
2994 4084 ret = DDI_FAILURE;
2995 4085
2996 - if (mrsas_common_check(instance, cmd) != DDI_SUCCESS) {
2997 - ret = DDI_FAILURE;
4086 + if (instance->tbolt) {
4087 + return_raid_msg_mfi_pkt(instance, cmd);
4088 + } else {
4089 + return_mfi_pkt(instance, cmd);
2998 4090 }
2999 4091
3000 - return_mfi_pkt(instance, cmd);
3001 -
3002 4092 return (ret);
3003 4093 }
3004 4094
3005 4095 /*
3006 4096 * start_mfi_aen
3007 4097 */
3008 4098 static int
3009 4099 start_mfi_aen(struct mrsas_instance *instance)
3010 4100 {
3011 4101 int ret = 0;
3012 4102
3013 4103 struct mrsas_evt_log_info eli;
3014 4104 union mrsas_evt_class_locale class_locale;
3015 4105
3016 4106 /* get the latest sequence number from FW */
3017 4107 (void) memset(&eli, 0, sizeof (struct mrsas_evt_log_info));
3018 4108
3019 4109 if (get_seq_num(instance, &eli)) {
3020 4110 cmn_err(CE_WARN, "start_mfi_aen: failed to get seq num");
3021 4111 return (-1);
3022 4112 }
3023 4113
3024 4114 /* register AEN with FW for latest sequence number plus 1 */
3025 4115 class_locale.members.reserved = 0;
3026 4116 class_locale.members.locale = LE_16(MR_EVT_LOCALE_ALL);
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3027 4117 class_locale.members.class = MR_EVT_CLASS_INFO;
3028 4118 class_locale.word = LE_32(class_locale.word);
3029 4119 ret = register_mfi_aen(instance, eli.newest_seq_num + 1,
3030 4120 class_locale.word);
3031 4121
3032 4122 if (ret) {
3033 4123 cmn_err(CE_WARN, "start_mfi_aen: aen registration failed");
3034 4124 return (-1);
3035 4125 }
3036 4126
4127 +
3037 4128 return (ret);
3038 4129 }
3039 4130
3040 4131 /*
3041 4132 * flush_cache
3042 4133 */
3043 4134 static void
3044 4135 flush_cache(struct mrsas_instance *instance)
3045 4136 {
3046 4137 struct mrsas_cmd *cmd = NULL;
3047 4138 struct mrsas_dcmd_frame *dcmd;
3048 - uint32_t max_cmd = instance->max_fw_cmds;
4139 + if (instance->tbolt) {
4140 + cmd = get_raid_msg_mfi_pkt(instance);
4141 + } else {
4142 + cmd = get_mfi_pkt(instance);
4143 + }
3049 4144
3050 - cmd = instance->cmd_list[max_cmd];
3051 -
3052 4145 if (!cmd) {
3053 4146 con_log(CL_ANN1, (CE_WARN,
3054 4147 "flush_cache():Failed to get a cmd for flush_cache"));
3055 4148 DTRACE_PROBE2(flush_cache_err, uint16_t,
3056 4149 instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
3057 4150 return;
3058 4151 }
3059 - cmd->retry_count_for_ocr = 0;
4152 +
3060 4153 /* Clear the frame buffer and assign back the context id */
3061 4154 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3062 4155 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3063 4156 cmd->index);
3064 4157
3065 4158 dcmd = &cmd->frame->dcmd;
3066 4159
3067 4160 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
3068 4161
3069 4162 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
3070 4163 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0x0);
3071 4164 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 0);
3072 4165 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
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3073 4166 MFI_FRAME_DIR_NONE);
3074 4167 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
3075 4168 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len, 0);
3076 4169 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
3077 4170 MR_DCMD_CTRL_CACHE_FLUSH);
3078 4171 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->mbox.b[0],
3079 4172 MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE);
3080 4173
3081 4174 cmd->frame_count = 1;
3082 4175
4176 + if (instance->tbolt) {
4177 + mr_sas_tbolt_build_mfi_cmd(instance, cmd);
4178 + }
4179 +
3083 4180 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3084 4181 con_log(CL_ANN1, (CE_WARN,
3085 4182 "flush_cache: failed to issue MFI_DCMD_CTRL_CACHE_FLUSH"));
3086 4183 }
3087 - con_log(CL_ANN1, (CE_NOTE, "flush_cache done"));
4184 + con_log(CL_ANN1, (CE_CONT, "flush_cache done"));
4185 + if (instance->tbolt) {
4186 + return_raid_msg_mfi_pkt(instance, cmd);
4187 + } else {
4188 + return_mfi_pkt(instance, cmd);
4189 + }
4190 +
3088 4191 }
3089 4192
3090 4193 /*
3091 4194 * service_mfi_aen- Completes an AEN command
3092 4195 * @instance: Adapter soft state
3093 4196 * @cmd: Command to be completed
3094 4197 *
3095 4198 */
3096 -static void
4199 +void
3097 4200 service_mfi_aen(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
3098 4201 {
3099 4202 uint32_t seq_num;
3100 4203 struct mrsas_evt_detail *evt_detail =
3101 4204 (struct mrsas_evt_detail *)instance->mfi_evt_detail_obj.buffer;
3102 4205 int rval = 0;
3103 4206 int tgt = 0;
4207 + uint8_t dtype;
4208 +#ifdef PDSUPPORT
4209 + mrsas_pd_address_t *pd_addr;
4210 +#endif
3104 4211 ddi_acc_handle_t acc_handle;
3105 4212
3106 - acc_handle = cmd->frame_dma_obj.acc_handle;
4213 + con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
3107 4214
4215 + acc_handle = cmd->frame_dma_obj.acc_handle;
3108 4216 cmd->cmd_status = ddi_get8(acc_handle, &cmd->frame->io.cmd_status);
3109 -
3110 4217 if (cmd->cmd_status == ENODATA) {
3111 4218 cmd->cmd_status = 0;
3112 4219 }
3113 4220
3114 4221 /*
3115 4222 * log the MFI AEN event to the sysevent queue so that
3116 4223 * application will get noticed
3117 4224 */
3118 4225 if (ddi_log_sysevent(instance->dip, DDI_VENDOR_LSI, "LSIMEGA", "SAS",
3119 4226 NULL, NULL, DDI_NOSLEEP) != DDI_SUCCESS) {
3120 4227 int instance_no = ddi_get_instance(instance->dip);
3121 4228 con_log(CL_ANN, (CE_WARN,
3122 4229 "mr_sas%d: Failed to log AEN event", instance_no));
3123 4230 }
3124 4231 /*
3125 4232 * Check for any ld devices that has changed state. i.e. online
3126 4233 * or offline.
3127 4234 */
3128 - con_log(CL_ANN1, (CE_NOTE,
4235 + con_log(CL_ANN1, (CE_CONT,
3129 4236 "AEN: code = %x class = %x locale = %x args = %x",
3130 4237 ddi_get32(acc_handle, &evt_detail->code),
3131 4238 evt_detail->cl.members.class,
3132 4239 ddi_get16(acc_handle, &evt_detail->cl.members.locale),
3133 4240 ddi_get8(acc_handle, &evt_detail->arg_type)));
3134 4241
3135 4242 switch (ddi_get32(acc_handle, &evt_detail->code)) {
3136 4243 case MR_EVT_CFG_CLEARED: {
3137 4244 for (tgt = 0; tgt < MRDRV_MAX_LD; tgt++) {
3138 4245 if (instance->mr_ld_list[tgt].dip != NULL) {
4246 + mutex_enter(&instance->config_dev_mtx);
4247 + instance->mr_ld_list[tgt].flag =
4248 + (uint8_t)~MRDRV_TGT_VALID;
4249 + mutex_exit(&instance->config_dev_mtx);
3139 4250 rval = mrsas_service_evt(instance, tgt, 0,
3140 4251 MRSAS_EVT_UNCONFIG_TGT, NULL);
3141 4252 con_log(CL_ANN1, (CE_WARN,
3142 4253 "mr_sas: CFG CLEARED AEN rval = %d "
3143 4254 "tgt id = %d", rval, tgt));
3144 4255 }
3145 4256 }
3146 4257 break;
3147 4258 }
3148 4259
3149 4260 case MR_EVT_LD_DELETED: {
4261 + tgt = ddi_get16(acc_handle, &evt_detail->args.ld.target_id);
4262 + mutex_enter(&instance->config_dev_mtx);
4263 + instance->mr_ld_list[tgt].flag = (uint8_t)~MRDRV_TGT_VALID;
4264 + mutex_exit(&instance->config_dev_mtx);
3150 4265 rval = mrsas_service_evt(instance,
3151 4266 ddi_get16(acc_handle, &evt_detail->args.ld.target_id), 0,
3152 4267 MRSAS_EVT_UNCONFIG_TGT, NULL);
3153 4268 con_log(CL_ANN1, (CE_WARN, "mr_sas: LD DELETED AEN rval = %d "
3154 4269 "tgt id = %d index = %d", rval,
3155 4270 ddi_get16(acc_handle, &evt_detail->args.ld.target_id),
3156 4271 ddi_get8(acc_handle, &evt_detail->args.ld.ld_index)));
3157 4272 break;
3158 4273 } /* End of MR_EVT_LD_DELETED */
3159 4274
3160 4275 case MR_EVT_LD_CREATED: {
3161 4276 rval = mrsas_service_evt(instance,
3162 4277 ddi_get16(acc_handle, &evt_detail->args.ld.target_id), 0,
3163 4278 MRSAS_EVT_CONFIG_TGT, NULL);
3164 4279 con_log(CL_ANN1, (CE_WARN, "mr_sas: LD CREATED AEN rval = %d "
3165 4280 "tgt id = %d index = %d", rval,
3166 4281 ddi_get16(acc_handle, &evt_detail->args.ld.target_id),
3167 4282 ddi_get8(acc_handle, &evt_detail->args.ld.ld_index)));
3168 4283 break;
3169 4284 } /* End of MR_EVT_LD_CREATED */
4285 +
4286 +#ifdef PDSUPPORT
4287 + case MR_EVT_PD_REMOVED_EXT: {
4288 + if (instance->tbolt) {
4289 + pd_addr = &evt_detail->args.pd_addr;
4290 + dtype = pd_addr->scsi_dev_type;
4291 + con_log(CL_DLEVEL1, (CE_NOTE,
4292 + " MR_EVT_PD_REMOVED_EXT: dtype = %x,"
4293 + " arg_type = %d ", dtype, evt_detail->arg_type));
4294 + tgt = ddi_get16(acc_handle,
4295 + &evt_detail->args.pd.device_id);
4296 + mutex_enter(&instance->config_dev_mtx);
4297 + instance->mr_tbolt_pd_list[tgt].flag =
4298 + (uint8_t)~MRDRV_TGT_VALID;
4299 + mutex_exit(&instance->config_dev_mtx);
4300 + rval = mrsas_service_evt(instance, ddi_get16(
4301 + acc_handle, &evt_detail->args.pd.device_id),
4302 + 1, MRSAS_EVT_UNCONFIG_TGT, NULL);
4303 + con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_REMOVED:"
4304 + "rval = %d tgt id = %d ", rval,
4305 + ddi_get16(acc_handle,
4306 + &evt_detail->args.pd.device_id)));
4307 + }
4308 + break;
4309 + } /* End of MR_EVT_PD_REMOVED_EXT */
4310 +
4311 + case MR_EVT_PD_INSERTED_EXT: {
4312 + if (instance->tbolt) {
4313 + rval = mrsas_service_evt(instance,
4314 + ddi_get16(acc_handle,
4315 + &evt_detail->args.pd.device_id),
4316 + 1, MRSAS_EVT_CONFIG_TGT, NULL);
4317 + con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_INSERTEDi_EXT:"
4318 + "rval = %d tgt id = %d ", rval,
4319 + ddi_get16(acc_handle,
4320 + &evt_detail->args.pd.device_id)));
4321 + }
4322 + break;
4323 + } /* End of MR_EVT_PD_INSERTED_EXT */
4324 +
4325 + case MR_EVT_PD_STATE_CHANGE: {
4326 + if (instance->tbolt) {
4327 + tgt = ddi_get16(acc_handle,
4328 + &evt_detail->args.pd.device_id);
4329 + if ((evt_detail->args.pd_state.prevState ==
4330 + PD_SYSTEM) &&
4331 + (evt_detail->args.pd_state.newState != PD_SYSTEM)) {
4332 + mutex_enter(&instance->config_dev_mtx);
4333 + instance->mr_tbolt_pd_list[tgt].flag =
4334 + (uint8_t)~MRDRV_TGT_VALID;
4335 + mutex_exit(&instance->config_dev_mtx);
4336 + rval = mrsas_service_evt(instance,
4337 + ddi_get16(acc_handle,
4338 + &evt_detail->args.pd.device_id),
4339 + 1, MRSAS_EVT_UNCONFIG_TGT, NULL);
4340 + con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_REMOVED:"
4341 + "rval = %d tgt id = %d ", rval,
4342 + ddi_get16(acc_handle,
4343 + &evt_detail->args.pd.device_id)));
4344 + break;
4345 + }
4346 + if ((evt_detail->args.pd_state.prevState
4347 + == UNCONFIGURED_GOOD) &&
4348 + (evt_detail->args.pd_state.newState == PD_SYSTEM)) {
4349 + rval = mrsas_service_evt(instance,
4350 + ddi_get16(acc_handle,
4351 + &evt_detail->args.pd.device_id),
4352 + 1, MRSAS_EVT_CONFIG_TGT, NULL);
4353 + con_log(CL_ANN1, (CE_WARN,
4354 + "mr_sas: PD_INSERTED: rval = %d "
4355 + " tgt id = %d ", rval,
4356 + ddi_get16(acc_handle,
4357 + &evt_detail->args.pd.device_id)));
4358 + break;
4359 + }
4360 + }
4361 + break;
4362 + }
4363 +#endif
4364 +
3170 4365 } /* End of Main Switch */
3171 4366
3172 4367 /* get copy of seq_num and class/locale for re-registration */
3173 4368 seq_num = ddi_get32(acc_handle, &evt_detail->seq_num);
3174 4369 seq_num++;
3175 4370 (void) memset(instance->mfi_evt_detail_obj.buffer, 0,
3176 4371 sizeof (struct mrsas_evt_detail));
3177 4372
3178 4373 ddi_put8(acc_handle, &cmd->frame->dcmd.cmd_status, 0x0);
3179 4374 ddi_put32(acc_handle, &cmd->frame->dcmd.mbox.w[0], seq_num);
3180 4375
3181 4376 instance->aen_seq_num = seq_num;
3182 4377
3183 4378 cmd->frame_count = 1;
3184 4379
4380 + cmd->retry_count_for_ocr = 0;
4381 + cmd->drv_pkt_time = 0;
4382 +
3185 4383 /* Issue the aen registration frame */
3186 4384 instance->func_ptr->issue_cmd(cmd, instance);
3187 4385 }
3188 4386
3189 4387 /*
3190 4388 * complete_cmd_in_sync_mode - Completes an internal command
3191 4389 * @instance: Adapter soft state
3192 4390 * @cmd: Command to be completed
3193 4391 *
3194 4392 * The issue_cmd_in_sync_mode() function waits for a command to complete
3195 4393 * after it issues a command. This function wakes up that waiting routine by
3196 4394 * calling wake_up() on the wait queue.
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3197 4395 */
3198 4396 static void
3199 4397 complete_cmd_in_sync_mode(struct mrsas_instance *instance,
3200 4398 struct mrsas_cmd *cmd)
3201 4399 {
3202 4400 cmd->cmd_status = ddi_get8(cmd->frame_dma_obj.acc_handle,
3203 4401 &cmd->frame->io.cmd_status);
3204 4402
3205 4403 cmd->sync_cmd = MRSAS_FALSE;
3206 4404
3207 - if (cmd->cmd_status == ENODATA) {
3208 - cmd->cmd_status = 0;
3209 - }
3210 -
3211 4405 con_log(CL_ANN1, (CE_NOTE, "complete_cmd_in_sync_mode called %p \n",
3212 4406 (void *)cmd));
3213 4407
4408 + mutex_enter(&instance->int_cmd_mtx);
4409 + if (cmd->cmd_status == ENODATA) {
4410 + cmd->cmd_status = 0;
4411 + }
3214 4412 cv_broadcast(&instance->int_cmd_cv);
4413 + mutex_exit(&instance->int_cmd_mtx);
4414 +
3215 4415 }
3216 4416
3217 4417 /*
3218 4418 * Call this function inside mrsas_softintr.
3219 4419 * mrsas_initiate_ocr_if_fw_is_faulty - Initiates OCR if FW status is faulty
3220 4420 * @instance: Adapter soft state
3221 4421 */
3222 4422
3223 4423 static uint32_t
3224 4424 mrsas_initiate_ocr_if_fw_is_faulty(struct mrsas_instance *instance)
3225 4425 {
3226 4426 uint32_t cur_abs_reg_val;
3227 4427 uint32_t fw_state;
3228 4428
3229 4429 cur_abs_reg_val = instance->func_ptr->read_fw_status_reg(instance);
3230 4430 fw_state = cur_abs_reg_val & MFI_STATE_MASK;
3231 4431 if (fw_state == MFI_STATE_FAULT) {
3232 -
3233 4432 if (instance->disable_online_ctrl_reset == 1) {
3234 - con_log(CL_ANN1, (CE_NOTE,
3235 - "mrsas_initiate_ocr_if_fw_is_faulty: "
3236 - "FW in Fault state, detected in ISR: "
3237 - "FW doesn't support ocr "));
3238 - return (ADAPTER_RESET_NOT_REQUIRED);
4433 + cmn_err(CE_WARN,
4434 + "mrsas_initiate_ocr_if_fw_is_faulty: "
4435 + "FW in Fault state, detected in ISR: "
4436 + "FW doesn't support ocr ");
4437 +
4438 + return (ADAPTER_RESET_NOT_REQUIRED);
3239 4439 } else {
3240 - con_log(CL_ANN1, (CE_NOTE,
3241 - "mrsas_initiate_ocr_if_fw_is_faulty: "
3242 - "FW in Fault state, detected in ISR: FW supports ocr "));
4440 + con_log(CL_ANN, (CE_NOTE,
4441 + "mrsas_initiate_ocr_if_fw_is_faulty: FW in Fault "
4442 + "state, detected in ISR: FW supports ocr "));
4443 +
3243 4444 return (ADAPTER_RESET_REQUIRED);
3244 4445 }
3245 4446 }
4447 +
3246 4448 return (ADAPTER_RESET_NOT_REQUIRED);
3247 4449 }
3248 4450
3249 4451 /*
3250 4452 * mrsas_softintr - The Software ISR
3251 4453 * @param arg : HBA soft state
3252 4454 *
3253 4455 * called from high-level interrupt if hi-level interrupt are not there,
3254 4456 * otherwise triggered as a soft interrupt
3255 4457 */
3256 4458 static uint_t
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3257 4459 mrsas_softintr(struct mrsas_instance *instance)
3258 4460 {
3259 4461 struct scsi_pkt *pkt;
3260 4462 struct scsa_cmd *acmd;
3261 4463 struct mrsas_cmd *cmd;
3262 4464 struct mlist_head *pos, *next;
3263 4465 mlist_t process_list;
3264 4466 struct mrsas_header *hdr;
3265 4467 struct scsi_arq_status *arqstat;
3266 4468
3267 - con_log(CL_ANN1, (CE_CONT, "mrsas_softintr called"));
4469 + con_log(CL_ANN1, (CE_NOTE, "mrsas_softintr() called."));
3268 4470
3269 4471 ASSERT(instance);
3270 4472
3271 4473 mutex_enter(&instance->completed_pool_mtx);
3272 4474
3273 4475 if (mlist_empty(&instance->completed_pool_list)) {
3274 4476 mutex_exit(&instance->completed_pool_mtx);
3275 4477 return (DDI_INTR_CLAIMED);
3276 4478 }
3277 4479
3278 4480 instance->softint_running = 1;
3279 4481
3280 4482 INIT_LIST_HEAD(&process_list);
3281 4483 mlist_splice(&instance->completed_pool_list, &process_list);
3282 4484 INIT_LIST_HEAD(&instance->completed_pool_list);
3283 4485
3284 4486 mutex_exit(&instance->completed_pool_mtx);
3285 4487
3286 4488 /* perform all callbacks first, before releasing the SCBs */
3287 4489 mlist_for_each_safe(pos, next, &process_list) {
3288 4490 cmd = mlist_entry(pos, struct mrsas_cmd, list);
3289 4491
3290 4492 /* syncronize the Cmd frame for the controller */
3291 4493 (void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle,
3292 4494 0, 0, DDI_DMA_SYNC_FORCPU);
3293 4495
3294 4496 if (mrsas_check_dma_handle(cmd->frame_dma_obj.dma_handle) !=
3295 4497 DDI_SUCCESS) {
3296 4498 mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
3297 4499 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
3298 4500 con_log(CL_ANN1, (CE_WARN,
3299 4501 "mrsas_softintr: "
3300 4502 "FMA check reports DMA handle failure"));
3301 4503 return (DDI_INTR_CLAIMED);
3302 4504 }
3303 4505
3304 4506 hdr = &cmd->frame->hdr;
3305 4507
3306 4508 /* remove the internal command from the process list */
3307 4509 mlist_del_init(&cmd->list);
3308 4510
3309 4511 switch (ddi_get8(cmd->frame_dma_obj.acc_handle, &hdr->cmd)) {
3310 4512 case MFI_CMD_OP_PD_SCSI:
3311 4513 case MFI_CMD_OP_LD_SCSI:
3312 4514 case MFI_CMD_OP_LD_READ:
3313 4515 case MFI_CMD_OP_LD_WRITE:
3314 4516 /*
3315 4517 * MFI_CMD_OP_PD_SCSI and MFI_CMD_OP_LD_SCSI
3316 4518 * could have been issued either through an
3317 4519 * IO path or an IOCTL path. If it was via IOCTL,
3318 4520 * we will send it to internal completion.
3319 4521 */
3320 4522 if (cmd->sync_cmd == MRSAS_TRUE) {
3321 4523 complete_cmd_in_sync_mode(instance, cmd);
3322 4524 break;
3323 4525 }
3324 4526
3325 4527 /* regular commands */
3326 4528 acmd = cmd->cmd;
3327 4529 pkt = CMD2PKT(acmd);
3328 4530
3329 4531 if (acmd->cmd_flags & CFLAG_DMAVALID) {
3330 4532 if (acmd->cmd_flags & CFLAG_CONSISTENT) {
3331 4533 (void) ddi_dma_sync(acmd->cmd_dmahandle,
3332 4534 acmd->cmd_dma_offset,
3333 4535 acmd->cmd_dma_len,
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3334 4536 DDI_DMA_SYNC_FORCPU);
3335 4537 }
3336 4538 }
3337 4539
3338 4540 pkt->pkt_reason = CMD_CMPLT;
3339 4541 pkt->pkt_statistics = 0;
3340 4542 pkt->pkt_state = STATE_GOT_BUS
3341 4543 | STATE_GOT_TARGET | STATE_SENT_CMD
3342 4544 | STATE_XFERRED_DATA | STATE_GOT_STATUS;
3343 4545
3344 - con_log(CL_ANN1, (CE_CONT,
4546 + con_log(CL_ANN, (CE_CONT,
3345 4547 "CDB[0] = %x completed for %s: size %lx context %x",
3346 4548 pkt->pkt_cdbp[0], ((acmd->islogical) ? "LD" : "PD"),
3347 4549 acmd->cmd_dmacount, hdr->context));
3348 4550 DTRACE_PROBE3(softintr_cdb, uint8_t, pkt->pkt_cdbp[0],
3349 4551 uint_t, acmd->cmd_cdblen, ulong_t,
3350 4552 acmd->cmd_dmacount);
3351 4553
3352 4554 if (pkt->pkt_cdbp[0] == SCMD_INQUIRY) {
3353 4555 struct scsi_inquiry *inq;
3354 4556
3355 4557 if (acmd->cmd_dmacount != 0) {
3356 4558 bp_mapin(acmd->cmd_buf);
3357 4559 inq = (struct scsi_inquiry *)
3358 4560 acmd->cmd_buf->b_un.b_addr;
3359 4561
3360 4562 /* don't expose physical drives to OS */
3361 4563 if (acmd->islogical &&
3362 4564 (hdr->cmd_status == MFI_STAT_OK)) {
3363 4565 display_scsi_inquiry(
3364 4566 (caddr_t)inq);
3365 4567 } else if ((hdr->cmd_status ==
3366 4568 MFI_STAT_OK) && inq->inq_dtype ==
3367 4569 DTYPE_DIRECT) {
3368 4570
3369 4571 display_scsi_inquiry(
3370 4572 (caddr_t)inq);
3371 4573
3372 4574 /* for physical disk */
3373 4575 hdr->cmd_status =
3374 4576 MFI_STAT_DEVICE_NOT_FOUND;
3375 4577 }
3376 4578 }
3377 4579 }
3378 4580
3379 4581 DTRACE_PROBE2(softintr_done, uint8_t, hdr->cmd,
3380 4582 uint8_t, hdr->cmd_status);
3381 4583
3382 4584 switch (hdr->cmd_status) {
3383 4585 case MFI_STAT_OK:
3384 4586 pkt->pkt_scbp[0] = STATUS_GOOD;
3385 4587 break;
3386 4588 case MFI_STAT_LD_CC_IN_PROGRESS:
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3387 4589 case MFI_STAT_LD_RECON_IN_PROGRESS:
3388 4590 pkt->pkt_scbp[0] = STATUS_GOOD;
3389 4591 break;
3390 4592 case MFI_STAT_LD_INIT_IN_PROGRESS:
3391 4593 con_log(CL_ANN,
3392 4594 (CE_WARN, "Initialization in Progress"));
3393 4595 pkt->pkt_reason = CMD_TRAN_ERR;
3394 4596
3395 4597 break;
3396 4598 case MFI_STAT_SCSI_DONE_WITH_ERROR:
3397 - con_log(CL_ANN1, (CE_CONT, "scsi_done error"));
4599 + con_log(CL_ANN, (CE_CONT, "scsi_done error"));
3398 4600
3399 4601 pkt->pkt_reason = CMD_CMPLT;
3400 4602 ((struct scsi_status *)
3401 4603 pkt->pkt_scbp)->sts_chk = 1;
3402 4604
3403 4605 if (pkt->pkt_cdbp[0] == SCMD_TEST_UNIT_READY) {
3404 -
3405 4606 con_log(CL_ANN,
3406 4607 (CE_WARN, "TEST_UNIT_READY fail"));
3407 -
3408 4608 } else {
3409 4609 pkt->pkt_state |= STATE_ARQ_DONE;
3410 4610 arqstat = (void *)(pkt->pkt_scbp);
3411 4611 arqstat->sts_rqpkt_reason = CMD_CMPLT;
3412 4612 arqstat->sts_rqpkt_resid = 0;
3413 4613 arqstat->sts_rqpkt_state |=
3414 4614 STATE_GOT_BUS | STATE_GOT_TARGET
3415 4615 | STATE_SENT_CMD
3416 4616 | STATE_XFERRED_DATA;
3417 4617 *(uint8_t *)&arqstat->sts_rqpkt_status =
3418 4618 STATUS_GOOD;
3419 4619 ddi_rep_get8(
3420 4620 cmd->frame_dma_obj.acc_handle,
3421 4621 (uint8_t *)
3422 4622 &(arqstat->sts_sensedata),
3423 4623 cmd->sense,
3424 - acmd->cmd_scblen -
3425 - offsetof(struct scsi_arq_status,
3426 - sts_sensedata), DDI_DEV_AUTOINCR);
3427 - }
4624 + sizeof (struct scsi_extended_sense),
4625 + DDI_DEV_AUTOINCR);
4626 + }
3428 4627 break;
3429 4628 case MFI_STAT_LD_OFFLINE:
3430 4629 case MFI_STAT_DEVICE_NOT_FOUND:
3431 - con_log(CL_ANN1, (CE_CONT,
4630 + con_log(CL_ANN, (CE_CONT,
3432 4631 "mrsas_softintr:device not found error"));
3433 4632 pkt->pkt_reason = CMD_DEV_GONE;
3434 4633 pkt->pkt_statistics = STAT_DISCON;
3435 4634 break;
3436 4635 case MFI_STAT_LD_LBA_OUT_OF_RANGE:
3437 4636 pkt->pkt_state |= STATE_ARQ_DONE;
3438 4637 pkt->pkt_reason = CMD_CMPLT;
3439 4638 ((struct scsi_status *)
3440 4639 pkt->pkt_scbp)->sts_chk = 1;
3441 4640
3442 4641 arqstat = (void *)(pkt->pkt_scbp);
3443 4642 arqstat->sts_rqpkt_reason = CMD_CMPLT;
3444 4643 arqstat->sts_rqpkt_resid = 0;
3445 4644 arqstat->sts_rqpkt_state |= STATE_GOT_BUS
3446 4645 | STATE_GOT_TARGET | STATE_SENT_CMD
3447 4646 | STATE_XFERRED_DATA;
3448 4647 *(uint8_t *)&arqstat->sts_rqpkt_status =
3449 4648 STATUS_GOOD;
3450 4649
3451 4650 arqstat->sts_sensedata.es_valid = 1;
3452 4651 arqstat->sts_sensedata.es_key =
3453 4652 KEY_ILLEGAL_REQUEST;
3454 4653 arqstat->sts_sensedata.es_class =
3455 4654 CLASS_EXTENDED_SENSE;
3456 4655
3457 4656 /*
3458 4657 * LOGICAL BLOCK ADDRESS OUT OF RANGE:
3459 4658 * ASC: 0x21h; ASCQ: 0x00h;
3460 4659 */
3461 4660 arqstat->sts_sensedata.es_add_code = 0x21;
3462 4661 arqstat->sts_sensedata.es_qual_code = 0x00;
3463 4662
3464 4663 break;
3465 4664
3466 4665 default:
3467 4666 con_log(CL_ANN, (CE_CONT, "Unknown status!"));
3468 4667 pkt->pkt_reason = CMD_TRAN_ERR;
3469 4668
3470 4669 break;
3471 4670 }
3472 4671
3473 4672 atomic_add_16(&instance->fw_outstanding, (-1));
3474 4673
3475 4674 (void) mrsas_common_check(instance, cmd);
3476 4675
3477 4676 if (acmd->cmd_dmahandle) {
3478 4677 if (mrsas_check_dma_handle(
3479 4678 acmd->cmd_dmahandle) != DDI_SUCCESS) {
3480 4679 ddi_fm_service_impact(instance->dip,
|
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39 lines elided |
↑ open up ↑ |
3481 4680 DDI_SERVICE_UNAFFECTED);
3482 4681 pkt->pkt_reason = CMD_TRAN_ERR;
3483 4682 pkt->pkt_statistics = 0;
3484 4683 }
3485 4684 }
3486 4685
3487 4686 /* Call the callback routine */
3488 4687 if (((pkt->pkt_flags & FLAG_NOINTR) == 0) &&
3489 4688 pkt->pkt_comp) {
3490 4689
3491 - con_log(CL_ANN1, (CE_NOTE, "mrsas_softintr: "
4690 + con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_softintr: "
3492 4691 "posting to scsa cmd %p index %x pkt %p "
3493 4692 "time %llx", (void *)cmd, cmd->index,
3494 4693 (void *)pkt, gethrtime()));
3495 4694 (*pkt->pkt_comp)(pkt);
3496 4695
3497 4696 }
4697 +
3498 4698 return_mfi_pkt(instance, cmd);
3499 4699 break;
4700 +
3500 4701 case MFI_CMD_OP_SMP:
3501 4702 case MFI_CMD_OP_STP:
3502 4703 complete_cmd_in_sync_mode(instance, cmd);
3503 4704 break;
4705 +
3504 4706 case MFI_CMD_OP_DCMD:
3505 4707 /* see if got an event notification */
3506 4708 if (ddi_get32(cmd->frame_dma_obj.acc_handle,
3507 4709 &cmd->frame->dcmd.opcode) ==
3508 4710 MR_DCMD_CTRL_EVENT_WAIT) {
3509 4711 if ((instance->aen_cmd == cmd) &&
3510 4712 (instance->aen_cmd->abort_aen)) {
3511 4713 con_log(CL_ANN, (CE_WARN,
3512 4714 "mrsas_softintr: "
3513 4715 "aborted_aen returned"));
3514 4716 } else {
3515 4717 atomic_add_16(&instance->fw_outstanding,
3516 4718 (-1));
3517 4719 service_mfi_aen(instance, cmd);
3518 4720 }
3519 4721 } else {
3520 4722 complete_cmd_in_sync_mode(instance, cmd);
3521 4723 }
3522 4724
3523 4725 break;
4726 +
3524 4727 case MFI_CMD_OP_ABORT:
3525 - con_log(CL_ANN, (CE_WARN, "MFI_CMD_OP_ABORT complete"));
4728 + con_log(CL_ANN, (CE_NOTE, "MFI_CMD_OP_ABORT complete"));
3526 4729 /*
3527 4730 * MFI_CMD_OP_ABORT successfully completed
3528 4731 * in the synchronous mode
3529 4732 */
3530 4733 complete_cmd_in_sync_mode(instance, cmd);
3531 4734 break;
4735 +
3532 4736 default:
3533 4737 mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
3534 4738 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
3535 4739
3536 4740 if (cmd->pkt != NULL) {
3537 4741 pkt = cmd->pkt;
3538 4742 if (((pkt->pkt_flags & FLAG_NOINTR) == 0) &&
3539 4743 pkt->pkt_comp) {
3540 4744
3541 4745 con_log(CL_ANN1, (CE_CONT, "posting to "
3542 4746 "scsa cmd %p index %x pkt %p"
3543 4747 "time %llx, default ", (void *)cmd,
3544 4748 cmd->index, (void *)pkt,
3545 4749 gethrtime()));
3546 4750
3547 4751 (*pkt->pkt_comp)(pkt);
3548 4752
3549 4753 }
3550 4754 }
3551 4755 con_log(CL_ANN, (CE_WARN, "Cmd type unknown !"));
3552 4756 break;
3553 4757 }
3554 4758 }
3555 4759
|
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3556 4760 instance->softint_running = 0;
3557 4761
3558 4762 return (DDI_INTR_CLAIMED);
3559 4763 }
3560 4764
3561 4765 /*
3562 4766 * mrsas_alloc_dma_obj
3563 4767 *
3564 4768 * Allocate the memory and other resources for an dma object.
3565 4769 */
3566 -static int
4770 +int
3567 4771 mrsas_alloc_dma_obj(struct mrsas_instance *instance, dma_obj_t *obj,
3568 4772 uchar_t endian_flags)
3569 4773 {
3570 4774 int i;
3571 4775 size_t alen = 0;
3572 4776 uint_t cookie_cnt;
3573 4777 struct ddi_device_acc_attr tmp_endian_attr;
3574 4778
3575 4779 tmp_endian_attr = endian_attr;
3576 4780 tmp_endian_attr.devacc_attr_endian_flags = endian_flags;
3577 4781 tmp_endian_attr.devacc_attr_access = DDI_DEFAULT_ACC;
3578 4782
3579 4783 i = ddi_dma_alloc_handle(instance->dip, &obj->dma_attr,
3580 4784 DDI_DMA_SLEEP, NULL, &obj->dma_handle);
3581 4785 if (i != DDI_SUCCESS) {
3582 4786
3583 4787 switch (i) {
3584 4788 case DDI_DMA_BADATTR :
3585 4789 con_log(CL_ANN, (CE_WARN,
3586 4790 "Failed ddi_dma_alloc_handle- Bad attribute"));
3587 4791 break;
3588 4792 case DDI_DMA_NORESOURCES :
3589 4793 con_log(CL_ANN, (CE_WARN,
3590 4794 "Failed ddi_dma_alloc_handle- No Resources"));
3591 4795 break;
3592 4796 default :
3593 4797 con_log(CL_ANN, (CE_WARN,
3594 4798 "Failed ddi_dma_alloc_handle: "
3595 4799 "unknown status %d", i));
3596 4800 break;
3597 4801 }
3598 4802
3599 4803 return (-1);
3600 4804 }
3601 4805
3602 4806 if ((ddi_dma_mem_alloc(obj->dma_handle, obj->size, &tmp_endian_attr,
3603 4807 DDI_DMA_RDWR | DDI_DMA_STREAMING, DDI_DMA_SLEEP, NULL,
3604 4808 &obj->buffer, &alen, &obj->acc_handle) != DDI_SUCCESS) ||
3605 4809 alen < obj->size) {
3606 4810
3607 4811 ddi_dma_free_handle(&obj->dma_handle);
3608 4812
3609 4813 con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_mem_alloc"));
3610 4814
3611 4815 return (-1);
3612 4816 }
3613 4817
3614 4818 if (ddi_dma_addr_bind_handle(obj->dma_handle, NULL, obj->buffer,
3615 4819 obj->size, DDI_DMA_RDWR | DDI_DMA_STREAMING, DDI_DMA_SLEEP,
3616 4820 NULL, &obj->dma_cookie[0], &cookie_cnt) != DDI_SUCCESS) {
3617 4821
3618 4822 ddi_dma_mem_free(&obj->acc_handle);
3619 4823 ddi_dma_free_handle(&obj->dma_handle);
3620 4824
3621 4825 con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_addr_bind_handle"));
3622 4826
3623 4827 return (-1);
3624 4828 }
3625 4829
3626 4830 if (mrsas_check_dma_handle(obj->dma_handle) != DDI_SUCCESS) {
3627 4831 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
3628 4832 return (-1);
3629 4833 }
3630 4834
3631 4835 if (mrsas_check_acc_handle(obj->acc_handle) != DDI_SUCCESS) {
3632 4836 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
3633 4837 return (-1);
3634 4838 }
|
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3635 4839
3636 4840 return (cookie_cnt);
3637 4841 }
3638 4842
3639 4843 /*
3640 4844 * mrsas_free_dma_obj(struct mrsas_instance *, dma_obj_t)
3641 4845 *
3642 4846 * De-allocate the memory and other resources for an dma object, which must
3643 4847 * have been alloated by a previous call to mrsas_alloc_dma_obj()
3644 4848 */
3645 -static int
4849 +int
3646 4850 mrsas_free_dma_obj(struct mrsas_instance *instance, dma_obj_t obj)
3647 4851 {
3648 4852
4853 + if ((obj.dma_handle == NULL) || (obj.acc_handle == NULL)) {
4854 + return (DDI_SUCCESS);
4855 + }
4856 +
4857 + /*
4858 + * NOTE: These check-handle functions fail if *_handle == NULL, but
4859 + * this function succeeds because of the previous check.
4860 + */
3649 4861 if (mrsas_check_dma_handle(obj.dma_handle) != DDI_SUCCESS) {
3650 4862 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
3651 4863 return (DDI_FAILURE);
3652 4864 }
3653 4865
3654 4866 if (mrsas_check_acc_handle(obj.acc_handle) != DDI_SUCCESS) {
3655 4867 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
3656 4868 return (DDI_FAILURE);
3657 4869 }
3658 4870
3659 4871 (void) ddi_dma_unbind_handle(obj.dma_handle);
3660 4872 ddi_dma_mem_free(&obj.acc_handle);
3661 4873 ddi_dma_free_handle(&obj.dma_handle);
3662 -
4874 + obj.acc_handle = NULL;
3663 4875 return (DDI_SUCCESS);
3664 4876 }
3665 4877
3666 4878 /*
3667 4879 * mrsas_dma_alloc(instance_t *, struct scsi_pkt *, struct buf *,
3668 4880 * int, int (*)())
3669 4881 *
3670 4882 * Allocate dma resources for a new scsi command
3671 4883 */
3672 -static int
4884 +int
3673 4885 mrsas_dma_alloc(struct mrsas_instance *instance, struct scsi_pkt *pkt,
3674 4886 struct buf *bp, int flags, int (*callback)())
3675 4887 {
3676 4888 int dma_flags;
3677 4889 int (*cb)(caddr_t);
3678 4890 int i;
3679 4891
3680 4892 ddi_dma_attr_t tmp_dma_attr = mrsas_generic_dma_attr;
3681 4893 struct scsa_cmd *acmd = PKT2CMD(pkt);
3682 4894
3683 4895 acmd->cmd_buf = bp;
3684 4896
3685 4897 if (bp->b_flags & B_READ) {
3686 4898 acmd->cmd_flags &= ~CFLAG_DMASEND;
3687 4899 dma_flags = DDI_DMA_READ;
3688 4900 } else {
3689 4901 acmd->cmd_flags |= CFLAG_DMASEND;
3690 4902 dma_flags = DDI_DMA_WRITE;
3691 4903 }
3692 4904
3693 4905 if (flags & PKT_CONSISTENT) {
3694 4906 acmd->cmd_flags |= CFLAG_CONSISTENT;
3695 4907 dma_flags |= DDI_DMA_CONSISTENT;
3696 4908 }
3697 4909
|
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3698 4910 if (flags & PKT_DMA_PARTIAL) {
3699 4911 dma_flags |= DDI_DMA_PARTIAL;
3700 4912 }
3701 4913
3702 4914 dma_flags |= DDI_DMA_REDZONE;
3703 4915
3704 4916 cb = (callback == NULL_FUNC) ? DDI_DMA_DONTWAIT : DDI_DMA_SLEEP;
3705 4917
3706 4918 tmp_dma_attr.dma_attr_sgllen = instance->max_num_sge;
3707 4919 tmp_dma_attr.dma_attr_addr_hi = 0xffffffffffffffffull;
4920 + if (instance->tbolt) {
4921 + /* OCR-RESET FIX */
4922 + tmp_dma_attr.dma_attr_count_max =
4923 + (U64)mrsas_tbolt_max_cap_maxxfer; /* limit to 256K */
4924 + tmp_dma_attr.dma_attr_maxxfer =
4925 + (U64)mrsas_tbolt_max_cap_maxxfer; /* limit to 256K */
4926 + }
3708 4927
3709 4928 if ((i = ddi_dma_alloc_handle(instance->dip, &tmp_dma_attr,
3710 4929 cb, 0, &acmd->cmd_dmahandle)) != DDI_SUCCESS) {
3711 4930 switch (i) {
3712 4931 case DDI_DMA_BADATTR:
3713 4932 bioerror(bp, EFAULT);
3714 4933 return (DDI_FAILURE);
3715 4934
3716 4935 case DDI_DMA_NORESOURCES:
3717 4936 bioerror(bp, 0);
3718 4937 return (DDI_FAILURE);
3719 4938
3720 4939 default:
3721 4940 con_log(CL_ANN, (CE_PANIC, "ddi_dma_alloc_handle: "
3722 4941 "impossible result (0x%x)", i));
3723 4942 bioerror(bp, EFAULT);
3724 4943 return (DDI_FAILURE);
3725 4944 }
3726 4945 }
3727 4946
3728 4947 i = ddi_dma_buf_bind_handle(acmd->cmd_dmahandle, bp, dma_flags,
3729 4948 cb, 0, &acmd->cmd_dmacookies[0], &acmd->cmd_ncookies);
3730 4949
3731 4950 switch (i) {
3732 4951 case DDI_DMA_PARTIAL_MAP:
3733 4952 if ((dma_flags & DDI_DMA_PARTIAL) == 0) {
3734 4953 con_log(CL_ANN, (CE_PANIC, "ddi_dma_buf_bind_handle: "
3735 4954 "DDI_DMA_PARTIAL_MAP impossible"));
3736 4955 goto no_dma_cookies;
3737 4956 }
3738 4957
3739 4958 if (ddi_dma_numwin(acmd->cmd_dmahandle, &acmd->cmd_nwin) ==
3740 4959 DDI_FAILURE) {
3741 4960 con_log(CL_ANN, (CE_PANIC, "ddi_dma_numwin failed"));
3742 4961 goto no_dma_cookies;
3743 4962 }
3744 4963
3745 4964 if (ddi_dma_getwin(acmd->cmd_dmahandle, acmd->cmd_curwin,
3746 4965 &acmd->cmd_dma_offset, &acmd->cmd_dma_len,
3747 4966 &acmd->cmd_dmacookies[0], &acmd->cmd_ncookies) ==
3748 4967 DDI_FAILURE) {
3749 4968
3750 4969 con_log(CL_ANN, (CE_PANIC, "ddi_dma_getwin failed"));
3751 4970 goto no_dma_cookies;
3752 4971 }
3753 4972
3754 4973 goto get_dma_cookies;
3755 4974 case DDI_DMA_MAPPED:
3756 4975 acmd->cmd_nwin = 1;
3757 4976 acmd->cmd_dma_len = 0;
3758 4977 acmd->cmd_dma_offset = 0;
3759 4978
3760 4979 get_dma_cookies:
3761 4980 i = 0;
3762 4981 acmd->cmd_dmacount = 0;
3763 4982 for (;;) {
3764 4983 acmd->cmd_dmacount +=
3765 4984 acmd->cmd_dmacookies[i++].dmac_size;
3766 4985
3767 4986 if (i == instance->max_num_sge ||
3768 4987 i == acmd->cmd_ncookies)
3769 4988 break;
3770 4989
3771 4990 ddi_dma_nextcookie(acmd->cmd_dmahandle,
3772 4991 &acmd->cmd_dmacookies[i]);
3773 4992 }
3774 4993
3775 4994 acmd->cmd_cookie = i;
3776 4995 acmd->cmd_cookiecnt = i;
3777 4996
3778 4997 acmd->cmd_flags |= CFLAG_DMAVALID;
3779 4998
3780 4999 if (bp->b_bcount >= acmd->cmd_dmacount) {
3781 5000 pkt->pkt_resid = bp->b_bcount - acmd->cmd_dmacount;
3782 5001 } else {
3783 5002 pkt->pkt_resid = 0;
3784 5003 }
3785 5004
3786 5005 return (DDI_SUCCESS);
3787 5006 case DDI_DMA_NORESOURCES:
3788 5007 bioerror(bp, 0);
3789 5008 break;
3790 5009 case DDI_DMA_NOMAPPING:
3791 5010 bioerror(bp, EFAULT);
3792 5011 break;
3793 5012 case DDI_DMA_TOOBIG:
3794 5013 bioerror(bp, EINVAL);
3795 5014 break;
3796 5015 case DDI_DMA_INUSE:
3797 5016 con_log(CL_ANN, (CE_PANIC, "ddi_dma_buf_bind_handle:"
3798 5017 " DDI_DMA_INUSE impossible"));
3799 5018 break;
3800 5019 default:
3801 5020 con_log(CL_ANN, (CE_PANIC, "ddi_dma_buf_bind_handle: "
3802 5021 "impossible result (0x%x)", i));
3803 5022 break;
3804 5023 }
3805 5024
3806 5025 no_dma_cookies:
3807 5026 ddi_dma_free_handle(&acmd->cmd_dmahandle);
3808 5027 acmd->cmd_dmahandle = NULL;
|
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91 lines elided |
↑ open up ↑ |
3809 5028 acmd->cmd_flags &= ~CFLAG_DMAVALID;
3810 5029 return (DDI_FAILURE);
3811 5030 }
3812 5031
3813 5032 /*
3814 5033 * mrsas_dma_move(struct mrsas_instance *, struct scsi_pkt *, struct buf *)
3815 5034 *
3816 5035 * move dma resources to next dma window
3817 5036 *
3818 5037 */
3819 -static int
5038 +int
3820 5039 mrsas_dma_move(struct mrsas_instance *instance, struct scsi_pkt *pkt,
3821 5040 struct buf *bp)
3822 5041 {
3823 5042 int i = 0;
3824 5043
3825 5044 struct scsa_cmd *acmd = PKT2CMD(pkt);
3826 5045
3827 5046 /*
3828 5047 * If there are no more cookies remaining in this window,
3829 5048 * must move to the next window first.
3830 5049 */
3831 5050 if (acmd->cmd_cookie == acmd->cmd_ncookies) {
3832 5051 if (acmd->cmd_curwin == acmd->cmd_nwin && acmd->cmd_nwin == 1) {
3833 5052 return (DDI_SUCCESS);
3834 5053 }
3835 5054
3836 5055 /* at last window, cannot move */
3837 5056 if (++acmd->cmd_curwin >= acmd->cmd_nwin) {
3838 5057 return (DDI_FAILURE);
3839 5058 }
3840 5059
3841 5060 if (ddi_dma_getwin(acmd->cmd_dmahandle, acmd->cmd_curwin,
3842 5061 &acmd->cmd_dma_offset, &acmd->cmd_dma_len,
3843 5062 &acmd->cmd_dmacookies[0], &acmd->cmd_ncookies) ==
3844 5063 DDI_FAILURE) {
3845 5064 return (DDI_FAILURE);
3846 5065 }
3847 5066
3848 5067 acmd->cmd_cookie = 0;
3849 5068 } else {
3850 5069 /* still more cookies in this window - get the next one */
3851 5070 ddi_dma_nextcookie(acmd->cmd_dmahandle,
3852 5071 &acmd->cmd_dmacookies[0]);
3853 5072 }
3854 5073
3855 5074 /* get remaining cookies in this window, up to our maximum */
3856 5075 for (;;) {
3857 5076 acmd->cmd_dmacount += acmd->cmd_dmacookies[i++].dmac_size;
3858 5077 acmd->cmd_cookie++;
3859 5078
3860 5079 if (i == instance->max_num_sge ||
3861 5080 acmd->cmd_cookie == acmd->cmd_ncookies) {
3862 5081 break;
3863 5082 }
3864 5083
3865 5084 ddi_dma_nextcookie(acmd->cmd_dmahandle,
3866 5085 &acmd->cmd_dmacookies[i]);
3867 5086 }
3868 5087
3869 5088 acmd->cmd_cookiecnt = i;
3870 5089
3871 5090 if (bp->b_bcount >= acmd->cmd_dmacount) {
3872 5091 pkt->pkt_resid = bp->b_bcount - acmd->cmd_dmacount;
3873 5092 } else {
3874 5093 pkt->pkt_resid = 0;
3875 5094 }
3876 5095
3877 5096 return (DDI_SUCCESS);
3878 5097 }
|
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49 lines elided |
↑ open up ↑ |
3879 5098
3880 5099 /*
3881 5100 * build_cmd
3882 5101 */
3883 5102 static struct mrsas_cmd *
3884 5103 build_cmd(struct mrsas_instance *instance, struct scsi_address *ap,
3885 5104 struct scsi_pkt *pkt, uchar_t *cmd_done)
3886 5105 {
3887 5106 uint16_t flags = 0;
3888 5107 uint32_t i;
3889 - uint32_t context;
5108 + uint32_t context;
3890 5109 uint32_t sge_bytes;
5110 + uint32_t tmp_data_xfer_len;
3891 5111 ddi_acc_handle_t acc_handle;
3892 5112 struct mrsas_cmd *cmd;
3893 5113 struct mrsas_sge64 *mfi_sgl;
3894 5114 struct mrsas_sge_ieee *mfi_sgl_ieee;
3895 5115 struct scsa_cmd *acmd = PKT2CMD(pkt);
3896 - struct mrsas_pthru_frame *pthru;
5116 + struct mrsas_pthru_frame *pthru;
3897 5117 struct mrsas_io_frame *ldio;
3898 5118
3899 5119 /* find out if this is logical or physical drive command. */
3900 5120 acmd->islogical = MRDRV_IS_LOGICAL(ap);
3901 5121 acmd->device_id = MAP_DEVICE_ID(instance, ap);
3902 5122 *cmd_done = 0;
3903 5123
3904 5124 /* get the command packet */
3905 5125 if (!(cmd = get_mfi_pkt(instance))) {
3906 5126 DTRACE_PROBE2(build_cmd_mfi_err, uint16_t,
3907 5127 instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
3908 5128 return (NULL);
3909 5129 }
3910 5130
3911 - cmd->retry_count_for_ocr = 0;
3912 -
3913 5131 acc_handle = cmd->frame_dma_obj.acc_handle;
3914 5132
3915 5133 /* Clear the frame buffer and assign back the context id */
3916 5134 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3917 5135 ddi_put32(acc_handle, &cmd->frame->hdr.context, cmd->index);
3918 5136
3919 5137 cmd->pkt = pkt;
3920 5138 cmd->cmd = acmd;
3921 5139 DTRACE_PROBE3(build_cmds, uint8_t, pkt->pkt_cdbp[0],
3922 5140 ulong_t, acmd->cmd_dmacount, ulong_t, acmd->cmd_dma_len);
3923 5141
3924 5142 /* lets get the command directions */
3925 5143 if (acmd->cmd_flags & CFLAG_DMASEND) {
3926 5144 flags = MFI_FRAME_DIR_WRITE;
3927 5145
3928 5146 if (acmd->cmd_flags & CFLAG_CONSISTENT) {
3929 5147 (void) ddi_dma_sync(acmd->cmd_dmahandle,
3930 5148 acmd->cmd_dma_offset, acmd->cmd_dma_len,
3931 5149 DDI_DMA_SYNC_FORDEV);
3932 5150 }
3933 5151 } else if (acmd->cmd_flags & ~CFLAG_DMASEND) {
3934 5152 flags = MFI_FRAME_DIR_READ;
3935 5153
3936 5154 if (acmd->cmd_flags & CFLAG_CONSISTENT) {
3937 5155 (void) ddi_dma_sync(acmd->cmd_dmahandle,
3938 5156 acmd->cmd_dma_offset, acmd->cmd_dma_len,
3939 5157 DDI_DMA_SYNC_FORCPU);
3940 5158 }
3941 5159 } else {
3942 5160 flags = MFI_FRAME_DIR_NONE;
3943 5161 }
|
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↑ open up ↑ |
3944 5162
3945 5163 if (instance->flag_ieee) {
3946 5164 flags |= MFI_FRAME_IEEE;
3947 5165 }
3948 5166 flags |= MFI_FRAME_SGL64;
3949 5167
3950 5168 switch (pkt->pkt_cdbp[0]) {
3951 5169
3952 5170 /*
3953 5171 * case SCMD_SYNCHRONIZE_CACHE:
3954 - * flush_cache(instance);
5172 + * flush_cache(instance);
3955 5173 * return_mfi_pkt(instance, cmd);
3956 5174 * *cmd_done = 1;
3957 5175 *
3958 5176 * return (NULL);
3959 5177 */
3960 5178
3961 5179 case SCMD_READ:
3962 5180 case SCMD_WRITE:
3963 5181 case SCMD_READ_G1:
3964 5182 case SCMD_WRITE_G1:
5183 + case SCMD_READ_G4:
5184 + case SCMD_WRITE_G4:
5185 + case SCMD_READ_G5:
5186 + case SCMD_WRITE_G5:
3965 5187 if (acmd->islogical) {
3966 5188 ldio = (struct mrsas_io_frame *)cmd->frame;
3967 5189
3968 5190 /*
3969 5191 * preare the Logical IO frame:
3970 5192 * 2nd bit is zero for all read cmds
3971 5193 */
3972 5194 ddi_put8(acc_handle, &ldio->cmd,
3973 5195 (pkt->pkt_cdbp[0] & 0x02) ? MFI_CMD_OP_LD_WRITE
3974 5196 : MFI_CMD_OP_LD_READ);
3975 5197 ddi_put8(acc_handle, &ldio->cmd_status, 0x0);
3976 5198 ddi_put8(acc_handle, &ldio->scsi_status, 0x0);
3977 5199 ddi_put8(acc_handle, &ldio->target_id, acmd->device_id);
3978 5200 ddi_put16(acc_handle, &ldio->timeout, 0);
3979 5201 ddi_put8(acc_handle, &ldio->reserved_0, 0);
3980 5202 ddi_put16(acc_handle, &ldio->pad_0, 0);
3981 5203 ddi_put16(acc_handle, &ldio->flags, flags);
3982 5204
3983 5205 /* Initialize sense Information */
3984 5206 bzero(cmd->sense, SENSE_LENGTH);
3985 5207 ddi_put8(acc_handle, &ldio->sense_len, SENSE_LENGTH);
3986 5208 ddi_put32(acc_handle, &ldio->sense_buf_phys_addr_hi, 0);
3987 5209 ddi_put32(acc_handle, &ldio->sense_buf_phys_addr_lo,
3988 5210 cmd->sense_phys_addr);
3989 5211 ddi_put32(acc_handle, &ldio->start_lba_hi, 0);
3990 5212 ddi_put8(acc_handle, &ldio->access_byte,
3991 5213 (acmd->cmd_cdblen != 6) ? pkt->pkt_cdbp[1] : 0);
3992 5214 ddi_put8(acc_handle, &ldio->sge_count,
3993 5215 acmd->cmd_cookiecnt);
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3994 5216 if (instance->flag_ieee) {
3995 5217 mfi_sgl_ieee =
3996 5218 (struct mrsas_sge_ieee *)&ldio->sgl;
3997 5219 } else {
3998 5220 mfi_sgl = (struct mrsas_sge64 *)&ldio->sgl;
3999 5221 }
4000 5222
4001 5223 context = ddi_get32(acc_handle, &ldio->context);
4002 5224
4003 5225 if (acmd->cmd_cdblen == CDB_GROUP0) {
5226 + /* 6-byte cdb */
4004 5227 ddi_put32(acc_handle, &ldio->lba_count, (
4005 5228 (uint16_t)(pkt->pkt_cdbp[4])));
4006 5229
4007 5230 ddi_put32(acc_handle, &ldio->start_lba_lo, (
4008 5231 ((uint32_t)(pkt->pkt_cdbp[3])) |
4009 5232 ((uint32_t)(pkt->pkt_cdbp[2]) << 8) |
4010 5233 ((uint32_t)((pkt->pkt_cdbp[1]) & 0x1F)
4011 5234 << 16)));
4012 5235 } else if (acmd->cmd_cdblen == CDB_GROUP1) {
5236 + /* 10-byte cdb */
4013 5237 ddi_put32(acc_handle, &ldio->lba_count, (
4014 5238 ((uint16_t)(pkt->pkt_cdbp[8])) |
4015 5239 ((uint16_t)(pkt->pkt_cdbp[7]) << 8)));
4016 5240
4017 5241 ddi_put32(acc_handle, &ldio->start_lba_lo, (
4018 5242 ((uint32_t)(pkt->pkt_cdbp[5])) |
4019 5243 ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
4020 5244 ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
4021 5245 ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
4022 - } else if (acmd->cmd_cdblen == CDB_GROUP2) {
5246 + } else if (acmd->cmd_cdblen == CDB_GROUP5) {
5247 + /* 12-byte cdb */
4023 5248 ddi_put32(acc_handle, &ldio->lba_count, (
4024 - ((uint16_t)(pkt->pkt_cdbp[9])) |
4025 - ((uint16_t)(pkt->pkt_cdbp[8]) << 8) |
4026 - ((uint16_t)(pkt->pkt_cdbp[7]) << 16) |
4027 - ((uint16_t)(pkt->pkt_cdbp[6]) << 24)));
5249 + ((uint32_t)(pkt->pkt_cdbp[9])) |
5250 + ((uint32_t)(pkt->pkt_cdbp[8]) << 8) |
5251 + ((uint32_t)(pkt->pkt_cdbp[7]) << 16) |
5252 + ((uint32_t)(pkt->pkt_cdbp[6]) << 24)));
4028 5253
4029 5254 ddi_put32(acc_handle, &ldio->start_lba_lo, (
4030 5255 ((uint32_t)(pkt->pkt_cdbp[5])) |
4031 5256 ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
4032 5257 ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
4033 5258 ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
4034 - } else if (acmd->cmd_cdblen == CDB_GROUP3) {
5259 + } else if (acmd->cmd_cdblen == CDB_GROUP4) {
5260 + /* 16-byte cdb */
4035 5261 ddi_put32(acc_handle, &ldio->lba_count, (
4036 - ((uint16_t)(pkt->pkt_cdbp[13])) |
4037 - ((uint16_t)(pkt->pkt_cdbp[12]) << 8) |
4038 - ((uint16_t)(pkt->pkt_cdbp[11]) << 16) |
4039 - ((uint16_t)(pkt->pkt_cdbp[10]) << 24)));
5262 + ((uint32_t)(pkt->pkt_cdbp[13])) |
5263 + ((uint32_t)(pkt->pkt_cdbp[12]) << 8) |
5264 + ((uint32_t)(pkt->pkt_cdbp[11]) << 16) |
5265 + ((uint32_t)(pkt->pkt_cdbp[10]) << 24)));
4040 5266
4041 5267 ddi_put32(acc_handle, &ldio->start_lba_lo, (
4042 5268 ((uint32_t)(pkt->pkt_cdbp[9])) |
4043 5269 ((uint32_t)(pkt->pkt_cdbp[8]) << 8) |
4044 5270 ((uint32_t)(pkt->pkt_cdbp[7]) << 16) |
4045 5271 ((uint32_t)(pkt->pkt_cdbp[6]) << 24)));
4046 5272
4047 - ddi_put32(acc_handle, &ldio->start_lba_lo, (
5273 + ddi_put32(acc_handle, &ldio->start_lba_hi, (
4048 5274 ((uint32_t)(pkt->pkt_cdbp[5])) |
4049 5275 ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
4050 5276 ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
4051 5277 ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
4052 5278 }
4053 5279
4054 5280 break;
4055 5281 }
4056 5282 /* fall through For all non-rd/wr cmds */
4057 5283 default:
4058 5284
4059 5285 switch (pkt->pkt_cdbp[0]) {
4060 5286 case SCMD_MODE_SENSE:
4061 5287 case SCMD_MODE_SENSE_G1: {
4062 5288 union scsi_cdb *cdbp;
4063 5289 uint16_t page_code;
4064 5290
4065 5291 cdbp = (void *)pkt->pkt_cdbp;
4066 5292 page_code = (uint16_t)cdbp->cdb_un.sg.scsi[0];
4067 5293 switch (page_code) {
4068 5294 case 0x3:
4069 5295 case 0x4:
4070 5296 (void) mrsas_mode_sense_build(pkt);
4071 5297 return_mfi_pkt(instance, cmd);
4072 5298 *cmd_done = 1;
4073 5299 return (NULL);
4074 5300 }
4075 5301 break;
4076 5302 }
4077 5303 default:
4078 5304 break;
4079 5305 }
4080 5306
4081 5307 pthru = (struct mrsas_pthru_frame *)cmd->frame;
4082 5308
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4083 5309 /* prepare the DCDB frame */
4084 5310 ddi_put8(acc_handle, &pthru->cmd, (acmd->islogical) ?
4085 5311 MFI_CMD_OP_LD_SCSI : MFI_CMD_OP_PD_SCSI);
4086 5312 ddi_put8(acc_handle, &pthru->cmd_status, 0x0);
4087 5313 ddi_put8(acc_handle, &pthru->scsi_status, 0x0);
4088 5314 ddi_put8(acc_handle, &pthru->target_id, acmd->device_id);
4089 5315 ddi_put8(acc_handle, &pthru->lun, 0);
4090 5316 ddi_put8(acc_handle, &pthru->cdb_len, acmd->cmd_cdblen);
4091 5317 ddi_put16(acc_handle, &pthru->timeout, 0);
4092 5318 ddi_put16(acc_handle, &pthru->flags, flags);
5319 + tmp_data_xfer_len = 0;
5320 + for (i = 0; i < acmd->cmd_cookiecnt; i++) {
5321 + tmp_data_xfer_len += acmd->cmd_dmacookies[i].dmac_size;
5322 + }
4093 5323 ddi_put32(acc_handle, &pthru->data_xfer_len,
4094 - acmd->cmd_dmacount);
5324 + tmp_data_xfer_len);
4095 5325 ddi_put8(acc_handle, &pthru->sge_count, acmd->cmd_cookiecnt);
4096 5326 if (instance->flag_ieee) {
4097 5327 mfi_sgl_ieee = (struct mrsas_sge_ieee *)&pthru->sgl;
4098 5328 } else {
4099 5329 mfi_sgl = (struct mrsas_sge64 *)&pthru->sgl;
4100 5330 }
4101 5331
4102 5332 bzero(cmd->sense, SENSE_LENGTH);
4103 5333 ddi_put8(acc_handle, &pthru->sense_len, SENSE_LENGTH);
4104 5334 ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_hi, 0);
4105 5335 ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_lo,
4106 5336 cmd->sense_phys_addr);
4107 5337
4108 5338 context = ddi_get32(acc_handle, &pthru->context);
4109 5339 ddi_rep_put8(acc_handle, (uint8_t *)pkt->pkt_cdbp,
4110 5340 (uint8_t *)pthru->cdb, acmd->cmd_cdblen, DDI_DEV_AUTOINCR);
4111 5341
4112 5342 break;
4113 5343 }
4114 5344 #ifdef lint
4115 5345 context = context;
4116 5346 #endif
4117 5347 /* prepare the scatter-gather list for the firmware */
4118 5348 if (instance->flag_ieee) {
4119 5349 for (i = 0; i < acmd->cmd_cookiecnt; i++, mfi_sgl_ieee++) {
4120 5350 ddi_put64(acc_handle, &mfi_sgl_ieee->phys_addr,
4121 5351 acmd->cmd_dmacookies[i].dmac_laddress);
4122 5352 ddi_put32(acc_handle, &mfi_sgl_ieee->length,
4123 5353 acmd->cmd_dmacookies[i].dmac_size);
4124 5354 }
4125 5355 sge_bytes = sizeof (struct mrsas_sge_ieee)*acmd->cmd_cookiecnt;
4126 5356 } else {
4127 5357 for (i = 0; i < acmd->cmd_cookiecnt; i++, mfi_sgl++) {
4128 5358 ddi_put64(acc_handle, &mfi_sgl->phys_addr,
4129 5359 acmd->cmd_dmacookies[i].dmac_laddress);
4130 5360 ddi_put32(acc_handle, &mfi_sgl->length,
4131 5361 acmd->cmd_dmacookies[i].dmac_size);
4132 5362 }
4133 5363 sge_bytes = sizeof (struct mrsas_sge64)*acmd->cmd_cookiecnt;
4134 5364 }
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4135 5365
4136 5366 cmd->frame_count = (sge_bytes / MRMFI_FRAME_SIZE) +
4137 5367 ((sge_bytes % MRMFI_FRAME_SIZE) ? 1 : 0) + 1;
4138 5368
4139 5369 if (cmd->frame_count >= 8) {
4140 5370 cmd->frame_count = 8;
4141 5371 }
4142 5372
4143 5373 return (cmd);
4144 5374 }
5375 +
4145 5376 #ifndef __sparc
5377 +/*
5378 + * wait_for_outstanding - Wait for all outstanding cmds
5379 + * @instance: Adapter soft state
5380 + *
5381 + * This function waits for upto MRDRV_RESET_WAIT_TIME seconds for FW to
5382 + * complete all its outstanding commands. Returns error if one or more IOs
5383 + * are pending after this time period.
5384 + */
4146 5385 static int
4147 5386 wait_for_outstanding(struct mrsas_instance *instance)
4148 5387 {
4149 5388 int i;
4150 5389 uint32_t wait_time = 90;
4151 5390
4152 5391 for (i = 0; i < wait_time; i++) {
4153 5392 if (!instance->fw_outstanding) {
4154 5393 break;
4155 5394 }
5395 +
4156 5396 drv_usecwait(MILLISEC); /* wait for 1000 usecs */;
4157 5397 }
4158 5398
4159 5399 if (instance->fw_outstanding) {
4160 5400 return (1);
4161 5401 }
4162 5402
4163 5403 return (0);
4164 5404 }
4165 -#endif /* __sparc */
5405 +#endif /* __sparc */
5406 +
4166 5407 /*
4167 5408 * issue_mfi_pthru
4168 5409 */
4169 5410 static int
4170 5411 issue_mfi_pthru(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
4171 5412 struct mrsas_cmd *cmd, int mode)
4172 5413 {
4173 5414 void *ubuf;
4174 5415 uint32_t kphys_addr = 0;
4175 5416 uint32_t xferlen = 0;
5417 + uint32_t new_xfer_length = 0;
4176 5418 uint_t model;
4177 5419 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
4178 5420 dma_obj_t pthru_dma_obj;
4179 5421 struct mrsas_pthru_frame *kpthru;
4180 5422 struct mrsas_pthru_frame *pthru;
4181 5423 int i;
4182 5424 pthru = &cmd->frame->pthru;
4183 5425 kpthru = (struct mrsas_pthru_frame *)&ioctl->frame[0];
4184 5426
4185 5427 if (instance->adapterresetinprogress) {
4186 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_pthru: Reset flag set, "
5428 + con_log(CL_ANN1, (CE_WARN, "issue_mfi_pthru: Reset flag set, "
4187 5429 "returning mfi_pkt and setting TRAN_BUSY\n"));
4188 5430 return (DDI_FAILURE);
4189 5431 }
4190 5432 model = ddi_model_convert_from(mode & FMODELS);
4191 5433 if (model == DDI_MODEL_ILP32) {
4192 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_pthru: DDI_MODEL_LP32"));
5434 + con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP32"));
4193 5435
4194 5436 xferlen = kpthru->sgl.sge32[0].length;
4195 5437
4196 5438 ubuf = (void *)(ulong_t)kpthru->sgl.sge32[0].phys_addr;
4197 5439 } else {
4198 5440 #ifdef _ILP32
4199 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_pthru: DDI_MODEL_LP32"));
5441 + con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP32"));
4200 5442 xferlen = kpthru->sgl.sge32[0].length;
4201 5443 ubuf = (void *)(ulong_t)kpthru->sgl.sge32[0].phys_addr;
4202 5444 #else
4203 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_pthru: DDI_MODEL_LP64"));
5445 + con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP64"));
4204 5446 xferlen = kpthru->sgl.sge64[0].length;
4205 5447 ubuf = (void *)(ulong_t)kpthru->sgl.sge64[0].phys_addr;
4206 5448 #endif
4207 5449 }
4208 5450
4209 5451 if (xferlen) {
4210 5452 /* means IOCTL requires DMA */
4211 5453 /* allocate the data transfer buffer */
4212 - pthru_dma_obj.size = xferlen;
5454 + /* pthru_dma_obj.size = xferlen; */
5455 + MRSAS_GET_BOUNDARY_ALIGNED_LEN(xferlen, new_xfer_length,
5456 + PAGESIZE);
5457 + pthru_dma_obj.size = new_xfer_length;
4213 5458 pthru_dma_obj.dma_attr = mrsas_generic_dma_attr;
4214 5459 pthru_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
4215 5460 pthru_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
4216 5461 pthru_dma_obj.dma_attr.dma_attr_sgllen = 1;
4217 5462 pthru_dma_obj.dma_attr.dma_attr_align = 1;
4218 5463
4219 5464 /* allocate kernel buffer for DMA */
4220 5465 if (mrsas_alloc_dma_obj(instance, &pthru_dma_obj,
4221 5466 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
4222 5467 con_log(CL_ANN, (CE_WARN, "issue_mfi_pthru: "
4223 5468 "could not allocate data transfer buffer."));
4224 5469 return (DDI_FAILURE);
4225 5470 }
4226 5471 (void) memset(pthru_dma_obj.buffer, 0, xferlen);
4227 5472
4228 5473 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
4229 5474 if (kpthru->flags & MFI_FRAME_DIR_WRITE) {
4230 5475 for (i = 0; i < xferlen; i++) {
4231 5476 if (ddi_copyin((uint8_t *)ubuf+i,
4232 5477 (uint8_t *)pthru_dma_obj.buffer+i,
4233 5478 1, mode)) {
4234 5479 con_log(CL_ANN, (CE_WARN,
4235 5480 "issue_mfi_pthru : "
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4236 5481 "copy from user space failed"));
4237 5482 return (DDI_FAILURE);
4238 5483 }
4239 5484 }
4240 5485 }
4241 5486
4242 5487 kphys_addr = pthru_dma_obj.dma_cookie[0].dmac_address;
4243 5488 }
4244 5489
4245 5490 ddi_put8(acc_handle, &pthru->cmd, kpthru->cmd);
4246 - ddi_put8(acc_handle, &pthru->sense_len, 0);
5491 + ddi_put8(acc_handle, &pthru->sense_len, SENSE_LENGTH);
4247 5492 ddi_put8(acc_handle, &pthru->cmd_status, 0);
4248 5493 ddi_put8(acc_handle, &pthru->scsi_status, 0);
4249 5494 ddi_put8(acc_handle, &pthru->target_id, kpthru->target_id);
4250 5495 ddi_put8(acc_handle, &pthru->lun, kpthru->lun);
4251 5496 ddi_put8(acc_handle, &pthru->cdb_len, kpthru->cdb_len);
4252 5497 ddi_put8(acc_handle, &pthru->sge_count, kpthru->sge_count);
4253 5498 ddi_put16(acc_handle, &pthru->timeout, kpthru->timeout);
4254 5499 ddi_put32(acc_handle, &pthru->data_xfer_len, kpthru->data_xfer_len);
4255 5500
4256 5501 ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_hi, 0);
4257 - /* pthru->sense_buf_phys_addr_lo = cmd->sense_phys_addr; */
4258 - ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_lo, 0);
5502 + pthru->sense_buf_phys_addr_lo = cmd->sense_phys_addr;
5503 + /* ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_lo, 0); */
4259 5504
4260 5505 ddi_rep_put8(acc_handle, (uint8_t *)kpthru->cdb, (uint8_t *)pthru->cdb,
4261 5506 pthru->cdb_len, DDI_DEV_AUTOINCR);
4262 5507
4263 5508 ddi_put16(acc_handle, &pthru->flags, kpthru->flags & ~MFI_FRAME_SGL64);
4264 5509 ddi_put32(acc_handle, &pthru->sgl.sge32[0].length, xferlen);
4265 5510 ddi_put32(acc_handle, &pthru->sgl.sge32[0].phys_addr, kphys_addr);
4266 5511
4267 5512 cmd->sync_cmd = MRSAS_TRUE;
4268 5513 cmd->frame_count = 1;
4269 5514
5515 + if (instance->tbolt) {
5516 + mr_sas_tbolt_build_mfi_cmd(instance, cmd);
5517 + }
5518 +
4270 5519 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
4271 5520 con_log(CL_ANN, (CE_WARN,
4272 5521 "issue_mfi_pthru: fw_ioctl failed"));
4273 5522 } else {
4274 5523 if (xferlen && kpthru->flags & MFI_FRAME_DIR_READ) {
4275 5524 for (i = 0; i < xferlen; i++) {
4276 5525 if (ddi_copyout(
4277 5526 (uint8_t *)pthru_dma_obj.buffer+i,
4278 5527 (uint8_t *)ubuf+i, 1, mode)) {
4279 5528 con_log(CL_ANN, (CE_WARN,
4280 5529 "issue_mfi_pthru : "
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↑ open up ↑ |
4281 5530 "copy to user space failed"));
4282 5531 return (DDI_FAILURE);
4283 5532 }
4284 5533 }
4285 5534 }
4286 5535 }
4287 5536
4288 5537 kpthru->cmd_status = ddi_get8(acc_handle, &pthru->cmd_status);
4289 5538 kpthru->scsi_status = ddi_get8(acc_handle, &pthru->scsi_status);
4290 5539
4291 - con_log(CL_ANN, (CE_NOTE, "issue_mfi_pthru: cmd_status %x, "
5540 + con_log(CL_ANN, (CE_CONT, "issue_mfi_pthru: cmd_status %x, "
4292 5541 "scsi_status %x", kpthru->cmd_status, kpthru->scsi_status));
4293 5542 DTRACE_PROBE3(issue_pthru, uint8_t, kpthru->cmd, uint8_t,
4294 5543 kpthru->cmd_status, uint8_t, kpthru->scsi_status);
4295 5544
5545 + if (kpthru->sense_len) {
5546 + uint_t sense_len = SENSE_LENGTH;
5547 + void *sense_ubuf =
5548 + (void *)(ulong_t)kpthru->sense_buf_phys_addr_lo;
5549 + if (kpthru->sense_len <= SENSE_LENGTH) {
5550 + sense_len = kpthru->sense_len;
5551 + }
5552 +
5553 + for (i = 0; i < sense_len; i++) {
5554 + if (ddi_copyout(
5555 + (uint8_t *)cmd->sense+i,
5556 + (uint8_t *)sense_ubuf+i, 1, mode)) {
5557 + con_log(CL_ANN, (CE_WARN,
5558 + "issue_mfi_pthru : "
5559 + "copy to user space failed"));
5560 + }
5561 + con_log(CL_DLEVEL1, (CE_WARN,
5562 + "Copying Sense info sense_buff[%d] = 0x%X",
5563 + i, *((uint8_t *)cmd->sense + i)));
5564 + }
5565 + }
5566 + (void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle, 0, 0,
5567 + DDI_DMA_SYNC_FORDEV);
5568 +
4296 5569 if (xferlen) {
4297 5570 /* free kernel buffer */
4298 5571 if (mrsas_free_dma_obj(instance, pthru_dma_obj) != DDI_SUCCESS)
4299 5572 return (DDI_FAILURE);
4300 5573 }
4301 5574
4302 5575 return (DDI_SUCCESS);
4303 5576 }
4304 5577
4305 5578 /*
4306 5579 * issue_mfi_dcmd
4307 5580 */
4308 5581 static int
4309 5582 issue_mfi_dcmd(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
4310 5583 struct mrsas_cmd *cmd, int mode)
4311 5584 {
4312 5585 void *ubuf;
4313 5586 uint32_t kphys_addr = 0;
4314 5587 uint32_t xferlen = 0;
5588 + uint32_t new_xfer_length = 0;
4315 5589 uint32_t model;
4316 5590 dma_obj_t dcmd_dma_obj;
4317 5591 struct mrsas_dcmd_frame *kdcmd;
4318 5592 struct mrsas_dcmd_frame *dcmd;
4319 5593 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
4320 5594 int i;
4321 5595 dcmd = &cmd->frame->dcmd;
4322 5596 kdcmd = (struct mrsas_dcmd_frame *)&ioctl->frame[0];
5597 +
4323 5598 if (instance->adapterresetinprogress) {
4324 5599 con_log(CL_ANN1, (CE_NOTE, "Reset flag set, "
4325 - "returning mfi_pkt and setting TRAN_BUSY\n"));
5600 + "returning mfi_pkt and setting TRAN_BUSY"));
4326 5601 return (DDI_FAILURE);
4327 5602 }
4328 5603 model = ddi_model_convert_from(mode & FMODELS);
4329 5604 if (model == DDI_MODEL_ILP32) {
4330 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_dcmd: DDI_MODEL_ILP32"));
5605 + con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_ILP32"));
4331 5606
4332 5607 xferlen = kdcmd->sgl.sge32[0].length;
4333 5608
4334 5609 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
4335 5610 } else {
4336 5611 #ifdef _ILP32
4337 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_dcmd: DDI_MODEL_ILP32"));
5612 + con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_ILP32"));
4338 5613 xferlen = kdcmd->sgl.sge32[0].length;
4339 5614 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
4340 5615 #else
4341 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_dcmd: DDI_MODEL_LP64"));
5616 + con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_LP64"));
4342 5617 xferlen = kdcmd->sgl.sge64[0].length;
4343 5618 ubuf = (void *)(ulong_t)kdcmd->sgl.sge64[0].phys_addr;
4344 5619 #endif
4345 5620 }
4346 5621 if (xferlen) {
4347 5622 /* means IOCTL requires DMA */
4348 5623 /* allocate the data transfer buffer */
4349 - dcmd_dma_obj.size = xferlen;
5624 + /* dcmd_dma_obj.size = xferlen; */
5625 + MRSAS_GET_BOUNDARY_ALIGNED_LEN(xferlen, new_xfer_length,
5626 + PAGESIZE);
5627 + dcmd_dma_obj.size = new_xfer_length;
4350 5628 dcmd_dma_obj.dma_attr = mrsas_generic_dma_attr;
4351 5629 dcmd_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
4352 5630 dcmd_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
4353 5631 dcmd_dma_obj.dma_attr.dma_attr_sgllen = 1;
4354 5632 dcmd_dma_obj.dma_attr.dma_attr_align = 1;
4355 5633
4356 5634 /* allocate kernel buffer for DMA */
4357 - if (mrsas_alloc_dma_obj(instance, &dcmd_dma_obj,
4358 - (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
4359 - con_log(CL_ANN, (CE_WARN, "issue_mfi_dcmd: "
4360 - "could not allocate data transfer buffer."));
4361 - return (DDI_FAILURE);
4362 - }
5635 + if (mrsas_alloc_dma_obj(instance, &dcmd_dma_obj,
5636 + (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5637 + con_log(CL_ANN,
5638 + (CE_WARN, "issue_mfi_dcmd: could not "
5639 + "allocate data transfer buffer."));
5640 + return (DDI_FAILURE);
5641 + }
4363 5642 (void) memset(dcmd_dma_obj.buffer, 0, xferlen);
4364 5643
4365 5644 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
4366 5645 if (kdcmd->flags & MFI_FRAME_DIR_WRITE) {
4367 5646 for (i = 0; i < xferlen; i++) {
4368 5647 if (ddi_copyin((uint8_t *)ubuf + i,
4369 5648 (uint8_t *)dcmd_dma_obj.buffer + i,
4370 5649 1, mode)) {
4371 5650 con_log(CL_ANN, (CE_WARN,
4372 5651 "issue_mfi_dcmd : "
4373 5652 "copy from user space failed"));
4374 5653 return (DDI_FAILURE);
4375 5654 }
4376 5655 }
4377 5656 }
4378 5657
4379 5658 kphys_addr = dcmd_dma_obj.dma_cookie[0].dmac_address;
4380 5659 }
4381 5660
4382 5661 ddi_put8(acc_handle, &dcmd->cmd, kdcmd->cmd);
4383 5662 ddi_put8(acc_handle, &dcmd->cmd_status, 0);
4384 5663 ddi_put8(acc_handle, &dcmd->sge_count, kdcmd->sge_count);
4385 5664 ddi_put16(acc_handle, &dcmd->timeout, kdcmd->timeout);
4386 5665 ddi_put32(acc_handle, &dcmd->data_xfer_len, kdcmd->data_xfer_len);
4387 5666 ddi_put32(acc_handle, &dcmd->opcode, kdcmd->opcode);
4388 5667
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4389 5668 ddi_rep_put8(acc_handle, (uint8_t *)kdcmd->mbox.b,
4390 5669 (uint8_t *)dcmd->mbox.b, DCMD_MBOX_SZ, DDI_DEV_AUTOINCR);
4391 5670
4392 5671 ddi_put16(acc_handle, &dcmd->flags, kdcmd->flags & ~MFI_FRAME_SGL64);
4393 5672 ddi_put32(acc_handle, &dcmd->sgl.sge32[0].length, xferlen);
4394 5673 ddi_put32(acc_handle, &dcmd->sgl.sge32[0].phys_addr, kphys_addr);
4395 5674
4396 5675 cmd->sync_cmd = MRSAS_TRUE;
4397 5676 cmd->frame_count = 1;
4398 5677
5678 + if (instance->tbolt) {
5679 + mr_sas_tbolt_build_mfi_cmd(instance, cmd);
5680 + }
5681 +
4399 5682 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
4400 5683 con_log(CL_ANN, (CE_WARN, "issue_mfi_dcmd: fw_ioctl failed"));
4401 5684 } else {
4402 5685 if (xferlen && (kdcmd->flags & MFI_FRAME_DIR_READ)) {
4403 5686 for (i = 0; i < xferlen; i++) {
4404 5687 if (ddi_copyout(
4405 5688 (uint8_t *)dcmd_dma_obj.buffer + i,
4406 5689 (uint8_t *)ubuf + i,
4407 5690 1, mode)) {
4408 5691 con_log(CL_ANN, (CE_WARN,
4409 5692 "issue_mfi_dcmd : "
4410 5693 "copy to user space failed"));
4411 5694 return (DDI_FAILURE);
4412 5695 }
4413 5696 }
4414 5697 }
4415 5698 }
4416 5699
4417 5700 kdcmd->cmd_status = ddi_get8(acc_handle, &dcmd->cmd_status);
5701 + con_log(CL_ANN,
5702 + (CE_CONT, "issue_mfi_dcmd: cmd_status %x", kdcmd->cmd_status));
4418 5703 DTRACE_PROBE3(issue_dcmd, uint32_t, kdcmd->opcode, uint8_t,
4419 5704 kdcmd->cmd, uint8_t, kdcmd->cmd_status);
4420 5705
4421 5706 if (xferlen) {
4422 5707 /* free kernel buffer */
4423 5708 if (mrsas_free_dma_obj(instance, dcmd_dma_obj) != DDI_SUCCESS)
4424 5709 return (DDI_FAILURE);
4425 5710 }
4426 5711
4427 5712 return (DDI_SUCCESS);
4428 5713 }
4429 5714
4430 5715 /*
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4431 5716 * issue_mfi_smp
4432 5717 */
4433 5718 static int
4434 5719 issue_mfi_smp(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
4435 5720 struct mrsas_cmd *cmd, int mode)
4436 5721 {
4437 5722 void *request_ubuf;
4438 5723 void *response_ubuf;
4439 5724 uint32_t request_xferlen = 0;
4440 5725 uint32_t response_xferlen = 0;
5726 + uint32_t new_xfer_length1 = 0;
5727 + uint32_t new_xfer_length2 = 0;
4441 5728 uint_t model;
4442 5729 dma_obj_t request_dma_obj;
4443 5730 dma_obj_t response_dma_obj;
4444 5731 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
4445 5732 struct mrsas_smp_frame *ksmp;
4446 5733 struct mrsas_smp_frame *smp;
4447 5734 struct mrsas_sge32 *sge32;
4448 5735 #ifndef _ILP32
4449 5736 struct mrsas_sge64 *sge64;
4450 5737 #endif
4451 5738 int i;
4452 5739 uint64_t tmp_sas_addr;
4453 5740
4454 5741 smp = &cmd->frame->smp;
4455 5742 ksmp = (struct mrsas_smp_frame *)&ioctl->frame[0];
4456 5743
4457 5744 if (instance->adapterresetinprogress) {
4458 - con_log(CL_ANN1, (CE_NOTE, "Reset flag set, "
5745 + con_log(CL_ANN1, (CE_WARN, "Reset flag set, "
4459 5746 "returning mfi_pkt and setting TRAN_BUSY\n"));
4460 5747 return (DDI_FAILURE);
4461 5748 }
4462 5749 model = ddi_model_convert_from(mode & FMODELS);
4463 5750 if (model == DDI_MODEL_ILP32) {
4464 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_smp: DDI_MODEL_ILP32"));
5751 + con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: DDI_MODEL_ILP32"));
4465 5752
4466 5753 sge32 = &ksmp->sgl[0].sge32[0];
4467 5754 response_xferlen = sge32[0].length;
4468 5755 request_xferlen = sge32[1].length;
4469 - con_log(CL_ANN, (CE_NOTE, "issue_mfi_smp: "
5756 + con_log(CL_ANN, (CE_CONT, "issue_mfi_smp: "
4470 5757 "response_xferlen = %x, request_xferlen = %x",
4471 5758 response_xferlen, request_xferlen));
4472 5759
4473 5760 response_ubuf = (void *)(ulong_t)sge32[0].phys_addr;
4474 5761 request_ubuf = (void *)(ulong_t)sge32[1].phys_addr;
4475 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_smp: "
5762 + con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: "
4476 5763 "response_ubuf = %p, request_ubuf = %p",
4477 5764 response_ubuf, request_ubuf));
4478 5765 } else {
4479 5766 #ifdef _ILP32
4480 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_smp: DDI_MODEL_ILP32"));
5767 + con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: DDI_MODEL_ILP32"));
4481 5768
4482 5769 sge32 = &ksmp->sgl[0].sge32[0];
4483 5770 response_xferlen = sge32[0].length;
4484 5771 request_xferlen = sge32[1].length;
4485 - con_log(CL_ANN, (CE_NOTE, "issue_mfi_smp: "
5772 + con_log(CL_ANN, (CE_CONT, "issue_mfi_smp: "
4486 5773 "response_xferlen = %x, request_xferlen = %x",
4487 5774 response_xferlen, request_xferlen));
4488 5775
4489 5776 response_ubuf = (void *)(ulong_t)sge32[0].phys_addr;
4490 5777 request_ubuf = (void *)(ulong_t)sge32[1].phys_addr;
4491 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_smp: "
5778 + con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: "
4492 5779 "response_ubuf = %p, request_ubuf = %p",
4493 5780 response_ubuf, request_ubuf));
4494 5781 #else
4495 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_smp: DDI_MODEL_LP64"));
5782 + con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: DDI_MODEL_LP64"));
4496 5783
4497 5784 sge64 = &ksmp->sgl[0].sge64[0];
4498 5785 response_xferlen = sge64[0].length;
4499 5786 request_xferlen = sge64[1].length;
4500 5787
4501 5788 response_ubuf = (void *)(ulong_t)sge64[0].phys_addr;
4502 5789 request_ubuf = (void *)(ulong_t)sge64[1].phys_addr;
4503 5790 #endif
4504 5791 }
4505 5792 if (request_xferlen) {
4506 5793 /* means IOCTL requires DMA */
4507 5794 /* allocate the data transfer buffer */
4508 - request_dma_obj.size = request_xferlen;
5795 + /* request_dma_obj.size = request_xferlen; */
5796 + MRSAS_GET_BOUNDARY_ALIGNED_LEN(request_xferlen,
5797 + new_xfer_length1, PAGESIZE);
5798 + request_dma_obj.size = new_xfer_length1;
4509 5799 request_dma_obj.dma_attr = mrsas_generic_dma_attr;
4510 5800 request_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
4511 5801 request_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
4512 5802 request_dma_obj.dma_attr.dma_attr_sgllen = 1;
4513 5803 request_dma_obj.dma_attr.dma_attr_align = 1;
4514 5804
4515 5805 /* allocate kernel buffer for DMA */
4516 5806 if (mrsas_alloc_dma_obj(instance, &request_dma_obj,
4517 5807 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
4518 5808 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
4519 5809 "could not allocate data transfer buffer."));
4520 5810 return (DDI_FAILURE);
4521 5811 }
4522 5812 (void) memset(request_dma_obj.buffer, 0, request_xferlen);
4523 5813
4524 5814 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
4525 5815 for (i = 0; i < request_xferlen; i++) {
4526 5816 if (ddi_copyin((uint8_t *)request_ubuf + i,
4527 5817 (uint8_t *)request_dma_obj.buffer + i,
4528 5818 1, mode)) {
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4529 5819 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
4530 5820 "copy from user space failed"));
4531 5821 return (DDI_FAILURE);
4532 5822 }
4533 5823 }
4534 5824 }
4535 5825
4536 5826 if (response_xferlen) {
4537 5827 /* means IOCTL requires DMA */
4538 5828 /* allocate the data transfer buffer */
4539 - response_dma_obj.size = response_xferlen;
5829 + /* response_dma_obj.size = response_xferlen; */
5830 + MRSAS_GET_BOUNDARY_ALIGNED_LEN(response_xferlen,
5831 + new_xfer_length2, PAGESIZE);
5832 + response_dma_obj.size = new_xfer_length2;
4540 5833 response_dma_obj.dma_attr = mrsas_generic_dma_attr;
4541 5834 response_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
4542 5835 response_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
4543 5836 response_dma_obj.dma_attr.dma_attr_sgllen = 1;
4544 5837 response_dma_obj.dma_attr.dma_attr_align = 1;
4545 5838
4546 5839 /* allocate kernel buffer for DMA */
4547 5840 if (mrsas_alloc_dma_obj(instance, &response_dma_obj,
4548 5841 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
4549 5842 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
4550 5843 "could not allocate data transfer buffer."));
4551 5844 return (DDI_FAILURE);
4552 5845 }
4553 5846 (void) memset(response_dma_obj.buffer, 0, response_xferlen);
4554 5847
4555 5848 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
4556 5849 for (i = 0; i < response_xferlen; i++) {
4557 5850 if (ddi_copyin((uint8_t *)response_ubuf + i,
4558 5851 (uint8_t *)response_dma_obj.buffer + i,
4559 5852 1, mode)) {
4560 5853 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
4561 5854 "copy from user space failed"));
4562 5855 return (DDI_FAILURE);
4563 5856 }
4564 5857 }
4565 5858 }
4566 5859
4567 5860 ddi_put8(acc_handle, &smp->cmd, ksmp->cmd);
4568 5861 ddi_put8(acc_handle, &smp->cmd_status, 0);
4569 5862 ddi_put8(acc_handle, &smp->connection_status, 0);
4570 5863 ddi_put8(acc_handle, &smp->sge_count, ksmp->sge_count);
4571 5864 /* smp->context = ksmp->context; */
4572 5865 ddi_put16(acc_handle, &smp->timeout, ksmp->timeout);
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4573 5866 ddi_put32(acc_handle, &smp->data_xfer_len, ksmp->data_xfer_len);
4574 5867
4575 5868 bcopy((void *)&ksmp->sas_addr, (void *)&tmp_sas_addr,
4576 5869 sizeof (uint64_t));
4577 5870 ddi_put64(acc_handle, &smp->sas_addr, tmp_sas_addr);
4578 5871
4579 5872 ddi_put16(acc_handle, &smp->flags, ksmp->flags & ~MFI_FRAME_SGL64);
4580 5873
4581 5874 model = ddi_model_convert_from(mode & FMODELS);
4582 5875 if (model == DDI_MODEL_ILP32) {
4583 - con_log(CL_ANN1, (CE_NOTE,
5876 + con_log(CL_ANN1, (CE_CONT,
4584 5877 "issue_mfi_smp: DDI_MODEL_ILP32"));
4585 5878
4586 5879 sge32 = &smp->sgl[0].sge32[0];
4587 5880 ddi_put32(acc_handle, &sge32[0].length, response_xferlen);
4588 5881 ddi_put32(acc_handle, &sge32[0].phys_addr,
4589 5882 response_dma_obj.dma_cookie[0].dmac_address);
4590 5883 ddi_put32(acc_handle, &sge32[1].length, request_xferlen);
4591 5884 ddi_put32(acc_handle, &sge32[1].phys_addr,
4592 5885 request_dma_obj.dma_cookie[0].dmac_address);
4593 5886 } else {
4594 5887 #ifdef _ILP32
4595 - con_log(CL_ANN1, (CE_NOTE,
5888 + con_log(CL_ANN1, (CE_CONT,
4596 5889 "issue_mfi_smp: DDI_MODEL_ILP32"));
4597 5890 sge32 = &smp->sgl[0].sge32[0];
4598 5891 ddi_put32(acc_handle, &sge32[0].length, response_xferlen);
4599 5892 ddi_put32(acc_handle, &sge32[0].phys_addr,
4600 5893 response_dma_obj.dma_cookie[0].dmac_address);
4601 5894 ddi_put32(acc_handle, &sge32[1].length, request_xferlen);
4602 5895 ddi_put32(acc_handle, &sge32[1].phys_addr,
4603 5896 request_dma_obj.dma_cookie[0].dmac_address);
4604 5897 #else
4605 - con_log(CL_ANN1, (CE_NOTE,
5898 + con_log(CL_ANN1, (CE_CONT,
4606 5899 "issue_mfi_smp: DDI_MODEL_LP64"));
4607 5900 sge64 = &smp->sgl[0].sge64[0];
4608 5901 ddi_put32(acc_handle, &sge64[0].length, response_xferlen);
4609 5902 ddi_put64(acc_handle, &sge64[0].phys_addr,
4610 5903 response_dma_obj.dma_cookie[0].dmac_address);
4611 5904 ddi_put32(acc_handle, &sge64[1].length, request_xferlen);
4612 5905 ddi_put64(acc_handle, &sge64[1].phys_addr,
4613 5906 request_dma_obj.dma_cookie[0].dmac_address);
4614 5907 #endif
4615 5908 }
4616 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_smp : "
5909 + con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp : "
4617 5910 "smp->response_xferlen = %d, smp->request_xferlen = %d "
4618 5911 "smp->data_xfer_len = %d", ddi_get32(acc_handle, &sge32[0].length),
4619 5912 ddi_get32(acc_handle, &sge32[1].length),
4620 5913 ddi_get32(acc_handle, &smp->data_xfer_len)));
4621 5914
4622 5915 cmd->sync_cmd = MRSAS_TRUE;
4623 5916 cmd->frame_count = 1;
4624 5917
5918 + if (instance->tbolt) {
5919 + mr_sas_tbolt_build_mfi_cmd(instance, cmd);
5920 + }
5921 +
4625 5922 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
4626 5923 con_log(CL_ANN, (CE_WARN,
4627 5924 "issue_mfi_smp: fw_ioctl failed"));
4628 5925 } else {
4629 - con_log(CL_ANN1, (CE_NOTE,
5926 + con_log(CL_ANN1, (CE_CONT,
4630 5927 "issue_mfi_smp: copy to user space"));
4631 5928
4632 5929 if (request_xferlen) {
4633 5930 for (i = 0; i < request_xferlen; i++) {
4634 5931 if (ddi_copyout(
4635 5932 (uint8_t *)request_dma_obj.buffer +
4636 5933 i, (uint8_t *)request_ubuf + i,
4637 5934 1, mode)) {
4638 5935 con_log(CL_ANN, (CE_WARN,
4639 5936 "issue_mfi_smp : copy to user space"
4640 5937 " failed"));
4641 5938 return (DDI_FAILURE);
4642 5939 }
4643 5940 }
4644 5941 }
4645 5942
4646 5943 if (response_xferlen) {
4647 5944 for (i = 0; i < response_xferlen; i++) {
4648 5945 if (ddi_copyout(
4649 5946 (uint8_t *)response_dma_obj.buffer
4650 5947 + i, (uint8_t *)response_ubuf
4651 5948 + i, 1, mode)) {
4652 5949 con_log(CL_ANN, (CE_WARN,
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↑ open up ↑ |
4653 5950 "issue_mfi_smp : copy to "
4654 5951 "user space failed"));
4655 5952 return (DDI_FAILURE);
4656 5953 }
4657 5954 }
4658 5955 }
4659 5956 }
4660 5957
4661 5958 ksmp->cmd_status = ddi_get8(acc_handle, &smp->cmd_status);
4662 5959 con_log(CL_ANN1, (CE_NOTE, "issue_mfi_smp: smp->cmd_status = %d",
4663 - ddi_get8(acc_handle, &smp->cmd_status)));
5960 + ksmp->cmd_status));
4664 5961 DTRACE_PROBE2(issue_smp, uint8_t, ksmp->cmd, uint8_t, ksmp->cmd_status);
4665 5962
4666 5963 if (request_xferlen) {
4667 5964 /* free kernel buffer */
4668 5965 if (mrsas_free_dma_obj(instance, request_dma_obj) !=
4669 5966 DDI_SUCCESS)
4670 5967 return (DDI_FAILURE);
4671 5968 }
4672 5969
4673 5970 if (response_xferlen) {
4674 5971 /* free kernel buffer */
4675 5972 if (mrsas_free_dma_obj(instance, response_dma_obj) !=
4676 5973 DDI_SUCCESS)
4677 5974 return (DDI_FAILURE);
4678 5975 }
4679 5976
4680 5977 return (DDI_SUCCESS);
4681 5978 }
4682 5979
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4683 5980 /*
4684 5981 * issue_mfi_stp
4685 5982 */
4686 5983 static int
4687 5984 issue_mfi_stp(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
4688 5985 struct mrsas_cmd *cmd, int mode)
4689 5986 {
4690 5987 void *fis_ubuf;
4691 5988 void *data_ubuf;
4692 5989 uint32_t fis_xferlen = 0;
5990 + uint32_t new_xfer_length1 = 0;
5991 + uint32_t new_xfer_length2 = 0;
4693 5992 uint32_t data_xferlen = 0;
4694 5993 uint_t model;
4695 5994 dma_obj_t fis_dma_obj;
4696 5995 dma_obj_t data_dma_obj;
4697 5996 struct mrsas_stp_frame *kstp;
4698 5997 struct mrsas_stp_frame *stp;
4699 5998 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
4700 5999 int i;
4701 6000
4702 6001 stp = &cmd->frame->stp;
4703 6002 kstp = (struct mrsas_stp_frame *)&ioctl->frame[0];
4704 6003
4705 6004 if (instance->adapterresetinprogress) {
4706 - con_log(CL_ANN1, (CE_NOTE, "Reset flag set, "
6005 + con_log(CL_ANN1, (CE_WARN, "Reset flag set, "
4707 6006 "returning mfi_pkt and setting TRAN_BUSY\n"));
4708 6007 return (DDI_FAILURE);
4709 6008 }
4710 6009 model = ddi_model_convert_from(mode & FMODELS);
4711 6010 if (model == DDI_MODEL_ILP32) {
4712 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_stp: DDI_MODEL_ILP32"));
6011 + con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_ILP32"));
4713 6012
4714 6013 fis_xferlen = kstp->sgl.sge32[0].length;
4715 6014 data_xferlen = kstp->sgl.sge32[1].length;
4716 6015
4717 6016 fis_ubuf = (void *)(ulong_t)kstp->sgl.sge32[0].phys_addr;
4718 6017 data_ubuf = (void *)(ulong_t)kstp->sgl.sge32[1].phys_addr;
4719 - }
4720 - else
4721 - {
6018 + } else {
4722 6019 #ifdef _ILP32
4723 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_stp: DDI_MODEL_ILP32"));
6020 + con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_ILP32"));
4724 6021
4725 6022 fis_xferlen = kstp->sgl.sge32[0].length;
4726 6023 data_xferlen = kstp->sgl.sge32[1].length;
4727 6024
4728 6025 fis_ubuf = (void *)(ulong_t)kstp->sgl.sge32[0].phys_addr;
4729 6026 data_ubuf = (void *)(ulong_t)kstp->sgl.sge32[1].phys_addr;
4730 6027 #else
4731 - con_log(CL_ANN1, (CE_NOTE, "issue_mfi_stp: DDI_MODEL_LP64"));
6028 + con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_LP64"));
4732 6029
4733 6030 fis_xferlen = kstp->sgl.sge64[0].length;
4734 6031 data_xferlen = kstp->sgl.sge64[1].length;
4735 6032
4736 6033 fis_ubuf = (void *)(ulong_t)kstp->sgl.sge64[0].phys_addr;
4737 6034 data_ubuf = (void *)(ulong_t)kstp->sgl.sge64[1].phys_addr;
4738 6035 #endif
4739 6036 }
4740 6037
4741 6038
4742 6039 if (fis_xferlen) {
4743 - con_log(CL_ANN, (CE_NOTE, "issue_mfi_stp: "
6040 + con_log(CL_ANN, (CE_CONT, "issue_mfi_stp: "
4744 6041 "fis_ubuf = %p fis_xferlen = %x", fis_ubuf, fis_xferlen));
4745 6042
4746 6043 /* means IOCTL requires DMA */
4747 6044 /* allocate the data transfer buffer */
4748 - fis_dma_obj.size = fis_xferlen;
6045 + /* fis_dma_obj.size = fis_xferlen; */
6046 + MRSAS_GET_BOUNDARY_ALIGNED_LEN(fis_xferlen,
6047 + new_xfer_length1, PAGESIZE);
6048 + fis_dma_obj.size = new_xfer_length1;
4749 6049 fis_dma_obj.dma_attr = mrsas_generic_dma_attr;
4750 6050 fis_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
4751 6051 fis_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
4752 6052 fis_dma_obj.dma_attr.dma_attr_sgllen = 1;
4753 6053 fis_dma_obj.dma_attr.dma_attr_align = 1;
4754 6054
4755 6055 /* allocate kernel buffer for DMA */
4756 6056 if (mrsas_alloc_dma_obj(instance, &fis_dma_obj,
4757 6057 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
4758 6058 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp : "
4759 6059 "could not allocate data transfer buffer."));
4760 6060 return (DDI_FAILURE);
4761 6061 }
4762 6062 (void) memset(fis_dma_obj.buffer, 0, fis_xferlen);
4763 6063
4764 6064 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
4765 6065 for (i = 0; i < fis_xferlen; i++) {
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4766 6066 if (ddi_copyin((uint8_t *)fis_ubuf + i,
4767 6067 (uint8_t *)fis_dma_obj.buffer + i, 1, mode)) {
4768 6068 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
4769 6069 "copy from user space failed"));
4770 6070 return (DDI_FAILURE);
4771 6071 }
4772 6072 }
4773 6073 }
4774 6074
4775 6075 if (data_xferlen) {
4776 - con_log(CL_ANN, (CE_NOTE, "issue_mfi_stp: data_ubuf = %p "
6076 + con_log(CL_ANN, (CE_CONT, "issue_mfi_stp: data_ubuf = %p "
4777 6077 "data_xferlen = %x", data_ubuf, data_xferlen));
4778 6078
4779 6079 /* means IOCTL requires DMA */
4780 6080 /* allocate the data transfer buffer */
4781 - data_dma_obj.size = data_xferlen;
6081 + /* data_dma_obj.size = data_xferlen; */
6082 + MRSAS_GET_BOUNDARY_ALIGNED_LEN(data_xferlen, new_xfer_length2,
6083 + PAGESIZE);
6084 + data_dma_obj.size = new_xfer_length2;
4782 6085 data_dma_obj.dma_attr = mrsas_generic_dma_attr;
4783 6086 data_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
4784 6087 data_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
4785 6088 data_dma_obj.dma_attr.dma_attr_sgllen = 1;
4786 6089 data_dma_obj.dma_attr.dma_attr_align = 1;
4787 6090
4788 -/* allocate kernel buffer for DMA */
6091 + /* allocate kernel buffer for DMA */
4789 6092 if (mrsas_alloc_dma_obj(instance, &data_dma_obj,
4790 6093 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
4791 6094 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
4792 6095 "could not allocate data transfer buffer."));
4793 6096 return (DDI_FAILURE);
4794 6097 }
4795 6098 (void) memset(data_dma_obj.buffer, 0, data_xferlen);
4796 6099
4797 6100 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
4798 6101 for (i = 0; i < data_xferlen; i++) {
4799 6102 if (ddi_copyin((uint8_t *)data_ubuf + i,
4800 6103 (uint8_t *)data_dma_obj.buffer + i, 1, mode)) {
4801 6104 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
4802 6105 "copy from user space failed"));
4803 6106 return (DDI_FAILURE);
4804 6107 }
4805 6108 }
4806 6109 }
4807 6110
4808 6111 ddi_put8(acc_handle, &stp->cmd, kstp->cmd);
4809 6112 ddi_put8(acc_handle, &stp->cmd_status, 0);
4810 6113 ddi_put8(acc_handle, &stp->connection_status, 0);
4811 6114 ddi_put8(acc_handle, &stp->target_id, kstp->target_id);
4812 6115 ddi_put8(acc_handle, &stp->sge_count, kstp->sge_count);
4813 6116
4814 6117 ddi_put16(acc_handle, &stp->timeout, kstp->timeout);
4815 6118 ddi_put32(acc_handle, &stp->data_xfer_len, kstp->data_xfer_len);
4816 6119
4817 6120 ddi_rep_put8(acc_handle, (uint8_t *)kstp->fis, (uint8_t *)stp->fis, 10,
4818 6121 DDI_DEV_AUTOINCR);
4819 6122
4820 6123 ddi_put16(acc_handle, &stp->flags, kstp->flags & ~MFI_FRAME_SGL64);
4821 6124 ddi_put32(acc_handle, &stp->stp_flags, kstp->stp_flags);
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4822 6125 ddi_put32(acc_handle, &stp->sgl.sge32[0].length, fis_xferlen);
4823 6126 ddi_put32(acc_handle, &stp->sgl.sge32[0].phys_addr,
4824 6127 fis_dma_obj.dma_cookie[0].dmac_address);
4825 6128 ddi_put32(acc_handle, &stp->sgl.sge32[1].length, data_xferlen);
4826 6129 ddi_put32(acc_handle, &stp->sgl.sge32[1].phys_addr,
4827 6130 data_dma_obj.dma_cookie[0].dmac_address);
4828 6131
4829 6132 cmd->sync_cmd = MRSAS_TRUE;
4830 6133 cmd->frame_count = 1;
4831 6134
6135 + if (instance->tbolt) {
6136 + mr_sas_tbolt_build_mfi_cmd(instance, cmd);
6137 + }
6138 +
4832 6139 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
4833 6140 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: fw_ioctl failed"));
4834 6141 } else {
4835 6142
4836 6143 if (fis_xferlen) {
4837 6144 for (i = 0; i < fis_xferlen; i++) {
4838 6145 if (ddi_copyout(
4839 6146 (uint8_t *)fis_dma_obj.buffer + i,
4840 6147 (uint8_t *)fis_ubuf + i, 1, mode)) {
4841 6148 con_log(CL_ANN, (CE_WARN,
4842 6149 "issue_mfi_stp : copy to "
4843 6150 "user space failed"));
4844 6151 return (DDI_FAILURE);
4845 6152 }
4846 6153 }
4847 6154 }
4848 6155 }
4849 6156 if (data_xferlen) {
4850 6157 for (i = 0; i < data_xferlen; i++) {
4851 6158 if (ddi_copyout(
4852 6159 (uint8_t *)data_dma_obj.buffer + i,
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4853 6160 (uint8_t *)data_ubuf + i, 1, mode)) {
4854 6161 con_log(CL_ANN, (CE_WARN,
4855 6162 "issue_mfi_stp : copy to"
4856 6163 " user space failed"));
4857 6164 return (DDI_FAILURE);
4858 6165 }
4859 6166 }
4860 6167 }
4861 6168
4862 6169 kstp->cmd_status = ddi_get8(acc_handle, &stp->cmd_status);
6170 + con_log(CL_ANN1, (CE_NOTE, "issue_mfi_stp: stp->cmd_status = %d",
6171 + kstp->cmd_status));
4863 6172 DTRACE_PROBE2(issue_stp, uint8_t, kstp->cmd, uint8_t, kstp->cmd_status);
4864 6173
4865 6174 if (fis_xferlen) {
4866 6175 /* free kernel buffer */
4867 6176 if (mrsas_free_dma_obj(instance, fis_dma_obj) != DDI_SUCCESS)
4868 6177 return (DDI_FAILURE);
4869 6178 }
4870 6179
4871 6180 if (data_xferlen) {
4872 6181 /* free kernel buffer */
4873 6182 if (mrsas_free_dma_obj(instance, data_dma_obj) != DDI_SUCCESS)
4874 6183 return (DDI_FAILURE);
4875 6184 }
4876 6185
4877 6186 return (DDI_SUCCESS);
4878 6187 }
4879 6188
4880 6189 /*
4881 6190 * fill_up_drv_ver
4882 6191 */
4883 -static void
6192 +void
4884 6193 fill_up_drv_ver(struct mrsas_drv_ver *dv)
4885 6194 {
4886 6195 (void) memset(dv, 0, sizeof (struct mrsas_drv_ver));
4887 6196
4888 6197 (void) memcpy(dv->signature, "$LSI LOGIC$", strlen("$LSI LOGIC$"));
4889 6198 (void) memcpy(dv->os_name, "Solaris", strlen("Solaris"));
4890 6199 (void) memcpy(dv->drv_name, "mr_sas", strlen("mr_sas"));
4891 6200 (void) memcpy(dv->drv_ver, MRSAS_VERSION, strlen(MRSAS_VERSION));
4892 6201 (void) memcpy(dv->drv_rel_date, MRSAS_RELDATE,
4893 6202 strlen(MRSAS_RELDATE));
6203 +
4894 6204 }
4895 6205
4896 6206 /*
4897 6207 * handle_drv_ioctl
4898 6208 */
4899 6209 static int
4900 6210 handle_drv_ioctl(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
4901 6211 int mode)
4902 6212 {
4903 6213 int i;
4904 6214 int rval = DDI_SUCCESS;
4905 6215 int *props = NULL;
4906 6216 void *ubuf;
4907 6217
4908 6218 uint8_t *pci_conf_buf;
4909 6219 uint32_t xferlen;
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4910 6220 uint32_t num_props;
4911 6221 uint_t model;
4912 6222 struct mrsas_dcmd_frame *kdcmd;
4913 6223 struct mrsas_drv_ver dv;
4914 6224 struct mrsas_pci_information pi;
4915 6225
4916 6226 kdcmd = (struct mrsas_dcmd_frame *)&ioctl->frame[0];
4917 6227
4918 6228 model = ddi_model_convert_from(mode & FMODELS);
4919 6229 if (model == DDI_MODEL_ILP32) {
4920 - con_log(CL_ANN1, (CE_NOTE,
6230 + con_log(CL_ANN1, (CE_CONT,
4921 6231 "handle_drv_ioctl: DDI_MODEL_ILP32"));
4922 6232
4923 6233 xferlen = kdcmd->sgl.sge32[0].length;
4924 6234
4925 6235 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
4926 6236 } else {
4927 6237 #ifdef _ILP32
4928 - con_log(CL_ANN1, (CE_NOTE,
6238 + con_log(CL_ANN1, (CE_CONT,
4929 6239 "handle_drv_ioctl: DDI_MODEL_ILP32"));
4930 6240 xferlen = kdcmd->sgl.sge32[0].length;
4931 6241 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
4932 6242 #else
4933 - con_log(CL_ANN1, (CE_NOTE,
6243 + con_log(CL_ANN1, (CE_CONT,
4934 6244 "handle_drv_ioctl: DDI_MODEL_LP64"));
4935 6245 xferlen = kdcmd->sgl.sge64[0].length;
4936 6246 ubuf = (void *)(ulong_t)kdcmd->sgl.sge64[0].phys_addr;
4937 6247 #endif
4938 6248 }
4939 - con_log(CL_ANN1, (CE_NOTE, "handle_drv_ioctl: "
6249 + con_log(CL_ANN1, (CE_CONT, "handle_drv_ioctl: "
4940 6250 "dataBuf=%p size=%d bytes", ubuf, xferlen));
4941 6251
4942 6252 switch (kdcmd->opcode) {
4943 6253 case MRSAS_DRIVER_IOCTL_DRIVER_VERSION:
4944 - con_log(CL_ANN1, (CE_NOTE, "handle_drv_ioctl: "
6254 + con_log(CL_ANN1, (CE_CONT, "handle_drv_ioctl: "
4945 6255 "MRSAS_DRIVER_IOCTL_DRIVER_VERSION"));
4946 6256
4947 6257 fill_up_drv_ver(&dv);
4948 6258
4949 6259 if (ddi_copyout(&dv, ubuf, xferlen, mode)) {
4950 6260 con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
4951 6261 "MRSAS_DRIVER_IOCTL_DRIVER_VERSION : "
4952 6262 "copy to user space failed"));
4953 6263 kdcmd->cmd_status = 1;
4954 6264 rval = 1;
4955 6265 } else {
4956 6266 kdcmd->cmd_status = 0;
4957 6267 }
4958 6268 break;
4959 6269 case MRSAS_DRIVER_IOCTL_PCI_INFORMATION:
4960 6270 con_log(CL_ANN1, (CE_NOTE, "handle_drv_ioctl: "
4961 6271 "MRSAS_DRIVER_IOCTL_PCI_INFORMAITON"));
4962 6272
4963 6273 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, instance->dip,
4964 6274 0, "reg", &props, &num_props)) {
4965 6275 con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
4966 6276 "MRSAS_DRIVER_IOCTL_PCI_INFORMATION : "
4967 6277 "ddi_prop_look_int_array failed"));
4968 6278 rval = DDI_FAILURE;
4969 6279 } else {
4970 6280
4971 6281 pi.busNumber = (props[0] >> 16) & 0xFF;
4972 6282 pi.deviceNumber = (props[0] >> 11) & 0x1f;
4973 6283 pi.functionNumber = (props[0] >> 8) & 0x7;
4974 6284 ddi_prop_free((void *)props);
4975 6285 }
4976 6286
4977 6287 pci_conf_buf = (uint8_t *)&pi.pciHeaderInfo;
4978 6288
4979 6289 for (i = 0; i < (sizeof (struct mrsas_pci_information) -
4980 6290 offsetof(struct mrsas_pci_information, pciHeaderInfo));
4981 6291 i++) {
4982 6292 pci_conf_buf[i] =
4983 6293 pci_config_get8(instance->pci_handle, i);
4984 6294 }
4985 6295
4986 6296 if (ddi_copyout(&pi, ubuf, xferlen, mode)) {
4987 6297 con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
4988 6298 "MRSAS_DRIVER_IOCTL_PCI_INFORMATION : "
4989 6299 "copy to user space failed"));
4990 6300 kdcmd->cmd_status = 1;
4991 6301 rval = 1;
4992 6302 } else {
4993 6303 kdcmd->cmd_status = 0;
4994 6304 }
4995 6305 break;
4996 6306 default:
4997 6307 con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
4998 6308 "invalid driver specific IOCTL opcode = 0x%x",
4999 6309 kdcmd->opcode));
5000 6310 kdcmd->cmd_status = 1;
5001 6311 rval = DDI_FAILURE;
5002 6312 break;
5003 6313 }
5004 6314
5005 6315 return (rval);
5006 6316 }
5007 6317
5008 6318 /*
5009 6319 * handle_mfi_ioctl
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5010 6320 */
5011 6321 static int
5012 6322 handle_mfi_ioctl(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5013 6323 int mode)
5014 6324 {
5015 6325 int rval = DDI_SUCCESS;
5016 6326
5017 6327 struct mrsas_header *hdr;
5018 6328 struct mrsas_cmd *cmd;
5019 6329
5020 - cmd = get_mfi_pkt(instance);
5021 -
6330 + if (instance->tbolt) {
6331 + cmd = get_raid_msg_mfi_pkt(instance);
6332 + } else {
6333 + cmd = get_mfi_pkt(instance);
6334 + }
5022 6335 if (!cmd) {
5023 6336 con_log(CL_ANN, (CE_WARN, "mr_sas: "
5024 6337 "failed to get a cmd packet"));
5025 6338 DTRACE_PROBE2(mfi_ioctl_err, uint16_t,
5026 6339 instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
5027 6340 return (DDI_FAILURE);
5028 6341 }
5029 - cmd->retry_count_for_ocr = 0;
5030 6342
5031 6343 /* Clear the frame buffer and assign back the context id */
5032 6344 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
5033 6345 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
5034 6346 cmd->index);
5035 6347
5036 6348 hdr = (struct mrsas_header *)&ioctl->frame[0];
5037 6349
5038 6350 switch (ddi_get8(cmd->frame_dma_obj.acc_handle, &hdr->cmd)) {
5039 6351 case MFI_CMD_OP_DCMD:
5040 6352 rval = issue_mfi_dcmd(instance, ioctl, cmd, mode);
5041 6353 break;
5042 6354 case MFI_CMD_OP_SMP:
5043 6355 rval = issue_mfi_smp(instance, ioctl, cmd, mode);
5044 6356 break;
5045 6357 case MFI_CMD_OP_STP:
5046 6358 rval = issue_mfi_stp(instance, ioctl, cmd, mode);
5047 6359 break;
5048 6360 case MFI_CMD_OP_LD_SCSI:
5049 6361 case MFI_CMD_OP_PD_SCSI:
5050 6362 rval = issue_mfi_pthru(instance, ioctl, cmd, mode);
5051 6363 break;
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5052 6364 default:
5053 6365 con_log(CL_ANN, (CE_WARN, "handle_mfi_ioctl: "
5054 6366 "invalid mfi ioctl hdr->cmd = %d", hdr->cmd));
5055 6367 rval = DDI_FAILURE;
5056 6368 break;
5057 6369 }
5058 6370
5059 6371 if (mrsas_common_check(instance, cmd) != DDI_SUCCESS)
5060 6372 rval = DDI_FAILURE;
5061 6373
5062 - return_mfi_pkt(instance, cmd);
6374 + if (instance->tbolt) {
6375 + return_raid_msg_mfi_pkt(instance, cmd);
6376 + } else {
6377 + return_mfi_pkt(instance, cmd);
6378 + }
5063 6379
5064 6380 return (rval);
5065 6381 }
5066 6382
5067 6383 /*
5068 6384 * AEN
5069 6385 */
5070 6386 static int
5071 6387 handle_mfi_aen(struct mrsas_instance *instance, struct mrsas_aen *aen)
5072 6388 {
5073 6389 int rval = 0;
5074 6390
5075 6391 rval = register_mfi_aen(instance, instance->aen_seq_num,
5076 6392 aen->class_locale_word);
5077 6393
5078 6394 aen->cmd_status = (uint8_t)rval;
5079 6395
5080 6396 return (rval);
5081 6397 }
5082 6398
5083 6399 static int
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5084 6400 register_mfi_aen(struct mrsas_instance *instance, uint32_t seq_num,
5085 6401 uint32_t class_locale_word)
5086 6402 {
5087 6403 int ret_val;
5088 6404
5089 6405 struct mrsas_cmd *cmd, *aen_cmd;
5090 6406 struct mrsas_dcmd_frame *dcmd;
5091 6407 union mrsas_evt_class_locale curr_aen;
5092 6408 union mrsas_evt_class_locale prev_aen;
5093 6409
6410 + con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
5094 6411 /*
5095 6412 * If there an AEN pending already (aen_cmd), check if the
5096 6413 * class_locale of that pending AEN is inclusive of the new
5097 6414 * AEN request we currently have. If it is, then we don't have
5098 6415 * to do anything. In other words, whichever events the current
5099 6416 * AEN request is subscribing to, have already been subscribed
5100 6417 * to.
5101 6418 *
5102 6419 * If the old_cmd is _not_ inclusive, then we have to abort
5103 6420 * that command, form a class_locale that is superset of both
5104 6421 * old and current and re-issue to the FW
5105 6422 */
5106 6423
5107 6424 curr_aen.word = LE_32(class_locale_word);
5108 6425 curr_aen.members.locale = LE_16(curr_aen.members.locale);
5109 6426 aen_cmd = instance->aen_cmd;
5110 6427 if (aen_cmd) {
5111 6428 prev_aen.word = ddi_get32(aen_cmd->frame_dma_obj.acc_handle,
5112 6429 &aen_cmd->frame->dcmd.mbox.w[1]);
5113 6430 prev_aen.word = LE_32(prev_aen.word);
5114 6431 prev_aen.members.locale = LE_16(prev_aen.members.locale);
5115 6432 /*
5116 6433 * A class whose enum value is smaller is inclusive of all
5117 6434 * higher values. If a PROGRESS (= -1) was previously
5118 6435 * registered, then a new registration requests for higher
5119 6436 * classes need not be sent to FW. They are automatically
5120 6437 * included.
5121 6438 *
5122 6439 * Locale numbers don't have such hierarchy. They are bitmap
5123 6440 * values
5124 6441 */
5125 6442 if ((prev_aen.members.class <= curr_aen.members.class) &&
5126 6443 !((prev_aen.members.locale & curr_aen.members.locale) ^
5127 6444 curr_aen.members.locale)) {
5128 6445 /*
5129 6446 * Previously issued event registration includes
5130 6447 * current request. Nothing to do.
5131 6448 */
5132 6449
5133 6450 return (0);
5134 6451 } else {
5135 6452 curr_aen.members.locale |= prev_aen.members.locale;
5136 6453
5137 6454 if (prev_aen.members.class < curr_aen.members.class)
5138 6455 curr_aen.members.class = prev_aen.members.class;
5139 6456
5140 6457 ret_val = abort_aen_cmd(instance, aen_cmd);
5141 6458
5142 6459 if (ret_val) {
5143 6460 con_log(CL_ANN, (CE_WARN, "register_mfi_aen: "
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↑ open up ↑ |
5144 6461 "failed to abort prevous AEN command"));
5145 6462
5146 6463 return (ret_val);
5147 6464 }
5148 6465 }
5149 6466 } else {
5150 6467 curr_aen.word = LE_32(class_locale_word);
5151 6468 curr_aen.members.locale = LE_16(curr_aen.members.locale);
5152 6469 }
5153 6470
5154 - cmd = get_mfi_pkt(instance);
6471 + if (instance->tbolt) {
6472 + cmd = get_raid_msg_mfi_pkt(instance);
6473 + } else {
6474 + cmd = get_mfi_pkt(instance);
6475 + }
5155 6476
5156 6477 if (!cmd) {
5157 6478 DTRACE_PROBE2(mfi_aen_err, uint16_t, instance->fw_outstanding,
5158 6479 uint16_t, instance->max_fw_cmds);
5159 6480 return (ENOMEM);
5160 6481 }
5161 - cmd->retry_count_for_ocr = 0;
6482 +
5162 6483 /* Clear the frame buffer and assign back the context id */
5163 6484 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
5164 6485 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
5165 6486 cmd->index);
5166 6487
5167 6488 dcmd = &cmd->frame->dcmd;
5168 6489
5169 6490 /* for(i = 0; i < DCMD_MBOX_SZ; i++) dcmd->mbox.b[i] = 0; */
5170 6491 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
5171 6492
5172 6493 (void) memset(instance->mfi_evt_detail_obj.buffer, 0,
5173 6494 sizeof (struct mrsas_evt_detail));
5174 6495
5175 6496 /* Prepare DCMD for aen registration */
5176 6497 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
5177 6498 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0x0);
5178 6499 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 1);
5179 6500 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
5180 6501 MFI_FRAME_DIR_READ);
5181 6502 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
5182 6503 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len,
5183 6504 sizeof (struct mrsas_evt_detail));
5184 6505 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
5185 6506 MR_DCMD_CTRL_EVENT_WAIT);
5186 6507 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->mbox.w[0], seq_num);
5187 6508 curr_aen.members.locale = LE_16(curr_aen.members.locale);
5188 6509 curr_aen.word = LE_32(curr_aen.word);
5189 6510 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->mbox.w[1],
5190 6511 curr_aen.word);
5191 6512 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].phys_addr,
5192 6513 instance->mfi_evt_detail_obj.dma_cookie[0].dmac_address);
5193 6514 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].length,
5194 6515 sizeof (struct mrsas_evt_detail));
5195 6516
5196 6517 instance->aen_seq_num = seq_num;
5197 6518
5198 6519
5199 6520 /*
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28 lines elided |
↑ open up ↑ |
5200 6521 * Store reference to the cmd used to register for AEN. When an
5201 6522 * application wants us to register for AEN, we have to abort this
5202 6523 * cmd and re-register with a new EVENT LOCALE supplied by that app
5203 6524 */
5204 6525 instance->aen_cmd = cmd;
5205 6526
5206 6527 cmd->frame_count = 1;
5207 6528
5208 6529 /* Issue the aen registration frame */
5209 6530 /* atomic_add_16 (&instance->fw_outstanding, 1); */
6531 + if (instance->tbolt) {
6532 + mr_sas_tbolt_build_mfi_cmd(instance, cmd);
6533 + }
5210 6534 instance->func_ptr->issue_cmd(cmd, instance);
5211 6535
5212 6536 return (0);
5213 6537 }
5214 6538
5215 -static void
6539 +void
5216 6540 display_scsi_inquiry(caddr_t scsi_inq)
5217 6541 {
5218 6542 #define MAX_SCSI_DEVICE_CODE 14
5219 6543 int i;
5220 6544 char inquiry_buf[256] = {0};
5221 6545 int len;
5222 6546 const char *const scsi_device_types[] = {
5223 - "Direct-Access ",
6547 + "Direct-Access ",
5224 6548 "Sequential-Access",
5225 - "Printer ",
5226 - "Processor ",
5227 - "WORM ",
5228 - "CD-ROM ",
5229 - "Scanner ",
5230 - "Optical Device ",
5231 - "Medium Changer ",
5232 - "Communications ",
5233 - "Unknown ",
5234 - "Unknown ",
5235 - "Unknown ",
5236 - "Enclosure ",
6549 + "Printer ",
6550 + "Processor ",
6551 + "WORM ",
6552 + "CD-ROM ",
6553 + "Scanner ",
6554 + "Optical Device ",
6555 + "Medium Changer ",
6556 + "Communications ",
6557 + "Unknown ",
6558 + "Unknown ",
6559 + "Unknown ",
6560 + "Enclosure ",
5237 6561 };
5238 6562
5239 6563 len = 0;
5240 6564
5241 - len += snprintf(inquiry_buf + len, 265 - len, " Vendor: ");
6565 + len += snprintf(inquiry_buf + len, 265 - len, " Vendor: ");
5242 6566 for (i = 8; i < 16; i++) {
5243 6567 len += snprintf(inquiry_buf + len, 265 - len, "%c",
5244 6568 scsi_inq[i]);
5245 6569 }
5246 6570
5247 - len += snprintf(inquiry_buf + len, 265 - len, " Model: ");
6571 + len += snprintf(inquiry_buf + len, 265 - len, " Model: ");
5248 6572
5249 6573 for (i = 16; i < 32; i++) {
5250 6574 len += snprintf(inquiry_buf + len, 265 - len, "%c",
5251 6575 scsi_inq[i]);
5252 6576 }
5253 6577
5254 - len += snprintf(inquiry_buf + len, 265 - len, " Rev: ");
6578 + len += snprintf(inquiry_buf + len, 265 - len, " Rev: ");
5255 6579
5256 6580 for (i = 32; i < 36; i++) {
5257 6581 len += snprintf(inquiry_buf + len, 265 - len, "%c",
5258 6582 scsi_inq[i]);
5259 6583 }
5260 6584
5261 6585 len += snprintf(inquiry_buf + len, 265 - len, "\n");
5262 6586
5263 6587
5264 6588 i = scsi_inq[0] & 0x1f;
5265 6589
5266 6590
5267 - len += snprintf(inquiry_buf + len, 265 - len, " Type: %s ",
6591 + len += snprintf(inquiry_buf + len, 265 - len, " Type: %s ",
5268 6592 i < MAX_SCSI_DEVICE_CODE ? scsi_device_types[i] :
5269 - "Unknown ");
6593 + "Unknown ");
5270 6594
5271 6595
5272 6596 len += snprintf(inquiry_buf + len, 265 - len,
5273 - " ANSI SCSI revision: %02x", scsi_inq[2] & 0x07);
6597 + " ANSI SCSI revision: %02x", scsi_inq[2] & 0x07);
5274 6598
5275 6599 if ((scsi_inq[2] & 0x07) == 1 && (scsi_inq[3] & 0x0f) == 1) {
5276 6600 len += snprintf(inquiry_buf + len, 265 - len, " CCS\n");
5277 6601 } else {
5278 6602 len += snprintf(inquiry_buf + len, 265 - len, "\n");
5279 6603 }
5280 6604
5281 - con_log(CL_ANN1, (CE_CONT, inquiry_buf));
6605 + con_log(CL_DLEVEL2, (CE_CONT, inquiry_buf));
5282 6606 }
5283 6607
5284 6608 static void
5285 6609 io_timeout_checker(void *arg)
5286 6610 {
5287 6611 struct scsi_pkt *pkt;
5288 6612 struct mrsas_instance *instance = arg;
5289 6613 struct mrsas_cmd *cmd = NULL;
5290 6614 struct mrsas_header *hdr;
5291 6615 int time = 0;
5292 6616 int counter = 0;
5293 6617 struct mlist_head *pos, *next;
5294 6618 mlist_t process_list;
5295 6619
5296 6620 if (instance->adapterresetinprogress == 1) {
5297 - con_log(CL_ANN1, (CE_NOTE, "io_timeout_checker"
6621 + con_log(CL_ANN, (CE_NOTE, "io_timeout_checker:"
5298 6622 " reset in progress"));
6623 +
5299 6624 instance->timeout_id = timeout(io_timeout_checker,
5300 6625 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
5301 6626 return;
5302 6627 }
5303 6628
5304 6629 /* See if this check needs to be in the beginning or last in ISR */
5305 6630 if (mrsas_initiate_ocr_if_fw_is_faulty(instance) == 1) {
5306 - con_log(CL_ANN1, (CE_NOTE,
5307 - "Fw Fault state Handling in io_timeout_checker"));
6631 + cmn_err(CE_WARN, "io_timeout_checker: "
6632 + "FW Fault, calling reset adapter");
6633 + cmn_err(CE_CONT, "io_timeout_checker: "
6634 + "fw_outstanding 0x%X max_fw_cmds 0x%X",
6635 + instance->fw_outstanding, instance->max_fw_cmds);
5308 6636 if (instance->adapterresetinprogress == 0) {
5309 - (void) mrsas_reset_ppc(instance);
6637 + instance->adapterresetinprogress = 1;
6638 + if (instance->tbolt)
6639 + (void) mrsas_tbolt_reset_ppc(instance);
6640 + else
6641 + (void) mrsas_reset_ppc(instance);
6642 + instance->adapterresetinprogress = 0;
5310 6643 }
5311 6644 instance->timeout_id = timeout(io_timeout_checker,
5312 6645 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
5313 6646 return;
5314 6647 }
5315 6648
5316 6649 INIT_LIST_HEAD(&process_list);
5317 6650
5318 6651 mutex_enter(&instance->cmd_pend_mtx);
5319 6652 mlist_for_each_safe(pos, next, &instance->cmd_pend_list) {
5320 6653 cmd = mlist_entry(pos, struct mrsas_cmd, list);
5321 6654
5322 6655 if (cmd == NULL) {
5323 6656 continue;
5324 6657 }
5325 6658
5326 6659 if (cmd->sync_cmd == MRSAS_TRUE) {
5327 6660 hdr = (struct mrsas_header *)&cmd->frame->hdr;
5328 6661 if (hdr == NULL) {
5329 6662 continue;
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↑ open up ↑ |
5330 6663 }
5331 6664 time = --cmd->drv_pkt_time;
5332 6665 } else {
5333 6666 pkt = cmd->pkt;
5334 6667 if (pkt == NULL) {
5335 6668 continue;
5336 6669 }
5337 6670 time = --cmd->drv_pkt_time;
5338 6671 }
5339 6672 if (time <= 0) {
5340 - con_log(CL_ANN1, (CE_NOTE, "%llx: "
5341 - "io_timeout_checker: TIMING OUT: pkt "
5342 - ": %p, cmd %p", gethrtime(), (void *)pkt,
5343 - (void *)cmd));
6673 + cmn_err(CE_WARN, "%llx: "
6674 + "io_timeout_checker: TIMING OUT: pkt: %p, "
6675 + "cmd %p fw_outstanding 0x%X max_fw_cmds 0x%X\n",
6676 + gethrtime(), (void *)pkt, (void *)cmd,
6677 + instance->fw_outstanding, instance->max_fw_cmds);
6678 +
5344 6679 counter++;
5345 6680 break;
5346 6681 }
5347 6682 }
5348 6683 mutex_exit(&instance->cmd_pend_mtx);
5349 6684
5350 6685 if (counter) {
5351 - con_log(CL_ANN1, (CE_NOTE,
5352 - "io_timeout_checker "
5353 - "cmd->retrycount_for_ocr %d, "
5354 - "cmd index %d , cmd address %p ",
5355 - cmd->retry_count_for_ocr+1, cmd->index, (void *)cmd));
5356 -
5357 6686 if (instance->disable_online_ctrl_reset == 1) {
5358 - con_log(CL_ANN1, (CE_NOTE, "mrsas: "
5359 - "OCR is not supported by the Firmware "
5360 - "Failing all the queued packets \n"));
6687 + cmn_err(CE_WARN, "mr_sas %d: %s(): OCR is NOT "
6688 + "supported by Firmware, KILL adapter!!!",
6689 + instance->instance, __func__);
5361 6690
5362 - (void) mrsas_kill_adapter(instance);
6691 + if (instance->tbolt)
6692 + mrsas_tbolt_kill_adapter(instance);
6693 + else
6694 + (void) mrsas_kill_adapter(instance);
6695 +
5363 6696 return;
5364 6697 } else {
5365 - if (cmd->retry_count_for_ocr <= IO_RETRY_COUNT) {
6698 + if (cmd->retry_count_for_ocr <= IO_RETRY_COUNT) {
5366 6699 if (instance->adapterresetinprogress == 0) {
5367 - con_log(CL_ANN1, (CE_NOTE, "mrsas: "
5368 - "OCR is supported by FW "
5369 - "triggering mrsas_reset_ppc"));
5370 - (void) mrsas_reset_ppc(instance);
6700 + if (instance->tbolt) {
6701 + (void) mrsas_tbolt_reset_ppc(
6702 + instance);
6703 + } else {
6704 + (void) mrsas_reset_ppc(
6705 + instance);
6706 + }
5371 6707 }
5372 6708 } else {
5373 - con_log(CL_ANN1, (CE_NOTE,
5374 - "io_timeout_checker:"
5375 - " cmdindex: %d,cmd address: %p "
6709 + cmn_err(CE_WARN,
6710 + "io_timeout_checker: "
6711 + "cmd %p cmd->index %d "
5376 6712 "timed out even after 3 resets: "
5377 - "so kill adapter", cmd->index,
5378 - (void *)cmd));
5379 - (void) mrsas_kill_adapter(instance);
6713 + "so KILL adapter", (void *)cmd, cmd->index);
6714 +
6715 + mrsas_print_cmd_details(instance, cmd, 0xDD);
6716 +
6717 + if (instance->tbolt)
6718 + mrsas_tbolt_kill_adapter(instance);
6719 + else
6720 + (void) mrsas_kill_adapter(instance);
5380 6721 return;
5381 6722 }
5382 6723 }
5383 6724 }
5384 -
5385 -
5386 - con_log(CL_ANN1, (CE_NOTE, "mrsas: "
6725 + con_log(CL_ANN, (CE_NOTE, "mrsas: "
5387 6726 "schedule next timeout check: "
5388 6727 "do timeout \n"));
5389 6728 instance->timeout_id =
5390 6729 timeout(io_timeout_checker, (void *)instance,
5391 6730 drv_usectohz(MRSAS_1_SECOND));
5392 6731 }
5393 -static int
6732 +
6733 +static uint32_t
5394 6734 read_fw_status_reg_ppc(struct mrsas_instance *instance)
5395 6735 {
5396 - return ((int)RD_OB_SCRATCH_PAD_0(instance));
6736 + return ((uint32_t)RD_OB_SCRATCH_PAD_0(instance));
5397 6737 }
5398 6738
5399 6739 static void
5400 6740 issue_cmd_ppc(struct mrsas_cmd *cmd, struct mrsas_instance *instance)
5401 6741 {
5402 6742 struct scsi_pkt *pkt;
5403 6743 atomic_add_16(&instance->fw_outstanding, 1);
5404 6744
5405 6745 pkt = cmd->pkt;
5406 6746 if (pkt) {
5407 - con_log(CL_ANN1, (CE_CONT, "%llx : issue_cmd_ppc:"
6747 + con_log(CL_DLEVEL1, (CE_NOTE, "%llx : issue_cmd_ppc:"
5408 6748 "ISSUED CMD TO FW : called : cmd:"
5409 6749 ": %p instance : %p pkt : %p pkt_time : %x\n",
5410 6750 gethrtime(), (void *)cmd, (void *)instance,
5411 6751 (void *)pkt, cmd->drv_pkt_time));
5412 6752 if (instance->adapterresetinprogress) {
5413 6753 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
5414 6754 con_log(CL_ANN1, (CE_NOTE, "Reset the scsi_pkt timer"));
5415 6755 } else {
5416 6756 push_pending_mfi_pkt(instance, cmd);
5417 6757 }
5418 6758
5419 6759 } else {
5420 - con_log(CL_ANN1, (CE_CONT, "%llx : issue_cmd_ppc:"
6760 + con_log(CL_DLEVEL1, (CE_NOTE, "%llx : issue_cmd_ppc:"
5421 6761 "ISSUED CMD TO FW : called : cmd : %p, instance: %p"
5422 6762 "(NO PKT)\n", gethrtime(), (void *)cmd, (void *)instance));
5423 6763 }
6764 +
6765 + mutex_enter(&instance->reg_write_mtx);
5424 6766 /* Issue the command to the FW */
5425 6767 WR_IB_QPORT((cmd->frame_phys_addr) |
5426 6768 (((cmd->frame_count - 1) << 1) | 1), instance);
6769 + mutex_exit(&instance->reg_write_mtx);
6770 +
5427 6771 }
5428 6772
5429 6773 /*
5430 6774 * issue_cmd_in_sync_mode
5431 6775 */
5432 6776 static int
5433 6777 issue_cmd_in_sync_mode_ppc(struct mrsas_instance *instance,
5434 6778 struct mrsas_cmd *cmd)
5435 6779 {
5436 6780 int i;
5437 6781 uint32_t msecs = MFI_POLL_TIMEOUT_SECS * (10 * MILLISEC);
5438 6782 struct mrsas_header *hdr = &cmd->frame->hdr;
5439 6783
5440 6784 con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_sync_mode_ppc: called"));
5441 6785
5442 6786 if (instance->adapterresetinprogress) {
5443 6787 cmd->drv_pkt_time = ddi_get16(
5444 6788 cmd->frame_dma_obj.acc_handle, &hdr->timeout);
5445 6789 if (cmd->drv_pkt_time < debug_timeout_g)
5446 6790 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
6791 +
5447 6792 con_log(CL_ANN1, (CE_NOTE, "sync_mode_ppc: "
5448 6793 "issue and return in reset case\n"));
5449 6794 WR_IB_QPORT((cmd->frame_phys_addr) |
5450 6795 (((cmd->frame_count - 1) << 1) | 1), instance);
6796 +
5451 6797 return (DDI_SUCCESS);
5452 6798 } else {
5453 6799 con_log(CL_ANN1, (CE_NOTE, "sync_mode_ppc: pushing the pkt\n"));
5454 6800 push_pending_mfi_pkt(instance, cmd);
5455 6801 }
5456 6802
5457 6803 cmd->cmd_status = ENODATA;
5458 6804
6805 + mutex_enter(&instance->reg_write_mtx);
6806 + /* Issue the command to the FW */
5459 6807 WR_IB_QPORT((cmd->frame_phys_addr) |
5460 6808 (((cmd->frame_count - 1) << 1) | 1), instance);
6809 + mutex_exit(&instance->reg_write_mtx);
5461 6810
5462 6811 mutex_enter(&instance->int_cmd_mtx);
5463 -
5464 6812 for (i = 0; i < msecs && (cmd->cmd_status == ENODATA); i++) {
5465 6813 cv_wait(&instance->int_cmd_cv, &instance->int_cmd_mtx);
5466 6814 }
5467 -
5468 6815 mutex_exit(&instance->int_cmd_mtx);
5469 6816
5470 6817 con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_sync_mode_ppc: done"));
5471 6818
5472 6819 if (i < (msecs -1)) {
5473 6820 return (DDI_SUCCESS);
5474 6821 } else {
5475 6822 return (DDI_FAILURE);
5476 6823 }
5477 6824 }
5478 6825
5479 6826 /*
5480 6827 * issue_cmd_in_poll_mode
5481 6828 */
5482 6829 static int
5483 6830 issue_cmd_in_poll_mode_ppc(struct mrsas_instance *instance,
5484 6831 struct mrsas_cmd *cmd)
5485 6832 {
5486 6833 int i;
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9 lines elided |
↑ open up ↑ |
5487 6834 uint16_t flags;
5488 6835 uint32_t msecs = MFI_POLL_TIMEOUT_SECS * MILLISEC;
5489 6836 struct mrsas_header *frame_hdr;
5490 6837
5491 6838 con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_poll_mode_ppc: called"));
5492 6839
5493 6840 frame_hdr = (struct mrsas_header *)cmd->frame;
5494 6841 ddi_put8(cmd->frame_dma_obj.acc_handle, &frame_hdr->cmd_status,
5495 6842 MFI_CMD_STATUS_POLL_MODE);
5496 6843 flags = ddi_get16(cmd->frame_dma_obj.acc_handle, &frame_hdr->flags);
5497 - flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE;
6844 + flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE;
5498 6845
5499 6846 ddi_put16(cmd->frame_dma_obj.acc_handle, &frame_hdr->flags, flags);
5500 6847
5501 6848 /* issue the frame using inbound queue port */
5502 6849 WR_IB_QPORT((cmd->frame_phys_addr) |
5503 6850 (((cmd->frame_count - 1) << 1) | 1), instance);
5504 6851
5505 6852 /* wait for cmd_status to change from 0xFF */
5506 6853 for (i = 0; i < msecs && (
5507 6854 ddi_get8(cmd->frame_dma_obj.acc_handle, &frame_hdr->cmd_status)
5508 6855 == MFI_CMD_STATUS_POLL_MODE); i++) {
5509 6856 drv_usecwait(MILLISEC); /* wait for 1000 usecs */
5510 6857 }
5511 6858
5512 6859 if (ddi_get8(cmd->frame_dma_obj.acc_handle, &frame_hdr->cmd_status)
5513 6860 == MFI_CMD_STATUS_POLL_MODE) {
5514 - con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_poll_mode: "
6861 + con_log(CL_ANN, (CE_NOTE, "issue_cmd_in_poll_mode: "
5515 6862 "cmd polling timed out"));
5516 6863 return (DDI_FAILURE);
5517 6864 }
5518 6865
5519 6866 return (DDI_SUCCESS);
5520 6867 }
5521 6868
5522 6869 static void
5523 6870 enable_intr_ppc(struct mrsas_instance *instance)
5524 6871 {
5525 6872 uint32_t mask;
5526 6873
5527 6874 con_log(CL_ANN1, (CE_NOTE, "enable_intr_ppc: called"));
5528 6875
5529 6876 /* WR_OB_DOORBELL_CLEAR(0xFFFFFFFF, instance); */
5530 6877 WR_OB_DOORBELL_CLEAR(OB_DOORBELL_CLEAR_MASK, instance);
5531 6878
5532 6879 /* WR_OB_INTR_MASK(~0x80000000, instance); */
5533 6880 WR_OB_INTR_MASK(~(MFI_REPLY_2108_MESSAGE_INTR_MASK), instance);
5534 6881
5535 6882 /* dummy read to force PCI flush */
5536 6883 mask = RD_OB_INTR_MASK(instance);
5537 6884
5538 6885 con_log(CL_ANN1, (CE_NOTE, "enable_intr_ppc: "
5539 6886 "outbound_intr_mask = 0x%x", mask));
5540 6887 }
5541 6888
5542 6889 static void
5543 6890 disable_intr_ppc(struct mrsas_instance *instance)
5544 6891 {
5545 6892 uint32_t mask;
5546 6893
5547 6894 con_log(CL_ANN1, (CE_NOTE, "disable_intr_ppc: called"));
5548 6895
5549 6896 con_log(CL_ANN1, (CE_NOTE, "disable_intr_ppc: before : "
5550 6897 "outbound_intr_mask = 0x%x", RD_OB_INTR_MASK(instance)));
5551 6898
5552 6899 /* WR_OB_INTR_MASK(0xFFFFFFFF, instance); */
5553 6900 WR_OB_INTR_MASK(OB_INTR_MASK, instance);
5554 6901
5555 6902 con_log(CL_ANN1, (CE_NOTE, "disable_intr_ppc: after : "
5556 6903 "outbound_intr_mask = 0x%x", RD_OB_INTR_MASK(instance)));
5557 6904
5558 6905 /* dummy read to force PCI flush */
5559 6906 mask = RD_OB_INTR_MASK(instance);
5560 6907 #ifdef lint
5561 6908 mask = mask;
5562 6909 #endif
5563 6910 }
5564 6911
5565 6912 static int
5566 6913 intr_ack_ppc(struct mrsas_instance *instance)
5567 6914 {
5568 6915 uint32_t status;
5569 6916 int ret = DDI_INTR_CLAIMED;
5570 6917
5571 6918 con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: called"));
5572 6919
5573 6920 /* check if it is our interrupt */
5574 6921 status = RD_OB_INTR_STATUS(instance);
5575 6922
5576 6923 con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: status = 0x%x", status));
5577 6924
5578 6925 if (!(status & MFI_REPLY_2108_MESSAGE_INTR)) {
5579 6926 ret = DDI_INTR_UNCLAIMED;
5580 6927 }
5581 6928
5582 6929 if (mrsas_check_acc_handle(instance->regmap_handle) != DDI_SUCCESS) {
5583 6930 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
5584 6931 ret = DDI_INTR_UNCLAIMED;
5585 6932 }
5586 6933
5587 6934 if (ret == DDI_INTR_UNCLAIMED) {
5588 6935 return (ret);
5589 6936 }
5590 6937 /* clear the interrupt by writing back the same value */
5591 6938 WR_OB_DOORBELL_CLEAR(status, instance);
5592 6939
5593 6940 /* dummy READ */
5594 6941 status = RD_OB_INTR_STATUS(instance);
5595 6942
5596 6943 con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: interrupt cleared"));
5597 6944
5598 6945 return (ret);
5599 6946 }
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5600 6947
5601 6948 /*
5602 6949 * Marks HBA as bad. This will be called either when an
5603 6950 * IO packet times out even after 3 FW resets
5604 6951 * or FW is found to be fault even after 3 continuous resets.
5605 6952 */
5606 6953
5607 6954 static int
5608 6955 mrsas_kill_adapter(struct mrsas_instance *instance)
5609 6956 {
5610 - if (instance->deadadapter == 1)
5611 - return (DDI_FAILURE);
6957 + if (instance->deadadapter == 1)
6958 + return (DDI_FAILURE);
5612 6959
5613 - con_log(CL_ANN1, (CE_NOTE, "mrsas_kill_adapter: "
5614 - "Writing to doorbell with MFI_STOP_ADP "));
5615 - mutex_enter(&instance->ocr_flags_mtx);
5616 - instance->deadadapter = 1;
5617 - mutex_exit(&instance->ocr_flags_mtx);
5618 - instance->func_ptr->disable_intr(instance);
5619 - WR_IB_DOORBELL(MFI_STOP_ADP, instance);
5620 - (void) mrsas_complete_pending_cmds(instance);
5621 - return (DDI_SUCCESS);
6960 + con_log(CL_ANN1, (CE_NOTE, "mrsas_kill_adapter: "
6961 + "Writing to doorbell with MFI_STOP_ADP "));
6962 + mutex_enter(&instance->ocr_flags_mtx);
6963 + instance->deadadapter = 1;
6964 + mutex_exit(&instance->ocr_flags_mtx);
6965 + instance->func_ptr->disable_intr(instance);
6966 + WR_IB_DOORBELL(MFI_STOP_ADP, instance);
6967 + (void) mrsas_complete_pending_cmds(instance);
6968 + return (DDI_SUCCESS);
5622 6969 }
5623 6970
5624 6971
5625 6972 static int
5626 6973 mrsas_reset_ppc(struct mrsas_instance *instance)
5627 6974 {
5628 6975 uint32_t status;
5629 6976 uint32_t retry = 0;
5630 6977 uint32_t cur_abs_reg_val;
5631 6978 uint32_t fw_state;
5632 6979
6980 + con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
6981 +
5633 6982 if (instance->deadadapter == 1) {
5634 - con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
5635 - "no more resets as HBA has been marked dead "));
6983 + cmn_err(CE_WARN, "mrsas_reset_ppc: "
6984 + "no more resets as HBA has been marked dead ");
5636 6985 return (DDI_FAILURE);
5637 6986 }
5638 6987 mutex_enter(&instance->ocr_flags_mtx);
5639 6988 instance->adapterresetinprogress = 1;
5640 6989 mutex_exit(&instance->ocr_flags_mtx);
5641 6990 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: adpterresetinprogress "
5642 6991 "flag set, time %llx", gethrtime()));
6992 +
5643 6993 instance->func_ptr->disable_intr(instance);
5644 6994 retry_reset:
5645 6995 WR_IB_WRITE_SEQ(0, instance);
5646 6996 WR_IB_WRITE_SEQ(4, instance);
5647 6997 WR_IB_WRITE_SEQ(0xb, instance);
5648 6998 WR_IB_WRITE_SEQ(2, instance);
5649 6999 WR_IB_WRITE_SEQ(7, instance);
5650 7000 WR_IB_WRITE_SEQ(0xd, instance);
5651 7001 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: magic number written "
5652 7002 "to write sequence register\n"));
5653 7003 delay(100 * drv_usectohz(MILLISEC));
5654 7004 status = RD_OB_DRWE(instance);
5655 7005
5656 7006 while (!(status & DIAG_WRITE_ENABLE)) {
5657 7007 delay(100 * drv_usectohz(MILLISEC));
5658 7008 status = RD_OB_DRWE(instance);
5659 7009 if (retry++ == 100) {
5660 - con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: DRWE bit "
5661 - "check retry count %d\n", retry));
7010 + cmn_err(CE_WARN, "mrsas_reset_ppc: DRWE bit "
7011 + "check retry count %d", retry);
5662 7012 return (DDI_FAILURE);
5663 7013 }
5664 7014 }
5665 7015 WR_IB_DRWE(status | DIAG_RESET_ADAPTER, instance);
5666 7016 delay(100 * drv_usectohz(MILLISEC));
5667 7017 status = RD_OB_DRWE(instance);
5668 7018 while (status & DIAG_RESET_ADAPTER) {
5669 7019 delay(100 * drv_usectohz(MILLISEC));
5670 7020 status = RD_OB_DRWE(instance);
5671 7021 if (retry++ == 100) {
7022 + cmn_err(CE_WARN, "mrsas_reset_ppc: "
7023 + "RESET FAILED. KILL adapter called.");
7024 +
5672 7025 (void) mrsas_kill_adapter(instance);
5673 7026 return (DDI_FAILURE);
5674 7027 }
5675 7028 }
5676 - con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: Adapter reset complete"));
7029 + con_log(CL_ANN, (CE_NOTE, "mrsas_reset_ppc: Adapter reset complete"));
5677 7030 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
5678 7031 "Calling mfi_state_transition_to_ready"));
5679 7032
5680 7033 /* Mark HBA as bad, if FW is fault after 3 continuous resets */
5681 7034 if (mfi_state_transition_to_ready(instance) ||
5682 7035 debug_fw_faults_after_ocr_g == 1) {
5683 7036 cur_abs_reg_val =
5684 7037 instance->func_ptr->read_fw_status_reg(instance);
5685 7038 fw_state = cur_abs_reg_val & MFI_STATE_MASK;
5686 7039
5687 7040 #ifdef OCRDEBUG
5688 7041 con_log(CL_ANN1, (CE_NOTE,
5689 7042 "mrsas_reset_ppc :before fake: FW is not ready "
5690 7043 "FW state = 0x%x", fw_state));
5691 7044 if (debug_fw_faults_after_ocr_g == 1)
5692 7045 fw_state = MFI_STATE_FAULT;
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5693 7046 #endif
5694 7047
5695 7048 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc : FW is not ready "
5696 7049 "FW state = 0x%x", fw_state));
5697 7050
5698 7051 if (fw_state == MFI_STATE_FAULT) {
5699 7052 /* increment the count */
5700 7053 instance->fw_fault_count_after_ocr++;
5701 7054 if (instance->fw_fault_count_after_ocr
5702 7055 < MAX_FW_RESET_COUNT) {
5703 - con_log(CL_ANN1, (CE_WARN, "mrsas_reset_ppc: "
5704 - "FW is in fault after OCR count %d ",
5705 - instance->fw_fault_count_after_ocr));
7056 + cmn_err(CE_WARN, "mrsas_reset_ppc: "
7057 + "FW is in fault after OCR count %d "
7058 + "Retry Reset",
7059 + instance->fw_fault_count_after_ocr);
5706 7060 goto retry_reset;
5707 7061
5708 7062 } else {
5709 - con_log(CL_ANN1, (CE_WARN, "mrsas_reset_ppc: "
5710 - "Max Reset Count exceeded "
5711 - "Mark HBA as bad"));
7063 + cmn_err(CE_WARN, "mrsas_reset_ppc: "
7064 + "Max Reset Count exceeded >%d"
7065 + "Mark HBA as bad, KILL adapter",
7066 + MAX_FW_RESET_COUNT);
7067 +
5712 7068 (void) mrsas_kill_adapter(instance);
5713 7069 return (DDI_FAILURE);
5714 7070 }
5715 7071 }
5716 7072 }
5717 7073 /* reset the counter as FW is up after OCR */
5718 7074 instance->fw_fault_count_after_ocr = 0;
5719 7075
5720 7076
5721 7077 ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
5722 7078 instance->producer, 0);
5723 7079
5724 7080 ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
5725 7081 instance->consumer, 0);
5726 7082
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5727 7083 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
5728 7084 " after resetting produconsumer chck indexs:"
5729 7085 "producer %x consumer %x", *instance->producer,
5730 7086 *instance->consumer));
5731 7087
5732 7088 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
5733 7089 "Calling mrsas_issue_init_mfi"));
5734 7090 (void) mrsas_issue_init_mfi(instance);
5735 7091 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
5736 7092 "mrsas_issue_init_mfi Done"));
7093 +
5737 7094 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
5738 7095 "Calling mrsas_print_pending_cmd\n"));
5739 7096 (void) mrsas_print_pending_cmds(instance);
5740 7097 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
5741 7098 "mrsas_print_pending_cmd done\n"));
7099 +
5742 7100 instance->func_ptr->enable_intr(instance);
5743 7101 instance->fw_outstanding = 0;
7102 +
5744 7103 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
5745 7104 "Calling mrsas_issue_pending_cmds"));
5746 7105 (void) mrsas_issue_pending_cmds(instance);
5747 7106 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
5748 - "Complete"));
7107 + "issue_pending_cmds done.\n"));
7108 +
5749 7109 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
5750 7110 "Calling aen registration"));
7111 +
7112 +
7113 + instance->aen_cmd->retry_count_for_ocr = 0;
7114 + instance->aen_cmd->drv_pkt_time = 0;
7115 +
5751 7116 instance->func_ptr->issue_cmd(instance->aen_cmd, instance);
5752 7117 con_log(CL_ANN1, (CE_NOTE, "Unsetting adpresetinprogress flag.\n"));
7118 +
5753 7119 mutex_enter(&instance->ocr_flags_mtx);
5754 7120 instance->adapterresetinprogress = 0;
5755 7121 mutex_exit(&instance->ocr_flags_mtx);
5756 7122 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
5757 7123 "adpterresetinprogress flag unset"));
7124 +
5758 7125 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc done\n"));
5759 7126 return (DDI_SUCCESS);
5760 7127 }
5761 -static int
5762 -mrsas_common_check(struct mrsas_instance *instance,
5763 - struct mrsas_cmd *cmd)
7128 +
7129 +/*
7130 + * FMA functions.
7131 + */
7132 +int
7133 +mrsas_common_check(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
5764 7134 {
5765 7135 int ret = DDI_SUCCESS;
5766 7136
5767 - if (mrsas_check_dma_handle(cmd->frame_dma_obj.dma_handle) !=
7137 + if (cmd != NULL &&
7138 + mrsas_check_dma_handle(cmd->frame_dma_obj.dma_handle) !=
5768 7139 DDI_SUCCESS) {
5769 7140 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
5770 7141 if (cmd->pkt != NULL) {
5771 7142 cmd->pkt->pkt_reason = CMD_TRAN_ERR;
5772 7143 cmd->pkt->pkt_statistics = 0;
5773 7144 }
5774 7145 ret = DDI_FAILURE;
5775 7146 }
5776 7147 if (mrsas_check_dma_handle(instance->mfi_internal_dma_obj.dma_handle)
5777 7148 != DDI_SUCCESS) {
5778 7149 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
5779 - if (cmd->pkt != NULL) {
7150 + if (cmd != NULL && cmd->pkt != NULL) {
5780 7151 cmd->pkt->pkt_reason = CMD_TRAN_ERR;
5781 7152 cmd->pkt->pkt_statistics = 0;
5782 7153 }
5783 7154 ret = DDI_FAILURE;
5784 7155 }
5785 7156 if (mrsas_check_dma_handle(instance->mfi_evt_detail_obj.dma_handle) !=
5786 7157 DDI_SUCCESS) {
5787 7158 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
5788 - if (cmd->pkt != NULL) {
7159 + if (cmd != NULL && cmd->pkt != NULL) {
5789 7160 cmd->pkt->pkt_reason = CMD_TRAN_ERR;
5790 7161 cmd->pkt->pkt_statistics = 0;
5791 7162 }
5792 7163 ret = DDI_FAILURE;
5793 7164 }
5794 7165 if (mrsas_check_acc_handle(instance->regmap_handle) != DDI_SUCCESS) {
5795 7166 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
5796 7167
5797 7168 ddi_fm_acc_err_clear(instance->regmap_handle, DDI_FME_VER0);
5798 7169
5799 - if (cmd->pkt != NULL) {
7170 + if (cmd != NULL && cmd->pkt != NULL) {
5800 7171 cmd->pkt->pkt_reason = CMD_TRAN_ERR;
5801 7172 cmd->pkt->pkt_statistics = 0;
5802 7173 }
5803 7174 ret = DDI_FAILURE;
5804 7175 }
5805 7176
5806 7177 return (ret);
5807 7178 }
5808 7179
5809 7180 /*ARGSUSED*/
5810 7181 static int
5811 7182 mrsas_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data)
5812 7183 {
5813 7184 /*
5814 7185 * as the driver can always deal with an error in any dma or
5815 7186 * access handle, we can just return the fme_status value.
5816 7187 */
5817 7188 pci_ereport_post(dip, err, NULL);
5818 7189 return (err->fme_status);
5819 7190 }
5820 7191
5821 7192 static void
5822 7193 mrsas_fm_init(struct mrsas_instance *instance)
5823 7194 {
5824 7195 /* Need to change iblock to priority for new MSI intr */
5825 7196 ddi_iblock_cookie_t fm_ibc;
5826 7197
5827 7198 /* Only register with IO Fault Services if we have some capability */
5828 7199 if (instance->fm_capabilities) {
5829 7200 /* Adjust access and dma attributes for FMA */
5830 7201 endian_attr.devacc_attr_access = DDI_FLAGERR_ACC;
5831 7202 mrsas_generic_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;
5832 7203
5833 7204 /*
5834 7205 * Register capabilities with IO Fault Services.
5835 7206 * fm_capabilities will be updated to indicate
5836 7207 * capabilities actually supported (not requested.)
5837 7208 */
5838 7209
5839 7210 ddi_fm_init(instance->dip, &instance->fm_capabilities, &fm_ibc);
5840 7211
5841 7212 /*
5842 7213 * Initialize pci ereport capabilities if ereport
5843 7214 * capable (should always be.)
5844 7215 */
5845 7216
5846 7217 if (DDI_FM_EREPORT_CAP(instance->fm_capabilities) ||
5847 7218 DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
5848 7219 pci_ereport_setup(instance->dip);
5849 7220 }
5850 7221
5851 7222 /*
5852 7223 * Register error callback if error callback capable.
5853 7224 */
5854 7225 if (DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
5855 7226 ddi_fm_handler_register(instance->dip,
5856 7227 mrsas_fm_error_cb, (void*) instance);
5857 7228 }
5858 7229 } else {
5859 7230 endian_attr.devacc_attr_access = DDI_DEFAULT_ACC;
5860 7231 mrsas_generic_dma_attr.dma_attr_flags = 0;
5861 7232 }
5862 7233 }
5863 7234
5864 7235 static void
5865 7236 mrsas_fm_fini(struct mrsas_instance *instance)
5866 7237 {
5867 7238 /* Only unregister FMA capabilities if registered */
5868 7239 if (instance->fm_capabilities) {
5869 7240 /*
5870 7241 * Un-register error callback if error callback capable.
5871 7242 */
5872 7243 if (DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
5873 7244 ddi_fm_handler_unregister(instance->dip);
5874 7245 }
5875 7246
5876 7247 /*
5877 7248 * Release any resources allocated by pci_ereport_setup()
5878 7249 */
5879 7250 if (DDI_FM_EREPORT_CAP(instance->fm_capabilities) ||
5880 7251 DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
5881 7252 pci_ereport_teardown(instance->dip);
5882 7253 }
5883 7254
5884 7255 /* Unregister from IO Fault Services */
5885 7256 ddi_fm_fini(instance->dip);
5886 7257
5887 7258 /* Adjust access and dma attributes for FMA */
5888 7259 endian_attr.devacc_attr_access = DDI_DEFAULT_ACC;
5889 7260 mrsas_generic_dma_attr.dma_attr_flags = 0;
5890 7261 }
5891 7262 }
5892 7263
5893 7264 int
5894 7265 mrsas_check_acc_handle(ddi_acc_handle_t handle)
5895 7266 {
5896 7267 ddi_fm_error_t de;
5897 7268
5898 7269 if (handle == NULL) {
5899 7270 return (DDI_FAILURE);
5900 7271 }
5901 7272
5902 7273 ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION);
5903 7274
5904 7275 return (de.fme_status);
5905 7276 }
5906 7277
5907 7278 int
5908 7279 mrsas_check_dma_handle(ddi_dma_handle_t handle)
5909 7280 {
5910 7281 ddi_fm_error_t de;
5911 7282
5912 7283 if (handle == NULL) {
5913 7284 return (DDI_FAILURE);
5914 7285 }
5915 7286
5916 7287 ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION);
5917 7288
5918 7289 return (de.fme_status);
5919 7290 }
5920 7291
5921 7292 void
5922 7293 mrsas_fm_ereport(struct mrsas_instance *instance, char *detail)
5923 7294 {
5924 7295 uint64_t ena;
5925 7296 char buf[FM_MAX_CLASS];
5926 7297
5927 7298 (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", DDI_FM_DEVICE, detail);
5928 7299 ena = fm_ena_generate(0, FM_ENA_FMT1);
5929 7300 if (DDI_FM_EREPORT_CAP(instance->fm_capabilities)) {
5930 7301 ddi_fm_ereport_post(instance->dip, buf, ena, DDI_NOSLEEP,
5931 7302 FM_VERSION, DATA_TYPE_UINT8, FM_EREPORT_VERSION, NULL);
5932 7303 }
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5933 7304 }
5934 7305
5935 7306 static int
5936 7307 mrsas_add_intrs(struct mrsas_instance *instance, int intr_type)
5937 7308 {
5938 7309
5939 7310 dev_info_t *dip = instance->dip;
5940 7311 int avail, actual, count;
5941 7312 int i, flag, ret;
5942 7313
5943 - con_log(CL_DLEVEL1, (CE_WARN, "mrsas_add_intrs: intr_type = %x",
7314 + con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: intr_type = %x",
5944 7315 intr_type));
5945 7316
5946 7317 /* Get number of interrupts */
5947 7318 ret = ddi_intr_get_nintrs(dip, intr_type, &count);
5948 7319 if ((ret != DDI_SUCCESS) || (count == 0)) {
5949 7320 con_log(CL_ANN, (CE_WARN, "ddi_intr_get_nintrs() failed:"
5950 7321 "ret %d count %d", ret, count));
5951 7322
5952 7323 return (DDI_FAILURE);
5953 7324 }
5954 7325
5955 - con_log(CL_DLEVEL1, (CE_WARN, "mrsas_add_intrs: count = %d ", count));
7326 + con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: count = %d ", count));
5956 7327
5957 7328 /* Get number of available interrupts */
5958 7329 ret = ddi_intr_get_navail(dip, intr_type, &avail);
5959 7330 if ((ret != DDI_SUCCESS) || (avail == 0)) {
5960 7331 con_log(CL_ANN, (CE_WARN, "ddi_intr_get_navail() failed:"
5961 7332 "ret %d avail %d", ret, avail));
5962 7333
5963 7334 return (DDI_FAILURE);
5964 7335 }
5965 - con_log(CL_DLEVEL1, (CE_WARN, "mrsas_add_intrs: avail = %d ", avail));
7336 + con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: avail = %d ", avail));
5966 7337
5967 7338 /* Only one interrupt routine. So limit the count to 1 */
5968 7339 if (count > 1) {
5969 7340 count = 1;
5970 7341 }
5971 7342
5972 7343 /*
5973 7344 * Allocate an array of interrupt handlers. Currently we support
5974 7345 * only one interrupt. The framework can be extended later.
5975 7346 */
5976 - instance->intr_size = count * sizeof (ddi_intr_handle_t);
5977 - instance->intr_htable = kmem_zalloc(instance->intr_size, KM_SLEEP);
7347 + instance->intr_htable_size = count * sizeof (ddi_intr_handle_t);
7348 + instance->intr_htable = kmem_zalloc(instance->intr_htable_size,
7349 + KM_SLEEP);
5978 7350 ASSERT(instance->intr_htable);
5979 7351
5980 - flag = ((intr_type == DDI_INTR_TYPE_MSI) || (intr_type ==
5981 - DDI_INTR_TYPE_MSIX)) ? DDI_INTR_ALLOC_STRICT:DDI_INTR_ALLOC_NORMAL;
7352 + flag = ((intr_type == DDI_INTR_TYPE_MSI) ||
7353 + (intr_type == DDI_INTR_TYPE_MSIX)) ?
7354 + DDI_INTR_ALLOC_STRICT : DDI_INTR_ALLOC_NORMAL;
5982 7355
5983 7356 /* Allocate interrupt */
5984 7357 ret = ddi_intr_alloc(dip, instance->intr_htable, intr_type, 0,
5985 7358 count, &actual, flag);
5986 7359
5987 7360 if ((ret != DDI_SUCCESS) || (actual == 0)) {
5988 7361 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
5989 7362 "avail = %d", avail));
5990 - kmem_free(instance->intr_htable, instance->intr_size);
5991 - return (DDI_FAILURE);
7363 + goto mrsas_free_htable;
5992 7364 }
7365 +
5993 7366 if (actual < count) {
5994 7367 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
5995 7368 "Requested = %d Received = %d", count, actual));
5996 7369 }
5997 7370 instance->intr_cnt = actual;
5998 7371
5999 7372 /*
6000 7373 * Get the priority of the interrupt allocated.
6001 7374 */
6002 7375 if ((ret = ddi_intr_get_pri(instance->intr_htable[0],
6003 7376 &instance->intr_pri)) != DDI_SUCCESS) {
6004 7377 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
6005 7378 "get priority call failed"));
6006 -
6007 - for (i = 0; i < actual; i++) {
6008 - (void) ddi_intr_free(instance->intr_htable[i]);
6009 - }
6010 - kmem_free(instance->intr_htable, instance->intr_size);
6011 - return (DDI_FAILURE);
7379 + goto mrsas_free_handles;
6012 7380 }
6013 7381
6014 7382 /*
6015 7383 * Test for high level mutex. we don't support them.
6016 7384 */
6017 7385 if (instance->intr_pri >= ddi_intr_get_hilevel_pri()) {
6018 7386 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
6019 7387 "High level interrupts not supported."));
6020 -
6021 - for (i = 0; i < actual; i++) {
6022 - (void) ddi_intr_free(instance->intr_htable[i]);
6023 - }
6024 - kmem_free(instance->intr_htable, instance->intr_size);
6025 - return (DDI_FAILURE);
7388 + goto mrsas_free_handles;
6026 7389 }
6027 7390
6028 7391 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: intr_pri = 0x%x ",
6029 7392 instance->intr_pri));
6030 7393
6031 7394 /* Call ddi_intr_add_handler() */
6032 7395 for (i = 0; i < actual; i++) {
6033 7396 ret = ddi_intr_add_handler(instance->intr_htable[i],
6034 7397 (ddi_intr_handler_t *)mrsas_isr, (caddr_t)instance,
6035 7398 (caddr_t)(uintptr_t)i);
6036 7399
6037 7400 if (ret != DDI_SUCCESS) {
6038 7401 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs:"
6039 7402 "failed %d", ret));
6040 -
6041 - for (i = 0; i < actual; i++) {
6042 - (void) ddi_intr_free(instance->intr_htable[i]);
6043 - }
6044 - kmem_free(instance->intr_htable, instance->intr_size);
6045 - return (DDI_FAILURE);
7403 + goto mrsas_free_handles;
6046 7404 }
6047 7405
6048 7406 }
6049 7407
6050 - con_log(CL_DLEVEL1, (CE_WARN, " ddi_intr_add_handler done"));
7408 + con_log(CL_DLEVEL1, (CE_NOTE, " ddi_intr_add_handler done"));
6051 7409
6052 7410 if ((ret = ddi_intr_get_cap(instance->intr_htable[0],
6053 7411 &instance->intr_cap)) != DDI_SUCCESS) {
6054 7412 con_log(CL_ANN, (CE_WARN, "ddi_intr_get_cap() failed %d",
6055 7413 ret));
6056 -
6057 - /* Free already allocated intr */
6058 - for (i = 0; i < actual; i++) {
6059 - (void) ddi_intr_remove_handler(
6060 - instance->intr_htable[i]);
6061 - (void) ddi_intr_free(instance->intr_htable[i]);
6062 - }
6063 - kmem_free(instance->intr_htable, instance->intr_size);
6064 - return (DDI_FAILURE);
7414 + goto mrsas_free_handlers;
6065 7415 }
6066 7416
6067 7417 if (instance->intr_cap & DDI_INTR_FLAG_BLOCK) {
6068 7418 con_log(CL_ANN, (CE_WARN, "Calling ddi_intr_block _enable"));
6069 7419
6070 7420 (void) ddi_intr_block_enable(instance->intr_htable,
6071 7421 instance->intr_cnt);
6072 7422 } else {
6073 7423 con_log(CL_ANN, (CE_NOTE, " calling ddi_intr_enable"));
6074 7424
6075 7425 for (i = 0; i < instance->intr_cnt; i++) {
6076 7426 (void) ddi_intr_enable(instance->intr_htable[i]);
6077 7427 con_log(CL_ANN, (CE_NOTE, "ddi intr enable returns "
6078 7428 "%d", i));
6079 7429 }
6080 7430 }
6081 7431
6082 7432 return (DDI_SUCCESS);
6083 7433
7434 +mrsas_free_handlers:
7435 + for (i = 0; i < actual; i++)
7436 + (void) ddi_intr_remove_handler(instance->intr_htable[i]);
7437 +
7438 +mrsas_free_handles:
7439 + for (i = 0; i < actual; i++)
7440 + (void) ddi_intr_free(instance->intr_htable[i]);
7441 +
7442 +mrsas_free_htable:
7443 + if (instance->intr_htable != NULL)
7444 + kmem_free(instance->intr_htable, instance->intr_htable_size);
7445 +
7446 + instance->intr_htable = NULL;
7447 + instance->intr_htable_size = 0;
7448 +
7449 + return (DDI_FAILURE);
7450 +
6084 7451 }
6085 7452
6086 7453
6087 7454 static void
6088 7455 mrsas_rem_intrs(struct mrsas_instance *instance)
6089 7456 {
6090 7457 int i;
6091 7458
6092 7459 con_log(CL_ANN, (CE_NOTE, "mrsas_rem_intrs called"));
6093 7460
6094 7461 /* Disable all interrupts first */
6095 7462 if (instance->intr_cap & DDI_INTR_FLAG_BLOCK) {
6096 7463 (void) ddi_intr_block_disable(instance->intr_htable,
6097 7464 instance->intr_cnt);
6098 7465 } else {
6099 7466 for (i = 0; i < instance->intr_cnt; i++) {
6100 7467 (void) ddi_intr_disable(instance->intr_htable[i]);
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7 lines elided |
↑ open up ↑ |
6101 7468 }
6102 7469 }
6103 7470
6104 7471 /* Remove all the handlers */
6105 7472
6106 7473 for (i = 0; i < instance->intr_cnt; i++) {
6107 7474 (void) ddi_intr_remove_handler(instance->intr_htable[i]);
6108 7475 (void) ddi_intr_free(instance->intr_htable[i]);
6109 7476 }
6110 7477
6111 - kmem_free(instance->intr_htable, instance->intr_size);
7478 + if (instance->intr_htable != NULL)
7479 + kmem_free(instance->intr_htable, instance->intr_htable_size);
7480 +
7481 + instance->intr_htable = NULL;
7482 + instance->intr_htable_size = 0;
7483 +
6112 7484 }
6113 7485
6114 7486 static int
6115 7487 mrsas_tran_bus_config(dev_info_t *parent, uint_t flags,
6116 7488 ddi_bus_config_op_t op, void *arg, dev_info_t **childp)
6117 7489 {
6118 7490 struct mrsas_instance *instance;
6119 7491 int config;
6120 - int rval;
7492 + int rval = NDI_SUCCESS;
6121 7493
6122 7494 char *ptr = NULL;
6123 7495 int tgt, lun;
6124 7496
6125 7497 con_log(CL_ANN1, (CE_NOTE, "Bus config called for op = %x", op));
6126 7498
6127 7499 if ((instance = ddi_get_soft_state(mrsas_state,
6128 7500 ddi_get_instance(parent))) == NULL) {
6129 7501 return (NDI_FAILURE);
6130 7502 }
6131 7503
6132 7504 /* Hold nexus during bus_config */
6133 7505 ndi_devi_enter(parent, &config);
6134 7506 switch (op) {
6135 7507 case BUS_CONFIG_ONE: {
6136 7508
6137 7509 /* parse wwid/target name out of name given */
6138 7510 if ((ptr = strchr((char *)arg, '@')) == NULL) {
6139 7511 rval = NDI_FAILURE;
6140 7512 break;
|
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10 lines elided |
↑ open up ↑ |
6141 7513 }
6142 7514 ptr++;
6143 7515
6144 7516 if (mrsas_parse_devname(arg, &tgt, &lun) != 0) {
6145 7517 rval = NDI_FAILURE;
6146 7518 break;
6147 7519 }
6148 7520
6149 7521 if (lun == 0) {
6150 7522 rval = mrsas_config_ld(instance, tgt, lun, childp);
7523 +#ifdef PDSUPPORT
7524 + } else if (instance->tbolt == 1 && lun != 0) {
7525 + rval = mrsas_tbolt_config_pd(instance,
7526 + tgt, lun, childp);
7527 +#endif
6151 7528 } else {
6152 7529 rval = NDI_FAILURE;
6153 7530 }
6154 7531
6155 7532 break;
6156 7533 }
6157 7534 case BUS_CONFIG_DRIVER:
6158 7535 case BUS_CONFIG_ALL: {
6159 7536
6160 7537 rval = mrsas_config_all_devices(instance);
6161 7538
6162 7539 rval = NDI_SUCCESS;
6163 7540 break;
6164 7541 }
6165 7542 }
6166 7543
6167 7544 if (rval == NDI_SUCCESS) {
6168 7545 rval = ndi_busop_bus_config(parent, flags, op, arg, childp, 0);
6169 7546
6170 7547 }
6171 7548 ndi_devi_exit(parent, config);
6172 7549
6173 7550 con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_bus_config: rval = %x",
6174 7551 rval));
6175 7552 return (rval);
6176 7553 }
6177 7554
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17 lines elided |
↑ open up ↑ |
6178 7555 static int
6179 7556 mrsas_config_all_devices(struct mrsas_instance *instance)
6180 7557 {
6181 7558 int rval, tgt;
6182 7559
6183 7560 for (tgt = 0; tgt < MRDRV_MAX_LD; tgt++) {
6184 7561 (void) mrsas_config_ld(instance, tgt, 0, NULL);
6185 7562
6186 7563 }
6187 7564
7565 +#ifdef PDSUPPORT
7566 + /* Config PD devices connected to the card */
7567 + if (instance->tbolt) {
7568 + for (tgt = 0; tgt < instance->mr_tbolt_pd_max; tgt++) {
7569 + (void) mrsas_tbolt_config_pd(instance, tgt, 1, NULL);
7570 + }
7571 + }
7572 +#endif
7573 +
6188 7574 rval = NDI_SUCCESS;
6189 7575 return (rval);
6190 7576 }
6191 7577
6192 7578 static int
6193 7579 mrsas_parse_devname(char *devnm, int *tgt, int *lun)
6194 7580 {
6195 7581 char devbuf[SCSI_MAXNAMELEN];
6196 7582 char *addr;
6197 7583 char *p, *tp, *lp;
6198 7584 long num;
6199 7585
6200 7586 /* Parse dev name and address */
6201 7587 (void) strcpy(devbuf, devnm);
6202 7588 addr = "";
6203 7589 for (p = devbuf; *p != '\0'; p++) {
6204 7590 if (*p == '@') {
6205 7591 addr = p + 1;
6206 7592 *p = '\0';
6207 7593 } else if (*p == ':') {
6208 7594 *p = '\0';
6209 7595 break;
6210 7596 }
6211 7597 }
6212 7598
6213 7599 /* Parse target and lun */
6214 7600 for (p = tp = addr, lp = NULL; *p != '\0'; p++) {
6215 7601 if (*p == ',') {
6216 7602 lp = p + 1;
6217 7603 *p = '\0';
6218 7604 break;
6219 7605 }
6220 7606 }
6221 7607 if (tgt && tp) {
6222 7608 if (ddi_strtol(tp, NULL, 0x10, &num)) {
6223 7609 return (DDI_FAILURE); /* Can declare this as constant */
6224 7610 }
6225 7611 *tgt = (int)num;
6226 7612 }
6227 7613 if (lun && lp) {
6228 7614 if (ddi_strtol(lp, NULL, 0x10, &num)) {
6229 7615 return (DDI_FAILURE);
6230 7616 }
6231 7617 *lun = (int)num;
6232 7618 }
6233 7619 return (DDI_SUCCESS); /* Success case */
|
↓ open down ↓ |
36 lines elided |
↑ open up ↑ |
6234 7620 }
6235 7621
6236 7622 static int
6237 7623 mrsas_config_ld(struct mrsas_instance *instance, uint16_t tgt,
6238 7624 uint8_t lun, dev_info_t **ldip)
6239 7625 {
6240 7626 struct scsi_device *sd;
6241 7627 dev_info_t *child;
6242 7628 int rval;
6243 7629
6244 - con_log(CL_ANN1, (CE_NOTE, "mrsas_config_ld: t = %d l = %d",
7630 + con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_config_ld: t = %d l = %d",
6245 7631 tgt, lun));
6246 7632
6247 7633 if ((child = mrsas_find_child(instance, tgt, lun)) != NULL) {
6248 7634 if (ldip) {
6249 7635 *ldip = child;
6250 7636 }
6251 - con_log(CL_ANN1, (CE_NOTE,
6252 - "mrsas_config_ld: Child = %p found t = %d l = %d",
6253 - (void *)child, tgt, lun));
7637 + if (instance->mr_ld_list[tgt].flag != MRDRV_TGT_VALID) {
7638 + rval = mrsas_service_evt(instance, tgt, 0,
7639 + MRSAS_EVT_UNCONFIG_TGT, NULL);
7640 + con_log(CL_ANN1, (CE_WARN,
7641 + "mr_sas: DELETING STALE ENTRY rval = %d "
7642 + "tgt id = %d ", rval, tgt));
7643 + return (NDI_FAILURE);
7644 + }
6254 7645 return (NDI_SUCCESS);
6255 7646 }
6256 7647
6257 7648 sd = kmem_zalloc(sizeof (struct scsi_device), KM_SLEEP);
6258 7649 sd->sd_address.a_hba_tran = instance->tran;
6259 7650 sd->sd_address.a_target = (uint16_t)tgt;
6260 7651 sd->sd_address.a_lun = (uint8_t)lun;
6261 7652
6262 7653 if (scsi_hba_probe(sd, NULL) == SCSIPROBE_EXISTS)
6263 7654 rval = mrsas_config_scsi_device(instance, sd, ldip);
6264 7655 else
6265 7656 rval = NDI_FAILURE;
6266 7657
6267 7658 /* sd_unprobe is blank now. Free buffer manually */
6268 7659 if (sd->sd_inq) {
6269 7660 kmem_free(sd->sd_inq, SUN_INQSIZE);
6270 7661 sd->sd_inq = (struct scsi_inquiry *)NULL;
6271 7662 }
6272 7663
6273 7664 kmem_free(sd, sizeof (struct scsi_device));
6274 - con_log(CL_ANN1, (CE_NOTE, "mrsas_config_ld: return rval = %d",
7665 + con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_config_ld: return rval = %d",
6275 7666 rval));
6276 7667 return (rval);
6277 7668 }
6278 7669
6279 -static int
7670 +int
6280 7671 mrsas_config_scsi_device(struct mrsas_instance *instance,
6281 7672 struct scsi_device *sd, dev_info_t **dipp)
6282 7673 {
6283 7674 char *nodename = NULL;
6284 7675 char **compatible = NULL;
6285 7676 int ncompatible = 0;
6286 7677 char *childname;
6287 7678 dev_info_t *ldip = NULL;
6288 7679 int tgt = sd->sd_address.a_target;
6289 7680 int lun = sd->sd_address.a_lun;
6290 7681 int dtype = sd->sd_inq->inq_dtype & DTYPE_MASK;
6291 7682 int rval;
6292 7683
6293 - con_log(CL_ANN1, (CE_WARN, "mr_sas: scsi_device t%dL%d", tgt, lun));
7684 + con_log(CL_DLEVEL1, (CE_NOTE, "mr_sas: scsi_device t%dL%d", tgt, lun));
6294 7685 scsi_hba_nodename_compatible_get(sd->sd_inq, NULL, dtype,
6295 7686 NULL, &nodename, &compatible, &ncompatible);
6296 7687
6297 7688 if (nodename == NULL) {
6298 7689 con_log(CL_ANN1, (CE_WARN, "mr_sas: Found no compatible driver "
6299 7690 "for t%dL%d", tgt, lun));
6300 7691 rval = NDI_FAILURE;
6301 7692 goto finish;
6302 7693 }
6303 7694
6304 7695 childname = (dtype == DTYPE_DIRECT) ? "sd" : nodename;
6305 - con_log(CL_ANN1, (CE_WARN,
7696 + con_log(CL_DLEVEL1, (CE_NOTE,
6306 7697 "mr_sas: Childname = %2s nodename = %s", childname, nodename));
6307 7698
6308 7699 /* Create a dev node */
6309 7700 rval = ndi_devi_alloc(instance->dip, childname, DEVI_SID_NODEID, &ldip);
6310 - con_log(CL_ANN1, (CE_WARN,
7701 + con_log(CL_DLEVEL1, (CE_NOTE,
6311 7702 "mr_sas_config_scsi_device: ndi_devi_alloc rval = %x", rval));
6312 7703 if (rval == NDI_SUCCESS) {
6313 7704 if (ndi_prop_update_int(DDI_DEV_T_NONE, ldip, "target", tgt) !=
6314 7705 DDI_PROP_SUCCESS) {
6315 7706 con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to create "
6316 7707 "property for t%dl%d target", tgt, lun));
6317 7708 rval = NDI_FAILURE;
6318 7709 goto finish;
6319 7710 }
6320 7711 if (ndi_prop_update_int(DDI_DEV_T_NONE, ldip, "lun", lun) !=
6321 7712 DDI_PROP_SUCCESS) {
6322 7713 con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to create "
6323 7714 "property for t%dl%d lun", tgt, lun));
6324 7715 rval = NDI_FAILURE;
6325 7716 goto finish;
6326 7717 }
6327 7718
6328 7719 if (ndi_prop_update_string_array(DDI_DEV_T_NONE, ldip,
6329 7720 "compatible", compatible, ncompatible) !=
6330 7721 DDI_PROP_SUCCESS) {
6331 7722 con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to create "
6332 7723 "property for t%dl%d compatible", tgt, lun));
6333 7724 rval = NDI_FAILURE;
|
↓ open down ↓ |
13 lines elided |
↑ open up ↑ |
6334 7725 goto finish;
6335 7726 }
6336 7727
6337 7728 rval = ndi_devi_online(ldip, NDI_ONLINE_ATTACH);
6338 7729 if (rval != NDI_SUCCESS) {
6339 7730 con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to online "
6340 7731 "t%dl%d", tgt, lun));
6341 7732 ndi_prop_remove_all(ldip);
6342 7733 (void) ndi_devi_free(ldip);
6343 7734 } else {
6344 - con_log(CL_ANN1, (CE_WARN, "mr_sas: online Done :"
7735 + con_log(CL_ANN1, (CE_CONT, "mr_sas: online Done :"
6345 7736 "0 t%dl%d", tgt, lun));
6346 7737 }
6347 7738
6348 7739 }
6349 7740 finish:
6350 7741 if (dipp) {
6351 7742 *dipp = ldip;
6352 7743 }
6353 7744
6354 - con_log(CL_DLEVEL1, (CE_WARN,
7745 + con_log(CL_DLEVEL1, (CE_NOTE,
6355 7746 "mr_sas: config_scsi_device rval = %d t%dL%d",
6356 7747 rval, tgt, lun));
6357 7748 scsi_hba_nodename_compatible_free(nodename, compatible);
6358 7749 return (rval);
6359 7750 }
6360 7751
6361 7752 /*ARGSUSED*/
6362 -static int
7753 +int
6363 7754 mrsas_service_evt(struct mrsas_instance *instance, int tgt, int lun, int event,
6364 7755 uint64_t wwn)
6365 7756 {
6366 7757 struct mrsas_eventinfo *mrevt = NULL;
6367 7758
6368 7759 con_log(CL_ANN1, (CE_NOTE,
6369 7760 "mrsas_service_evt called for t%dl%d event = %d",
6370 7761 tgt, lun, event));
6371 7762
6372 7763 if ((instance->taskq == NULL) || (mrevt =
6373 7764 kmem_zalloc(sizeof (struct mrsas_eventinfo), KM_NOSLEEP)) == NULL) {
6374 7765 return (ENOMEM);
6375 7766 }
6376 7767
6377 7768 mrevt->instance = instance;
6378 7769 mrevt->tgt = tgt;
6379 7770 mrevt->lun = lun;
6380 7771 mrevt->event = event;
7772 + mrevt->wwn = wwn;
6381 7773
6382 7774 if ((ddi_taskq_dispatch(instance->taskq,
6383 7775 (void (*)(void *))mrsas_issue_evt_taskq, mrevt, DDI_NOSLEEP)) !=
6384 7776 DDI_SUCCESS) {
6385 7777 con_log(CL_ANN1, (CE_NOTE,
6386 7778 "mr_sas: Event task failed for t%dl%d event = %d",
6387 7779 tgt, lun, event));
6388 7780 kmem_free(mrevt, sizeof (struct mrsas_eventinfo));
6389 7781 return (DDI_FAILURE);
6390 7782 }
6391 7783 DTRACE_PROBE3(service_evt, int, tgt, int, lun, int, event);
6392 7784 return (DDI_SUCCESS);
6393 7785 }
6394 7786
6395 7787 static void
6396 7788 mrsas_issue_evt_taskq(struct mrsas_eventinfo *mrevt)
6397 7789 {
|
↓ open down ↓ |
7 lines elided |
↑ open up ↑ |
6398 7790 struct mrsas_instance *instance = mrevt->instance;
6399 7791 dev_info_t *dip, *pdip;
6400 7792 int circ1 = 0;
6401 7793 char *devname;
6402 7794
6403 7795 con_log(CL_ANN1, (CE_NOTE, "mrsas_issue_evt_taskq: called for"
6404 7796 " tgt %d lun %d event %d",
6405 7797 mrevt->tgt, mrevt->lun, mrevt->event));
6406 7798
6407 7799 if (mrevt->tgt < MRDRV_MAX_LD && mrevt->lun == 0) {
7800 + mutex_enter(&instance->config_dev_mtx);
6408 7801 dip = instance->mr_ld_list[mrevt->tgt].dip;
7802 + mutex_exit(&instance->config_dev_mtx);
7803 +#ifdef PDSUPPORT
6409 7804 } else {
6410 - return;
7805 + mutex_enter(&instance->config_dev_mtx);
7806 + dip = instance->mr_tbolt_pd_list[mrevt->tgt].dip;
7807 + mutex_exit(&instance->config_dev_mtx);
7808 +#endif
6411 7809 }
6412 7810
7811 +
6413 7812 ndi_devi_enter(instance->dip, &circ1);
6414 7813 switch (mrevt->event) {
6415 7814 case MRSAS_EVT_CONFIG_TGT:
6416 7815 if (dip == NULL) {
6417 7816
6418 7817 if (mrevt->lun == 0) {
6419 7818 (void) mrsas_config_ld(instance, mrevt->tgt,
6420 7819 0, NULL);
7820 +#ifdef PDSUPPORT
7821 + } else if (instance->tbolt) {
7822 + (void) mrsas_tbolt_config_pd(instance,
7823 + mrevt->tgt,
7824 + 1, NULL);
7825 +#endif
6421 7826 }
6422 7827 con_log(CL_ANN1, (CE_NOTE,
6423 7828 "mr_sas: EVT_CONFIG_TGT called:"
6424 7829 " for tgt %d lun %d event %d",
6425 7830 mrevt->tgt, mrevt->lun, mrevt->event));
6426 7831
6427 7832 } else {
6428 7833 con_log(CL_ANN1, (CE_NOTE,
6429 7834 "mr_sas: EVT_CONFIG_TGT dip != NULL:"
6430 7835 " for tgt %d lun %d event %d",
6431 7836 mrevt->tgt, mrevt->lun, mrevt->event));
6432 7837 }
6433 7838 break;
6434 7839 case MRSAS_EVT_UNCONFIG_TGT:
6435 7840 if (dip) {
6436 7841 if (i_ddi_devi_attached(dip)) {
6437 7842
6438 7843 pdip = ddi_get_parent(dip);
6439 7844
6440 7845 devname = kmem_zalloc(MAXNAMELEN + 1, KM_SLEEP);
6441 7846 (void) ddi_deviname(dip, devname);
6442 7847
6443 7848 (void) devfs_clean(pdip, devname + 1,
6444 7849 DV_CLEAN_FORCE);
6445 7850 kmem_free(devname, MAXNAMELEN + 1);
6446 7851 }
6447 7852 (void) ndi_devi_offline(dip, NDI_DEVI_REMOVE);
6448 7853 con_log(CL_ANN1, (CE_NOTE,
6449 7854 "mr_sas: EVT_UNCONFIG_TGT called:"
6450 7855 " for tgt %d lun %d event %d",
6451 7856 mrevt->tgt, mrevt->lun, mrevt->event));
6452 7857 } else {
6453 7858 con_log(CL_ANN1, (CE_NOTE,
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6454 7859 "mr_sas: EVT_UNCONFIG_TGT dip == NULL:"
6455 7860 " for tgt %d lun %d event %d",
6456 7861 mrevt->tgt, mrevt->lun, mrevt->event));
6457 7862 }
6458 7863 break;
6459 7864 }
6460 7865 kmem_free(mrevt, sizeof (struct mrsas_eventinfo));
6461 7866 ndi_devi_exit(instance->dip, circ1);
6462 7867 }
6463 7868
6464 -static int
7869 +
7870 +int
6465 7871 mrsas_mode_sense_build(struct scsi_pkt *pkt)
6466 7872 {
6467 7873 union scsi_cdb *cdbp;
6468 - uint16_t page_code;
7874 + uint16_t page_code;
6469 7875 struct scsa_cmd *acmd;
6470 7876 struct buf *bp;
6471 7877 struct mode_header *modehdrp;
6472 7878
6473 7879 cdbp = (void *)pkt->pkt_cdbp;
6474 7880 page_code = cdbp->cdb_un.sg.scsi[0];
6475 7881 acmd = PKT2CMD(pkt);
6476 7882 bp = acmd->cmd_buf;
6477 7883 if ((!bp) && bp->b_un.b_addr && bp->b_bcount && acmd->cmd_dmacount) {
6478 7884 con_log(CL_ANN1, (CE_WARN, "Failing MODESENSE Command"));
6479 7885 /* ADD pkt statistics as Command failed. */
6480 7886 return (NULL);
6481 7887 }
6482 7888
6483 7889 bp_mapin(bp);
6484 7890 bzero(bp->b_un.b_addr, bp->b_bcount);
6485 7891
6486 7892 switch (page_code) {
6487 7893 case 0x3: {
6488 7894 struct mode_format *page3p = NULL;
6489 7895 modehdrp = (struct mode_header *)(bp->b_un.b_addr);
6490 7896 modehdrp->bdesc_length = MODE_BLK_DESC_LENGTH;
6491 7897
6492 7898 page3p = (void *)((caddr_t)modehdrp +
6493 7899 MODE_HEADER_LENGTH + MODE_BLK_DESC_LENGTH);
6494 7900 page3p->mode_page.code = 0x3;
6495 7901 page3p->mode_page.length =
6496 7902 (uchar_t)(sizeof (struct mode_format));
6497 7903 page3p->data_bytes_sect = 512;
6498 7904 page3p->sect_track = 63;
6499 7905 break;
6500 7906 }
6501 7907 case 0x4: {
6502 7908 struct mode_geometry *page4p = NULL;
6503 7909 modehdrp = (struct mode_header *)(bp->b_un.b_addr);
6504 7910 modehdrp->bdesc_length = MODE_BLK_DESC_LENGTH;
6505 7911
6506 7912 page4p = (void *)((caddr_t)modehdrp +
6507 7913 MODE_HEADER_LENGTH + MODE_BLK_DESC_LENGTH);
6508 7914 page4p->mode_page.code = 0x4;
6509 7915 page4p->mode_page.length =
6510 7916 (uchar_t)(sizeof (struct mode_geometry));
6511 7917 page4p->heads = 255;
6512 7918 page4p->rpm = 10000;
6513 7919 break;
6514 7920 }
6515 7921 default:
6516 7922 break;
6517 7923 }
6518 7924 return (NULL);
6519 7925 }
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