1 /*
2 * ld_pd_map.h
3 *
4 * Solaris MegaRAID device driver for SAS2.0 controllers
5 * Copyright (c) 2008-2012, LSI Logic Corporation.
6 * All rights reserved.
7 *
8 * Version:
9 * Author:
10 * Swaminathan K S
11 * Arun Chandrashekhar
12 * Manju R
13 * Rasheed
14 * Shakeel Bukhari
15 */
16
17 #ifndef INCLUDE_LD_PD_MAP
18 #define INCLUDE_LD_PD_MAP
19 #include <sys/scsi/scsi.h>
20 #include "fusion.h"
21
22 /* raid->write_mode; raid->read_ahead; dcmd->state */
23 /* Write through */
24 #define WRITE_THROUGH 0
25 /* Delayed Write */
26 #define WRITE_BACK 1
27
28 /* SCSI CDB definitions */
29 #define READ_6 0x08
30 #define READ_16 0x88
31 #define READ_10 0x28
32 #define READ_12 0xA8
33 #define WRITE_16 0x8A
34 #define WRITE_10 0x2A
35
36 // maximum disks per array
37 #define MAX_ROW_SIZE 32
38 // maximum spans per logical drive
39 #define MAX_SPAN_DEPTH 8
40 #define MEGASAS_LOAD_BALANCE_FLAG 0x1
41 #define MR_DEFAULT_IO_TIMEOUT 20
42
43
44 union desc_value {
45 U64 word;
46 struct {
47 U32 low;
48 U32 high;
49 } u1;
50 };
51
52 typedef struct _LD_LOAD_BALANCE_INFO
53 {
54 U8 loadBalanceFlag;
55 U8 reserved1;
56 U16 raid1DevHandle[2];
57 U16 scsi_pending_cmds[2];
58 U64 last_accessed_block[2];
59 } LD_LOAD_BALANCE_INFO, *PLD_LOAD_BALANCE_INFO;
60
61 #pragma pack(1)
62 typedef struct _MR_FW_RAID_MAP_ALL {
63 MR_FW_RAID_MAP raidMap;
64 MR_LD_SPAN_MAP ldSpanMap[MAX_LOGICAL_DRIVES - 1];
65 } MR_FW_RAID_MAP_ALL;
66
67 /*
68 * Raid Context structure which describes MegaRAID specific IO Paramenters
69 * This resides at offset 0x60 where the SGL normally starts in MPT IO Frames
70 */
71 typedef struct _MPI2_SCSI_IO_VENDOR_UNIQUE {
72 U8 nsegType; // 0x00 nseg[7:4], Type[3:0] */
73 U8 resvd0; // 0x01
74 U16 timeoutValue; /* 0x02 -0x03 */
75 U8 regLockFlags; /* 0x04 */
76 U8 reservedForHw1; /* 0x05 */
77 U16 ldTargetId; /* 0x06 - 0x07 */
78 U64 regLockRowLBA; /* 0x08 - 0x0F */
79 U32 regLockLength; /* 0x10 - 0x13 */
80 U16 nextLMId; /* 0x14 - 0x15 */
81 U8 extStatus; /* 0x16 */
82 U8 status; /* 0x17 status */
83 U8 RAIDFlags; /* 0x18 resvd[7:6], ioSubType[5:4], resvd[3:1], preferredCpu[0] */
84 U8 numSGE; /* 0x19 numSge; not including chain entries*/
85 U16 configSeqNum; /* 0x1A -0x1B */
86 U8 spanArm; /* 0x1C span[7:5], arm[4:0] */
87 U8 resvd2[3]; /* 0x1D-0x1f */
88 } MPI2_SCSI_IO_VENDOR_UNIQUE, MPI25_SCSI_IO_VENDOR_UNIQUE;
89
90 #define RAID_CTX_SPANARM_ARM_SHIFT (0)
91 #define RAID_CTX_SPANARM_ARM_MASK (0x1f)
92
93 #define RAID_CTX_SPANARM_SPAN_SHIFT (5)
94 #define RAID_CTX_SPANARM_SPAN_MASK (0xE0)
95
96
97 /*
98 * RAID SCSI IO Request Message
99 * Total SGE count will be one less
100 * than _MPI2_SCSI_IO_REQUEST
101 */
102 typedef struct _MPI2_RAID_SCSI_IO_REQUEST
103 {
104 uint16_t DevHandle; /* 0x00 */
105 uint8_t ChainOffset; /* 0x02 */
106 uint8_t Function; /* 0x03 */
107 uint16_t Reserved1; /* 0x04 */
108 uint8_t Reserved2; /* 0x06 */
109 uint8_t MsgFlags; /* 0x07 */
110 uint8_t VP_ID; /* 0x08 */
111 uint8_t VF_ID; /* 0x09 */
112 uint16_t Reserved3; /* 0x0A */
113 uint32_t SenseBufferLowAddress; /* 0x0C */
114 uint16_t SGLFlags; /* 0x10 */
115 uint8_t SenseBufferLength; /* 0x12 */
116 uint8_t Reserved4; /* 0x13 */
117 uint8_t SGLOffset0; /* 0x14 */
118 uint8_t SGLOffset1; /* 0x15 */
119 uint8_t SGLOffset2; /* 0x16 */
120 uint8_t SGLOffset3; /* 0x17 */
121 uint32_t SkipCount; /* 0x18 */
122 uint32_t DataLength; /* 0x1C */
123 uint32_t BidirectionalDataLength; /* 0x20 */
124 uint16_t IoFlags; /* 0x24 */
125 uint16_t EEDPFlags; /* 0x26 */
126 uint32_t EEDPBlockSize; /* 0x28 */
127 uint32_t SecondaryReferenceTag; /* 0x2C */
128 uint16_t SecondaryApplicationTag; /* 0x30 */
129 uint16_t ApplicationTagTranslationMask; /* 0x32 */
130 uint8_t LUN[8]; /* 0x34 */
131 uint32_t Control; /* 0x3C */
132 Mpi2ScsiIoCdb_t CDB; /* 0x40 */
133 MPI2_SCSI_IO_VENDOR_UNIQUE RaidContext; /* 0x60 */
134 Mpi2SGEIOUnion_t SGL; /* 0x80 */
135 } MPI2_RAID_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI2_RAID_SCSI_IO_REQUEST,
136 Mpi2RaidSCSIIORequest_t, MPI2_POINTER pMpi2RaidSCSIIORequest_t;
137
138 /*
139 * define region lock types
140 */
141 typedef enum _REGION_TYPE {
142 REGION_TYPE_UNUSED = 0, // lock is currently not active
143 REGION_TYPE_SHARED_READ = 1, // shared lock (for reads)
144 REGION_TYPE_SHARED_WRITE = 2,
145 REGION_TYPE_EXCLUSIVE = 3, // exclusive lock (for writes)
146 } REGION_TYPE;
147
148
149 #define DM_PATH_MAXPATH 2
150 #define DM_PATH_FIRSTPATH 0
151 #define DM_PATH_SECONDPATH 1
152
153 // declare valid Region locking values
154 typedef enum _REGION_LOCK {
155 REGION_LOCK_BYPASS = 0,
156 // for RAID 6 single-drive failure
157 REGION_LOCK_UNCOND_SHARED_READ = 1,
158 REGION_LOCK_UNCOND_SHARED_WRITE = 2,
159 REGION_LOCK_UNCOND_SHARED_OTHER = 3,
160 REGION_LOCK_UNCOND_SHARED_EXCLUSIVE = 0xFF
161 } REGION_LOCK;
162
163
164 struct mrsas_init_frame2 {
165 uint8_t cmd; /* 00h */
166 uint8_t reserved_0; /* 01h */
167 uint8_t cmd_status; /* 02h */
168
169 uint8_t reserved_1; /* 03h */
170 uint32_t reserved_2; /* 04h */
171
172 uint32_t context; /* 08h */
173 uint32_t pad_0; /* 0Ch */
174
175 uint16_t flags; /* 10h */
176 uint16_t reserved_3; /* 12h */
177 uint32_t data_xfer_len; /* 14h */
178
179 uint32_t queue_info_new_phys_addr_lo; /* 18h */
180 uint32_t queue_info_new_phys_addr_hi; /* 1Ch */
181 uint32_t queue_info_old_phys_addr_lo; /* 20h */
182 uint32_t queue_info_old_phys_addr_hi; /* 24h */
183 uint64_t driverversion; /* 28h */
184 uint32_t reserved_4[4]; /* 30h */
185 };
186
187
188 /*
189 * Request descriptor types
190 */
191 #define MPI2_REQ_DESCRIPT_FLAGS_LD_IO 0x7
192 #define MPI2_REQ_DESCRIPT_FLAGS_MFA 0x1
193 #define MPI2_REQ_DESCRIPT_FLAGS_NO_LOCK 0x2
194
195 #define MPI2_REQ_DESCRIPT_FLAGS_TYPE_SHIFT 1
196
197
198 /*
199 * MPT RAID MFA IO Descriptor.
200 */
201 typedef struct _MR_RAID_MFA_IO_DESCRIPTOR {
202 uint32_t RequestFlags : 8;
203 uint32_t MessageAddress1 : 24; /* bits 31:8 */
204 uint32_t MessageAddress2; /* bits 61:32 */
205 } MR_RAID_MFA_IO_REQUEST_DESCRIPTOR,
206 *PMR_RAID_MFA_IO_REQUEST_DESCRIPTOR;
207
208 /* union of Request Descriptors */
209 typedef union _MRSAS_REQUEST_DESCRIPTOR_UNION
210 {
211 MPI2_DEFAULT_REQUEST_DESCRIPTOR Default;
212 MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority;
213 MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO;
214 MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget;
215 MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR RAIDAccelerator;
216 MR_RAID_MFA_IO_REQUEST_DESCRIPTOR MFAIo;
217 U64 Words;
218 } MRSAS_REQUEST_DESCRIPTOR_UNION;
219
220 #pragma pack()
221
222 enum {
223 MRSAS_SCSI_VARIABLE_LENGTH_CMD = 0x7F,
224 MRSAS_SCSI_SERVICE_ACTION_READ32 = 0x9,
225 MRSAS_SCSI_SERVICE_ACTION_WRITE32 = 0xB,
226 MRSAS_SCSI_ADDL_CDB_LEN = 0x18,
227 MRSAS_RD_WR_PROTECT = 0x20,
228 MRSAS_EEDPBLOCKSIZE = 512,
229 };
230
231
232 #define IEEE_SGE_FLAGS_ADDR_MASK (0x03)
233 #define IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00)
234 #define IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01)
235 #define IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02)
236 #define IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03)
237 #define IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80)
238 #define IEEE_SGE_FLAGS_END_OF_LIST (0x40)
239
240
241 U8 MR_ValidateMapInfo(MR_FW_RAID_MAP_ALL *map, PLD_LOAD_BALANCE_INFO lbInfo);
242 U16 MR_CheckDIF(U32, MR_FW_RAID_MAP_ALL *);
243 #endif // INCLUDE_LD_PD_MAP