--- /dev/null	Thu Dec 10 09:27:29 2015
+++ new/usr/src/uts/common/io/i40e/i40e_sw.h	Thu Dec 10 09:27:29 2015
@@ -0,0 +1,625 @@
+/*
+ * This file and its contents are supplied under the terms of the
+ * Common Development and Distribution License ("CDDL"), version 1.0.
+ * You may only use this file in accordance with the terms of version
+ * 1.0 of the CDDL.
+ *
+ * A full copy of the text of the CDDL should have accompanied this
+ * source.  A copy of the CDDL is also available via the Internet at
+ * http://www.illumos.org/license/CDDL.
+ */
+
+/*
+ * Copyright 2015 OmniTI Computer Consulting, Inc. All rights reserved.
+ */
+
+#ifndef	_I40E_SW_H
+#define	_I40E_SW_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <sys/types.h>
+#include <sys/conf.h>
+#include <sys/debug.h>
+#include <sys/stropts.h>
+#include <sys/stream.h>
+#include <sys/strsun.h>
+#include <sys/strlog.h>
+#include <sys/kmem.h>
+#include <sys/stat.h>
+#include <sys/kstat.h>
+#include <sys/modctl.h>
+#include <sys/errno.h>
+#include <sys/dlpi.h>
+#include <sys/mac_provider.h>
+#include <sys/mac_ether.h>
+#include <sys/vlan.h>
+#include <sys/ddi.h>
+#include <sys/sunddi.h>
+#include <sys/pci.h>
+#include <sys/pcie.h>
+#include <sys/sdt.h>
+#include <sys/ethernet.h>
+#include <sys/pattr.h>
+#include <sys/strsubr.h>
+#include <sys/netlb.h>
+#include <sys/random.h>
+#include <inet/common.h>
+#include <inet/tcp.h>
+#include <inet/ip.h>
+#include <inet/mi.h>
+#include <inet/nd.h>
+#include <sys/bitmap.h>
+#include <sys/cpuvar.h>
+#include <sys/ddifm.h>
+#include <sys/fm/protocol.h>
+#include <sys/fm/util.h>
+#include <sys/disp.h>
+#include <sys/fm/io/ddi.h>
+#include "i40e_type.h"
+#include "i40e_osdep.h"
+#include "i40e_prototype.h"
+
+#define	MODULE_NAME "i40e" /* Move me? */
+
+/*
+ * Constants first...
+ */
+
+/*
+ * Bit flags for attach_progress
+ */
+#define	ATTACH_PROGRESS_PCI_CONFIG	0x0001	/* PCI config setup */
+#define	ATTACH_PROGRESS_REGS_MAP	0x0002	/* Registers mapped */
+#define	ATTACH_PROGRESS_PROPS		0x0004	/* Properties initialized */
+#define	ATTACH_PROGRESS_ALLOC_INTR	0x0008	/* Interrupts allocated */
+#define	ATTACH_PROGRESS_ALLOC_RINGSLOCKS 0x0010	/* Rings & locks allocated */
+#define	ATTACH_PROGRESS_ADD_INTR	0x0020	/* Intr handlers added */
+#define	ATTACH_PROGRESS_COMMON_CODE	0x0040 /* Intel code initialized */
+#define	ATTACH_PROGRESS_INIT		0x0080	/* Device initialized */
+#define	ATTACH_PROGRESS_STATS		0x0200	/* Kstats created */
+#define	ATTACH_PROGRESS_MAC		0x0800	/* MAC registered */
+#define	ATTACH_PROGRESS_ENABLE_INTR	0x1000	/* DDI interrupts enabled */
+#define	ATTACH_PROGRESS_FM_INIT		0x2000	/* FMA initialized */
+#define	ATTACH_PROGRESS_SFP_TASKQ	0x4000	/* SFP taskq created */
+#define	ATTACH_PROGRESS_LINK_TIMER	0x8000	/* link check timer */
+#define	ATTACH_PROGRESS_OVERTEMP_TASKQ	0x10000 /* Over-temp taskq created */
+
+#define	I40E_ADAPTER_REGSET	1 /* map adapter registers - no idea?!? */
+
+#if 0
+#define	MIN_TX_RING_SIZE 64
+#define	MAX_TX_RING_SIZE 4096
+#define	DEFAULT_TX_RING_SIZE 1024
+#define	MIN_RX_RING_SIZE 64
+#define	MAX_RX_RING_SIZE 4096
+#define	DEFAULT_RX_RING_SIZE 1024
+
+#define	MAX_RX_QUEUE_NUM 128
+#define	MAX_TX_QUEUE_NUM 128
+#endif
+
+#define	MAX_TX_RX_QUEUE_PAIRS	16  /* Stolen from FreeBSD, could be more. */
+
+#define	MAX_INTR_VECTOR 64
+
+/* i40e state flags (must fit in i40e_state) */
+#define	I40E_UNKNOWN			0x00
+#define	I40E_INITIALIZED		0x01
+#define	I40E_STARTED			0x02
+#define	I40E_SUSPENDED			0x04
+#define	I40E_STALL			0x08
+#define	I40E_OVERTEMP			0x20
+#define	I40E_INTR_ADJUST		0x40
+#define	I40E_ERROR			0x80
+#define	I40E_WATCHDOG			0x100	/* enable watchdog timer */
+
+/* Table 1-5 says LSO can go up to 256KB */
+#define	I40E_LSO_MAXLEN	(256 * 1024)	/* YEAH CONSTANT FOLDING!!! */
+
+#define	I40E_CYCLIC_PERIOD NANOSEC	/* 1 second */
+
+/* Biggest scatter-gather list length. */
+#define	MAX_COOKIE 18	/* XXX KEBE STOLE from ixgbe, could be more/less?!? */
+
+/* Interrupt rates */
+#define	I40E_ITR_NONE 3
+#define	I40E_ITR_100K		0x0005
+#define	I40E_ITR_20K		0x0019
+#define	I40E_ITR_8K		0x003E
+#define	I40E_ITR_4K		0x007A
+#define	I40E_ITR_DYNAMIC	0x8000
+
+
+/*
+ * Address limits...
+ */
+/*
+ * NOTE: Table 7-140 says 1024 for the whole board - there's no per-port.
+ * For now, just take 1/4 of the total (256 per port).  This may need to
+ * change or adjust.
+ *
+ * XXX KEBE SAYS, for now, this applies to both unicast and multicast MAC
+ * addresses.
+ */
+#define	I40E_MAX_MAC	256
+
+/*
+ * A single MSI-X interrupt's relevant data.
+ */
+typedef struct i40e_intr_vector {
+	ulong_t iv_rx_map[BT_BITOUL(MAX_TX_RX_QUEUE_PAIRS)]; /* rx bitmap. */
+	ulong_t iv_tx_map[BT_BITOUL(MAX_TX_RX_QUEUE_PAIRS)]; /* tx bitmap. */
+	ulong_t iv_other_map[BT_BITOUL(2)];	/* Other interrupts bitmap. */
+	/* XXX KEBE PLANS to have two interrupts per tx/rx qpair. */
+	int iv_rx_count;	/* Actual number of receive queues. */
+	int iv_tx_count;	/* Actual number of transmit queues. */
+	int iv_other_count;	/* Actual number of other interrupts. */
+} i40e_intr_vector_t;
+
+/*
+ * Handles and addresses of DMA buffer
+ */
+typedef struct dma_buffer_s {
+	caddr_t		dmab_address;		/* Virtual address */
+	uint64_t	dmab_dma_address;	/* DMA (Hardware) address */
+	ddi_acc_handle_t dmab_acc_handle;	/* Data access handle */
+	ddi_dma_handle_t dmab_dma_handle;	/* DMA handle */
+	size_t		dmab_size;		/* Buffer size */
+	size_t		dmab_len;		/* Data length in the buffer */
+} dma_buffer_t;
+
+/*
+ * RX Control Block
+ */
+typedef struct rx_control_block_s {
+	mblk_t			*rcb_mp;
+	uint32_t		rcb_ref_cnt;
+	dma_buffer_t		rcb_buf;
+	frtn_t			rcb_free_rtn;
+	struct ixgbe_rx_data	*rcb_data;
+	int			rcb_lro_next;	/* Index of next rcb */
+	int			rcb_lro_prev;	/* Index of previous rcb */
+	boolean_t		rcb_lro_pkt;	/* Flag for LRO rcb */
+} rx_control_block_t;
+
+/*
+ * Receive ring data (used below).
+ */
+typedef struct i40e_rx_data_s {
+	kmutex_t rxd_recycle_lock;	/* Recycle lock, for rcb_tail */
+
+	/*
+	 * Rx descriptor ring definitions
+	 */
+	dma_buffer_t rxd_area;	/* DMA buffer of rx desc ring */
+	union i40e_32byte_rx_desc *rxd_desc_ring;	/* Rx desc ring */
+	uint32_t rxd_next;	/* Index of next rx desc */
+
+	/*
+	 * Rx control block list definitions
+	 */
+	rx_control_block_t	*rxd_rcb_area;
+	rx_control_block_t	**rxd_work_list;/* Work list of rcbs */
+	rx_control_block_t	**rxd_free_list;/* Free list of rcbs */
+	uint32_t		rxd_rcb_head;	/* Index of next free rcb */
+	uint32_t		rxd_rcb_tail;	/* Index to put recycled rcb */
+	uint32_t		rxd_rcb_free;	/* Number of free rcbs */
+
+	/*
+	 * Rx sw ring settings and status
+	 */
+	uint32_t	rxd_ring_size;	/* Rx descriptor ring size */
+	uint32_t	rxd_free_list_size;	/* Rx free list size */
+
+	uint32_t	rxd_rcb_pending;
+	uint32_t	rxd_flag;
+
+	uint32_t	rxd_lro_num;	/* Number of rcbs of one LRO */
+	uint32_t	rxd_lro_first;	/* Index of first LRO rcb */
+
+/*	struct i40e_rx_ring	*rxd_rxr; */	/* Pointer to rx ring */
+	struct i40e_trqpair_s *rxd_itrq;	/* Pointer to queue pair. */
+
+} i40e_rx_data_t;
+
+#if 0  /* XXX KEBE SAYS replaced by i40e_trqpair_t */
+/*
+ * An i40e receive ring.
+ */
+typedef struct i40e_rx_ring_s {
+	/* 64-bit items... */
+	uint64_t rxr_rbytes;
+	uint64_t rxr_rpackets;	/* XXX KEBE ASKS use "ipackets" instead? */
+
+	i40e_rx_data_t *rxr_data;
+	mac_ring_handle_t rxr_ring_handle;
+	uint64_t rxr_gen_num;
+	kmutex_t rxr_lock;
+	struct i40e_s *rxr_i40e;
+
+	/* 32-bit items... */
+	uint32_t rxr_index;
+	uint32_t rxr_group_index;
+	uint32_t rxr_hw_index;
+	uint32_t rxr_intr_vector;
+	uint32_t rxr_vector_bit;
+
+	/* XXX KEBE ASKS - Anything more? */
+} i40e_rx_ring_t;
+
+typedef struct i40e_rx_group_s {
+	uint32_t rxg_index;
+	mac_group_handle_t rxg_group_handle;
+	struct i40e_s *rxg_i40e;
+} i40e_rx_group_t;
+#endif
+
+#if 0	/* NOT YET */
+typedef struct tx_control_block_s {
+} tx_control_block_t;
+#endif	/* NOT YET */
+
+#if 0	/* replaced by i40e_trqpair_t */
+typedef struct i40e_tx_ring_s {
+	uint32_t txr_index;
+	uint32_t txr_intr_vector;
+	uint32_t txr_vector_bit;
+
+	/*
+	 * XXX including a backpointer to i40e, because Nemo/GLDv3 can only
+	 * cope with one argument.
+	 */
+	struct i40e_s *txr_i40e;
+
+	mac_ring_handle_t txr_ring_handle;
+
+	kmutex_t txr_lock;
+	kmutex_t txr_recycle_lock;
+	kmutex_t txr_tcb_head_lock;
+	kmutex_t txr_tcb_tail_lock;
+
+	
+	/* XXX KEBE SCREAMS - Fill in a ton more... */
+} i40e_tx_ring_t;
+#endif	/* replaced-by i40e_trqpair_t */
+
+/* Single ethernet address with hints. */
+typedef struct i40e_ether_addr_s {
+	uint8_t i40eth_used;	/* Treat as boolean... */
+	uint8_t i40eth_reserved;
+	uint8_t i40eth_mac[ETHERADDRL];	/* The actual MAC address. */
+} i40e_ether_addr_t;
+
+/*
+ * An instance of an XL710 transmit/receive queue pair.
+ * XXX KEBE SAYS this is likely to be what gets passed along to mac/GLDv3.
+ */
+typedef struct i40e_trqpair_s {
+	struct i40e_s *itrq_i40e;	/* Need backpointer to i40e_t. */
+	/* XXX KEBE SAYS may need backpointer to VSI struct instead... */
+
+
+	/*
+	 * Since these are a pair of transmit & receive, contain information
+	 * for both.
+	 */
+
+	/* Receive-side structures. */
+	kmutex_t itrq_rx_lock;
+	mac_ring_handle_t itrq_macrxring;	/* Receive ring handle. */
+	i40e_rx_data_t *itrq_rxdata;	/* Receive ring data. */
+	uint64_t itrq_rxgen;		/* Generation number for mac/GLDv3. */
+	uint32_t itrq_index;	/* Index number (needed? can use for both?) */
+	/* XXX KEBE SAYS see above regarding receive groups. */
+	uint32_t itrq_group_index;	/* Again, needed?  For both? */
+	uint32_t itrq_rx_intrvec;	/* Receive interrupt vector. */
+	uint64_t itrq_rx_vectorbit;	/* Receive interrupt vector bit. */
+
+	/* Receive-side stats. */
+	uint64_t itrq_rbytes;
+	uint64_t itrq_rpackets;	/* XXX KEBE ASKS use "ipackets" instead? */
+
+	/* Transmit-side structures. */
+	kmutex_t itrq_tx_lock;
+	mac_ring_handle_t itrq_mactxring;	/* Transmit ring handle. */
+	uint32_t itrq_tx_intrvec;	/* Transmit interrupt vector. */
+	uint64_t itrq_tx_vectorbit;	/* Transmit interrupt vector bit. */
+#if 0
+	/* ixgbe has these tx-side locks.  Why?!  We'll find out, I guess... */
+	kmutex_t txr_recycle_lock;
+	kmutex_t txr_tcb_head_lock;
+	kmutex_t txr_tcb_tail_lock;
+#endif
+	/* XXX KEBE SCREAMS - Fill in a ton more. */
+
+	/* Transmit-side stats. */
+
+} i40e_trqpair_t;
+
+/*
+ * Main i40e per-instance state.
+ */
+typedef struct i40e_s {
+	int i40e_instance;
+	uint32_t i40e_state;
+	uint32_t i40e_attach_progress;
+	int i40e_fm_capabilities;
+	mac_handle_t i40e_mac_hdl;
+	dev_info_t *i40e_dip;
+
+	/* Locks. */
+	kmutex_t i40e_general_lock;	/* General device-access lock. */
+	/* kmutex_t i40e_watchdog_lock; */	/* Watchdog timer lock. */
+
+	/* Actually leave space for these Intel-defined structures. */
+	struct i40e_hw	i40e_hw_space;
+	struct i40e_osdep i40e_osdep_space;
+
+	uint_t i40e_default_mtu;
+
+	struct adapter_info *i40e_capab;
+
+
+	/*
+	 * The i40e instance has one or more Virtual Station ID.  The XL710
+	 * manual (sect. 1.1.6) says there are 384 of them across its HW.  For
+	 * now, we instantiate one VSI per PCIe Physical Function (represented
+	 * by the i40e_t structure).  We could do more eventually, perhaps
+	 * creating/destroying them based on GLDv3's {add,rem}mac() callbacks.
+	 *
+	 * The VSI will hold one or more tx/rx pairs, which is where we'll
+	 * assign GLDv3 rx/tx rings.
+	 *
+	 * NOTE: The fields immediately below may become their own
+	 * structure IFF we decide to support multiple VSIs per device
+	 * attachment point (PCIe Physical Function).
+	 */
+	int i40e_vsi_id;
+	/*
+	 * NOTE: There's only one receive group across the VSI for now.
+	 * XXX KEBE ASKS How best does GLDv3's receive group map to VSI,
+	 * queue-pair, or something else?
+	 */
+	int i40e_num_rx_groups;	/* Should always be 1. */
+	mac_group_handle_t i40e_rx_group_handle;
+	/* XXX KEBE SAYS FILL IN TONS MORE HERE... */
+
+	/* TX/RX queue pairs. */
+	int i40e_num_trqpairs;
+	i40e_trqpair_t *i40e_trqpairs;
+	
+
+	/* Ring information. */
+	boolean_t i40e_mr_enable;	/* Multiple HW rx/tx ring enable. */
+
+	/* Receive-side tunables. */
+	uint32_t i40e_rx_ring_size;
+	uint32_t i40e_rx_buf_size;
+	boolean_t i40e_lro_enable;
+	uint64_t i40e_lro_pkt_count;
+	boolean_t i40e_rx_hcksum_enable;
+
+	/* Transmit-side tunables. */
+	uint32_t i40e_tx_ring_size;
+	boolean_t i40e_tx_hcksum_enable;
+	boolean_t i40e_lso_enable;
+	
+	uint32_t i40e_classify_mode;
+
+	/* Interrupt state for this instance... */
+
+	/* For each MSI-X vector, map it to interrupt cleanup. */
+	i40e_intr_vector_t i40e_vector_map[MAX_INTR_VECTOR];
+
+	uint_t i40e_intr_pri;
+	uint_t i40e_intr_force;
+	uint_t i40e_intr_type;
+	int i40e_intr_cap;
+	uint32_t i40e_intr_count;
+	uint32_t i40e_intr_count_max;
+	uint32_t i40e_intr_count_min;
+	size_t i40e_intr_size;
+	ddi_intr_handle_t *i40e_intr_handles;
+	ddi_cb_handle_t i40e_callback_handle;
+
+	/* Taskqs for SFP-change and over-temperature... */
+	ddi_taskq_t *i40e_sfp_taskq;
+	ddi_taskq_t *i40e_overtemp_taskq;
+
+	link_state_t i40e_link_state;
+	uint32_t i40e_link_speed;
+	uint32_t i40e_link_duplex;
+
+	kstat_t *i40e_kstats;
+
+	/*
+	 * XXX KEBE ASKS -- could we not combine these?  Unless one can be
+	 * suspended while the other runs, but in that case couldn't we use
+	 * timer-flags (if flag do x.. if other-flag do y...)?
+	 */
+	ddi_periodic_t i40e_periodic_id;
+	/* timeout_id_t i40e_watchdog_tid; */
+
+	/*
+	 * Unicast *and* multicast MAC address state.
+	 *
+	 * XXX KEBE SAYS it appears that the i40e HW doesn't differentiate
+	 * between unicast and multicast addresses.  Keep track of both
+	 */
+	uint32_t i40e_mac_total;	/* Set to 0 if uninitialized */
+	uint32_t i40e_mac_used;
+	i40e_ether_addr_t i40e_mac_addrs[I40E_MAX_MAC];
+
+	/* XXX KEBE SAYS TONS MORE to fill in here... */
+} i40e_t;
+
+/*
+ * Classification mode
+ */
+#define	I40E_CLASSIFY_NONE		0
+#define	I40E_CLASSIFY_RSS		1
+#define	I40E_CLASSIFY_VMDQ		2
+#define	I40E_CLASSIFY_VMDQ_RSS		3
+
+/* Values for the interrupt forcing on the NIC. */
+#define	I40E_INTR_NONE			0
+#define	I40E_INTR_MSIX			1
+#define	I40E_INTR_MSI			2
+#define	I40E_INTR_LEGACY		3
+
+/* Hint that we don't want to do any polling... */
+#define	I40E_POLL_NULL			-1
+
+/* Values for loopback properties of the NIC. */
+#define	I40E_LB_NONE			0
+#define	I40E_LB_EXTERNAL		1
+#define	I40E_LB_INTERNAL_MAC		2
+#define	I40E_LB_INTERNAL_PHY		3
+#define	I40E_LB_INTERNAL_SERDES	4
+
+/*
+ * capability/feature flags
+ * Flags named _CAPABLE are set when the NIC hardware is capable of the feature.
+ * Separately, the flag named _ENABLED is set when the feature is enabled.
+ */
+#define	I40E_FLAG_DCA_ENABLED		(u32)(1)
+#define	I40E_FLAG_DCA_CAPABLE		(u32)(1 << 1)
+#define	I40E_FLAG_DCB_ENABLED		(u32)(1 << 2)
+#define	I40E_FLAG_DCB_CAPABLE		(u32)(1 << 4)
+#define	I40E_FLAG_RSS_ENABLED		(u32)(1 << 4)
+#define	I40E_FLAG_RSS_CAPABLE		(u32)(1 << 5)
+#define	I40E_FLAG_VMDQ_CAPABLE		(u32)(1 << 6)
+#define	I40E_FLAG_VMDQ_ENABLED		(u32)(1 << 7)
+#define	I40E_FLAG_FAN_FAIL_CAPABLE	(u32)(1 << 8)
+#define	I40E_FLAG_RSC_CAPABLE		(u32)(1 << 9)
+#define	I40E_FLAG_SFP_PLUG_CAPABLE	(u32)(1 << 10)
+#define	I40E_FLAG_TEMP_SENSOR_CAPABLE	(u32)(1 << 11)
+
+/*
+ * Classification mode
+ */
+#define	I40E_CLASSIFY_NONE		0
+#define	I40E_CLASSIFY_RSS		1
+#define	I40E_CLASSIFY_VMDQ		2
+#define	I40E_CLASSIFY_VMDQ_RSS		3
+
+/* adapter-specific info for each supported device type */
+typedef struct adapter_info {
+	uint32_t	max_rx_que_num; /* maximum number of rx queues */
+	uint32_t	min_rx_que_num; /* minimum number of rx queues */
+	uint32_t	def_rx_que_num; /* default number of rx queues */
+	uint32_t	max_rx_grp_num; /* maximum number of rx groups */
+	uint32_t	min_rx_grp_num; /* minimum number of rx groups */
+	uint32_t	def_rx_grp_num; /* default number of rx groups */
+	uint32_t	max_tx_que_num;	/* maximum number of tx queues */
+	uint32_t	min_tx_que_num;	/* minimum number of tx queues */
+	uint32_t	def_tx_que_num;	/* default number of tx queues */
+	uint32_t	max_mtu;	/* maximum MTU size */
+	/*
+	 * Interrupt throttling is in unit of 256 nsec
+	 */
+	uint32_t	max_intr_throttle; /* maximum interrupt throttle */
+	uint32_t	min_intr_throttle; /* minimum interrupt throttle */
+	uint32_t	def_intr_throttle; /* default interrupt throttle */
+
+	uint32_t	max_adminq_len;	/* maximum i40e admin queue length. */
+	uint32_t	min_adminq_len;	/* minimum i40e admin queue length. */
+	uint32_t	def_adminq_len;	/* default i40e admin queue length. */
+	/* Max/min/default i40e admin queue buffer sizes. */
+	uint32_t	max_adminq_bufsize;
+	uint32_t	min_adminq_bufsize;
+	uint32_t	def_adminq_bufsize;
+
+	uint32_t	max_msix_vect;	/* maximum total msix vectors */
+	uint32_t	max_ring_vect;	/* maximum number of ring vectors */
+	uint32_t	max_other_vect;	/* maximum number of other vectors */
+	uint32_t	other_intr;	/* "other" interrupt types handled */
+	uint32_t	other_gpie;	/* "other" interrupt types enabling */
+	uint32_t	flags;		/* capability flags */
+} adapter_info_t;
+
+/*
+ * A structured array of kstat_named_t elements.
+ */
+typedef struct i40e_kstat_s {
+	kstat_named_t link_speed;	/* Link speed */
+	/* XXX KEBE SAYS MORE MORE MORE!! */
+} i40e_kstat_t;
+
+/*
+ * Intel likes "struct foo", while we like "foo_t".  Let's add some foo_t
+ * for good measure.
+ */
+typedef struct i40e_hw i40e_hw_t;
+
+/*
+ * Logging functions.  Inspired by ixgbe, but less redundant.
+ */
+extern void i40e_dev_err(i40e_t *, int, boolean_t, const char *, va_list);
+extern void i40e_error(i40e_t *, const char *, ...);
+extern void i40e_notice(i40e_t *, const char *, ...);
+extern void i40e_log(i40e_t *, const char *, ...);
+
+/*
+ * FMA functions.
+ */
+extern int i40e_check_acc_handle(ddi_acc_handle_t);
+extern void i40e_fm_ereport(i40e_t *, char *);
+
+/*
+ * Interrupt handlers.  Used by i40e_main.c, implemented in i40e_intr.c
+ */
+extern uint_t i40e_intr_msix(void *, void *);
+extern uint_t i40e_intr_msi(void *, void *);
+extern uint_t i40e_intr_legacy(void *, void *);
+
+/*
+ * Receive-side functions
+ */
+extern mblk_t *i40e_ring_rx(i40e_trqpair_t *, i40e_t *, int);
+extern mblk_t *i40e_ring_rx_poll(void *, int);
+
+/*
+ * Transmit-side functions
+ */
+mblk_t *i40e_ring_tx(void *, mblk_t *);
+
+/*
+ * Statistics functions.
+ */
+extern boolean_t i40e_init_stats(i40e_t *);
+extern int i40e_m_stat(void *, uint_t, uint64_t *);
+extern int i40e_rx_ring_stat(mac_ring_driver_t, uint_t, uint64_t *);
+extern int i40e_tx_ring_stat(mac_ring_driver_t, uint_t, uint64_t *);
+
+/*
+ * MAC/GLDv3 functions, and functions called by MAC/GLDv3 support code.
+ */
+extern boolean_t i40e_register_mac(i40e_t *);
+extern boolean_t i40e_start(i40e_t *, boolean_t);
+extern void i40e_stop(i40e_t *, boolean_t);
+extern boolean_t i40e_hwadd_mac(i40e_t *, struct i40e_hw *, const uint8_t *);
+
+/*
+ * Timing functions
+ */
+extern void i40e_enable_watchdog_timer(i40e_t *);
+extern void i40e_disable_watchdog_timer(i40e_t *);
+
+/*
+ * DMA & buffer functions
+ */
+extern boolean_t i40e_alloc_dma(i40e_t *);
+extern void i40e_free_dma(i40e_t *);
+extern boolean_t i40e_alloc_rx_data(i40e_t *);
+extern void i40e_free_rx_data(i40e_t *);
+extern void i40e_set_fma_flags(boolean_t);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _I40E_SW_H */
