1 /*
   2  * This file and its contents are supplied under the terms of the
   3  * Common Development and Distribution License ("CDDL"), version 1.0.
   4  * You may only use this file in accordance with the terms of version
   5  * 1.0 of the CDDL.
   6  *
   7  * A full copy of the text of the CDDL should have accompanied this
   8  * source.  A copy of the CDDL is also available via the Internet at
   9  * http://www.illumos.org/license/CDDL.
  10  */
  11 
  12 /*
  13  * Copyright 2015 OmniTI Computer Consulting, Inc. All rights reserved.
  14  */
  15 
  16 #ifndef _I40E_SW_H
  17 #define _I40E_SW_H
  18 
  19 #ifdef __cplusplus
  20 extern "C" {
  21 #endif
  22 
  23 #include <sys/types.h>
  24 #include <sys/conf.h>
  25 #include <sys/debug.h>
  26 #include <sys/stropts.h>
  27 #include <sys/stream.h>
  28 #include <sys/strsun.h>
  29 #include <sys/strlog.h>
  30 #include <sys/kmem.h>
  31 #include <sys/stat.h>
  32 #include <sys/kstat.h>
  33 #include <sys/modctl.h>
  34 #include <sys/errno.h>
  35 #include <sys/dlpi.h>
  36 #include <sys/mac_provider.h>
  37 #include <sys/mac_ether.h>
  38 #include <sys/vlan.h>
  39 #include <sys/ddi.h>
  40 #include <sys/sunddi.h>
  41 #include <sys/pci.h>
  42 #include <sys/pcie.h>
  43 #include <sys/sdt.h>
  44 #include <sys/ethernet.h>
  45 #include <sys/pattr.h>
  46 #include <sys/strsubr.h>
  47 #include <sys/netlb.h>
  48 #include <sys/random.h>
  49 #include <inet/common.h>
  50 #include <inet/tcp.h>
  51 #include <inet/ip.h>
  52 #include <inet/mi.h>
  53 #include <inet/nd.h>
  54 #include <sys/bitmap.h>
  55 #include <sys/cpuvar.h>
  56 #include <sys/ddifm.h>
  57 #include <sys/fm/protocol.h>
  58 #include <sys/fm/util.h>
  59 #include <sys/disp.h>
  60 #include <sys/fm/io/ddi.h>
  61 #include "i40e_type.h"
  62 #include "i40e_osdep.h"
  63 #include "i40e_prototype.h"
  64 
  65 #define MODULE_NAME "i40e" /* Move me? */
  66 
  67 /*
  68  * Constants first...
  69  */
  70 
  71 /*
  72  * Bit flags for attach_progress
  73  */
  74 #define ATTACH_PROGRESS_PCI_CONFIG      0x0001  /* PCI config setup */
  75 #define ATTACH_PROGRESS_REGS_MAP        0x0002  /* Registers mapped */
  76 #define ATTACH_PROGRESS_PROPS           0x0004  /* Properties initialized */
  77 #define ATTACH_PROGRESS_ALLOC_INTR      0x0008  /* Interrupts allocated */
  78 #define ATTACH_PROGRESS_ALLOC_RINGSLOCKS 0x0010 /* Rings & locks allocated */
  79 #define ATTACH_PROGRESS_ADD_INTR        0x0020  /* Intr handlers added */
  80 #define ATTACH_PROGRESS_COMMON_CODE     0x0040 /* Intel code initialized */
  81 #define ATTACH_PROGRESS_INIT            0x0080  /* Device initialized */
  82 #define ATTACH_PROGRESS_STATS           0x0200  /* Kstats created */
  83 #define ATTACH_PROGRESS_MAC             0x0800  /* MAC registered */
  84 #define ATTACH_PROGRESS_ENABLE_INTR     0x1000  /* DDI interrupts enabled */
  85 #define ATTACH_PROGRESS_FM_INIT         0x2000  /* FMA initialized */
  86 #define ATTACH_PROGRESS_SFP_TASKQ       0x4000  /* SFP taskq created */
  87 #define ATTACH_PROGRESS_LINK_TIMER      0x8000  /* link check timer */
  88 #define ATTACH_PROGRESS_OVERTEMP_TASKQ  0x10000 /* Over-temp taskq created */
  89 
  90 #define I40E_ADAPTER_REGSET     1 /* map adapter registers - no idea?!? */
  91 
  92 #if 0
  93 #define MIN_TX_RING_SIZE 64
  94 #define MAX_TX_RING_SIZE 4096
  95 #define DEFAULT_TX_RING_SIZE 1024
  96 #define MIN_RX_RING_SIZE 64
  97 #define MAX_RX_RING_SIZE 4096
  98 #define DEFAULT_RX_RING_SIZE 1024
  99 
 100 #define MAX_RX_QUEUE_NUM 128
 101 #define MAX_TX_QUEUE_NUM 128
 102 #endif
 103 
 104 #define MAX_TX_RX_QUEUE_PAIRS   16  /* Stolen from FreeBSD, could be more. */
 105 
 106 #define MAX_INTR_VECTOR 64
 107 
 108 /* i40e state flags (must fit in i40e_state) */
 109 #define I40E_UNKNOWN                    0x00
 110 #define I40E_INITIALIZED                0x01
 111 #define I40E_STARTED                    0x02
 112 #define I40E_SUSPENDED                  0x04
 113 #define I40E_STALL                      0x08
 114 #define I40E_OVERTEMP                   0x20
 115 #define I40E_INTR_ADJUST                0x40
 116 #define I40E_ERROR                      0x80
 117 #define I40E_WATCHDOG                   0x100   /* enable watchdog timer */
 118 
 119 /* Table 1-5 says LSO can go up to 256KB */
 120 #define I40E_LSO_MAXLEN (256 * 1024)    /* YEAH CONSTANT FOLDING!!! */
 121 
 122 #define I40E_CYCLIC_PERIOD NANOSEC      /* 1 second */
 123 
 124 /* Biggest scatter-gather list length. */
 125 #define MAX_COOKIE 18   /* XXX KEBE STOLE from ixgbe, could be more/less?!? */
 126 
 127 /* Interrupt rates */
 128 #define I40E_ITR_NONE 3
 129 #define I40E_ITR_100K           0x0005
 130 #define I40E_ITR_20K            0x0019
 131 #define I40E_ITR_8K             0x003E
 132 #define I40E_ITR_4K             0x007A
 133 #define I40E_ITR_DYNAMIC        0x8000
 134 
 135 
 136 /*
 137  * Address limits...
 138  */
 139 /*
 140  * NOTE: Table 7-140 says 1024 for the whole board - there's no per-port.
 141  * For now, just take 1/4 of the total (256 per port).  This may need to
 142  * change or adjust.
 143  *
 144  * XXX KEBE SAYS, for now, this applies to both unicast and multicast MAC
 145  * addresses.
 146  */
 147 #define I40E_MAX_MAC    256
 148 
 149 /*
 150  * A single MSI-X interrupt's relevant data.
 151  */
 152 typedef struct i40e_intr_vector {
 153         ulong_t iv_rx_map[BT_BITOUL(MAX_TX_RX_QUEUE_PAIRS)]; /* rx bitmap. */
 154         ulong_t iv_tx_map[BT_BITOUL(MAX_TX_RX_QUEUE_PAIRS)]; /* tx bitmap. */
 155         ulong_t iv_other_map[BT_BITOUL(2)];     /* Other interrupts bitmap. */
 156         /* XXX KEBE PLANS to have two interrupts per tx/rx qpair. */
 157         int iv_rx_count;        /* Actual number of receive queues. */
 158         int iv_tx_count;        /* Actual number of transmit queues. */
 159         int iv_other_count;     /* Actual number of other interrupts. */
 160 } i40e_intr_vector_t;
 161 
 162 /*
 163  * Handles and addresses of DMA buffer
 164  */
 165 typedef struct dma_buffer_s {
 166         caddr_t         dmab_address;           /* Virtual address */
 167         uint64_t        dmab_dma_address;       /* DMA (Hardware) address */
 168         ddi_acc_handle_t dmab_acc_handle;       /* Data access handle */
 169         ddi_dma_handle_t dmab_dma_handle;       /* DMA handle */
 170         size_t          dmab_size;              /* Buffer size */
 171         size_t          dmab_len;               /* Data length in the buffer */
 172 } dma_buffer_t;
 173 
 174 /*
 175  * RX Control Block
 176  */
 177 typedef struct rx_control_block_s {
 178         mblk_t                  *rcb_mp;
 179         uint32_t                rcb_ref_cnt;
 180         dma_buffer_t            rcb_buf;
 181         frtn_t                  rcb_free_rtn;
 182         struct ixgbe_rx_data    *rcb_data;
 183         int                     rcb_lro_next;   /* Index of next rcb */
 184         int                     rcb_lro_prev;   /* Index of previous rcb */
 185         boolean_t               rcb_lro_pkt;    /* Flag for LRO rcb */
 186 } rx_control_block_t;
 187 
 188 /*
 189  * Receive ring data (used below).
 190  */
 191 typedef struct i40e_rx_data_s {
 192         kmutex_t rxd_recycle_lock;      /* Recycle lock, for rcb_tail */
 193 
 194         /*
 195          * Rx descriptor ring definitions
 196          */
 197         dma_buffer_t rxd_area;  /* DMA buffer of rx desc ring */
 198         union i40e_32byte_rx_desc *rxd_desc_ring;       /* Rx desc ring */
 199         uint32_t rxd_next;      /* Index of next rx desc */
 200 
 201         /*
 202          * Rx control block list definitions
 203          */
 204         rx_control_block_t      *rxd_rcb_area;
 205         rx_control_block_t      **rxd_work_list;/* Work list of rcbs */
 206         rx_control_block_t      **rxd_free_list;/* Free list of rcbs */
 207         uint32_t                rxd_rcb_head;   /* Index of next free rcb */
 208         uint32_t                rxd_rcb_tail;   /* Index to put recycled rcb */
 209         uint32_t                rxd_rcb_free;   /* Number of free rcbs */
 210 
 211         /*
 212          * Rx sw ring settings and status
 213          */
 214         uint32_t        rxd_ring_size;  /* Rx descriptor ring size */
 215         uint32_t        rxd_free_list_size;     /* Rx free list size */
 216 
 217         uint32_t        rxd_rcb_pending;
 218         uint32_t        rxd_flag;
 219 
 220         uint32_t        rxd_lro_num;    /* Number of rcbs of one LRO */
 221         uint32_t        rxd_lro_first;  /* Index of first LRO rcb */
 222 
 223 /*      struct i40e_rx_ring     *rxd_rxr; */    /* Pointer to rx ring */
 224         struct i40e_trqpair_s *rxd_itrq;        /* Pointer to queue pair. */
 225 
 226 } i40e_rx_data_t;
 227 
 228 #if 0  /* XXX KEBE SAYS replaced by i40e_trqpair_t */
 229 /*
 230  * An i40e receive ring.
 231  */
 232 typedef struct i40e_rx_ring_s {
 233         /* 64-bit items... */
 234         uint64_t rxr_rbytes;
 235         uint64_t rxr_rpackets;  /* XXX KEBE ASKS use "ipackets" instead? */
 236 
 237         i40e_rx_data_t *rxr_data;
 238         mac_ring_handle_t rxr_ring_handle;
 239         uint64_t rxr_gen_num;
 240         kmutex_t rxr_lock;
 241         struct i40e_s *rxr_i40e;
 242 
 243         /* 32-bit items... */
 244         uint32_t rxr_index;
 245         uint32_t rxr_group_index;
 246         uint32_t rxr_hw_index;
 247         uint32_t rxr_intr_vector;
 248         uint32_t rxr_vector_bit;
 249 
 250         /* XXX KEBE ASKS - Anything more? */
 251 } i40e_rx_ring_t;
 252 
 253 typedef struct i40e_rx_group_s {
 254         uint32_t rxg_index;
 255         mac_group_handle_t rxg_group_handle;
 256         struct i40e_s *rxg_i40e;
 257 } i40e_rx_group_t;
 258 #endif
 259 
 260 #if 0   /* NOT YET */
 261 typedef struct tx_control_block_s {
 262 } tx_control_block_t;
 263 #endif  /* NOT YET */
 264 
 265 #if 0   /* replaced by i40e_trqpair_t */
 266 typedef struct i40e_tx_ring_s {
 267         uint32_t txr_index;
 268         uint32_t txr_intr_vector;
 269         uint32_t txr_vector_bit;
 270 
 271         /*
 272          * XXX including a backpointer to i40e, because Nemo/GLDv3 can only
 273          * cope with one argument.
 274          */
 275         struct i40e_s *txr_i40e;
 276 
 277         mac_ring_handle_t txr_ring_handle;
 278 
 279         kmutex_t txr_lock;
 280         kmutex_t txr_recycle_lock;
 281         kmutex_t txr_tcb_head_lock;
 282         kmutex_t txr_tcb_tail_lock;
 283 
 284         
 285         /* XXX KEBE SCREAMS - Fill in a ton more... */
 286 } i40e_tx_ring_t;
 287 #endif  /* replaced-by i40e_trqpair_t */
 288 
 289 /* Single ethernet address with hints. */
 290 typedef struct i40e_ether_addr_s {
 291         uint8_t i40eth_used;    /* Treat as boolean... */
 292         uint8_t i40eth_reserved;
 293         uint8_t i40eth_mac[ETHERADDRL]; /* The actual MAC address. */
 294 } i40e_ether_addr_t;
 295 
 296 /*
 297  * An instance of an XL710 transmit/receive queue pair.
 298  * XXX KEBE SAYS this is likely to be what gets passed along to mac/GLDv3.
 299  */
 300 typedef struct i40e_trqpair_s {
 301         struct i40e_s *itrq_i40e;       /* Need backpointer to i40e_t. */
 302         /* XXX KEBE SAYS may need backpointer to VSI struct instead... */
 303 
 304 
 305         /*
 306          * Since these are a pair of transmit & receive, contain information
 307          * for both.
 308          */
 309 
 310         /* Receive-side structures. */
 311         kmutex_t itrq_rx_lock;
 312         mac_ring_handle_t itrq_macrxring;       /* Receive ring handle. */
 313         i40e_rx_data_t *itrq_rxdata;    /* Receive ring data. */
 314         uint64_t itrq_rxgen;            /* Generation number for mac/GLDv3. */
 315         uint32_t itrq_index;    /* Index number (needed? can use for both?) */
 316         /* XXX KEBE SAYS see above regarding receive groups. */
 317         uint32_t itrq_group_index;      /* Again, needed?  For both? */
 318         uint32_t itrq_rx_intrvec;       /* Receive interrupt vector. */
 319         uint64_t itrq_rx_vectorbit;     /* Receive interrupt vector bit. */
 320 
 321         /* Receive-side stats. */
 322         uint64_t itrq_rbytes;
 323         uint64_t itrq_rpackets; /* XXX KEBE ASKS use "ipackets" instead? */
 324 
 325         /* Transmit-side structures. */
 326         kmutex_t itrq_tx_lock;
 327         mac_ring_handle_t itrq_mactxring;       /* Transmit ring handle. */
 328         uint32_t itrq_tx_intrvec;       /* Transmit interrupt vector. */
 329         uint64_t itrq_tx_vectorbit;     /* Transmit interrupt vector bit. */
 330 #if 0
 331         /* ixgbe has these tx-side locks.  Why?!  We'll find out, I guess... */
 332         kmutex_t txr_recycle_lock;
 333         kmutex_t txr_tcb_head_lock;
 334         kmutex_t txr_tcb_tail_lock;
 335 #endif
 336         /* XXX KEBE SCREAMS - Fill in a ton more. */
 337 
 338         /* Transmit-side stats. */
 339 
 340 } i40e_trqpair_t;
 341 
 342 /*
 343  * Main i40e per-instance state.
 344  */
 345 typedef struct i40e_s {
 346         int i40e_instance;
 347         uint32_t i40e_state;
 348         uint32_t i40e_attach_progress;
 349         int i40e_fm_capabilities;
 350         mac_handle_t i40e_mac_hdl;
 351         dev_info_t *i40e_dip;
 352 
 353         /* Locks. */
 354         kmutex_t i40e_general_lock;     /* General device-access lock. */
 355         /* kmutex_t i40e_watchdog_lock; */      /* Watchdog timer lock. */
 356 
 357         /* Actually leave space for these Intel-defined structures. */
 358         struct i40e_hw  i40e_hw_space;
 359         struct i40e_osdep i40e_osdep_space;
 360 
 361         uint_t i40e_default_mtu;
 362 
 363         struct adapter_info *i40e_capab;
 364 
 365 
 366         /*
 367          * The i40e instance has one or more Virtual Station ID.  The XL710
 368          * manual (sect. 1.1.6) says there are 384 of them across its HW.  For
 369          * now, we instantiate one VSI per PCIe Physical Function (represented
 370          * by the i40e_t structure).  We could do more eventually, perhaps
 371          * creating/destroying them based on GLDv3's {add,rem}mac() callbacks.
 372          *
 373          * The VSI will hold one or more tx/rx pairs, which is where we'll
 374          * assign GLDv3 rx/tx rings.
 375          *
 376          * NOTE: The fields immediately below may become their own
 377          * structure IFF we decide to support multiple VSIs per device
 378          * attachment point (PCIe Physical Function).
 379          */
 380         int i40e_vsi_id;
 381         /*
 382          * NOTE: There's only one receive group across the VSI for now.
 383          * XXX KEBE ASKS How best does GLDv3's receive group map to VSI,
 384          * queue-pair, or something else?
 385          */
 386         int i40e_num_rx_groups; /* Should always be 1. */
 387         mac_group_handle_t i40e_rx_group_handle;
 388         /* XXX KEBE SAYS FILL IN TONS MORE HERE... */
 389 
 390         /* TX/RX queue pairs. */
 391         int i40e_num_trqpairs;
 392         i40e_trqpair_t *i40e_trqpairs;
 393         
 394 
 395         /* Ring information. */
 396         boolean_t i40e_mr_enable;       /* Multiple HW rx/tx ring enable. */
 397 
 398         /* Receive-side tunables. */
 399         uint32_t i40e_rx_ring_size;
 400         uint32_t i40e_rx_buf_size;
 401         boolean_t i40e_lro_enable;
 402         uint64_t i40e_lro_pkt_count;
 403         boolean_t i40e_rx_hcksum_enable;
 404 
 405         /* Transmit-side tunables. */
 406         uint32_t i40e_tx_ring_size;
 407         boolean_t i40e_tx_hcksum_enable;
 408         boolean_t i40e_lso_enable;
 409         
 410         uint32_t i40e_classify_mode;
 411 
 412         /* Interrupt state for this instance... */
 413 
 414         /* For each MSI-X vector, map it to interrupt cleanup. */
 415         i40e_intr_vector_t i40e_vector_map[MAX_INTR_VECTOR];
 416 
 417         uint_t i40e_intr_pri;
 418         uint_t i40e_intr_force;
 419         uint_t i40e_intr_type;
 420         int i40e_intr_cap;
 421         uint32_t i40e_intr_count;
 422         uint32_t i40e_intr_count_max;
 423         uint32_t i40e_intr_count_min;
 424         size_t i40e_intr_size;
 425         ddi_intr_handle_t *i40e_intr_handles;
 426         ddi_cb_handle_t i40e_callback_handle;
 427 
 428         /* Taskqs for SFP-change and over-temperature... */
 429         ddi_taskq_t *i40e_sfp_taskq;
 430         ddi_taskq_t *i40e_overtemp_taskq;
 431 
 432         link_state_t i40e_link_state;
 433         uint32_t i40e_link_speed;
 434         uint32_t i40e_link_duplex;
 435 
 436         kstat_t *i40e_kstats;
 437 
 438         /*
 439          * XXX KEBE ASKS -- could we not combine these?  Unless one can be
 440          * suspended while the other runs, but in that case couldn't we use
 441          * timer-flags (if flag do x.. if other-flag do y...)?
 442          */
 443         ddi_periodic_t i40e_periodic_id;
 444         /* timeout_id_t i40e_watchdog_tid; */
 445 
 446         /*
 447          * Unicast *and* multicast MAC address state.
 448          *
 449          * XXX KEBE SAYS it appears that the i40e HW doesn't differentiate
 450          * between unicast and multicast addresses.  Keep track of both
 451          */
 452         uint32_t i40e_mac_total;        /* Set to 0 if uninitialized */
 453         uint32_t i40e_mac_used;
 454         i40e_ether_addr_t i40e_mac_addrs[I40E_MAX_MAC];
 455 
 456         /* XXX KEBE SAYS TONS MORE to fill in here... */
 457 } i40e_t;
 458 
 459 /*
 460  * Classification mode
 461  */
 462 #define I40E_CLASSIFY_NONE              0
 463 #define I40E_CLASSIFY_RSS               1
 464 #define I40E_CLASSIFY_VMDQ              2
 465 #define I40E_CLASSIFY_VMDQ_RSS          3
 466 
 467 /* Values for the interrupt forcing on the NIC. */
 468 #define I40E_INTR_NONE                  0
 469 #define I40E_INTR_MSIX                  1
 470 #define I40E_INTR_MSI                   2
 471 #define I40E_INTR_LEGACY                3
 472 
 473 /* Hint that we don't want to do any polling... */
 474 #define I40E_POLL_NULL                  -1
 475 
 476 /* Values for loopback properties of the NIC. */
 477 #define I40E_LB_NONE                    0
 478 #define I40E_LB_EXTERNAL                1
 479 #define I40E_LB_INTERNAL_MAC            2
 480 #define I40E_LB_INTERNAL_PHY            3
 481 #define I40E_LB_INTERNAL_SERDES 4
 482 
 483 /*
 484  * capability/feature flags
 485  * Flags named _CAPABLE are set when the NIC hardware is capable of the feature.
 486  * Separately, the flag named _ENABLED is set when the feature is enabled.
 487  */
 488 #define I40E_FLAG_DCA_ENABLED           (u32)(1)
 489 #define I40E_FLAG_DCA_CAPABLE           (u32)(1 << 1)
 490 #define I40E_FLAG_DCB_ENABLED           (u32)(1 << 2)
 491 #define I40E_FLAG_DCB_CAPABLE           (u32)(1 << 4)
 492 #define I40E_FLAG_RSS_ENABLED           (u32)(1 << 4)
 493 #define I40E_FLAG_RSS_CAPABLE           (u32)(1 << 5)
 494 #define I40E_FLAG_VMDQ_CAPABLE          (u32)(1 << 6)
 495 #define I40E_FLAG_VMDQ_ENABLED          (u32)(1 << 7)
 496 #define I40E_FLAG_FAN_FAIL_CAPABLE      (u32)(1 << 8)
 497 #define I40E_FLAG_RSC_CAPABLE           (u32)(1 << 9)
 498 #define I40E_FLAG_SFP_PLUG_CAPABLE      (u32)(1 << 10)
 499 #define I40E_FLAG_TEMP_SENSOR_CAPABLE   (u32)(1 << 11)
 500 
 501 /*
 502  * Classification mode
 503  */
 504 #define I40E_CLASSIFY_NONE              0
 505 #define I40E_CLASSIFY_RSS               1
 506 #define I40E_CLASSIFY_VMDQ              2
 507 #define I40E_CLASSIFY_VMDQ_RSS          3
 508 
 509 /* adapter-specific info for each supported device type */
 510 typedef struct adapter_info {
 511         uint32_t        max_rx_que_num; /* maximum number of rx queues */
 512         uint32_t        min_rx_que_num; /* minimum number of rx queues */
 513         uint32_t        def_rx_que_num; /* default number of rx queues */
 514         uint32_t        max_rx_grp_num; /* maximum number of rx groups */
 515         uint32_t        min_rx_grp_num; /* minimum number of rx groups */
 516         uint32_t        def_rx_grp_num; /* default number of rx groups */
 517         uint32_t        max_tx_que_num; /* maximum number of tx queues */
 518         uint32_t        min_tx_que_num; /* minimum number of tx queues */
 519         uint32_t        def_tx_que_num; /* default number of tx queues */
 520         uint32_t        max_mtu;        /* maximum MTU size */
 521         /*
 522          * Interrupt throttling is in unit of 256 nsec
 523          */
 524         uint32_t        max_intr_throttle; /* maximum interrupt throttle */
 525         uint32_t        min_intr_throttle; /* minimum interrupt throttle */
 526         uint32_t        def_intr_throttle; /* default interrupt throttle */
 527 
 528         uint32_t        max_adminq_len; /* maximum i40e admin queue length. */
 529         uint32_t        min_adminq_len; /* minimum i40e admin queue length. */
 530         uint32_t        def_adminq_len; /* default i40e admin queue length. */
 531         /* Max/min/default i40e admin queue buffer sizes. */
 532         uint32_t        max_adminq_bufsize;
 533         uint32_t        min_adminq_bufsize;
 534         uint32_t        def_adminq_bufsize;
 535 
 536         uint32_t        max_msix_vect;  /* maximum total msix vectors */
 537         uint32_t        max_ring_vect;  /* maximum number of ring vectors */
 538         uint32_t        max_other_vect; /* maximum number of other vectors */
 539         uint32_t        other_intr;     /* "other" interrupt types handled */
 540         uint32_t        other_gpie;     /* "other" interrupt types enabling */
 541         uint32_t        flags;          /* capability flags */
 542 } adapter_info_t;
 543 
 544 /*
 545  * A structured array of kstat_named_t elements.
 546  */
 547 typedef struct i40e_kstat_s {
 548         kstat_named_t link_speed;       /* Link speed */
 549         /* XXX KEBE SAYS MORE MORE MORE!! */
 550 } i40e_kstat_t;
 551 
 552 /*
 553  * Intel likes "struct foo", while we like "foo_t".  Let's add some foo_t
 554  * for good measure.
 555  */
 556 typedef struct i40e_hw i40e_hw_t;
 557 
 558 /*
 559  * Logging functions.  Inspired by ixgbe, but less redundant.
 560  */
 561 extern void i40e_dev_err(i40e_t *, int, boolean_t, const char *, va_list);
 562 extern void i40e_error(i40e_t *, const char *, ...);
 563 extern void i40e_notice(i40e_t *, const char *, ...);
 564 extern void i40e_log(i40e_t *, const char *, ...);
 565 
 566 /*
 567  * FMA functions.
 568  */
 569 extern int i40e_check_acc_handle(ddi_acc_handle_t);
 570 extern void i40e_fm_ereport(i40e_t *, char *);
 571 
 572 /*
 573  * Interrupt handlers.  Used by i40e_main.c, implemented in i40e_intr.c
 574  */
 575 extern uint_t i40e_intr_msix(void *, void *);
 576 extern uint_t i40e_intr_msi(void *, void *);
 577 extern uint_t i40e_intr_legacy(void *, void *);
 578 
 579 /*
 580  * Receive-side functions
 581  */
 582 extern mblk_t *i40e_ring_rx(i40e_trqpair_t *, i40e_t *, int);
 583 extern mblk_t *i40e_ring_rx_poll(void *, int);
 584 
 585 /*
 586  * Transmit-side functions
 587  */
 588 mblk_t *i40e_ring_tx(void *, mblk_t *);
 589 
 590 /*
 591  * Statistics functions.
 592  */
 593 extern boolean_t i40e_init_stats(i40e_t *);
 594 extern int i40e_m_stat(void *, uint_t, uint64_t *);
 595 extern int i40e_rx_ring_stat(mac_ring_driver_t, uint_t, uint64_t *);
 596 extern int i40e_tx_ring_stat(mac_ring_driver_t, uint_t, uint64_t *);
 597 
 598 /*
 599  * MAC/GLDv3 functions, and functions called by MAC/GLDv3 support code.
 600  */
 601 extern boolean_t i40e_register_mac(i40e_t *);
 602 extern boolean_t i40e_start(i40e_t *, boolean_t);
 603 extern void i40e_stop(i40e_t *, boolean_t);
 604 extern boolean_t i40e_hwadd_mac(i40e_t *, struct i40e_hw *, const uint8_t *);
 605 
 606 /*
 607  * Timing functions
 608  */
 609 extern void i40e_enable_watchdog_timer(i40e_t *);
 610 extern void i40e_disable_watchdog_timer(i40e_t *);
 611 
 612 /*
 613  * DMA & buffer functions
 614  */
 615 extern boolean_t i40e_alloc_dma(i40e_t *);
 616 extern void i40e_free_dma(i40e_t *);
 617 extern boolean_t i40e_alloc_rx_data(i40e_t *);
 618 extern void i40e_free_rx_data(i40e_t *);
 619 extern void i40e_set_fma_flags(boolean_t);
 620 
 621 #ifdef __cplusplus
 622 }
 623 #endif
 624 
 625 #endif /* _I40E_SW_H */