1 /*
   2  * This file and its contents are supplied under the terms of the
   3  * Common Development and Distribution License ("CDDL"), version 1.0.
   4  * You may only use this file in accordance with the terms of version
   5  * 1.0 of the CDDL.
   6  *
   7  * A full copy of the text of the CDDL should have accompanied this
   8  * source.  A copy of the CDDL is also available via the Internet at
   9  * http://www.illumos.org/license/CDDL.
  10  */
  11 
  12 /*
  13  * Copyright 2015 OmniTI Computer Consulting, Inc. All rights reserved.
  14  */
  15 
  16 #include "i40e_sw.h"
  17 
  18 /* NOTE - this may need to be double on SPARC... */
  19 #define I40E_DMA_ALIGNMENT 0x0000000000001000ull
  20 
  21 /*
  22  * DMA attributes for tx/rx descriptors.
  23  */
  24 #if 0   /* NOT YET */
  25 static ddi_dma_attr_t i40e_desc_dma_attr = {
  26         DMA_ATTR_V0,                    /* version number */
  27         0x0000000000000000ull,          /* low address */
  28         0xFFFFFFFFFFFFFFFFull,          /* high address */
  29         0x00000000FFFFFFFFull,          /* dma counter max */
  30         I40E_DMA_ALIGNMENT,             /* alignment */
  31         0x00000FFF,                     /* burst sizes */
  32         0x00000001,                     /* minimum transfer size */
  33         0x00000000FFFFFFFFull,          /* maximum transfer size */
  34         0xFFFFFFFFFFFFFFFFull,          /* maximum segment size */
  35         1,                              /* scatter/gather list length */
  36         0x00000001,                     /* granularity */
  37         DDI_DMA_FLAGERR                 /* DMA flags */
  38 };
  39 
  40 /*
  41  * DMA attributes for tx/rx buffers.
  42  */
  43 /*
  44  * DMA attributes for transmit.
  45  */
  46 static ddi_dma_attr_t i40e_tx_dma_attr = {
  47         DMA_ATTR_V0,                    /* version number */
  48         0x0000000000000000ull,          /* low address */
  49         0xFFFFFFFFFFFFFFFFull,          /* high address */
  50         0x00000000FFFFFFFFull,          /* dma counter max */
  51         1,                              /* alignment */
  52         0x00000FFF,                     /* burst sizes */
  53         0x00000001,                     /* minimum transfer size */
  54         0x00000000FFFFFFFFull,          /* maximum transfer size */
  55         0xFFFFFFFFFFFFFFFFull,          /* maximum segment size  */
  56         MAX_COOKIE,                     /* scatter/gather list length */
  57         0x00000001,                     /* granularity */
  58         DDI_DMA_FLAGERR                 /* DMA flags */
  59 };
  60 
  61 /*
  62  * DMA access attributes for descriptors.
  63  */
  64 static ddi_device_acc_attr_t i40e_desc_acc_attr = {
  65         DDI_DEVICE_ATTR_V0,
  66         DDI_STRUCTURE_LE_ACC,
  67         DDI_STRICTORDER_ACC
  68 };
  69 
  70 /*
  71  * DMA access attributes for buffers.
  72  */
  73 static ddi_device_acc_attr_t i40e_buf_acc_attr = {
  74         DDI_DEVICE_ATTR_V0,
  75         DDI_NEVERSWAP_ACC,
  76         DDI_STRICTORDER_ACC
  77 };
  78 #endif  /* NOT YET */
  79 
  80 boolean_t
  81 i40e_alloc_rx_data(i40e_t *i40e)
  82 {
  83         /* XXX KEBE SAYS FILL ME IN */
  84         return (B_TRUE);
  85 }
  86 
  87 boolean_t
  88 i40e_alloc_dma(i40e_t *i40e)
  89 {
  90 #if 0   /* NOT YET */
  91         i40e_rx_ring_t *rxr;
  92         i40e_rx_data_t *rxd;
  93         i40e_tx_data_t *txr;
  94         int i;
  95 
  96         for (i = 0; i < i40e->i40e_num_rx_rings; i++) {
  97                 /* Allocate receive descriptor ring and control block lists. */
  98                 rxr = &i40e->i40e_rx_rings[i];
  99                 rxd = rxr->rxr_data;
 100 
 101                 if (!i40e_alloc_rbd_ring(rxd) || !i40e_alloc_rcb_lists(rxd)) {
 102                         i40e_free_dma(i40e);
 103                         return (B_FALSE);
 104                 }
 105         }
 106 
 107         for (i = 0; i < i40e->i40e_num_tx_rings; i++) {
 108                 /* Allocate transmit descriptor ring and control block lists. */
 109                 txr = &i40e->i40e_tx_rings[i];
 110 
 111                 if (!i40e_alloc_tbd_ring(txr) || i40e_alloc_tcb_lists(txr)) {
 112                         i40e_free_dma(i40e);
 113                         return (B_FALSE);
 114                 }
 115         }
 116 #endif  /* NOT YET */
 117 
 118         return (B_TRUE);
 119 }
 120 
 121 /*
 122  * DMA freeing functions.
 123  */
 124 
 125 #if 0
 126 static void
 127 i40e_free_rbd_ring(i40e_rx_data_t *rxd)
 128 {
 129 }
 130 
 131 static void
 132 i40e_free_rcb_lists(i40e_rx_data_t *rxd)
 133 {
 134 }
 135 
 136 static void
 137 i40e_free_tbd_ring(i40e_trqpair_t *txr)
 138 {
 139 }
 140 
 141 static void
 142 i40e_free_tcb_lists(i40e_trqpair_t *txr)
 143 {
 144 }
 145 #endif
 146 
 147 void
 148 i40e_free_dma(i40e_t *i40e)
 149 {
 150 #if 0
 151         i40e_rx_ring_t *rxr;
 152         i40e_rx_data_t *rxd;
 153         i40e_tx_ring_t *txr;
 154         int i;
 155 
 156         for (i = 0; i < i40e->i40e_num_rx_rings; i++) {
 157                 /* Free receive descriptor ring and control block lists. */
 158                 rxr = &i40e->i40e_rx_rings[i];
 159                 rxd = rxr->rxr_data;
 160 
 161                 i40e_free_rbd_ring(rxd);
 162                 i40e_free_rcb_lists(rxd);
 163         }
 164 
 165         for (i = 0; i < i40e->i40e_num_tx_rings; i++) {
 166                 /* Free transmit descriptor ring and control block lists. */
 167                 txr = &i40e->i40e_tx_rings[i];
 168 
 169                 i40e_free_tbd_ring(txr);
 170                 i40e_free_tcb_lists(txr);
 171         }
 172 #endif
 173 }
 174 
 175 void
 176 i40e_free_rx_data(i40e_t *i40e)
 177 {
 178         /* XXX KEBE SAYS FILL ME IN */
 179 }
 180 
 181 void
 182 i40e_set_fma_flags(boolean_t dma_flag)
 183 {
 184         extern ddi_dma_attr_t i40e_buf_dma_attr; /* i40e_osdep.c */
 185 
 186         if (dma_flag) {
 187 #if 0
 188                 i40e_desc_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;
 189                 i40e_tx_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;
 190 #endif
 191                 i40e_buf_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;
 192         } else {
 193 #if 0
 194                 i40e_desc_dma_attr.dma_attr_flags = 0;
 195                 i40e_tx_dma_attr.dma_attr_flags = 0;
 196 #endif
 197                 i40e_buf_dma_attr.dma_attr_flags = 0;
 198         }
 199 }