--- old/usr/src/test/os-tests/tests/xsave/data/mdb_xregs.zmm.32.man.txt
          +++ new/usr/src/test/os-tests/tests/xsave/data/mdb_xregs.zmm.32.man.txt

   1    1  ()                                                                          ()
   2    2  
   3    3  x86 FPU with 512-bit %zmm registers xcr0            0xe7 xfd             0x0
   4    4  xstate_bv       0x67 xcomp_bv        0x0
   5    5  
   6    6  %zmm0  [511:384] 0x12900931 12900930 1290092f 1290092e
   7    7         [383:256] 0x1290092d 1290092c 1290092b 1290092a %ymm0  [255:128]
   8    8  0x12900929 12900928 12900927 12900926 %xmm0  [127:0]   0x12900925 12900924
   9    9  12900923 12900922
  10   10  
  11   11  %zmm1  [511:384] 0x12900941 12900940 1290093f 1290093e
  12   12         [383:256] 0x1290093d 1290093c 1290093b 1290093a %ymm1  [255:128]
  13   13  0x12900939 12900938 12900937 12900936 %xmm1  [127:0]   0x12900935 12900934
  14   14  12900933 12900932
  15   15  
  16   16  %zmm2  [511:384] 0x12900951 12900950 1290094f 1290094e
  17   17         [383:256] 0x1290094d 1290094c 1290094b 1290094a %ymm2  [255:128]
  18   18  0x12900949 12900948 12900947 12900946 %xmm2  [127:0]   0x12900945 12900944
  19   19  12900943 12900942
  20   20  
  21   21  %zmm3  [511:384] 0x12900961 12900960 1290095f 1290095e
  22   22         [383:256] 0x1290095d 1290095c 1290095b 1290095a %ymm3  [255:128]
  23   23  0x12900959 12900958 12900957 12900956 %xmm3  [127:0]   0x12900955 12900954
  24   24  12900953 12900952
  25   25  
  26   26  %zmm4  [511:384] 0x12900971 12900970 1290096f 1290096e
  27   27         [383:256] 0x1290096d 1290096c 1290096b 1290096a %ymm4  [255:128]
  28   28  0x12900969 12900968 12900967 12900966 %xmm4  [127:0]   0x12900965 12900964
  29   29  12900963 12900962
  30   30  
  31   31  %zmm5  [511:384] 0x12900981 12900980 1290097f 1290097e
  32   32         [383:256] 0x1290097d 1290097c 1290097b 1290097a %ymm5  [255:128]
  33   33  0x12900979 12900978 12900977 12900976 %xmm5  [127:0]   0x12900975 12900974
  34   34  12900973 12900972
  35   35  
  36   36  %zmm6  [511:384] 0x12900991 12900990 1290098f 1290098e
  37   37         [383:256] 0x1290098d 1290098c 1290098b 1290098a %ymm6  [255:128]
  38   38  0x12900989 12900988 12900987 12900986 %xmm6  [127:0]   0x12900985 12900984
  39   39  12900983 12900982
  40   40  
  41   41  %zmm7  [511:384] 0x129009a1 129009a0 1290099f 1290099e
  42   42         [383:256] 0x1290099d 1290099c 1290099b 1290099a %ymm7  [255:128]
  43   43  0x12900999 12900998 12900997 12900996 %xmm7  [127:0]   0x12900995 12900994
  44   44  12900993 12900992
  45   45  
  46   46  %k0  0x00000000129009a2         %k1  0x00000000129009a3 %k2
  47   47  0x00000000129009a6         %k3  0x00000000129009a7 %k4  0x00000000129009aa
  48   48  %k5  0x00000000129009ab %k6  0x00000000129009ae         %k7
  49   49  0x00000000129009af
  50   50  
  51   51  387 and FP Control State cw     0x137f (IM|DM|ZM|OM|UM|PM|SIG64|RTN|A) sw
  52   52  0x0000 (TOP=0t0) (0) xcp sw 0x0000 (0)
  53   53  
  54   54  ipoff  0 cssel  0x43 dtoff  0 dtsel  0x4b
  55   55  
  56   56  %st0   0x0000.0000000000000000 = +0.0000000000000000e+00 empty %st1
  57   57  0x0000.0000000000000000 = +0.0000000000000000e+00 empty %st2
  58   58  0x0000.0000000000000000 = +0.0000000000000000e+00 empty %st3
  59   59  0x0000.0000000000000000 = +0.0000000000000000e+00 empty %st4
  60   60  0x0000.0000000000000000 = +0.0000000000000000e+00 empty %st5
  61   61  0x0000.0000000000000000 = +0.0000000000000000e+00 empty %st6
  62   62  0x0000.0000000000000000 = +0.0000000000000000e+00 empty %st7
  63   63  0x0000.0000000000000000 = +0.0000000000000000e+00 empty
  64   64  
  65   65  SSE Control State mxcsr  0x1f80 (IM|DM|ZM|OM|UM|PM|RTN) xcp    0x0000 (RTN)
  66   66  
  67   67                                                                              ()

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