riscv New usr/src/test/util-tests/tests/dis/risc-v/tst.supervisor.out

   1     libdis_test:      73 00 00 00        ecall
   2     libdis_test+0x4:  73 00 10 00        ebreak
   3     libdis_test+0x8:  73 00 20 00        uret
   4     libdis_test+0xc:  73 00 20 10        sret
   5     libdis_test+0x10: 73 00 20 30        mret
   6     libdis_test+0x14: 73 00 50 10        wfi
   7     libdis_test+0x18: 73 80 62 12        sfence.vma t0,t1