8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
24 */
25
26 /*
27 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
28 */
29
30 #include "ixgbe_sw.h"
31
32 static int ixgbe_tx_copy(ixgbe_tx_ring_t *, tx_control_block_t *, mblk_t *,
33 uint32_t, boolean_t);
34 static int ixgbe_tx_bind(ixgbe_tx_ring_t *, tx_control_block_t *, mblk_t *,
35 uint32_t);
36 static int ixgbe_tx_fill_ring(ixgbe_tx_ring_t *, link_list_t *,
37 ixgbe_tx_context_t *, size_t);
38 static void ixgbe_save_desc(tx_control_block_t *, uint64_t, size_t);
39 static tx_control_block_t *ixgbe_get_free_list(ixgbe_tx_ring_t *);
40
41 static int ixgbe_get_context(mblk_t *, ixgbe_tx_context_t *);
42 static boolean_t ixgbe_check_context(ixgbe_tx_ring_t *,
43 ixgbe_tx_context_t *);
44 static void ixgbe_fill_context(struct ixgbe_adv_tx_context_desc *,
45 ixgbe_tx_context_t *);
46
47 #ifndef IXGBE_DEBUG
1061 ASSERT(tx_ring->work_list[tcb_index] == NULL);
1062 tx_ring->work_list[tcb_index] = tcb;
1063
1064 tcb_index = index;
1065 tcb = (tx_control_block_t *)LIST_POP_HEAD(pending_list);
1066 }
1067
1068 if (load_context) {
1069 /*
1070 * Count the context descriptor for
1071 * the first tx control block.
1072 */
1073 first_tcb->desc_num++;
1074 }
1075 first_tcb->last_index = PREV_INDEX(index, 1, tx_ring->ring_size);
1076
1077 /*
1078 * The Insert Ethernet CRC (IFCS) bit and the checksum fields are only
1079 * valid in the first descriptor of the packet.
1080 * Setting paylen in every first_tbd for all parts.
1081 * 82599 requires the packet length in paylen field with or without
1082 * LSO and 82598 will ignore it in non-LSO mode.
1083 */
1084 ASSERT(first_tbd != NULL);
1085 first_tbd->read.cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS;
1086
1087 switch (hw->mac.type) {
1088 case ixgbe_mac_82598EB:
1089 if (ctx != NULL && ctx->lso_flag) {
1090 first_tbd->read.cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
1091 first_tbd->read.olinfo_status |=
1092 (mbsize - ctx->mac_hdr_len - ctx->ip_hdr_len
1093 - ctx->l4_hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT;
1094 }
1095 break;
1096
1097 case ixgbe_mac_82599EB:
1098 if (ctx != NULL && ctx->lso_flag) {
1099 first_tbd->read.cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
1100 first_tbd->read.olinfo_status |=
1101 (mbsize - ctx->mac_hdr_len - ctx->ip_hdr_len
1102 - ctx->l4_hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT;
1103 } else {
1104 first_tbd->read.olinfo_status |=
1105 (mbsize << IXGBE_ADVTXD_PAYLEN_SHIFT);
1106 }
1107 break;
1108
1109 default:
1110 break;
1111 }
1112
1113 /* Set hardware checksum bits */
1114 if (hcksum_flags != 0) {
1115 if (hcksum_flags & HCK_IPV4_HDRCKSUM)
1116 first_tbd->read.olinfo_status |=
1117 IXGBE_ADVTXD_POPTS_IXSM;
|
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
24 */
25
26 /*
27 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
28 * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
29 */
30
31 #include "ixgbe_sw.h"
32
33 static int ixgbe_tx_copy(ixgbe_tx_ring_t *, tx_control_block_t *, mblk_t *,
34 uint32_t, boolean_t);
35 static int ixgbe_tx_bind(ixgbe_tx_ring_t *, tx_control_block_t *, mblk_t *,
36 uint32_t);
37 static int ixgbe_tx_fill_ring(ixgbe_tx_ring_t *, link_list_t *,
38 ixgbe_tx_context_t *, size_t);
39 static void ixgbe_save_desc(tx_control_block_t *, uint64_t, size_t);
40 static tx_control_block_t *ixgbe_get_free_list(ixgbe_tx_ring_t *);
41
42 static int ixgbe_get_context(mblk_t *, ixgbe_tx_context_t *);
43 static boolean_t ixgbe_check_context(ixgbe_tx_ring_t *,
44 ixgbe_tx_context_t *);
45 static void ixgbe_fill_context(struct ixgbe_adv_tx_context_desc *,
46 ixgbe_tx_context_t *);
47
48 #ifndef IXGBE_DEBUG
1062 ASSERT(tx_ring->work_list[tcb_index] == NULL);
1063 tx_ring->work_list[tcb_index] = tcb;
1064
1065 tcb_index = index;
1066 tcb = (tx_control_block_t *)LIST_POP_HEAD(pending_list);
1067 }
1068
1069 if (load_context) {
1070 /*
1071 * Count the context descriptor for
1072 * the first tx control block.
1073 */
1074 first_tcb->desc_num++;
1075 }
1076 first_tcb->last_index = PREV_INDEX(index, 1, tx_ring->ring_size);
1077
1078 /*
1079 * The Insert Ethernet CRC (IFCS) bit and the checksum fields are only
1080 * valid in the first descriptor of the packet.
1081 * Setting paylen in every first_tbd for all parts.
1082 * 82599 and X540 require the packet length in paylen field with or
1083 * without LSO and 82598 will ignore it in non-LSO mode.
1084 */
1085 ASSERT(first_tbd != NULL);
1086 first_tbd->read.cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS;
1087
1088 switch (hw->mac.type) {
1089 case ixgbe_mac_82598EB:
1090 if (ctx != NULL && ctx->lso_flag) {
1091 first_tbd->read.cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
1092 first_tbd->read.olinfo_status |=
1093 (mbsize - ctx->mac_hdr_len - ctx->ip_hdr_len
1094 - ctx->l4_hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT;
1095 }
1096 break;
1097
1098 case ixgbe_mac_82599EB:
1099 case ixgbe_mac_X540:
1100 if (ctx != NULL && ctx->lso_flag) {
1101 first_tbd->read.cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
1102 first_tbd->read.olinfo_status |=
1103 (mbsize - ctx->mac_hdr_len - ctx->ip_hdr_len
1104 - ctx->l4_hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT;
1105 } else {
1106 first_tbd->read.olinfo_status |=
1107 (mbsize << IXGBE_ADVTXD_PAYLEN_SHIFT);
1108 }
1109 break;
1110
1111 default:
1112 break;
1113 }
1114
1115 /* Set hardware checksum bits */
1116 if (hcksum_flags != 0) {
1117 if (hcksum_flags & HCK_IPV4_HDRCKSUM)
1118 first_tbd->read.olinfo_status |=
1119 IXGBE_ADVTXD_POPTS_IXSM;
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