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3014 Intel X540 Support
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--- old/usr/src/uts/common/io/ixgbe/ixgbe_stat.c
+++ new/usr/src/uts/common/io/ixgbe/ixgbe_stat.c
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
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18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21
22 22 /*
23 23 * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
24 24 */
25 25
26 26 /*
27 27 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
28 + * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
28 29 */
29 30
30 31 #include "ixgbe_sw.h"
31 32
32 33 /*
33 34 * Update driver private statistics.
34 35 */
35 36 static int
36 37 ixgbe_update_stats(kstat_t *ks, int rw)
37 38 {
38 39 ixgbe_t *ixgbe;
39 40 struct ixgbe_hw *hw;
40 41 ixgbe_stat_t *ixgbe_ks;
41 42 int i;
42 43
43 44 if (rw == KSTAT_WRITE)
44 45 return (EACCES);
45 46
46 47 ixgbe = (ixgbe_t *)ks->ks_private;
47 48 ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;
48 49 hw = &ixgbe->hw;
49 50
50 51 mutex_enter(&ixgbe->gen_lock);
51 52
52 53 /*
53 54 * Basic information
54 55 */
55 56 ixgbe_ks->link_speed.value.ui64 = ixgbe->link_speed;
56 57 ixgbe_ks->reset_count.value.ui64 = ixgbe->reset_count;
57 58 ixgbe_ks->lroc.value.ui64 = ixgbe->lro_pkt_count;
58 59
59 60 #ifdef IXGBE_DEBUG
60 61 ixgbe_ks->rx_frame_error.value.ui64 = 0;
61 62 ixgbe_ks->rx_cksum_error.value.ui64 = 0;
62 63 ixgbe_ks->rx_exceed_pkt.value.ui64 = 0;
63 64 for (i = 0; i < ixgbe->num_rx_rings; i++) {
64 65 ixgbe_ks->rx_frame_error.value.ui64 +=
65 66 ixgbe->rx_rings[i].stat_frame_error;
66 67 ixgbe_ks->rx_cksum_error.value.ui64 +=
67 68 ixgbe->rx_rings[i].stat_cksum_error;
68 69 ixgbe_ks->rx_exceed_pkt.value.ui64 +=
69 70 ixgbe->rx_rings[i].stat_exceed_pkt;
70 71 }
71 72
72 73 ixgbe_ks->tx_overload.value.ui64 = 0;
73 74 ixgbe_ks->tx_fail_no_tbd.value.ui64 = 0;
74 75 ixgbe_ks->tx_fail_no_tcb.value.ui64 = 0;
75 76 ixgbe_ks->tx_fail_dma_bind.value.ui64 = 0;
76 77 ixgbe_ks->tx_reschedule.value.ui64 = 0;
77 78 for (i = 0; i < ixgbe->num_tx_rings; i++) {
78 79 ixgbe_ks->tx_overload.value.ui64 +=
79 80 ixgbe->tx_rings[i].stat_overload;
80 81 ixgbe_ks->tx_fail_no_tbd.value.ui64 +=
81 82 ixgbe->tx_rings[i].stat_fail_no_tbd;
82 83 ixgbe_ks->tx_fail_no_tcb.value.ui64 +=
83 84 ixgbe->tx_rings[i].stat_fail_no_tcb;
84 85 ixgbe_ks->tx_fail_dma_bind.value.ui64 +=
85 86 ixgbe->tx_rings[i].stat_fail_dma_bind;
86 87 ixgbe_ks->tx_reschedule.value.ui64 +=
87 88 ixgbe->tx_rings[i].stat_reschedule;
88 89 }
89 90 #endif
90 91
91 92 /*
92 93 * Hardware calculated statistics.
93 94 */
94 95 ixgbe_ks->gprc.value.ui64 = 0;
95 96 ixgbe_ks->gptc.value.ui64 = 0;
96 97 ixgbe_ks->tor.value.ui64 = 0;
97 98 ixgbe_ks->tot.value.ui64 = 0;
98 99 for (i = 0; i < 16; i++) {
99 100 ixgbe_ks->qprc[i].value.ui64 +=
100 101 IXGBE_READ_REG(hw, IXGBE_QPRC(i));
101 102 ixgbe_ks->gprc.value.ui64 += ixgbe_ks->qprc[i].value.ui64;
102 103 ixgbe_ks->qptc[i].value.ui64 +=
103 104 IXGBE_READ_REG(hw, IXGBE_QPTC(i));
104 105 ixgbe_ks->gptc.value.ui64 += ixgbe_ks->qptc[i].value.ui64;
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105 106 ixgbe_ks->qbrc[i].value.ui64 +=
106 107 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
107 108 ixgbe_ks->tor.value.ui64 += ixgbe_ks->qbrc[i].value.ui64;
108 109 switch (hw->mac.type) {
109 110 case ixgbe_mac_82598EB:
110 111 ixgbe_ks->qbtc[i].value.ui64 +=
111 112 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
112 113 break;
113 114
114 115 case ixgbe_mac_82599EB:
116 + case ixgbe_mac_X540:
115 117 ixgbe_ks->qbtc[i].value.ui64 +=
116 118 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
117 119 ixgbe_ks->qbtc[i].value.ui64 +=
118 120 ((uint64_t)((IXGBE_READ_REG(hw,
119 121 IXGBE_QBTC_H(i))) & 0xF) << 32);
120 122 break;
121 123
122 124 default:
123 125 break;
124 126 }
125 127 ixgbe_ks->tot.value.ui64 += ixgbe_ks->qbtc[i].value.ui64;
126 128 }
127 129 /*
128 130 * This is a Workaround:
129 131 * Currently h/w GORCH, GOTCH, TORH registers are not
130 132 * correctly implemented. We found that the values in
131 133 * these registers are same as those in corresponding
132 134 * *L registers (i.e. GORCL, GOTCL, and TORL). Here the
133 135 * gor and got stat data will not be retrieved through
134 136 * GORC{H/L} and GOTC{H/L} registers but be obtained by
135 137 * simply assigning tor/tot stat data, so the gor/got
136 138 * stat data will not be accurate.
137 139 */
138 140 ixgbe_ks->gor.value.ui64 = ixgbe_ks->tor.value.ui64;
139 141 ixgbe_ks->got.value.ui64 = ixgbe_ks->tot.value.ui64;
140 142
141 143 ixgbe_ks->prc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC64);
142 144 ixgbe_ks->prc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC127);
143 145 ixgbe_ks->prc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC255);
144 146 ixgbe_ks->prc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC511);
145 147 ixgbe_ks->prc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1023);
146 148 ixgbe_ks->prc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1522);
147 149 ixgbe_ks->ptc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC64);
148 150 ixgbe_ks->ptc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC127);
149 151 ixgbe_ks->ptc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC255);
150 152 ixgbe_ks->ptc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC511);
151 153 ixgbe_ks->ptc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1023);
152 154 ixgbe_ks->ptc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1522);
153 155
154 156 ixgbe_ks->mspdc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MSPDC);
155 157 for (i = 0; i < 8; i++)
156 158 ixgbe_ks->mpc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MPC(i));
157 159 ixgbe_ks->mlfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MLFC);
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158 160 ixgbe_ks->mrfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MRFC);
159 161 ixgbe_ks->rlec.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RLEC);
160 162 ixgbe_ks->lxontxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
161 163 switch (hw->mac.type) {
162 164 case ixgbe_mac_82598EB:
163 165 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
164 166 IXGBE_LXONRXC);
165 167 break;
166 168
167 169 case ixgbe_mac_82599EB:
170 + case ixgbe_mac_X540:
168 171 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
169 172 IXGBE_LXONRXCNT);
170 173 break;
171 174
172 175 default:
173 176 break;
174 177 }
175 178 ixgbe_ks->lxofftxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
176 179 switch (hw->mac.type) {
177 180 case ixgbe_mac_82598EB:
178 181 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
179 182 IXGBE_LXOFFRXC);
180 183 break;
181 184
182 185 case ixgbe_mac_82599EB:
186 + case ixgbe_mac_X540:
183 187 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
184 188 IXGBE_LXOFFRXCNT);
185 189 break;
186 190
187 191 default:
188 192 break;
189 193 }
190 194 ixgbe_ks->ruc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RUC);
191 195 ixgbe_ks->rfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RFC);
192 196 ixgbe_ks->roc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_ROC);
193 197 ixgbe_ks->rjc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RJC);
194 198
195 199 mutex_exit(&ixgbe->gen_lock);
196 200
197 201 if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK)
198 202 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_UNAFFECTED);
199 203
200 204 return (0);
201 205 }
202 206
203 207 /*
204 208 * Create and initialize the driver private statistics.
205 209 */
206 210 int
207 211 ixgbe_init_stats(ixgbe_t *ixgbe)
208 212 {
209 213 kstat_t *ks;
210 214 ixgbe_stat_t *ixgbe_ks;
211 215
212 216 /*
213 217 * Create and init kstat
214 218 */
215 219 ks = kstat_create(MODULE_NAME, ddi_get_instance(ixgbe->dip),
216 220 "statistics", "net", KSTAT_TYPE_NAMED,
217 221 sizeof (ixgbe_stat_t) / sizeof (kstat_named_t), 0);
218 222
219 223 if (ks == NULL) {
220 224 ixgbe_error(ixgbe,
221 225 "Could not create kernel statistics");
222 226 return (IXGBE_FAILURE);
223 227 }
224 228
225 229 ixgbe->ixgbe_ks = ks;
226 230
227 231 ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;
228 232
229 233 /*
230 234 * Initialize all the statistics.
231 235 */
232 236 kstat_named_init(&ixgbe_ks->link_speed, "link_speed",
233 237 KSTAT_DATA_UINT64);
234 238 kstat_named_init(&ixgbe_ks->reset_count, "reset_count",
235 239 KSTAT_DATA_UINT64);
236 240
237 241 #ifdef IXGBE_DEBUG
238 242 kstat_named_init(&ixgbe_ks->rx_frame_error, "rx_frame_error",
239 243 KSTAT_DATA_UINT64);
240 244 kstat_named_init(&ixgbe_ks->rx_cksum_error, "rx_cksum_error",
241 245 KSTAT_DATA_UINT64);
242 246 kstat_named_init(&ixgbe_ks->rx_exceed_pkt, "rx_exceed_pkt",
243 247 KSTAT_DATA_UINT64);
244 248 kstat_named_init(&ixgbe_ks->tx_overload, "tx_overload",
245 249 KSTAT_DATA_UINT64);
246 250 kstat_named_init(&ixgbe_ks->tx_fail_no_tbd, "tx_fail_no_tbd",
247 251 KSTAT_DATA_UINT64);
248 252 kstat_named_init(&ixgbe_ks->tx_fail_no_tcb, "tx_fail_no_tcb",
249 253 KSTAT_DATA_UINT64);
250 254 kstat_named_init(&ixgbe_ks->tx_fail_dma_bind, "tx_fail_dma_bind",
251 255 KSTAT_DATA_UINT64);
252 256 kstat_named_init(&ixgbe_ks->tx_reschedule, "tx_reschedule",
253 257 KSTAT_DATA_UINT64);
254 258 #endif
255 259
256 260 kstat_named_init(&ixgbe_ks->gprc, "good_pkts_recvd",
257 261 KSTAT_DATA_UINT64);
258 262 kstat_named_init(&ixgbe_ks->gptc, "good_pkts_xmitd",
259 263 KSTAT_DATA_UINT64);
260 264 kstat_named_init(&ixgbe_ks->gor, "good_octets_recvd",
261 265 KSTAT_DATA_UINT64);
262 266 kstat_named_init(&ixgbe_ks->got, "good_octets_xmitd",
263 267 KSTAT_DATA_UINT64);
264 268 kstat_named_init(&ixgbe_ks->prc64, "pkts_recvd_( 64b)",
265 269 KSTAT_DATA_UINT64);
266 270 kstat_named_init(&ixgbe_ks->prc127, "pkts_recvd_( 65- 127b)",
267 271 KSTAT_DATA_UINT64);
268 272 kstat_named_init(&ixgbe_ks->prc255, "pkts_recvd_( 127- 255b)",
269 273 KSTAT_DATA_UINT64);
270 274 kstat_named_init(&ixgbe_ks->prc511, "pkts_recvd_( 256- 511b)",
271 275 KSTAT_DATA_UINT64);
272 276 kstat_named_init(&ixgbe_ks->prc1023, "pkts_recvd_( 511-1023b)",
273 277 KSTAT_DATA_UINT64);
274 278 kstat_named_init(&ixgbe_ks->prc1522, "pkts_recvd_(1024-1522b)",
275 279 KSTAT_DATA_UINT64);
276 280 kstat_named_init(&ixgbe_ks->ptc64, "pkts_xmitd_( 64b)",
277 281 KSTAT_DATA_UINT64);
278 282 kstat_named_init(&ixgbe_ks->ptc127, "pkts_xmitd_( 65- 127b)",
279 283 KSTAT_DATA_UINT64);
280 284 kstat_named_init(&ixgbe_ks->ptc255, "pkts_xmitd_( 128- 255b)",
281 285 KSTAT_DATA_UINT64);
282 286 kstat_named_init(&ixgbe_ks->ptc511, "pkts_xmitd_( 255- 511b)",
283 287 KSTAT_DATA_UINT64);
284 288 kstat_named_init(&ixgbe_ks->ptc1023, "pkts_xmitd_( 512-1023b)",
285 289 KSTAT_DATA_UINT64);
286 290 kstat_named_init(&ixgbe_ks->ptc1522, "pkts_xmitd_(1024-1522b)",
287 291 KSTAT_DATA_UINT64);
288 292
289 293 kstat_named_init(&ixgbe_ks->qprc[0], "queue_pkts_recvd [ 0]",
290 294 KSTAT_DATA_UINT64);
291 295 kstat_named_init(&ixgbe_ks->qprc[1], "queue_pkts_recvd [ 1]",
292 296 KSTAT_DATA_UINT64);
293 297 kstat_named_init(&ixgbe_ks->qprc[2], "queue_pkts_recvd [ 2]",
294 298 KSTAT_DATA_UINT64);
295 299 kstat_named_init(&ixgbe_ks->qprc[3], "queue_pkts_recvd [ 3]",
296 300 KSTAT_DATA_UINT64);
297 301 kstat_named_init(&ixgbe_ks->qprc[4], "queue_pkts_recvd [ 4]",
298 302 KSTAT_DATA_UINT64);
299 303 kstat_named_init(&ixgbe_ks->qprc[5], "queue_pkts_recvd [ 5]",
300 304 KSTAT_DATA_UINT64);
301 305 kstat_named_init(&ixgbe_ks->qprc[6], "queue_pkts_recvd [ 6]",
302 306 KSTAT_DATA_UINT64);
303 307 kstat_named_init(&ixgbe_ks->qprc[7], "queue_pkts_recvd [ 7]",
304 308 KSTAT_DATA_UINT64);
305 309 kstat_named_init(&ixgbe_ks->qprc[8], "queue_pkts_recvd [ 8]",
306 310 KSTAT_DATA_UINT64);
307 311 kstat_named_init(&ixgbe_ks->qprc[9], "queue_pkts_recvd [ 9]",
308 312 KSTAT_DATA_UINT64);
309 313 kstat_named_init(&ixgbe_ks->qprc[10], "queue_pkts_recvd [10]",
310 314 KSTAT_DATA_UINT64);
311 315 kstat_named_init(&ixgbe_ks->qprc[11], "queue_pkts_recvd [11]",
312 316 KSTAT_DATA_UINT64);
313 317 kstat_named_init(&ixgbe_ks->qprc[12], "queue_pkts_recvd [12]",
314 318 KSTAT_DATA_UINT64);
315 319 kstat_named_init(&ixgbe_ks->qprc[13], "queue_pkts_recvd [13]",
316 320 KSTAT_DATA_UINT64);
317 321 kstat_named_init(&ixgbe_ks->qprc[14], "queue_pkts_recvd [14]",
318 322 KSTAT_DATA_UINT64);
319 323 kstat_named_init(&ixgbe_ks->qprc[15], "queue_pkts_recvd [15]",
320 324 KSTAT_DATA_UINT64);
321 325
322 326 kstat_named_init(&ixgbe_ks->qptc[0], "queue_pkts_xmitd [ 0]",
323 327 KSTAT_DATA_UINT64);
324 328 kstat_named_init(&ixgbe_ks->qptc[1], "queue_pkts_xmitd [ 1]",
325 329 KSTAT_DATA_UINT64);
326 330 kstat_named_init(&ixgbe_ks->qptc[2], "queue_pkts_xmitd [ 2]",
327 331 KSTAT_DATA_UINT64);
328 332 kstat_named_init(&ixgbe_ks->qptc[3], "queue_pkts_xmitd [ 3]",
329 333 KSTAT_DATA_UINT64);
330 334 kstat_named_init(&ixgbe_ks->qptc[4], "queue_pkts_xmitd [ 4]",
331 335 KSTAT_DATA_UINT64);
332 336 kstat_named_init(&ixgbe_ks->qptc[5], "queue_pkts_xmitd [ 5]",
333 337 KSTAT_DATA_UINT64);
334 338 kstat_named_init(&ixgbe_ks->qptc[6], "queue_pkts_xmitd [ 6]",
335 339 KSTAT_DATA_UINT64);
336 340 kstat_named_init(&ixgbe_ks->qptc[7], "queue_pkts_xmitd [ 7]",
337 341 KSTAT_DATA_UINT64);
338 342 kstat_named_init(&ixgbe_ks->qptc[8], "queue_pkts_xmitd [ 8]",
339 343 KSTAT_DATA_UINT64);
340 344 kstat_named_init(&ixgbe_ks->qptc[9], "queue_pkts_xmitd [ 9]",
341 345 KSTAT_DATA_UINT64);
342 346 kstat_named_init(&ixgbe_ks->qptc[10], "queue_pkts_xmitd [10]",
343 347 KSTAT_DATA_UINT64);
344 348 kstat_named_init(&ixgbe_ks->qptc[11], "queue_pkts_xmitd [11]",
345 349 KSTAT_DATA_UINT64);
346 350 kstat_named_init(&ixgbe_ks->qptc[12], "queue_pkts_xmitd [12]",
347 351 KSTAT_DATA_UINT64);
348 352 kstat_named_init(&ixgbe_ks->qptc[13], "queue_pkts_xmitd [13]",
349 353 KSTAT_DATA_UINT64);
350 354 kstat_named_init(&ixgbe_ks->qptc[14], "queue_pkts_xmitd [14]",
351 355 KSTAT_DATA_UINT64);
352 356 kstat_named_init(&ixgbe_ks->qptc[15], "queue_pkts_xmitd [15]",
353 357 KSTAT_DATA_UINT64);
354 358
355 359 kstat_named_init(&ixgbe_ks->qbrc[0], "queue_bytes_recvd [ 0]",
356 360 KSTAT_DATA_UINT64);
357 361 kstat_named_init(&ixgbe_ks->qbrc[1], "queue_bytes_recvd [ 1]",
358 362 KSTAT_DATA_UINT64);
359 363 kstat_named_init(&ixgbe_ks->qbrc[2], "queue_bytes_recvd [ 2]",
360 364 KSTAT_DATA_UINT64);
361 365 kstat_named_init(&ixgbe_ks->qbrc[3], "queue_bytes_recvd [ 3]",
362 366 KSTAT_DATA_UINT64);
363 367 kstat_named_init(&ixgbe_ks->qbrc[4], "queue_bytes_recvd [ 4]",
364 368 KSTAT_DATA_UINT64);
365 369 kstat_named_init(&ixgbe_ks->qbrc[5], "queue_bytes_recvd [ 5]",
366 370 KSTAT_DATA_UINT64);
367 371 kstat_named_init(&ixgbe_ks->qbrc[6], "queue_bytes_recvd [ 6]",
368 372 KSTAT_DATA_UINT64);
369 373 kstat_named_init(&ixgbe_ks->qbrc[7], "queue_bytes_recvd [ 7]",
370 374 KSTAT_DATA_UINT64);
371 375 kstat_named_init(&ixgbe_ks->qbrc[8], "queue_bytes_recvd [ 8]",
372 376 KSTAT_DATA_UINT64);
373 377 kstat_named_init(&ixgbe_ks->qbrc[9], "queue_bytes_recvd [ 9]",
374 378 KSTAT_DATA_UINT64);
375 379 kstat_named_init(&ixgbe_ks->qbrc[10], "queue_bytes_recvd [10]",
376 380 KSTAT_DATA_UINT64);
377 381 kstat_named_init(&ixgbe_ks->qbrc[11], "queue_bytes_recvd [11]",
378 382 KSTAT_DATA_UINT64);
379 383 kstat_named_init(&ixgbe_ks->qbrc[12], "queue_bytes_recvd [12]",
380 384 KSTAT_DATA_UINT64);
381 385 kstat_named_init(&ixgbe_ks->qbrc[13], "queue_bytes_recvd [13]",
382 386 KSTAT_DATA_UINT64);
383 387 kstat_named_init(&ixgbe_ks->qbrc[14], "queue_bytes_recvd [14]",
384 388 KSTAT_DATA_UINT64);
385 389 kstat_named_init(&ixgbe_ks->qbrc[15], "queue_bytes_recvd [15]",
386 390 KSTAT_DATA_UINT64);
387 391
388 392 kstat_named_init(&ixgbe_ks->qbtc[0], "queue_bytes_xmitd [ 0]",
389 393 KSTAT_DATA_UINT64);
390 394 kstat_named_init(&ixgbe_ks->qbtc[1], "queue_bytes_xmitd [ 1]",
391 395 KSTAT_DATA_UINT64);
392 396 kstat_named_init(&ixgbe_ks->qbtc[2], "queue_bytes_xmitd [ 2]",
393 397 KSTAT_DATA_UINT64);
394 398 kstat_named_init(&ixgbe_ks->qbtc[3], "queue_bytes_xmitd [ 3]",
395 399 KSTAT_DATA_UINT64);
396 400 kstat_named_init(&ixgbe_ks->qbtc[4], "queue_bytes_xmitd [ 4]",
397 401 KSTAT_DATA_UINT64);
398 402 kstat_named_init(&ixgbe_ks->qbtc[5], "queue_bytes_xmitd [ 5]",
399 403 KSTAT_DATA_UINT64);
400 404 kstat_named_init(&ixgbe_ks->qbtc[6], "queue_bytes_xmitd [ 6]",
401 405 KSTAT_DATA_UINT64);
402 406 kstat_named_init(&ixgbe_ks->qbtc[7], "queue_bytes_xmitd [ 7]",
403 407 KSTAT_DATA_UINT64);
404 408 kstat_named_init(&ixgbe_ks->qbtc[8], "queue_bytes_xmitd [ 8]",
405 409 KSTAT_DATA_UINT64);
406 410 kstat_named_init(&ixgbe_ks->qbtc[9], "queue_bytes_xmitd [ 9]",
407 411 KSTAT_DATA_UINT64);
408 412 kstat_named_init(&ixgbe_ks->qbtc[10], "queue_bytes_xmitd [10]",
409 413 KSTAT_DATA_UINT64);
410 414 kstat_named_init(&ixgbe_ks->qbtc[11], "queue_bytes_xmitd [11]",
411 415 KSTAT_DATA_UINT64);
412 416 kstat_named_init(&ixgbe_ks->qbtc[12], "queue_bytes_xmitd [12]",
413 417 KSTAT_DATA_UINT64);
414 418 kstat_named_init(&ixgbe_ks->qbtc[13], "queue_bytes_xmitd [13]",
415 419 KSTAT_DATA_UINT64);
416 420 kstat_named_init(&ixgbe_ks->qbtc[14], "queue_bytes_xmitd [14]",
417 421 KSTAT_DATA_UINT64);
418 422 kstat_named_init(&ixgbe_ks->qbtc[15], "queue_bytes_xmitd [15]",
419 423 KSTAT_DATA_UINT64);
420 424
421 425 kstat_named_init(&ixgbe_ks->mspdc, "mac_short_packet_discard",
422 426 KSTAT_DATA_UINT64);
423 427 kstat_named_init(&ixgbe_ks->mpc, "missed_packets",
424 428 KSTAT_DATA_UINT64);
425 429 kstat_named_init(&ixgbe_ks->mlfc, "mac_local_fault",
426 430 KSTAT_DATA_UINT64);
427 431 kstat_named_init(&ixgbe_ks->mrfc, "mac_remote_fault",
428 432 KSTAT_DATA_UINT64);
429 433 kstat_named_init(&ixgbe_ks->rlec, "recv_length_err",
430 434 KSTAT_DATA_UINT64);
431 435 kstat_named_init(&ixgbe_ks->lxontxc, "link_xon_xmitd",
432 436 KSTAT_DATA_UINT64);
433 437 kstat_named_init(&ixgbe_ks->lxonrxc, "link_xon_recvd",
434 438 KSTAT_DATA_UINT64);
435 439 kstat_named_init(&ixgbe_ks->lxofftxc, "link_xoff_xmitd",
436 440 KSTAT_DATA_UINT64);
437 441 kstat_named_init(&ixgbe_ks->lxoffrxc, "link_xoff_recvd",
438 442 KSTAT_DATA_UINT64);
439 443 kstat_named_init(&ixgbe_ks->ruc, "recv_undersize",
440 444 KSTAT_DATA_UINT64);
441 445 kstat_named_init(&ixgbe_ks->rfc, "recv_fragment",
442 446 KSTAT_DATA_UINT64);
443 447 kstat_named_init(&ixgbe_ks->roc, "recv_oversize",
444 448 KSTAT_DATA_UINT64);
445 449 kstat_named_init(&ixgbe_ks->rjc, "recv_jabber",
446 450 KSTAT_DATA_UINT64);
447 451 kstat_named_init(&ixgbe_ks->rnbc, "recv_no_buffer",
448 452 KSTAT_DATA_UINT64);
449 453 kstat_named_init(&ixgbe_ks->lroc, "lro_pkt_count",
450 454 KSTAT_DATA_UINT64);
451 455 /*
452 456 * Function to provide kernel stat update on demand
453 457 */
454 458 ks->ks_update = ixgbe_update_stats;
455 459
456 460 ks->ks_private = (void *)ixgbe;
457 461
458 462 /*
459 463 * Add kstat to systems kstat chain
460 464 */
461 465 kstat_install(ks);
462 466
463 467 return (IXGBE_SUCCESS);
464 468 }
465 469
466 470 /*
467 471 * Retrieve a value for one of the statistics.
468 472 */
469 473 int
470 474 ixgbe_m_stat(void *arg, uint_t stat, uint64_t *val)
471 475 {
472 476 ixgbe_t *ixgbe = (ixgbe_t *)arg;
473 477 struct ixgbe_hw *hw = &ixgbe->hw;
474 478 ixgbe_stat_t *ixgbe_ks;
475 479 int i;
476 480
477 481 ixgbe_ks = (ixgbe_stat_t *)ixgbe->ixgbe_ks->ks_data;
478 482
479 483 mutex_enter(&ixgbe->gen_lock);
480 484
481 485 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
482 486 mutex_exit(&ixgbe->gen_lock);
483 487 return (ECANCELED);
484 488 }
485 489
486 490 switch (stat) {
487 491 case MAC_STAT_IFSPEED:
488 492 *val = ixgbe->link_speed * 1000000ull;
489 493 break;
490 494
491 495 case MAC_STAT_MULTIRCV:
492 496 ixgbe_ks->mprc.value.ui64 +=
493 497 IXGBE_READ_REG(hw, IXGBE_MPRC);
494 498 *val = ixgbe_ks->mprc.value.ui64;
495 499 break;
496 500
497 501 case MAC_STAT_BRDCSTRCV:
498 502 ixgbe_ks->bprc.value.ui64 +=
499 503 IXGBE_READ_REG(hw, IXGBE_BPRC);
500 504 *val = ixgbe_ks->bprc.value.ui64;
501 505 break;
502 506
503 507 case MAC_STAT_MULTIXMT:
504 508 ixgbe_ks->mptc.value.ui64 +=
505 509 IXGBE_READ_REG(hw, IXGBE_MPTC);
506 510 *val = ixgbe_ks->mptc.value.ui64;
507 511 break;
508 512
509 513 case MAC_STAT_BRDCSTXMT:
510 514 ixgbe_ks->bptc.value.ui64 +=
511 515 IXGBE_READ_REG(hw, IXGBE_BPTC);
512 516 *val = ixgbe_ks->bptc.value.ui64;
513 517 break;
514 518
515 519 case MAC_STAT_NORCVBUF:
516 520 for (i = 0; i < 8; i++) {
517 521 ixgbe_ks->rnbc.value.ui64 +=
518 522 IXGBE_READ_REG(hw, IXGBE_RNBC(i));
519 523 }
520 524 *val = ixgbe_ks->rnbc.value.ui64;
521 525 break;
522 526
523 527 case MAC_STAT_IERRORS:
524 528 ixgbe_ks->crcerrs.value.ui64 +=
525 529 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
526 530 ixgbe_ks->illerrc.value.ui64 +=
527 531 IXGBE_READ_REG(hw, IXGBE_ILLERRC);
528 532 ixgbe_ks->errbc.value.ui64 +=
529 533 IXGBE_READ_REG(hw, IXGBE_ERRBC);
530 534 ixgbe_ks->rlec.value.ui64 +=
531 535 IXGBE_READ_REG(hw, IXGBE_RLEC);
532 536 *val = ixgbe_ks->crcerrs.value.ui64 +
533 537 ixgbe_ks->illerrc.value.ui64 +
534 538 ixgbe_ks->errbc.value.ui64 +
535 539 ixgbe_ks->rlec.value.ui64;
536 540 break;
537 541
538 542 case MAC_STAT_RBYTES:
539 543 ixgbe_ks->tor.value.ui64 = 0;
540 544 for (i = 0; i < 16; i++) {
541 545 ixgbe_ks->qbrc[i].value.ui64 +=
542 546 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
543 547 ixgbe_ks->tor.value.ui64 +=
544 548 ixgbe_ks->qbrc[i].value.ui64;
545 549 }
546 550 *val = ixgbe_ks->tor.value.ui64;
547 551 break;
548 552
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549 553 case MAC_STAT_OBYTES:
550 554 ixgbe_ks->tot.value.ui64 = 0;
551 555 for (i = 0; i < 16; i++) {
552 556 switch (hw->mac.type) {
553 557 case ixgbe_mac_82598EB:
554 558 ixgbe_ks->qbtc[i].value.ui64 +=
555 559 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
556 560 break;
557 561
558 562 case ixgbe_mac_82599EB:
563 + case ixgbe_mac_X540:
559 564 ixgbe_ks->qbtc[i].value.ui64 +=
560 565 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
561 566 ixgbe_ks->qbtc[i].value.ui64 +=
562 567 ((uint64_t)((IXGBE_READ_REG(hw,
563 568 IXGBE_QBTC_H(i))) & 0xF) << 32);
564 569 break;
565 570
566 571 default:
567 572 break;
568 573 }
569 574 ixgbe_ks->tot.value.ui64 +=
570 575 ixgbe_ks->qbtc[i].value.ui64;
571 576 }
572 577 *val = ixgbe_ks->tot.value.ui64;
573 578 break;
574 579
575 580 case MAC_STAT_IPACKETS:
576 581 ixgbe_ks->tpr.value.ui64 +=
577 582 IXGBE_READ_REG(hw, IXGBE_TPR);
578 583 *val = ixgbe_ks->tpr.value.ui64;
579 584 break;
580 585
581 586 case MAC_STAT_OPACKETS:
582 587 ixgbe_ks->tpt.value.ui64 +=
583 588 IXGBE_READ_REG(hw, IXGBE_TPT);
584 589 *val = ixgbe_ks->tpt.value.ui64;
585 590 break;
586 591
587 592 /* RFC 1643 stats */
588 593 case ETHER_STAT_FCS_ERRORS:
589 594 ixgbe_ks->crcerrs.value.ui64 +=
590 595 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
591 596 *val = ixgbe_ks->crcerrs.value.ui64;
592 597 break;
593 598
594 599 case ETHER_STAT_TOOLONG_ERRORS:
595 600 ixgbe_ks->roc.value.ui64 +=
596 601 IXGBE_READ_REG(hw, IXGBE_ROC);
597 602 *val = ixgbe_ks->roc.value.ui64;
598 603 break;
599 604
600 605 case ETHER_STAT_MACRCV_ERRORS:
601 606 ixgbe_ks->crcerrs.value.ui64 +=
602 607 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
603 608 ixgbe_ks->illerrc.value.ui64 +=
604 609 IXGBE_READ_REG(hw, IXGBE_ILLERRC);
605 610 ixgbe_ks->errbc.value.ui64 +=
606 611 IXGBE_READ_REG(hw, IXGBE_ERRBC);
607 612 ixgbe_ks->rlec.value.ui64 +=
608 613 IXGBE_READ_REG(hw, IXGBE_RLEC);
609 614 *val = ixgbe_ks->crcerrs.value.ui64 +
610 615 ixgbe_ks->illerrc.value.ui64 +
611 616 ixgbe_ks->errbc.value.ui64 +
612 617 ixgbe_ks->rlec.value.ui64;
613 618 break;
614 619
615 620 /* MII/GMII stats */
616 621 case ETHER_STAT_XCVR_ADDR:
617 622 /* The Internal PHY's MDI address for each MAC is 1 */
618 623 *val = 1;
619 624 break;
620 625
621 626 case ETHER_STAT_XCVR_ID:
622 627 *val = hw->phy.id;
623 628 break;
624 629
625 630 case ETHER_STAT_XCVR_INUSE:
626 631 switch (ixgbe->link_speed) {
627 632 case IXGBE_LINK_SPEED_1GB_FULL:
628 633 *val =
629 634 (hw->phy.media_type == ixgbe_media_type_copper) ?
630 635 XCVR_1000T : XCVR_1000X;
631 636 break;
632 637 case IXGBE_LINK_SPEED_100_FULL:
633 638 *val = (hw->phy.media_type == ixgbe_media_type_copper) ?
634 639 XCVR_100T2 : XCVR_100X;
635 640 break;
636 641 default:
637 642 *val = XCVR_NONE;
638 643 break;
639 644 }
640 645 break;
641 646
642 647 case ETHER_STAT_CAP_10GFDX:
643 648 *val = 1;
644 649 break;
645 650
646 651 case ETHER_STAT_CAP_1000FDX:
647 652 *val = 1;
648 653 break;
649 654
650 655 case ETHER_STAT_CAP_100FDX:
651 656 *val = 1;
652 657 break;
653 658
654 659 case ETHER_STAT_CAP_ASMPAUSE:
655 660 *val = ixgbe->param_asym_pause_cap;
656 661 break;
657 662
658 663 case ETHER_STAT_CAP_PAUSE:
659 664 *val = ixgbe->param_pause_cap;
660 665 break;
661 666
662 667 case ETHER_STAT_CAP_AUTONEG:
663 668 *val = 1;
664 669 break;
665 670
666 671 case ETHER_STAT_ADV_CAP_10GFDX:
667 672 *val = ixgbe->param_adv_10000fdx_cap;
668 673 break;
669 674
670 675 case ETHER_STAT_ADV_CAP_1000FDX:
671 676 *val = ixgbe->param_adv_1000fdx_cap;
672 677 break;
673 678
674 679 case ETHER_STAT_ADV_CAP_100FDX:
675 680 *val = ixgbe->param_adv_100fdx_cap;
676 681 break;
677 682
678 683 case ETHER_STAT_ADV_CAP_ASMPAUSE:
679 684 *val = ixgbe->param_adv_asym_pause_cap;
680 685 break;
681 686
682 687 case ETHER_STAT_ADV_CAP_PAUSE:
683 688 *val = ixgbe->param_adv_pause_cap;
684 689 break;
685 690
686 691 case ETHER_STAT_ADV_CAP_AUTONEG:
687 692 *val = ixgbe->param_adv_autoneg_cap;
688 693 break;
689 694
690 695 case ETHER_STAT_LP_CAP_10GFDX:
691 696 *val = ixgbe->param_lp_10000fdx_cap;
692 697 break;
693 698
694 699 case ETHER_STAT_LP_CAP_1000FDX:
695 700 *val = ixgbe->param_lp_1000fdx_cap;
696 701 break;
697 702
698 703 case ETHER_STAT_LP_CAP_100FDX:
699 704 *val = ixgbe->param_lp_100fdx_cap;
700 705 break;
701 706
702 707 case ETHER_STAT_LP_CAP_ASMPAUSE:
703 708 *val = ixgbe->param_lp_asym_pause_cap;
704 709 break;
705 710
706 711 case ETHER_STAT_LP_CAP_PAUSE:
707 712 *val = ixgbe->param_lp_pause_cap;
708 713 break;
709 714
710 715 case ETHER_STAT_LP_CAP_AUTONEG:
711 716 *val = ixgbe->param_lp_autoneg_cap;
712 717 break;
713 718
714 719 case ETHER_STAT_LINK_ASMPAUSE:
715 720 *val = ixgbe->param_asym_pause_cap;
716 721 break;
717 722
718 723 case ETHER_STAT_LINK_PAUSE:
719 724 *val = ixgbe->param_pause_cap;
720 725 break;
721 726
722 727 case ETHER_STAT_LINK_AUTONEG:
723 728 *val = ixgbe->param_adv_autoneg_cap;
724 729 break;
725 730
726 731 case ETHER_STAT_LINK_DUPLEX:
727 732 *val = ixgbe->link_duplex;
728 733 break;
729 734
730 735 case ETHER_STAT_TOOSHORT_ERRORS:
731 736 ixgbe_ks->ruc.value.ui64 +=
732 737 IXGBE_READ_REG(hw, IXGBE_RUC);
733 738 *val = ixgbe_ks->ruc.value.ui64;
734 739 break;
735 740
736 741 case ETHER_STAT_CAP_REMFAULT:
737 742 *val = ixgbe->param_rem_fault;
738 743 break;
739 744
740 745 case ETHER_STAT_ADV_REMFAULT:
741 746 *val = ixgbe->param_adv_rem_fault;
742 747 break;
743 748
744 749 case ETHER_STAT_LP_REMFAULT:
745 750 *val = ixgbe->param_lp_rem_fault;
746 751 break;
747 752
748 753 case ETHER_STAT_JABBER_ERRORS:
749 754 ixgbe_ks->rjc.value.ui64 +=
750 755 IXGBE_READ_REG(hw, IXGBE_RJC);
751 756 *val = ixgbe_ks->rjc.value.ui64;
752 757 break;
753 758
754 759 default:
755 760 mutex_exit(&ixgbe->gen_lock);
756 761 return (ENOTSUP);
757 762 }
758 763
759 764 mutex_exit(&ixgbe->gen_lock);
760 765
761 766 if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) {
762 767 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_DEGRADED);
763 768 return (EIO);
764 769 }
765 770
766 771 return (0);
767 772 }
768 773
769 774 /*
770 775 * Retrieve a value for one of the statistics for a particular rx ring
771 776 */
772 777 int
773 778 ixgbe_rx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
774 779 {
775 780 ixgbe_rx_ring_t *rx_ring = (ixgbe_rx_ring_t *)rh;
776 781 ixgbe_t *ixgbe = rx_ring->ixgbe;
777 782
778 783 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
779 784 return (ECANCELED);
780 785 }
781 786
782 787 switch (stat) {
783 788 case MAC_STAT_RBYTES:
784 789 *val = rx_ring->stat_rbytes;
785 790 break;
786 791
787 792 case MAC_STAT_IPACKETS:
788 793 *val = rx_ring->stat_ipackets;
789 794 break;
790 795
791 796 default:
792 797 *val = 0;
793 798 return (ENOTSUP);
794 799 }
795 800
796 801 return (0);
797 802 }
798 803
799 804 /*
800 805 * Retrieve a value for one of the statistics for a particular tx ring
801 806 */
802 807 int
803 808 ixgbe_tx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
804 809 {
805 810 ixgbe_tx_ring_t *tx_ring = (ixgbe_tx_ring_t *)rh;
806 811 ixgbe_t *ixgbe = tx_ring->ixgbe;
807 812
808 813 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
809 814 return (ECANCELED);
810 815 }
811 816
812 817 switch (stat) {
813 818 case MAC_STAT_OBYTES:
814 819 *val = tx_ring->stat_obytes;
815 820 break;
816 821
817 822 case MAC_STAT_OPACKETS:
818 823 *val = tx_ring->stat_opackets;
819 824 break;
820 825
821 826 default:
822 827 *val = 0;
823 828 return (ENOTSUP);
824 829 }
825 830
826 831 return (0);
827 832 }
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