95 ixgbe_ks->gptc.value.ui64 = 0;
96 ixgbe_ks->tor.value.ui64 = 0;
97 ixgbe_ks->tot.value.ui64 = 0;
98 for (i = 0; i < 16; i++) {
99 ixgbe_ks->qprc[i].value.ui64 +=
100 IXGBE_READ_REG(hw, IXGBE_QPRC(i));
101 ixgbe_ks->gprc.value.ui64 += ixgbe_ks->qprc[i].value.ui64;
102 ixgbe_ks->qptc[i].value.ui64 +=
103 IXGBE_READ_REG(hw, IXGBE_QPTC(i));
104 ixgbe_ks->gptc.value.ui64 += ixgbe_ks->qptc[i].value.ui64;
105 ixgbe_ks->qbrc[i].value.ui64 +=
106 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
107 ixgbe_ks->tor.value.ui64 += ixgbe_ks->qbrc[i].value.ui64;
108 switch (hw->mac.type) {
109 case ixgbe_mac_82598EB:
110 ixgbe_ks->qbtc[i].value.ui64 +=
111 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
112 break;
113
114 case ixgbe_mac_82599EB:
115 ixgbe_ks->qbtc[i].value.ui64 +=
116 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
117 ixgbe_ks->qbtc[i].value.ui64 +=
118 ((uint64_t)((IXGBE_READ_REG(hw,
119 IXGBE_QBTC_H(i))) & 0xF) << 32);
120 break;
121
122 default:
123 break;
124 }
125 ixgbe_ks->tot.value.ui64 += ixgbe_ks->qbtc[i].value.ui64;
126 }
127 /*
128 * This is a Workaround:
129 * Currently h/w GORCH, GOTCH, TORH registers are not
130 * correctly implemented. We found that the values in
131 * these registers are same as those in corresponding
132 * *L registers (i.e. GORCL, GOTCL, and TORL). Here the
133 * gor and got stat data will not be retrieved through
134 * GORC{H/L} and GOTC{H/L} registers but be obtained by
148 ixgbe_ks->ptc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC127);
149 ixgbe_ks->ptc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC255);
150 ixgbe_ks->ptc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC511);
151 ixgbe_ks->ptc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1023);
152 ixgbe_ks->ptc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1522);
153
154 ixgbe_ks->mspdc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MSPDC);
155 for (i = 0; i < 8; i++)
156 ixgbe_ks->mpc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MPC(i));
157 ixgbe_ks->mlfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MLFC);
158 ixgbe_ks->mrfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MRFC);
159 ixgbe_ks->rlec.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RLEC);
160 ixgbe_ks->lxontxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
161 switch (hw->mac.type) {
162 case ixgbe_mac_82598EB:
163 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
164 IXGBE_LXONRXC);
165 break;
166
167 case ixgbe_mac_82599EB:
168 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
169 IXGBE_LXONRXCNT);
170 break;
171
172 default:
173 break;
174 }
175 ixgbe_ks->lxofftxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
176 switch (hw->mac.type) {
177 case ixgbe_mac_82598EB:
178 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
179 IXGBE_LXOFFRXC);
180 break;
181
182 case ixgbe_mac_82599EB:
183 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
184 IXGBE_LXOFFRXCNT);
185 break;
186
187 default:
188 break;
189 }
190 ixgbe_ks->ruc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RUC);
191 ixgbe_ks->rfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RFC);
192 ixgbe_ks->roc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_ROC);
193 ixgbe_ks->rjc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RJC);
194
195 mutex_exit(&ixgbe->gen_lock);
196
197 if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK)
198 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_UNAFFECTED);
199
200 return (0);
201 }
202
539 ixgbe_ks->tor.value.ui64 = 0;
540 for (i = 0; i < 16; i++) {
541 ixgbe_ks->qbrc[i].value.ui64 +=
542 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
543 ixgbe_ks->tor.value.ui64 +=
544 ixgbe_ks->qbrc[i].value.ui64;
545 }
546 *val = ixgbe_ks->tor.value.ui64;
547 break;
548
549 case MAC_STAT_OBYTES:
550 ixgbe_ks->tot.value.ui64 = 0;
551 for (i = 0; i < 16; i++) {
552 switch (hw->mac.type) {
553 case ixgbe_mac_82598EB:
554 ixgbe_ks->qbtc[i].value.ui64 +=
555 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
556 break;
557
558 case ixgbe_mac_82599EB:
559 ixgbe_ks->qbtc[i].value.ui64 +=
560 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
561 ixgbe_ks->qbtc[i].value.ui64 +=
562 ((uint64_t)((IXGBE_READ_REG(hw,
563 IXGBE_QBTC_H(i))) & 0xF) << 32);
564 break;
565
566 default:
567 break;
568 }
569 ixgbe_ks->tot.value.ui64 +=
570 ixgbe_ks->qbtc[i].value.ui64;
571 }
572 *val = ixgbe_ks->tot.value.ui64;
573 break;
574
575 case MAC_STAT_IPACKETS:
576 ixgbe_ks->tpr.value.ui64 +=
577 IXGBE_READ_REG(hw, IXGBE_TPR);
578 *val = ixgbe_ks->tpr.value.ui64;
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95 ixgbe_ks->gptc.value.ui64 = 0;
96 ixgbe_ks->tor.value.ui64 = 0;
97 ixgbe_ks->tot.value.ui64 = 0;
98 for (i = 0; i < 16; i++) {
99 ixgbe_ks->qprc[i].value.ui64 +=
100 IXGBE_READ_REG(hw, IXGBE_QPRC(i));
101 ixgbe_ks->gprc.value.ui64 += ixgbe_ks->qprc[i].value.ui64;
102 ixgbe_ks->qptc[i].value.ui64 +=
103 IXGBE_READ_REG(hw, IXGBE_QPTC(i));
104 ixgbe_ks->gptc.value.ui64 += ixgbe_ks->qptc[i].value.ui64;
105 ixgbe_ks->qbrc[i].value.ui64 +=
106 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
107 ixgbe_ks->tor.value.ui64 += ixgbe_ks->qbrc[i].value.ui64;
108 switch (hw->mac.type) {
109 case ixgbe_mac_82598EB:
110 ixgbe_ks->qbtc[i].value.ui64 +=
111 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
112 break;
113
114 case ixgbe_mac_82599EB:
115 case ixgbe_mac_X540:
116 ixgbe_ks->qbtc[i].value.ui64 +=
117 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
118 ixgbe_ks->qbtc[i].value.ui64 +=
119 ((uint64_t)((IXGBE_READ_REG(hw,
120 IXGBE_QBTC_H(i))) & 0xF) << 32);
121 break;
122
123 default:
124 break;
125 }
126 ixgbe_ks->tot.value.ui64 += ixgbe_ks->qbtc[i].value.ui64;
127 }
128 /*
129 * This is a Workaround:
130 * Currently h/w GORCH, GOTCH, TORH registers are not
131 * correctly implemented. We found that the values in
132 * these registers are same as those in corresponding
133 * *L registers (i.e. GORCL, GOTCL, and TORL). Here the
134 * gor and got stat data will not be retrieved through
135 * GORC{H/L} and GOTC{H/L} registers but be obtained by
149 ixgbe_ks->ptc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC127);
150 ixgbe_ks->ptc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC255);
151 ixgbe_ks->ptc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC511);
152 ixgbe_ks->ptc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1023);
153 ixgbe_ks->ptc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1522);
154
155 ixgbe_ks->mspdc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MSPDC);
156 for (i = 0; i < 8; i++)
157 ixgbe_ks->mpc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MPC(i));
158 ixgbe_ks->mlfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MLFC);
159 ixgbe_ks->mrfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MRFC);
160 ixgbe_ks->rlec.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RLEC);
161 ixgbe_ks->lxontxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
162 switch (hw->mac.type) {
163 case ixgbe_mac_82598EB:
164 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
165 IXGBE_LXONRXC);
166 break;
167
168 case ixgbe_mac_82599EB:
169 case ixgbe_mac_X540:
170 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
171 IXGBE_LXONRXCNT);
172 break;
173
174 default:
175 break;
176 }
177 ixgbe_ks->lxofftxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
178 switch (hw->mac.type) {
179 case ixgbe_mac_82598EB:
180 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
181 IXGBE_LXOFFRXC);
182 break;
183
184 case ixgbe_mac_82599EB:
185 case ixgbe_mac_X540:
186 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
187 IXGBE_LXOFFRXCNT);
188 break;
189
190 default:
191 break;
192 }
193 ixgbe_ks->ruc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RUC);
194 ixgbe_ks->rfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RFC);
195 ixgbe_ks->roc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_ROC);
196 ixgbe_ks->rjc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RJC);
197
198 mutex_exit(&ixgbe->gen_lock);
199
200 if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK)
201 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_UNAFFECTED);
202
203 return (0);
204 }
205
542 ixgbe_ks->tor.value.ui64 = 0;
543 for (i = 0; i < 16; i++) {
544 ixgbe_ks->qbrc[i].value.ui64 +=
545 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
546 ixgbe_ks->tor.value.ui64 +=
547 ixgbe_ks->qbrc[i].value.ui64;
548 }
549 *val = ixgbe_ks->tor.value.ui64;
550 break;
551
552 case MAC_STAT_OBYTES:
553 ixgbe_ks->tot.value.ui64 = 0;
554 for (i = 0; i < 16; i++) {
555 switch (hw->mac.type) {
556 case ixgbe_mac_82598EB:
557 ixgbe_ks->qbtc[i].value.ui64 +=
558 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
559 break;
560
561 case ixgbe_mac_82599EB:
562 case ixgbe_mac_X540:
563 ixgbe_ks->qbtc[i].value.ui64 +=
564 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
565 ixgbe_ks->qbtc[i].value.ui64 +=
566 ((uint64_t)((IXGBE_READ_REG(hw,
567 IXGBE_QBTC_H(i))) & 0xF) << 32);
568 break;
569
570 default:
571 break;
572 }
573 ixgbe_ks->tot.value.ui64 +=
574 ixgbe_ks->qbtc[i].value.ui64;
575 }
576 *val = ixgbe_ks->tot.value.ui64;
577 break;
578
579 case MAC_STAT_IPACKETS:
580 ixgbe_ks->tpr.value.ui64 +=
581 IXGBE_READ_REG(hw, IXGBE_TPR);
582 *val = ixgbe_ks->tpr.value.ui64;
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