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--- old/usr/src/uts/common/io/ixgbe/ixgbe_stat.c
+++ new/usr/src/uts/common/io/ixgbe/ixgbe_stat.c
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21
22 22 /*
23 23 * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
24 24 */
25 25
26 26 /*
27 27 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
28 28 */
29 29
30 30 #include "ixgbe_sw.h"
31 31
32 32 /*
33 33 * Update driver private statistics.
34 34 */
35 35 static int
36 36 ixgbe_update_stats(kstat_t *ks, int rw)
37 37 {
38 38 ixgbe_t *ixgbe;
39 39 struct ixgbe_hw *hw;
40 40 ixgbe_stat_t *ixgbe_ks;
41 41 int i;
42 42
43 43 if (rw == KSTAT_WRITE)
44 44 return (EACCES);
45 45
46 46 ixgbe = (ixgbe_t *)ks->ks_private;
47 47 ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;
48 48 hw = &ixgbe->hw;
49 49
50 50 mutex_enter(&ixgbe->gen_lock);
51 51
52 52 /*
53 53 * Basic information
54 54 */
55 55 ixgbe_ks->link_speed.value.ui64 = ixgbe->link_speed;
56 56 ixgbe_ks->reset_count.value.ui64 = ixgbe->reset_count;
57 57 ixgbe_ks->lroc.value.ui64 = ixgbe->lro_pkt_count;
58 58
59 59 #ifdef IXGBE_DEBUG
60 60 ixgbe_ks->rx_frame_error.value.ui64 = 0;
61 61 ixgbe_ks->rx_cksum_error.value.ui64 = 0;
62 62 ixgbe_ks->rx_exceed_pkt.value.ui64 = 0;
63 63 for (i = 0; i < ixgbe->num_rx_rings; i++) {
64 64 ixgbe_ks->rx_frame_error.value.ui64 +=
65 65 ixgbe->rx_rings[i].stat_frame_error;
66 66 ixgbe_ks->rx_cksum_error.value.ui64 +=
67 67 ixgbe->rx_rings[i].stat_cksum_error;
68 68 ixgbe_ks->rx_exceed_pkt.value.ui64 +=
69 69 ixgbe->rx_rings[i].stat_exceed_pkt;
70 70 }
71 71
72 72 ixgbe_ks->tx_overload.value.ui64 = 0;
73 73 ixgbe_ks->tx_fail_no_tbd.value.ui64 = 0;
74 74 ixgbe_ks->tx_fail_no_tcb.value.ui64 = 0;
75 75 ixgbe_ks->tx_fail_dma_bind.value.ui64 = 0;
76 76 ixgbe_ks->tx_reschedule.value.ui64 = 0;
77 77 for (i = 0; i < ixgbe->num_tx_rings; i++) {
78 78 ixgbe_ks->tx_overload.value.ui64 +=
79 79 ixgbe->tx_rings[i].stat_overload;
80 80 ixgbe_ks->tx_fail_no_tbd.value.ui64 +=
81 81 ixgbe->tx_rings[i].stat_fail_no_tbd;
82 82 ixgbe_ks->tx_fail_no_tcb.value.ui64 +=
83 83 ixgbe->tx_rings[i].stat_fail_no_tcb;
84 84 ixgbe_ks->tx_fail_dma_bind.value.ui64 +=
85 85 ixgbe->tx_rings[i].stat_fail_dma_bind;
86 86 ixgbe_ks->tx_reschedule.value.ui64 +=
87 87 ixgbe->tx_rings[i].stat_reschedule;
88 88 }
89 89 #endif
90 90
91 91 /*
92 92 * Hardware calculated statistics.
93 93 */
94 94 ixgbe_ks->gprc.value.ui64 = 0;
95 95 ixgbe_ks->gptc.value.ui64 = 0;
96 96 ixgbe_ks->tor.value.ui64 = 0;
97 97 ixgbe_ks->tot.value.ui64 = 0;
98 98 for (i = 0; i < 16; i++) {
99 99 ixgbe_ks->qprc[i].value.ui64 +=
100 100 IXGBE_READ_REG(hw, IXGBE_QPRC(i));
101 101 ixgbe_ks->gprc.value.ui64 += ixgbe_ks->qprc[i].value.ui64;
102 102 ixgbe_ks->qptc[i].value.ui64 +=
103 103 IXGBE_READ_REG(hw, IXGBE_QPTC(i));
104 104 ixgbe_ks->gptc.value.ui64 += ixgbe_ks->qptc[i].value.ui64;
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105 105 ixgbe_ks->qbrc[i].value.ui64 +=
106 106 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
107 107 ixgbe_ks->tor.value.ui64 += ixgbe_ks->qbrc[i].value.ui64;
108 108 switch (hw->mac.type) {
109 109 case ixgbe_mac_82598EB:
110 110 ixgbe_ks->qbtc[i].value.ui64 +=
111 111 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
112 112 break;
113 113
114 114 case ixgbe_mac_82599EB:
115 + case ixgbe_mac_X540:
115 116 ixgbe_ks->qbtc[i].value.ui64 +=
116 117 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
117 118 ixgbe_ks->qbtc[i].value.ui64 +=
118 119 ((uint64_t)((IXGBE_READ_REG(hw,
119 120 IXGBE_QBTC_H(i))) & 0xF) << 32);
120 121 break;
121 122
122 123 default:
123 124 break;
124 125 }
125 126 ixgbe_ks->tot.value.ui64 += ixgbe_ks->qbtc[i].value.ui64;
126 127 }
127 128 /*
128 129 * This is a Workaround:
129 130 * Currently h/w GORCH, GOTCH, TORH registers are not
130 131 * correctly implemented. We found that the values in
131 132 * these registers are same as those in corresponding
132 133 * *L registers (i.e. GORCL, GOTCL, and TORL). Here the
133 134 * gor and got stat data will not be retrieved through
134 135 * GORC{H/L} and GOTC{H/L} registers but be obtained by
135 136 * simply assigning tor/tot stat data, so the gor/got
136 137 * stat data will not be accurate.
137 138 */
138 139 ixgbe_ks->gor.value.ui64 = ixgbe_ks->tor.value.ui64;
139 140 ixgbe_ks->got.value.ui64 = ixgbe_ks->tot.value.ui64;
140 141
141 142 ixgbe_ks->prc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC64);
142 143 ixgbe_ks->prc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC127);
143 144 ixgbe_ks->prc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC255);
144 145 ixgbe_ks->prc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC511);
145 146 ixgbe_ks->prc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1023);
146 147 ixgbe_ks->prc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1522);
147 148 ixgbe_ks->ptc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC64);
148 149 ixgbe_ks->ptc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC127);
149 150 ixgbe_ks->ptc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC255);
150 151 ixgbe_ks->ptc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC511);
151 152 ixgbe_ks->ptc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1023);
152 153 ixgbe_ks->ptc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1522);
153 154
154 155 ixgbe_ks->mspdc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MSPDC);
155 156 for (i = 0; i < 8; i++)
156 157 ixgbe_ks->mpc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MPC(i));
157 158 ixgbe_ks->mlfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MLFC);
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158 159 ixgbe_ks->mrfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MRFC);
159 160 ixgbe_ks->rlec.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RLEC);
160 161 ixgbe_ks->lxontxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
161 162 switch (hw->mac.type) {
162 163 case ixgbe_mac_82598EB:
163 164 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
164 165 IXGBE_LXONRXC);
165 166 break;
166 167
167 168 case ixgbe_mac_82599EB:
169 + case ixgbe_mac_X540:
168 170 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
169 171 IXGBE_LXONRXCNT);
170 172 break;
171 173
172 174 default:
173 175 break;
174 176 }
175 177 ixgbe_ks->lxofftxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
176 178 switch (hw->mac.type) {
177 179 case ixgbe_mac_82598EB:
178 180 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
179 181 IXGBE_LXOFFRXC);
180 182 break;
181 183
182 184 case ixgbe_mac_82599EB:
185 + case ixgbe_mac_X540:
183 186 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
184 187 IXGBE_LXOFFRXCNT);
185 188 break;
186 189
187 190 default:
188 191 break;
189 192 }
190 193 ixgbe_ks->ruc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RUC);
191 194 ixgbe_ks->rfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RFC);
192 195 ixgbe_ks->roc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_ROC);
193 196 ixgbe_ks->rjc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RJC);
194 197
195 198 mutex_exit(&ixgbe->gen_lock);
196 199
197 200 if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK)
198 201 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_UNAFFECTED);
199 202
200 203 return (0);
201 204 }
202 205
203 206 /*
204 207 * Create and initialize the driver private statistics.
205 208 */
206 209 int
207 210 ixgbe_init_stats(ixgbe_t *ixgbe)
208 211 {
209 212 kstat_t *ks;
210 213 ixgbe_stat_t *ixgbe_ks;
211 214
212 215 /*
213 216 * Create and init kstat
214 217 */
215 218 ks = kstat_create(MODULE_NAME, ddi_get_instance(ixgbe->dip),
216 219 "statistics", "net", KSTAT_TYPE_NAMED,
217 220 sizeof (ixgbe_stat_t) / sizeof (kstat_named_t), 0);
218 221
219 222 if (ks == NULL) {
220 223 ixgbe_error(ixgbe,
221 224 "Could not create kernel statistics");
222 225 return (IXGBE_FAILURE);
223 226 }
224 227
225 228 ixgbe->ixgbe_ks = ks;
226 229
227 230 ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;
228 231
229 232 /*
230 233 * Initialize all the statistics.
231 234 */
232 235 kstat_named_init(&ixgbe_ks->link_speed, "link_speed",
233 236 KSTAT_DATA_UINT64);
234 237 kstat_named_init(&ixgbe_ks->reset_count, "reset_count",
235 238 KSTAT_DATA_UINT64);
236 239
237 240 #ifdef IXGBE_DEBUG
238 241 kstat_named_init(&ixgbe_ks->rx_frame_error, "rx_frame_error",
239 242 KSTAT_DATA_UINT64);
240 243 kstat_named_init(&ixgbe_ks->rx_cksum_error, "rx_cksum_error",
241 244 KSTAT_DATA_UINT64);
242 245 kstat_named_init(&ixgbe_ks->rx_exceed_pkt, "rx_exceed_pkt",
243 246 KSTAT_DATA_UINT64);
244 247 kstat_named_init(&ixgbe_ks->tx_overload, "tx_overload",
245 248 KSTAT_DATA_UINT64);
246 249 kstat_named_init(&ixgbe_ks->tx_fail_no_tbd, "tx_fail_no_tbd",
247 250 KSTAT_DATA_UINT64);
248 251 kstat_named_init(&ixgbe_ks->tx_fail_no_tcb, "tx_fail_no_tcb",
249 252 KSTAT_DATA_UINT64);
250 253 kstat_named_init(&ixgbe_ks->tx_fail_dma_bind, "tx_fail_dma_bind",
251 254 KSTAT_DATA_UINT64);
252 255 kstat_named_init(&ixgbe_ks->tx_reschedule, "tx_reschedule",
253 256 KSTAT_DATA_UINT64);
254 257 #endif
255 258
256 259 kstat_named_init(&ixgbe_ks->gprc, "good_pkts_recvd",
257 260 KSTAT_DATA_UINT64);
258 261 kstat_named_init(&ixgbe_ks->gptc, "good_pkts_xmitd",
259 262 KSTAT_DATA_UINT64);
260 263 kstat_named_init(&ixgbe_ks->gor, "good_octets_recvd",
261 264 KSTAT_DATA_UINT64);
262 265 kstat_named_init(&ixgbe_ks->got, "good_octets_xmitd",
263 266 KSTAT_DATA_UINT64);
264 267 kstat_named_init(&ixgbe_ks->prc64, "pkts_recvd_( 64b)",
265 268 KSTAT_DATA_UINT64);
266 269 kstat_named_init(&ixgbe_ks->prc127, "pkts_recvd_( 65- 127b)",
267 270 KSTAT_DATA_UINT64);
268 271 kstat_named_init(&ixgbe_ks->prc255, "pkts_recvd_( 127- 255b)",
269 272 KSTAT_DATA_UINT64);
270 273 kstat_named_init(&ixgbe_ks->prc511, "pkts_recvd_( 256- 511b)",
271 274 KSTAT_DATA_UINT64);
272 275 kstat_named_init(&ixgbe_ks->prc1023, "pkts_recvd_( 511-1023b)",
273 276 KSTAT_DATA_UINT64);
274 277 kstat_named_init(&ixgbe_ks->prc1522, "pkts_recvd_(1024-1522b)",
275 278 KSTAT_DATA_UINT64);
276 279 kstat_named_init(&ixgbe_ks->ptc64, "pkts_xmitd_( 64b)",
277 280 KSTAT_DATA_UINT64);
278 281 kstat_named_init(&ixgbe_ks->ptc127, "pkts_xmitd_( 65- 127b)",
279 282 KSTAT_DATA_UINT64);
280 283 kstat_named_init(&ixgbe_ks->ptc255, "pkts_xmitd_( 128- 255b)",
281 284 KSTAT_DATA_UINT64);
282 285 kstat_named_init(&ixgbe_ks->ptc511, "pkts_xmitd_( 255- 511b)",
283 286 KSTAT_DATA_UINT64);
284 287 kstat_named_init(&ixgbe_ks->ptc1023, "pkts_xmitd_( 512-1023b)",
285 288 KSTAT_DATA_UINT64);
286 289 kstat_named_init(&ixgbe_ks->ptc1522, "pkts_xmitd_(1024-1522b)",
287 290 KSTAT_DATA_UINT64);
288 291
289 292 kstat_named_init(&ixgbe_ks->qprc[0], "queue_pkts_recvd [ 0]",
290 293 KSTAT_DATA_UINT64);
291 294 kstat_named_init(&ixgbe_ks->qprc[1], "queue_pkts_recvd [ 1]",
292 295 KSTAT_DATA_UINT64);
293 296 kstat_named_init(&ixgbe_ks->qprc[2], "queue_pkts_recvd [ 2]",
294 297 KSTAT_DATA_UINT64);
295 298 kstat_named_init(&ixgbe_ks->qprc[3], "queue_pkts_recvd [ 3]",
296 299 KSTAT_DATA_UINT64);
297 300 kstat_named_init(&ixgbe_ks->qprc[4], "queue_pkts_recvd [ 4]",
298 301 KSTAT_DATA_UINT64);
299 302 kstat_named_init(&ixgbe_ks->qprc[5], "queue_pkts_recvd [ 5]",
300 303 KSTAT_DATA_UINT64);
301 304 kstat_named_init(&ixgbe_ks->qprc[6], "queue_pkts_recvd [ 6]",
302 305 KSTAT_DATA_UINT64);
303 306 kstat_named_init(&ixgbe_ks->qprc[7], "queue_pkts_recvd [ 7]",
304 307 KSTAT_DATA_UINT64);
305 308 kstat_named_init(&ixgbe_ks->qprc[8], "queue_pkts_recvd [ 8]",
306 309 KSTAT_DATA_UINT64);
307 310 kstat_named_init(&ixgbe_ks->qprc[9], "queue_pkts_recvd [ 9]",
308 311 KSTAT_DATA_UINT64);
309 312 kstat_named_init(&ixgbe_ks->qprc[10], "queue_pkts_recvd [10]",
310 313 KSTAT_DATA_UINT64);
311 314 kstat_named_init(&ixgbe_ks->qprc[11], "queue_pkts_recvd [11]",
312 315 KSTAT_DATA_UINT64);
313 316 kstat_named_init(&ixgbe_ks->qprc[12], "queue_pkts_recvd [12]",
314 317 KSTAT_DATA_UINT64);
315 318 kstat_named_init(&ixgbe_ks->qprc[13], "queue_pkts_recvd [13]",
316 319 KSTAT_DATA_UINT64);
317 320 kstat_named_init(&ixgbe_ks->qprc[14], "queue_pkts_recvd [14]",
318 321 KSTAT_DATA_UINT64);
319 322 kstat_named_init(&ixgbe_ks->qprc[15], "queue_pkts_recvd [15]",
320 323 KSTAT_DATA_UINT64);
321 324
322 325 kstat_named_init(&ixgbe_ks->qptc[0], "queue_pkts_xmitd [ 0]",
323 326 KSTAT_DATA_UINT64);
324 327 kstat_named_init(&ixgbe_ks->qptc[1], "queue_pkts_xmitd [ 1]",
325 328 KSTAT_DATA_UINT64);
326 329 kstat_named_init(&ixgbe_ks->qptc[2], "queue_pkts_xmitd [ 2]",
327 330 KSTAT_DATA_UINT64);
328 331 kstat_named_init(&ixgbe_ks->qptc[3], "queue_pkts_xmitd [ 3]",
329 332 KSTAT_DATA_UINT64);
330 333 kstat_named_init(&ixgbe_ks->qptc[4], "queue_pkts_xmitd [ 4]",
331 334 KSTAT_DATA_UINT64);
332 335 kstat_named_init(&ixgbe_ks->qptc[5], "queue_pkts_xmitd [ 5]",
333 336 KSTAT_DATA_UINT64);
334 337 kstat_named_init(&ixgbe_ks->qptc[6], "queue_pkts_xmitd [ 6]",
335 338 KSTAT_DATA_UINT64);
336 339 kstat_named_init(&ixgbe_ks->qptc[7], "queue_pkts_xmitd [ 7]",
337 340 KSTAT_DATA_UINT64);
338 341 kstat_named_init(&ixgbe_ks->qptc[8], "queue_pkts_xmitd [ 8]",
339 342 KSTAT_DATA_UINT64);
340 343 kstat_named_init(&ixgbe_ks->qptc[9], "queue_pkts_xmitd [ 9]",
341 344 KSTAT_DATA_UINT64);
342 345 kstat_named_init(&ixgbe_ks->qptc[10], "queue_pkts_xmitd [10]",
343 346 KSTAT_DATA_UINT64);
344 347 kstat_named_init(&ixgbe_ks->qptc[11], "queue_pkts_xmitd [11]",
345 348 KSTAT_DATA_UINT64);
346 349 kstat_named_init(&ixgbe_ks->qptc[12], "queue_pkts_xmitd [12]",
347 350 KSTAT_DATA_UINT64);
348 351 kstat_named_init(&ixgbe_ks->qptc[13], "queue_pkts_xmitd [13]",
349 352 KSTAT_DATA_UINT64);
350 353 kstat_named_init(&ixgbe_ks->qptc[14], "queue_pkts_xmitd [14]",
351 354 KSTAT_DATA_UINT64);
352 355 kstat_named_init(&ixgbe_ks->qptc[15], "queue_pkts_xmitd [15]",
353 356 KSTAT_DATA_UINT64);
354 357
355 358 kstat_named_init(&ixgbe_ks->qbrc[0], "queue_bytes_recvd [ 0]",
356 359 KSTAT_DATA_UINT64);
357 360 kstat_named_init(&ixgbe_ks->qbrc[1], "queue_bytes_recvd [ 1]",
358 361 KSTAT_DATA_UINT64);
359 362 kstat_named_init(&ixgbe_ks->qbrc[2], "queue_bytes_recvd [ 2]",
360 363 KSTAT_DATA_UINT64);
361 364 kstat_named_init(&ixgbe_ks->qbrc[3], "queue_bytes_recvd [ 3]",
362 365 KSTAT_DATA_UINT64);
363 366 kstat_named_init(&ixgbe_ks->qbrc[4], "queue_bytes_recvd [ 4]",
364 367 KSTAT_DATA_UINT64);
365 368 kstat_named_init(&ixgbe_ks->qbrc[5], "queue_bytes_recvd [ 5]",
366 369 KSTAT_DATA_UINT64);
367 370 kstat_named_init(&ixgbe_ks->qbrc[6], "queue_bytes_recvd [ 6]",
368 371 KSTAT_DATA_UINT64);
369 372 kstat_named_init(&ixgbe_ks->qbrc[7], "queue_bytes_recvd [ 7]",
370 373 KSTAT_DATA_UINT64);
371 374 kstat_named_init(&ixgbe_ks->qbrc[8], "queue_bytes_recvd [ 8]",
372 375 KSTAT_DATA_UINT64);
373 376 kstat_named_init(&ixgbe_ks->qbrc[9], "queue_bytes_recvd [ 9]",
374 377 KSTAT_DATA_UINT64);
375 378 kstat_named_init(&ixgbe_ks->qbrc[10], "queue_bytes_recvd [10]",
376 379 KSTAT_DATA_UINT64);
377 380 kstat_named_init(&ixgbe_ks->qbrc[11], "queue_bytes_recvd [11]",
378 381 KSTAT_DATA_UINT64);
379 382 kstat_named_init(&ixgbe_ks->qbrc[12], "queue_bytes_recvd [12]",
380 383 KSTAT_DATA_UINT64);
381 384 kstat_named_init(&ixgbe_ks->qbrc[13], "queue_bytes_recvd [13]",
382 385 KSTAT_DATA_UINT64);
383 386 kstat_named_init(&ixgbe_ks->qbrc[14], "queue_bytes_recvd [14]",
384 387 KSTAT_DATA_UINT64);
385 388 kstat_named_init(&ixgbe_ks->qbrc[15], "queue_bytes_recvd [15]",
386 389 KSTAT_DATA_UINT64);
387 390
388 391 kstat_named_init(&ixgbe_ks->qbtc[0], "queue_bytes_xmitd [ 0]",
389 392 KSTAT_DATA_UINT64);
390 393 kstat_named_init(&ixgbe_ks->qbtc[1], "queue_bytes_xmitd [ 1]",
391 394 KSTAT_DATA_UINT64);
392 395 kstat_named_init(&ixgbe_ks->qbtc[2], "queue_bytes_xmitd [ 2]",
393 396 KSTAT_DATA_UINT64);
394 397 kstat_named_init(&ixgbe_ks->qbtc[3], "queue_bytes_xmitd [ 3]",
395 398 KSTAT_DATA_UINT64);
396 399 kstat_named_init(&ixgbe_ks->qbtc[4], "queue_bytes_xmitd [ 4]",
397 400 KSTAT_DATA_UINT64);
398 401 kstat_named_init(&ixgbe_ks->qbtc[5], "queue_bytes_xmitd [ 5]",
399 402 KSTAT_DATA_UINT64);
400 403 kstat_named_init(&ixgbe_ks->qbtc[6], "queue_bytes_xmitd [ 6]",
401 404 KSTAT_DATA_UINT64);
402 405 kstat_named_init(&ixgbe_ks->qbtc[7], "queue_bytes_xmitd [ 7]",
403 406 KSTAT_DATA_UINT64);
404 407 kstat_named_init(&ixgbe_ks->qbtc[8], "queue_bytes_xmitd [ 8]",
405 408 KSTAT_DATA_UINT64);
406 409 kstat_named_init(&ixgbe_ks->qbtc[9], "queue_bytes_xmitd [ 9]",
407 410 KSTAT_DATA_UINT64);
408 411 kstat_named_init(&ixgbe_ks->qbtc[10], "queue_bytes_xmitd [10]",
409 412 KSTAT_DATA_UINT64);
410 413 kstat_named_init(&ixgbe_ks->qbtc[11], "queue_bytes_xmitd [11]",
411 414 KSTAT_DATA_UINT64);
412 415 kstat_named_init(&ixgbe_ks->qbtc[12], "queue_bytes_xmitd [12]",
413 416 KSTAT_DATA_UINT64);
414 417 kstat_named_init(&ixgbe_ks->qbtc[13], "queue_bytes_xmitd [13]",
415 418 KSTAT_DATA_UINT64);
416 419 kstat_named_init(&ixgbe_ks->qbtc[14], "queue_bytes_xmitd [14]",
417 420 KSTAT_DATA_UINT64);
418 421 kstat_named_init(&ixgbe_ks->qbtc[15], "queue_bytes_xmitd [15]",
419 422 KSTAT_DATA_UINT64);
420 423
421 424 kstat_named_init(&ixgbe_ks->mspdc, "mac_short_packet_discard",
422 425 KSTAT_DATA_UINT64);
423 426 kstat_named_init(&ixgbe_ks->mpc, "missed_packets",
424 427 KSTAT_DATA_UINT64);
425 428 kstat_named_init(&ixgbe_ks->mlfc, "mac_local_fault",
426 429 KSTAT_DATA_UINT64);
427 430 kstat_named_init(&ixgbe_ks->mrfc, "mac_remote_fault",
428 431 KSTAT_DATA_UINT64);
429 432 kstat_named_init(&ixgbe_ks->rlec, "recv_length_err",
430 433 KSTAT_DATA_UINT64);
431 434 kstat_named_init(&ixgbe_ks->lxontxc, "link_xon_xmitd",
432 435 KSTAT_DATA_UINT64);
433 436 kstat_named_init(&ixgbe_ks->lxonrxc, "link_xon_recvd",
434 437 KSTAT_DATA_UINT64);
435 438 kstat_named_init(&ixgbe_ks->lxofftxc, "link_xoff_xmitd",
436 439 KSTAT_DATA_UINT64);
437 440 kstat_named_init(&ixgbe_ks->lxoffrxc, "link_xoff_recvd",
438 441 KSTAT_DATA_UINT64);
439 442 kstat_named_init(&ixgbe_ks->ruc, "recv_undersize",
440 443 KSTAT_DATA_UINT64);
441 444 kstat_named_init(&ixgbe_ks->rfc, "recv_fragment",
442 445 KSTAT_DATA_UINT64);
443 446 kstat_named_init(&ixgbe_ks->roc, "recv_oversize",
444 447 KSTAT_DATA_UINT64);
445 448 kstat_named_init(&ixgbe_ks->rjc, "recv_jabber",
446 449 KSTAT_DATA_UINT64);
447 450 kstat_named_init(&ixgbe_ks->rnbc, "recv_no_buffer",
448 451 KSTAT_DATA_UINT64);
449 452 kstat_named_init(&ixgbe_ks->lroc, "lro_pkt_count",
450 453 KSTAT_DATA_UINT64);
451 454 /*
452 455 * Function to provide kernel stat update on demand
453 456 */
454 457 ks->ks_update = ixgbe_update_stats;
455 458
456 459 ks->ks_private = (void *)ixgbe;
457 460
458 461 /*
459 462 * Add kstat to systems kstat chain
460 463 */
461 464 kstat_install(ks);
462 465
463 466 return (IXGBE_SUCCESS);
464 467 }
465 468
466 469 /*
467 470 * Retrieve a value for one of the statistics.
468 471 */
469 472 int
470 473 ixgbe_m_stat(void *arg, uint_t stat, uint64_t *val)
471 474 {
472 475 ixgbe_t *ixgbe = (ixgbe_t *)arg;
473 476 struct ixgbe_hw *hw = &ixgbe->hw;
474 477 ixgbe_stat_t *ixgbe_ks;
475 478 int i;
476 479
477 480 ixgbe_ks = (ixgbe_stat_t *)ixgbe->ixgbe_ks->ks_data;
478 481
479 482 mutex_enter(&ixgbe->gen_lock);
480 483
481 484 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
482 485 mutex_exit(&ixgbe->gen_lock);
483 486 return (ECANCELED);
484 487 }
485 488
486 489 switch (stat) {
487 490 case MAC_STAT_IFSPEED:
488 491 *val = ixgbe->link_speed * 1000000ull;
489 492 break;
490 493
491 494 case MAC_STAT_MULTIRCV:
492 495 ixgbe_ks->mprc.value.ui64 +=
493 496 IXGBE_READ_REG(hw, IXGBE_MPRC);
494 497 *val = ixgbe_ks->mprc.value.ui64;
495 498 break;
496 499
497 500 case MAC_STAT_BRDCSTRCV:
498 501 ixgbe_ks->bprc.value.ui64 +=
499 502 IXGBE_READ_REG(hw, IXGBE_BPRC);
500 503 *val = ixgbe_ks->bprc.value.ui64;
501 504 break;
502 505
503 506 case MAC_STAT_MULTIXMT:
504 507 ixgbe_ks->mptc.value.ui64 +=
505 508 IXGBE_READ_REG(hw, IXGBE_MPTC);
506 509 *val = ixgbe_ks->mptc.value.ui64;
507 510 break;
508 511
509 512 case MAC_STAT_BRDCSTXMT:
510 513 ixgbe_ks->bptc.value.ui64 +=
511 514 IXGBE_READ_REG(hw, IXGBE_BPTC);
512 515 *val = ixgbe_ks->bptc.value.ui64;
513 516 break;
514 517
515 518 case MAC_STAT_NORCVBUF:
516 519 for (i = 0; i < 8; i++) {
517 520 ixgbe_ks->rnbc.value.ui64 +=
518 521 IXGBE_READ_REG(hw, IXGBE_RNBC(i));
519 522 }
520 523 *val = ixgbe_ks->rnbc.value.ui64;
521 524 break;
522 525
523 526 case MAC_STAT_IERRORS:
524 527 ixgbe_ks->crcerrs.value.ui64 +=
525 528 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
526 529 ixgbe_ks->illerrc.value.ui64 +=
527 530 IXGBE_READ_REG(hw, IXGBE_ILLERRC);
528 531 ixgbe_ks->errbc.value.ui64 +=
529 532 IXGBE_READ_REG(hw, IXGBE_ERRBC);
530 533 ixgbe_ks->rlec.value.ui64 +=
531 534 IXGBE_READ_REG(hw, IXGBE_RLEC);
532 535 *val = ixgbe_ks->crcerrs.value.ui64 +
533 536 ixgbe_ks->illerrc.value.ui64 +
534 537 ixgbe_ks->errbc.value.ui64 +
535 538 ixgbe_ks->rlec.value.ui64;
536 539 break;
537 540
538 541 case MAC_STAT_RBYTES:
539 542 ixgbe_ks->tor.value.ui64 = 0;
540 543 for (i = 0; i < 16; i++) {
541 544 ixgbe_ks->qbrc[i].value.ui64 +=
542 545 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
543 546 ixgbe_ks->tor.value.ui64 +=
544 547 ixgbe_ks->qbrc[i].value.ui64;
545 548 }
546 549 *val = ixgbe_ks->tor.value.ui64;
547 550 break;
548 551
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549 552 case MAC_STAT_OBYTES:
550 553 ixgbe_ks->tot.value.ui64 = 0;
551 554 for (i = 0; i < 16; i++) {
552 555 switch (hw->mac.type) {
553 556 case ixgbe_mac_82598EB:
554 557 ixgbe_ks->qbtc[i].value.ui64 +=
555 558 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
556 559 break;
557 560
558 561 case ixgbe_mac_82599EB:
562 + case ixgbe_mac_X540:
559 563 ixgbe_ks->qbtc[i].value.ui64 +=
560 564 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
561 565 ixgbe_ks->qbtc[i].value.ui64 +=
562 566 ((uint64_t)((IXGBE_READ_REG(hw,
563 567 IXGBE_QBTC_H(i))) & 0xF) << 32);
564 568 break;
565 569
566 570 default:
567 571 break;
568 572 }
569 573 ixgbe_ks->tot.value.ui64 +=
570 574 ixgbe_ks->qbtc[i].value.ui64;
571 575 }
572 576 *val = ixgbe_ks->tot.value.ui64;
573 577 break;
574 578
575 579 case MAC_STAT_IPACKETS:
576 580 ixgbe_ks->tpr.value.ui64 +=
577 581 IXGBE_READ_REG(hw, IXGBE_TPR);
578 582 *val = ixgbe_ks->tpr.value.ui64;
579 583 break;
580 584
581 585 case MAC_STAT_OPACKETS:
582 586 ixgbe_ks->tpt.value.ui64 +=
583 587 IXGBE_READ_REG(hw, IXGBE_TPT);
584 588 *val = ixgbe_ks->tpt.value.ui64;
585 589 break;
586 590
587 591 /* RFC 1643 stats */
588 592 case ETHER_STAT_FCS_ERRORS:
589 593 ixgbe_ks->crcerrs.value.ui64 +=
590 594 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
591 595 *val = ixgbe_ks->crcerrs.value.ui64;
592 596 break;
593 597
594 598 case ETHER_STAT_TOOLONG_ERRORS:
595 599 ixgbe_ks->roc.value.ui64 +=
596 600 IXGBE_READ_REG(hw, IXGBE_ROC);
597 601 *val = ixgbe_ks->roc.value.ui64;
598 602 break;
599 603
600 604 case ETHER_STAT_MACRCV_ERRORS:
601 605 ixgbe_ks->crcerrs.value.ui64 +=
602 606 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
603 607 ixgbe_ks->illerrc.value.ui64 +=
604 608 IXGBE_READ_REG(hw, IXGBE_ILLERRC);
605 609 ixgbe_ks->errbc.value.ui64 +=
606 610 IXGBE_READ_REG(hw, IXGBE_ERRBC);
607 611 ixgbe_ks->rlec.value.ui64 +=
608 612 IXGBE_READ_REG(hw, IXGBE_RLEC);
609 613 *val = ixgbe_ks->crcerrs.value.ui64 +
610 614 ixgbe_ks->illerrc.value.ui64 +
611 615 ixgbe_ks->errbc.value.ui64 +
612 616 ixgbe_ks->rlec.value.ui64;
613 617 break;
614 618
615 619 /* MII/GMII stats */
616 620 case ETHER_STAT_XCVR_ADDR:
617 621 /* The Internal PHY's MDI address for each MAC is 1 */
618 622 *val = 1;
619 623 break;
620 624
621 625 case ETHER_STAT_XCVR_ID:
622 626 *val = hw->phy.id;
623 627 break;
624 628
625 629 case ETHER_STAT_XCVR_INUSE:
626 630 switch (ixgbe->link_speed) {
627 631 case IXGBE_LINK_SPEED_1GB_FULL:
628 632 *val =
629 633 (hw->phy.media_type == ixgbe_media_type_copper) ?
630 634 XCVR_1000T : XCVR_1000X;
631 635 break;
632 636 case IXGBE_LINK_SPEED_100_FULL:
633 637 *val = (hw->phy.media_type == ixgbe_media_type_copper) ?
634 638 XCVR_100T2 : XCVR_100X;
635 639 break;
636 640 default:
637 641 *val = XCVR_NONE;
638 642 break;
639 643 }
640 644 break;
641 645
642 646 case ETHER_STAT_CAP_10GFDX:
643 647 *val = 1;
644 648 break;
645 649
646 650 case ETHER_STAT_CAP_1000FDX:
647 651 *val = 1;
648 652 break;
649 653
650 654 case ETHER_STAT_CAP_100FDX:
651 655 *val = 1;
652 656 break;
653 657
654 658 case ETHER_STAT_CAP_ASMPAUSE:
655 659 *val = ixgbe->param_asym_pause_cap;
656 660 break;
657 661
658 662 case ETHER_STAT_CAP_PAUSE:
659 663 *val = ixgbe->param_pause_cap;
660 664 break;
661 665
662 666 case ETHER_STAT_CAP_AUTONEG:
663 667 *val = 1;
664 668 break;
665 669
666 670 case ETHER_STAT_ADV_CAP_10GFDX:
667 671 *val = ixgbe->param_adv_10000fdx_cap;
668 672 break;
669 673
670 674 case ETHER_STAT_ADV_CAP_1000FDX:
671 675 *val = ixgbe->param_adv_1000fdx_cap;
672 676 break;
673 677
674 678 case ETHER_STAT_ADV_CAP_100FDX:
675 679 *val = ixgbe->param_adv_100fdx_cap;
676 680 break;
677 681
678 682 case ETHER_STAT_ADV_CAP_ASMPAUSE:
679 683 *val = ixgbe->param_adv_asym_pause_cap;
680 684 break;
681 685
682 686 case ETHER_STAT_ADV_CAP_PAUSE:
683 687 *val = ixgbe->param_adv_pause_cap;
684 688 break;
685 689
686 690 case ETHER_STAT_ADV_CAP_AUTONEG:
687 691 *val = ixgbe->param_adv_autoneg_cap;
688 692 break;
689 693
690 694 case ETHER_STAT_LP_CAP_10GFDX:
691 695 *val = ixgbe->param_lp_10000fdx_cap;
692 696 break;
693 697
694 698 case ETHER_STAT_LP_CAP_1000FDX:
695 699 *val = ixgbe->param_lp_1000fdx_cap;
696 700 break;
697 701
698 702 case ETHER_STAT_LP_CAP_100FDX:
699 703 *val = ixgbe->param_lp_100fdx_cap;
700 704 break;
701 705
702 706 case ETHER_STAT_LP_CAP_ASMPAUSE:
703 707 *val = ixgbe->param_lp_asym_pause_cap;
704 708 break;
705 709
706 710 case ETHER_STAT_LP_CAP_PAUSE:
707 711 *val = ixgbe->param_lp_pause_cap;
708 712 break;
709 713
710 714 case ETHER_STAT_LP_CAP_AUTONEG:
711 715 *val = ixgbe->param_lp_autoneg_cap;
712 716 break;
713 717
714 718 case ETHER_STAT_LINK_ASMPAUSE:
715 719 *val = ixgbe->param_asym_pause_cap;
716 720 break;
717 721
718 722 case ETHER_STAT_LINK_PAUSE:
719 723 *val = ixgbe->param_pause_cap;
720 724 break;
721 725
722 726 case ETHER_STAT_LINK_AUTONEG:
723 727 *val = ixgbe->param_adv_autoneg_cap;
724 728 break;
725 729
726 730 case ETHER_STAT_LINK_DUPLEX:
727 731 *val = ixgbe->link_duplex;
728 732 break;
729 733
730 734 case ETHER_STAT_TOOSHORT_ERRORS:
731 735 ixgbe_ks->ruc.value.ui64 +=
732 736 IXGBE_READ_REG(hw, IXGBE_RUC);
733 737 *val = ixgbe_ks->ruc.value.ui64;
734 738 break;
735 739
736 740 case ETHER_STAT_CAP_REMFAULT:
737 741 *val = ixgbe->param_rem_fault;
738 742 break;
739 743
740 744 case ETHER_STAT_ADV_REMFAULT:
741 745 *val = ixgbe->param_adv_rem_fault;
742 746 break;
743 747
744 748 case ETHER_STAT_LP_REMFAULT:
745 749 *val = ixgbe->param_lp_rem_fault;
746 750 break;
747 751
748 752 case ETHER_STAT_JABBER_ERRORS:
749 753 ixgbe_ks->rjc.value.ui64 +=
750 754 IXGBE_READ_REG(hw, IXGBE_RJC);
751 755 *val = ixgbe_ks->rjc.value.ui64;
752 756 break;
753 757
754 758 default:
755 759 mutex_exit(&ixgbe->gen_lock);
756 760 return (ENOTSUP);
757 761 }
758 762
759 763 mutex_exit(&ixgbe->gen_lock);
760 764
761 765 if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) {
762 766 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_DEGRADED);
763 767 return (EIO);
764 768 }
765 769
766 770 return (0);
767 771 }
768 772
769 773 /*
770 774 * Retrieve a value for one of the statistics for a particular rx ring
771 775 */
772 776 int
773 777 ixgbe_rx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
774 778 {
775 779 ixgbe_rx_ring_t *rx_ring = (ixgbe_rx_ring_t *)rh;
776 780 ixgbe_t *ixgbe = rx_ring->ixgbe;
777 781
778 782 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
779 783 return (ECANCELED);
780 784 }
781 785
782 786 switch (stat) {
783 787 case MAC_STAT_RBYTES:
784 788 *val = rx_ring->stat_rbytes;
785 789 break;
786 790
787 791 case MAC_STAT_IPACKETS:
788 792 *val = rx_ring->stat_ipackets;
789 793 break;
790 794
791 795 default:
792 796 *val = 0;
793 797 return (ENOTSUP);
794 798 }
795 799
796 800 return (0);
797 801 }
798 802
799 803 /*
800 804 * Retrieve a value for one of the statistics for a particular tx ring
801 805 */
802 806 int
803 807 ixgbe_tx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
804 808 {
805 809 ixgbe_tx_ring_t *tx_ring = (ixgbe_tx_ring_t *)rh;
806 810 ixgbe_t *ixgbe = tx_ring->ixgbe;
807 811
808 812 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
809 813 return (ECANCELED);
810 814 }
811 815
812 816 switch (stat) {
813 817 case MAC_STAT_OBYTES:
814 818 *val = tx_ring->stat_obytes;
815 819 break;
816 820
817 821 case MAC_STAT_OPACKETS:
818 822 *val = tx_ring->stat_opackets;
819 823 break;
820 824
821 825 default:
822 826 *val = 0;
823 827 return (ENOTSUP);
824 828 }
825 829
826 830 return (0);
827 831 }
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