1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
24 */
25
26 /*
27 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
28 */
29
30 #include "ixgbe_sw.h"
31
32 /*
33 * Update driver private statistics.
34 */
35 static int
36 ixgbe_update_stats(kstat_t *ks, int rw)
37 {
38 ixgbe_t *ixgbe;
39 struct ixgbe_hw *hw;
40 ixgbe_stat_t *ixgbe_ks;
41 int i;
42
43 if (rw == KSTAT_WRITE)
44 return (EACCES);
45
46 ixgbe = (ixgbe_t *)ks->ks_private;
47 ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;
48 hw = &ixgbe->hw;
49
50 mutex_enter(&ixgbe->gen_lock);
51
52 /*
53 * Basic information
54 */
55 ixgbe_ks->link_speed.value.ui64 = ixgbe->link_speed;
56 ixgbe_ks->reset_count.value.ui64 = ixgbe->reset_count;
57 ixgbe_ks->lroc.value.ui64 = ixgbe->lro_pkt_count;
58
59 #ifdef IXGBE_DEBUG
60 ixgbe_ks->rx_frame_error.value.ui64 = 0;
61 ixgbe_ks->rx_cksum_error.value.ui64 = 0;
62 ixgbe_ks->rx_exceed_pkt.value.ui64 = 0;
63 for (i = 0; i < ixgbe->num_rx_rings; i++) {
64 ixgbe_ks->rx_frame_error.value.ui64 +=
65 ixgbe->rx_rings[i].stat_frame_error;
66 ixgbe_ks->rx_cksum_error.value.ui64 +=
67 ixgbe->rx_rings[i].stat_cksum_error;
68 ixgbe_ks->rx_exceed_pkt.value.ui64 +=
69 ixgbe->rx_rings[i].stat_exceed_pkt;
70 }
71
72 ixgbe_ks->tx_overload.value.ui64 = 0;
73 ixgbe_ks->tx_fail_no_tbd.value.ui64 = 0;
74 ixgbe_ks->tx_fail_no_tcb.value.ui64 = 0;
75 ixgbe_ks->tx_fail_dma_bind.value.ui64 = 0;
76 ixgbe_ks->tx_reschedule.value.ui64 = 0;
77 for (i = 0; i < ixgbe->num_tx_rings; i++) {
78 ixgbe_ks->tx_overload.value.ui64 +=
79 ixgbe->tx_rings[i].stat_overload;
80 ixgbe_ks->tx_fail_no_tbd.value.ui64 +=
81 ixgbe->tx_rings[i].stat_fail_no_tbd;
82 ixgbe_ks->tx_fail_no_tcb.value.ui64 +=
83 ixgbe->tx_rings[i].stat_fail_no_tcb;
84 ixgbe_ks->tx_fail_dma_bind.value.ui64 +=
85 ixgbe->tx_rings[i].stat_fail_dma_bind;
86 ixgbe_ks->tx_reschedule.value.ui64 +=
87 ixgbe->tx_rings[i].stat_reschedule;
88 }
89 #endif
90
91 /*
92 * Hardware calculated statistics.
93 */
94 ixgbe_ks->gprc.value.ui64 = 0;
95 ixgbe_ks->gptc.value.ui64 = 0;
96 ixgbe_ks->tor.value.ui64 = 0;
97 ixgbe_ks->tot.value.ui64 = 0;
98 for (i = 0; i < 16; i++) {
99 ixgbe_ks->qprc[i].value.ui64 +=
100 IXGBE_READ_REG(hw, IXGBE_QPRC(i));
101 ixgbe_ks->gprc.value.ui64 += ixgbe_ks->qprc[i].value.ui64;
102 ixgbe_ks->qptc[i].value.ui64 +=
103 IXGBE_READ_REG(hw, IXGBE_QPTC(i));
104 ixgbe_ks->gptc.value.ui64 += ixgbe_ks->qptc[i].value.ui64;
105 ixgbe_ks->qbrc[i].value.ui64 +=
106 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
107 ixgbe_ks->tor.value.ui64 += ixgbe_ks->qbrc[i].value.ui64;
108 switch (hw->mac.type) {
109 case ixgbe_mac_82598EB:
110 ixgbe_ks->qbtc[i].value.ui64 +=
111 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
112 break;
113
114 case ixgbe_mac_82599EB:
115 case ixgbe_mac_X540:
116 ixgbe_ks->qbtc[i].value.ui64 +=
117 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
118 ixgbe_ks->qbtc[i].value.ui64 +=
119 ((uint64_t)((IXGBE_READ_REG(hw,
120 IXGBE_QBTC_H(i))) & 0xF) << 32);
121 break;
122
123 default:
124 break;
125 }
126 ixgbe_ks->tot.value.ui64 += ixgbe_ks->qbtc[i].value.ui64;
127 }
128 /*
129 * This is a Workaround:
130 * Currently h/w GORCH, GOTCH, TORH registers are not
131 * correctly implemented. We found that the values in
132 * these registers are same as those in corresponding
133 * *L registers (i.e. GORCL, GOTCL, and TORL). Here the
134 * gor and got stat data will not be retrieved through
135 * GORC{H/L} and GOTC{H/L} registers but be obtained by
136 * simply assigning tor/tot stat data, so the gor/got
137 * stat data will not be accurate.
138 */
139 ixgbe_ks->gor.value.ui64 = ixgbe_ks->tor.value.ui64;
140 ixgbe_ks->got.value.ui64 = ixgbe_ks->tot.value.ui64;
141
142 ixgbe_ks->prc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC64);
143 ixgbe_ks->prc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC127);
144 ixgbe_ks->prc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC255);
145 ixgbe_ks->prc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC511);
146 ixgbe_ks->prc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1023);
147 ixgbe_ks->prc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1522);
148 ixgbe_ks->ptc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC64);
149 ixgbe_ks->ptc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC127);
150 ixgbe_ks->ptc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC255);
151 ixgbe_ks->ptc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC511);
152 ixgbe_ks->ptc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1023);
153 ixgbe_ks->ptc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1522);
154
155 ixgbe_ks->mspdc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MSPDC);
156 for (i = 0; i < 8; i++)
157 ixgbe_ks->mpc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MPC(i));
158 ixgbe_ks->mlfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MLFC);
159 ixgbe_ks->mrfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MRFC);
160 ixgbe_ks->rlec.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RLEC);
161 ixgbe_ks->lxontxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
162 switch (hw->mac.type) {
163 case ixgbe_mac_82598EB:
164 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
165 IXGBE_LXONRXC);
166 break;
167
168 case ixgbe_mac_82599EB:
169 case ixgbe_mac_X540:
170 ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
171 IXGBE_LXONRXCNT);
172 break;
173
174 default:
175 break;
176 }
177 ixgbe_ks->lxofftxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
178 switch (hw->mac.type) {
179 case ixgbe_mac_82598EB:
180 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
181 IXGBE_LXOFFRXC);
182 break;
183
184 case ixgbe_mac_82599EB:
185 case ixgbe_mac_X540:
186 ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
187 IXGBE_LXOFFRXCNT);
188 break;
189
190 default:
191 break;
192 }
193 ixgbe_ks->ruc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RUC);
194 ixgbe_ks->rfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RFC);
195 ixgbe_ks->roc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_ROC);
196 ixgbe_ks->rjc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RJC);
197
198 mutex_exit(&ixgbe->gen_lock);
199
200 if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK)
201 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_UNAFFECTED);
202
203 return (0);
204 }
205
206 /*
207 * Create and initialize the driver private statistics.
208 */
209 int
210 ixgbe_init_stats(ixgbe_t *ixgbe)
211 {
212 kstat_t *ks;
213 ixgbe_stat_t *ixgbe_ks;
214
215 /*
216 * Create and init kstat
217 */
218 ks = kstat_create(MODULE_NAME, ddi_get_instance(ixgbe->dip),
219 "statistics", "net", KSTAT_TYPE_NAMED,
220 sizeof (ixgbe_stat_t) / sizeof (kstat_named_t), 0);
221
222 if (ks == NULL) {
223 ixgbe_error(ixgbe,
224 "Could not create kernel statistics");
225 return (IXGBE_FAILURE);
226 }
227
228 ixgbe->ixgbe_ks = ks;
229
230 ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;
231
232 /*
233 * Initialize all the statistics.
234 */
235 kstat_named_init(&ixgbe_ks->link_speed, "link_speed",
236 KSTAT_DATA_UINT64);
237 kstat_named_init(&ixgbe_ks->reset_count, "reset_count",
238 KSTAT_DATA_UINT64);
239
240 #ifdef IXGBE_DEBUG
241 kstat_named_init(&ixgbe_ks->rx_frame_error, "rx_frame_error",
242 KSTAT_DATA_UINT64);
243 kstat_named_init(&ixgbe_ks->rx_cksum_error, "rx_cksum_error",
244 KSTAT_DATA_UINT64);
245 kstat_named_init(&ixgbe_ks->rx_exceed_pkt, "rx_exceed_pkt",
246 KSTAT_DATA_UINT64);
247 kstat_named_init(&ixgbe_ks->tx_overload, "tx_overload",
248 KSTAT_DATA_UINT64);
249 kstat_named_init(&ixgbe_ks->tx_fail_no_tbd, "tx_fail_no_tbd",
250 KSTAT_DATA_UINT64);
251 kstat_named_init(&ixgbe_ks->tx_fail_no_tcb, "tx_fail_no_tcb",
252 KSTAT_DATA_UINT64);
253 kstat_named_init(&ixgbe_ks->tx_fail_dma_bind, "tx_fail_dma_bind",
254 KSTAT_DATA_UINT64);
255 kstat_named_init(&ixgbe_ks->tx_reschedule, "tx_reschedule",
256 KSTAT_DATA_UINT64);
257 #endif
258
259 kstat_named_init(&ixgbe_ks->gprc, "good_pkts_recvd",
260 KSTAT_DATA_UINT64);
261 kstat_named_init(&ixgbe_ks->gptc, "good_pkts_xmitd",
262 KSTAT_DATA_UINT64);
263 kstat_named_init(&ixgbe_ks->gor, "good_octets_recvd",
264 KSTAT_DATA_UINT64);
265 kstat_named_init(&ixgbe_ks->got, "good_octets_xmitd",
266 KSTAT_DATA_UINT64);
267 kstat_named_init(&ixgbe_ks->prc64, "pkts_recvd_( 64b)",
268 KSTAT_DATA_UINT64);
269 kstat_named_init(&ixgbe_ks->prc127, "pkts_recvd_( 65- 127b)",
270 KSTAT_DATA_UINT64);
271 kstat_named_init(&ixgbe_ks->prc255, "pkts_recvd_( 127- 255b)",
272 KSTAT_DATA_UINT64);
273 kstat_named_init(&ixgbe_ks->prc511, "pkts_recvd_( 256- 511b)",
274 KSTAT_DATA_UINT64);
275 kstat_named_init(&ixgbe_ks->prc1023, "pkts_recvd_( 511-1023b)",
276 KSTAT_DATA_UINT64);
277 kstat_named_init(&ixgbe_ks->prc1522, "pkts_recvd_(1024-1522b)",
278 KSTAT_DATA_UINT64);
279 kstat_named_init(&ixgbe_ks->ptc64, "pkts_xmitd_( 64b)",
280 KSTAT_DATA_UINT64);
281 kstat_named_init(&ixgbe_ks->ptc127, "pkts_xmitd_( 65- 127b)",
282 KSTAT_DATA_UINT64);
283 kstat_named_init(&ixgbe_ks->ptc255, "pkts_xmitd_( 128- 255b)",
284 KSTAT_DATA_UINT64);
285 kstat_named_init(&ixgbe_ks->ptc511, "pkts_xmitd_( 255- 511b)",
286 KSTAT_DATA_UINT64);
287 kstat_named_init(&ixgbe_ks->ptc1023, "pkts_xmitd_( 512-1023b)",
288 KSTAT_DATA_UINT64);
289 kstat_named_init(&ixgbe_ks->ptc1522, "pkts_xmitd_(1024-1522b)",
290 KSTAT_DATA_UINT64);
291
292 kstat_named_init(&ixgbe_ks->qprc[0], "queue_pkts_recvd [ 0]",
293 KSTAT_DATA_UINT64);
294 kstat_named_init(&ixgbe_ks->qprc[1], "queue_pkts_recvd [ 1]",
295 KSTAT_DATA_UINT64);
296 kstat_named_init(&ixgbe_ks->qprc[2], "queue_pkts_recvd [ 2]",
297 KSTAT_DATA_UINT64);
298 kstat_named_init(&ixgbe_ks->qprc[3], "queue_pkts_recvd [ 3]",
299 KSTAT_DATA_UINT64);
300 kstat_named_init(&ixgbe_ks->qprc[4], "queue_pkts_recvd [ 4]",
301 KSTAT_DATA_UINT64);
302 kstat_named_init(&ixgbe_ks->qprc[5], "queue_pkts_recvd [ 5]",
303 KSTAT_DATA_UINT64);
304 kstat_named_init(&ixgbe_ks->qprc[6], "queue_pkts_recvd [ 6]",
305 KSTAT_DATA_UINT64);
306 kstat_named_init(&ixgbe_ks->qprc[7], "queue_pkts_recvd [ 7]",
307 KSTAT_DATA_UINT64);
308 kstat_named_init(&ixgbe_ks->qprc[8], "queue_pkts_recvd [ 8]",
309 KSTAT_DATA_UINT64);
310 kstat_named_init(&ixgbe_ks->qprc[9], "queue_pkts_recvd [ 9]",
311 KSTAT_DATA_UINT64);
312 kstat_named_init(&ixgbe_ks->qprc[10], "queue_pkts_recvd [10]",
313 KSTAT_DATA_UINT64);
314 kstat_named_init(&ixgbe_ks->qprc[11], "queue_pkts_recvd [11]",
315 KSTAT_DATA_UINT64);
316 kstat_named_init(&ixgbe_ks->qprc[12], "queue_pkts_recvd [12]",
317 KSTAT_DATA_UINT64);
318 kstat_named_init(&ixgbe_ks->qprc[13], "queue_pkts_recvd [13]",
319 KSTAT_DATA_UINT64);
320 kstat_named_init(&ixgbe_ks->qprc[14], "queue_pkts_recvd [14]",
321 KSTAT_DATA_UINT64);
322 kstat_named_init(&ixgbe_ks->qprc[15], "queue_pkts_recvd [15]",
323 KSTAT_DATA_UINT64);
324
325 kstat_named_init(&ixgbe_ks->qptc[0], "queue_pkts_xmitd [ 0]",
326 KSTAT_DATA_UINT64);
327 kstat_named_init(&ixgbe_ks->qptc[1], "queue_pkts_xmitd [ 1]",
328 KSTAT_DATA_UINT64);
329 kstat_named_init(&ixgbe_ks->qptc[2], "queue_pkts_xmitd [ 2]",
330 KSTAT_DATA_UINT64);
331 kstat_named_init(&ixgbe_ks->qptc[3], "queue_pkts_xmitd [ 3]",
332 KSTAT_DATA_UINT64);
333 kstat_named_init(&ixgbe_ks->qptc[4], "queue_pkts_xmitd [ 4]",
334 KSTAT_DATA_UINT64);
335 kstat_named_init(&ixgbe_ks->qptc[5], "queue_pkts_xmitd [ 5]",
336 KSTAT_DATA_UINT64);
337 kstat_named_init(&ixgbe_ks->qptc[6], "queue_pkts_xmitd [ 6]",
338 KSTAT_DATA_UINT64);
339 kstat_named_init(&ixgbe_ks->qptc[7], "queue_pkts_xmitd [ 7]",
340 KSTAT_DATA_UINT64);
341 kstat_named_init(&ixgbe_ks->qptc[8], "queue_pkts_xmitd [ 8]",
342 KSTAT_DATA_UINT64);
343 kstat_named_init(&ixgbe_ks->qptc[9], "queue_pkts_xmitd [ 9]",
344 KSTAT_DATA_UINT64);
345 kstat_named_init(&ixgbe_ks->qptc[10], "queue_pkts_xmitd [10]",
346 KSTAT_DATA_UINT64);
347 kstat_named_init(&ixgbe_ks->qptc[11], "queue_pkts_xmitd [11]",
348 KSTAT_DATA_UINT64);
349 kstat_named_init(&ixgbe_ks->qptc[12], "queue_pkts_xmitd [12]",
350 KSTAT_DATA_UINT64);
351 kstat_named_init(&ixgbe_ks->qptc[13], "queue_pkts_xmitd [13]",
352 KSTAT_DATA_UINT64);
353 kstat_named_init(&ixgbe_ks->qptc[14], "queue_pkts_xmitd [14]",
354 KSTAT_DATA_UINT64);
355 kstat_named_init(&ixgbe_ks->qptc[15], "queue_pkts_xmitd [15]",
356 KSTAT_DATA_UINT64);
357
358 kstat_named_init(&ixgbe_ks->qbrc[0], "queue_bytes_recvd [ 0]",
359 KSTAT_DATA_UINT64);
360 kstat_named_init(&ixgbe_ks->qbrc[1], "queue_bytes_recvd [ 1]",
361 KSTAT_DATA_UINT64);
362 kstat_named_init(&ixgbe_ks->qbrc[2], "queue_bytes_recvd [ 2]",
363 KSTAT_DATA_UINT64);
364 kstat_named_init(&ixgbe_ks->qbrc[3], "queue_bytes_recvd [ 3]",
365 KSTAT_DATA_UINT64);
366 kstat_named_init(&ixgbe_ks->qbrc[4], "queue_bytes_recvd [ 4]",
367 KSTAT_DATA_UINT64);
368 kstat_named_init(&ixgbe_ks->qbrc[5], "queue_bytes_recvd [ 5]",
369 KSTAT_DATA_UINT64);
370 kstat_named_init(&ixgbe_ks->qbrc[6], "queue_bytes_recvd [ 6]",
371 KSTAT_DATA_UINT64);
372 kstat_named_init(&ixgbe_ks->qbrc[7], "queue_bytes_recvd [ 7]",
373 KSTAT_DATA_UINT64);
374 kstat_named_init(&ixgbe_ks->qbrc[8], "queue_bytes_recvd [ 8]",
375 KSTAT_DATA_UINT64);
376 kstat_named_init(&ixgbe_ks->qbrc[9], "queue_bytes_recvd [ 9]",
377 KSTAT_DATA_UINT64);
378 kstat_named_init(&ixgbe_ks->qbrc[10], "queue_bytes_recvd [10]",
379 KSTAT_DATA_UINT64);
380 kstat_named_init(&ixgbe_ks->qbrc[11], "queue_bytes_recvd [11]",
381 KSTAT_DATA_UINT64);
382 kstat_named_init(&ixgbe_ks->qbrc[12], "queue_bytes_recvd [12]",
383 KSTAT_DATA_UINT64);
384 kstat_named_init(&ixgbe_ks->qbrc[13], "queue_bytes_recvd [13]",
385 KSTAT_DATA_UINT64);
386 kstat_named_init(&ixgbe_ks->qbrc[14], "queue_bytes_recvd [14]",
387 KSTAT_DATA_UINT64);
388 kstat_named_init(&ixgbe_ks->qbrc[15], "queue_bytes_recvd [15]",
389 KSTAT_DATA_UINT64);
390
391 kstat_named_init(&ixgbe_ks->qbtc[0], "queue_bytes_xmitd [ 0]",
392 KSTAT_DATA_UINT64);
393 kstat_named_init(&ixgbe_ks->qbtc[1], "queue_bytes_xmitd [ 1]",
394 KSTAT_DATA_UINT64);
395 kstat_named_init(&ixgbe_ks->qbtc[2], "queue_bytes_xmitd [ 2]",
396 KSTAT_DATA_UINT64);
397 kstat_named_init(&ixgbe_ks->qbtc[3], "queue_bytes_xmitd [ 3]",
398 KSTAT_DATA_UINT64);
399 kstat_named_init(&ixgbe_ks->qbtc[4], "queue_bytes_xmitd [ 4]",
400 KSTAT_DATA_UINT64);
401 kstat_named_init(&ixgbe_ks->qbtc[5], "queue_bytes_xmitd [ 5]",
402 KSTAT_DATA_UINT64);
403 kstat_named_init(&ixgbe_ks->qbtc[6], "queue_bytes_xmitd [ 6]",
404 KSTAT_DATA_UINT64);
405 kstat_named_init(&ixgbe_ks->qbtc[7], "queue_bytes_xmitd [ 7]",
406 KSTAT_DATA_UINT64);
407 kstat_named_init(&ixgbe_ks->qbtc[8], "queue_bytes_xmitd [ 8]",
408 KSTAT_DATA_UINT64);
409 kstat_named_init(&ixgbe_ks->qbtc[9], "queue_bytes_xmitd [ 9]",
410 KSTAT_DATA_UINT64);
411 kstat_named_init(&ixgbe_ks->qbtc[10], "queue_bytes_xmitd [10]",
412 KSTAT_DATA_UINT64);
413 kstat_named_init(&ixgbe_ks->qbtc[11], "queue_bytes_xmitd [11]",
414 KSTAT_DATA_UINT64);
415 kstat_named_init(&ixgbe_ks->qbtc[12], "queue_bytes_xmitd [12]",
416 KSTAT_DATA_UINT64);
417 kstat_named_init(&ixgbe_ks->qbtc[13], "queue_bytes_xmitd [13]",
418 KSTAT_DATA_UINT64);
419 kstat_named_init(&ixgbe_ks->qbtc[14], "queue_bytes_xmitd [14]",
420 KSTAT_DATA_UINT64);
421 kstat_named_init(&ixgbe_ks->qbtc[15], "queue_bytes_xmitd [15]",
422 KSTAT_DATA_UINT64);
423
424 kstat_named_init(&ixgbe_ks->mspdc, "mac_short_packet_discard",
425 KSTAT_DATA_UINT64);
426 kstat_named_init(&ixgbe_ks->mpc, "missed_packets",
427 KSTAT_DATA_UINT64);
428 kstat_named_init(&ixgbe_ks->mlfc, "mac_local_fault",
429 KSTAT_DATA_UINT64);
430 kstat_named_init(&ixgbe_ks->mrfc, "mac_remote_fault",
431 KSTAT_DATA_UINT64);
432 kstat_named_init(&ixgbe_ks->rlec, "recv_length_err",
433 KSTAT_DATA_UINT64);
434 kstat_named_init(&ixgbe_ks->lxontxc, "link_xon_xmitd",
435 KSTAT_DATA_UINT64);
436 kstat_named_init(&ixgbe_ks->lxonrxc, "link_xon_recvd",
437 KSTAT_DATA_UINT64);
438 kstat_named_init(&ixgbe_ks->lxofftxc, "link_xoff_xmitd",
439 KSTAT_DATA_UINT64);
440 kstat_named_init(&ixgbe_ks->lxoffrxc, "link_xoff_recvd",
441 KSTAT_DATA_UINT64);
442 kstat_named_init(&ixgbe_ks->ruc, "recv_undersize",
443 KSTAT_DATA_UINT64);
444 kstat_named_init(&ixgbe_ks->rfc, "recv_fragment",
445 KSTAT_DATA_UINT64);
446 kstat_named_init(&ixgbe_ks->roc, "recv_oversize",
447 KSTAT_DATA_UINT64);
448 kstat_named_init(&ixgbe_ks->rjc, "recv_jabber",
449 KSTAT_DATA_UINT64);
450 kstat_named_init(&ixgbe_ks->rnbc, "recv_no_buffer",
451 KSTAT_DATA_UINT64);
452 kstat_named_init(&ixgbe_ks->lroc, "lro_pkt_count",
453 KSTAT_DATA_UINT64);
454 /*
455 * Function to provide kernel stat update on demand
456 */
457 ks->ks_update = ixgbe_update_stats;
458
459 ks->ks_private = (void *)ixgbe;
460
461 /*
462 * Add kstat to systems kstat chain
463 */
464 kstat_install(ks);
465
466 return (IXGBE_SUCCESS);
467 }
468
469 /*
470 * Retrieve a value for one of the statistics.
471 */
472 int
473 ixgbe_m_stat(void *arg, uint_t stat, uint64_t *val)
474 {
475 ixgbe_t *ixgbe = (ixgbe_t *)arg;
476 struct ixgbe_hw *hw = &ixgbe->hw;
477 ixgbe_stat_t *ixgbe_ks;
478 int i;
479
480 ixgbe_ks = (ixgbe_stat_t *)ixgbe->ixgbe_ks->ks_data;
481
482 mutex_enter(&ixgbe->gen_lock);
483
484 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
485 mutex_exit(&ixgbe->gen_lock);
486 return (ECANCELED);
487 }
488
489 switch (stat) {
490 case MAC_STAT_IFSPEED:
491 *val = ixgbe->link_speed * 1000000ull;
492 break;
493
494 case MAC_STAT_MULTIRCV:
495 ixgbe_ks->mprc.value.ui64 +=
496 IXGBE_READ_REG(hw, IXGBE_MPRC);
497 *val = ixgbe_ks->mprc.value.ui64;
498 break;
499
500 case MAC_STAT_BRDCSTRCV:
501 ixgbe_ks->bprc.value.ui64 +=
502 IXGBE_READ_REG(hw, IXGBE_BPRC);
503 *val = ixgbe_ks->bprc.value.ui64;
504 break;
505
506 case MAC_STAT_MULTIXMT:
507 ixgbe_ks->mptc.value.ui64 +=
508 IXGBE_READ_REG(hw, IXGBE_MPTC);
509 *val = ixgbe_ks->mptc.value.ui64;
510 break;
511
512 case MAC_STAT_BRDCSTXMT:
513 ixgbe_ks->bptc.value.ui64 +=
514 IXGBE_READ_REG(hw, IXGBE_BPTC);
515 *val = ixgbe_ks->bptc.value.ui64;
516 break;
517
518 case MAC_STAT_NORCVBUF:
519 for (i = 0; i < 8; i++) {
520 ixgbe_ks->rnbc.value.ui64 +=
521 IXGBE_READ_REG(hw, IXGBE_RNBC(i));
522 }
523 *val = ixgbe_ks->rnbc.value.ui64;
524 break;
525
526 case MAC_STAT_IERRORS:
527 ixgbe_ks->crcerrs.value.ui64 +=
528 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
529 ixgbe_ks->illerrc.value.ui64 +=
530 IXGBE_READ_REG(hw, IXGBE_ILLERRC);
531 ixgbe_ks->errbc.value.ui64 +=
532 IXGBE_READ_REG(hw, IXGBE_ERRBC);
533 ixgbe_ks->rlec.value.ui64 +=
534 IXGBE_READ_REG(hw, IXGBE_RLEC);
535 *val = ixgbe_ks->crcerrs.value.ui64 +
536 ixgbe_ks->illerrc.value.ui64 +
537 ixgbe_ks->errbc.value.ui64 +
538 ixgbe_ks->rlec.value.ui64;
539 break;
540
541 case MAC_STAT_RBYTES:
542 ixgbe_ks->tor.value.ui64 = 0;
543 for (i = 0; i < 16; i++) {
544 ixgbe_ks->qbrc[i].value.ui64 +=
545 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
546 ixgbe_ks->tor.value.ui64 +=
547 ixgbe_ks->qbrc[i].value.ui64;
548 }
549 *val = ixgbe_ks->tor.value.ui64;
550 break;
551
552 case MAC_STAT_OBYTES:
553 ixgbe_ks->tot.value.ui64 = 0;
554 for (i = 0; i < 16; i++) {
555 switch (hw->mac.type) {
556 case ixgbe_mac_82598EB:
557 ixgbe_ks->qbtc[i].value.ui64 +=
558 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
559 break;
560
561 case ixgbe_mac_82599EB:
562 case ixgbe_mac_X540:
563 ixgbe_ks->qbtc[i].value.ui64 +=
564 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
565 ixgbe_ks->qbtc[i].value.ui64 +=
566 ((uint64_t)((IXGBE_READ_REG(hw,
567 IXGBE_QBTC_H(i))) & 0xF) << 32);
568 break;
569
570 default:
571 break;
572 }
573 ixgbe_ks->tot.value.ui64 +=
574 ixgbe_ks->qbtc[i].value.ui64;
575 }
576 *val = ixgbe_ks->tot.value.ui64;
577 break;
578
579 case MAC_STAT_IPACKETS:
580 ixgbe_ks->tpr.value.ui64 +=
581 IXGBE_READ_REG(hw, IXGBE_TPR);
582 *val = ixgbe_ks->tpr.value.ui64;
583 break;
584
585 case MAC_STAT_OPACKETS:
586 ixgbe_ks->tpt.value.ui64 +=
587 IXGBE_READ_REG(hw, IXGBE_TPT);
588 *val = ixgbe_ks->tpt.value.ui64;
589 break;
590
591 /* RFC 1643 stats */
592 case ETHER_STAT_FCS_ERRORS:
593 ixgbe_ks->crcerrs.value.ui64 +=
594 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
595 *val = ixgbe_ks->crcerrs.value.ui64;
596 break;
597
598 case ETHER_STAT_TOOLONG_ERRORS:
599 ixgbe_ks->roc.value.ui64 +=
600 IXGBE_READ_REG(hw, IXGBE_ROC);
601 *val = ixgbe_ks->roc.value.ui64;
602 break;
603
604 case ETHER_STAT_MACRCV_ERRORS:
605 ixgbe_ks->crcerrs.value.ui64 +=
606 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
607 ixgbe_ks->illerrc.value.ui64 +=
608 IXGBE_READ_REG(hw, IXGBE_ILLERRC);
609 ixgbe_ks->errbc.value.ui64 +=
610 IXGBE_READ_REG(hw, IXGBE_ERRBC);
611 ixgbe_ks->rlec.value.ui64 +=
612 IXGBE_READ_REG(hw, IXGBE_RLEC);
613 *val = ixgbe_ks->crcerrs.value.ui64 +
614 ixgbe_ks->illerrc.value.ui64 +
615 ixgbe_ks->errbc.value.ui64 +
616 ixgbe_ks->rlec.value.ui64;
617 break;
618
619 /* MII/GMII stats */
620 case ETHER_STAT_XCVR_ADDR:
621 /* The Internal PHY's MDI address for each MAC is 1 */
622 *val = 1;
623 break;
624
625 case ETHER_STAT_XCVR_ID:
626 *val = hw->phy.id;
627 break;
628
629 case ETHER_STAT_XCVR_INUSE:
630 switch (ixgbe->link_speed) {
631 case IXGBE_LINK_SPEED_1GB_FULL:
632 *val =
633 (hw->phy.media_type == ixgbe_media_type_copper) ?
634 XCVR_1000T : XCVR_1000X;
635 break;
636 case IXGBE_LINK_SPEED_100_FULL:
637 *val = (hw->phy.media_type == ixgbe_media_type_copper) ?
638 XCVR_100T2 : XCVR_100X;
639 break;
640 default:
641 *val = XCVR_NONE;
642 break;
643 }
644 break;
645
646 case ETHER_STAT_CAP_10GFDX:
647 *val = 1;
648 break;
649
650 case ETHER_STAT_CAP_1000FDX:
651 *val = 1;
652 break;
653
654 case ETHER_STAT_CAP_100FDX:
655 *val = 1;
656 break;
657
658 case ETHER_STAT_CAP_ASMPAUSE:
659 *val = ixgbe->param_asym_pause_cap;
660 break;
661
662 case ETHER_STAT_CAP_PAUSE:
663 *val = ixgbe->param_pause_cap;
664 break;
665
666 case ETHER_STAT_CAP_AUTONEG:
667 *val = 1;
668 break;
669
670 case ETHER_STAT_ADV_CAP_10GFDX:
671 *val = ixgbe->param_adv_10000fdx_cap;
672 break;
673
674 case ETHER_STAT_ADV_CAP_1000FDX:
675 *val = ixgbe->param_adv_1000fdx_cap;
676 break;
677
678 case ETHER_STAT_ADV_CAP_100FDX:
679 *val = ixgbe->param_adv_100fdx_cap;
680 break;
681
682 case ETHER_STAT_ADV_CAP_ASMPAUSE:
683 *val = ixgbe->param_adv_asym_pause_cap;
684 break;
685
686 case ETHER_STAT_ADV_CAP_PAUSE:
687 *val = ixgbe->param_adv_pause_cap;
688 break;
689
690 case ETHER_STAT_ADV_CAP_AUTONEG:
691 *val = ixgbe->param_adv_autoneg_cap;
692 break;
693
694 case ETHER_STAT_LP_CAP_10GFDX:
695 *val = ixgbe->param_lp_10000fdx_cap;
696 break;
697
698 case ETHER_STAT_LP_CAP_1000FDX:
699 *val = ixgbe->param_lp_1000fdx_cap;
700 break;
701
702 case ETHER_STAT_LP_CAP_100FDX:
703 *val = ixgbe->param_lp_100fdx_cap;
704 break;
705
706 case ETHER_STAT_LP_CAP_ASMPAUSE:
707 *val = ixgbe->param_lp_asym_pause_cap;
708 break;
709
710 case ETHER_STAT_LP_CAP_PAUSE:
711 *val = ixgbe->param_lp_pause_cap;
712 break;
713
714 case ETHER_STAT_LP_CAP_AUTONEG:
715 *val = ixgbe->param_lp_autoneg_cap;
716 break;
717
718 case ETHER_STAT_LINK_ASMPAUSE:
719 *val = ixgbe->param_asym_pause_cap;
720 break;
721
722 case ETHER_STAT_LINK_PAUSE:
723 *val = ixgbe->param_pause_cap;
724 break;
725
726 case ETHER_STAT_LINK_AUTONEG:
727 *val = ixgbe->param_adv_autoneg_cap;
728 break;
729
730 case ETHER_STAT_LINK_DUPLEX:
731 *val = ixgbe->link_duplex;
732 break;
733
734 case ETHER_STAT_TOOSHORT_ERRORS:
735 ixgbe_ks->ruc.value.ui64 +=
736 IXGBE_READ_REG(hw, IXGBE_RUC);
737 *val = ixgbe_ks->ruc.value.ui64;
738 break;
739
740 case ETHER_STAT_CAP_REMFAULT:
741 *val = ixgbe->param_rem_fault;
742 break;
743
744 case ETHER_STAT_ADV_REMFAULT:
745 *val = ixgbe->param_adv_rem_fault;
746 break;
747
748 case ETHER_STAT_LP_REMFAULT:
749 *val = ixgbe->param_lp_rem_fault;
750 break;
751
752 case ETHER_STAT_JABBER_ERRORS:
753 ixgbe_ks->rjc.value.ui64 +=
754 IXGBE_READ_REG(hw, IXGBE_RJC);
755 *val = ixgbe_ks->rjc.value.ui64;
756 break;
757
758 default:
759 mutex_exit(&ixgbe->gen_lock);
760 return (ENOTSUP);
761 }
762
763 mutex_exit(&ixgbe->gen_lock);
764
765 if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) {
766 ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_DEGRADED);
767 return (EIO);
768 }
769
770 return (0);
771 }
772
773 /*
774 * Retrieve a value for one of the statistics for a particular rx ring
775 */
776 int
777 ixgbe_rx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
778 {
779 ixgbe_rx_ring_t *rx_ring = (ixgbe_rx_ring_t *)rh;
780 ixgbe_t *ixgbe = rx_ring->ixgbe;
781
782 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
783 return (ECANCELED);
784 }
785
786 switch (stat) {
787 case MAC_STAT_RBYTES:
788 *val = rx_ring->stat_rbytes;
789 break;
790
791 case MAC_STAT_IPACKETS:
792 *val = rx_ring->stat_ipackets;
793 break;
794
795 default:
796 *val = 0;
797 return (ENOTSUP);
798 }
799
800 return (0);
801 }
802
803 /*
804 * Retrieve a value for one of the statistics for a particular tx ring
805 */
806 int
807 ixgbe_tx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
808 {
809 ixgbe_tx_ring_t *tx_ring = (ixgbe_tx_ring_t *)rh;
810 ixgbe_t *ixgbe = tx_ring->ixgbe;
811
812 if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
813 return (ECANCELED);
814 }
815
816 switch (stat) {
817 case MAC_STAT_OBYTES:
818 *val = tx_ring->stat_obytes;
819 break;
820
821 case MAC_STAT_OPACKETS:
822 *val = tx_ring->stat_opackets;
823 break;
824
825 default:
826 *val = 0;
827 return (ENOTSUP);
828 }
829
830 return (0);
831 }