693                         err = EINVAL;
 694                 else {
 695                         ixgbe->rx_limit_per_intr = (uint32_t)result;
 696                 }
 697                 return (err);
 698         }
 699         if (strcmp(pr_name, "_intr_throttling") == 0) {
 700                 if (pr_val == NULL) {
 701                         err = EINVAL;
 702                         return (err);
 703                 }
 704                 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
 705 
 706                 if (result < ixgbe->capab->min_intr_throttle ||
 707                     result > ixgbe->capab->max_intr_throttle)
 708                         err = EINVAL;
 709                 else {
 710                         ixgbe->intr_throttling[0] = (uint32_t)result;
 711 
 712                         /*
 713                          * 82599 requires the interupt throttling rate is
 714                          * a multiple of 8. This is enforced by the register
 715                          * definiton.
 716                          */
 717                         if (hw->mac.type == ixgbe_mac_82599EB)
 718                                 ixgbe->intr_throttling[0] =
 719                                     ixgbe->intr_throttling[0] & 0xFF8;
 720 
 721                         for (i = 0; i < MAX_INTR_VECTOR; i++)
 722                                 ixgbe->intr_throttling[i] =
 723                                     ixgbe->intr_throttling[0];
 724 
 725                         /* Set interrupt throttling rate */
 726                         for (i = 0; i < ixgbe->intr_cnt; i++)
 727                                 IXGBE_WRITE_REG(hw, IXGBE_EITR(i),
 728                                     ixgbe->intr_throttling[i]);
 729                 }
 730                 return (err);
 731         }
 732         return (ENOTSUP);
 733 }
 734 
 735 int
 736 ixgbe_get_priv_prop(ixgbe_t *ixgbe, const char *pr_name,
 737     uint_t pr_valsize, void *pr_val)
 
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 693                         err = EINVAL;
 694                 else {
 695                         ixgbe->rx_limit_per_intr = (uint32_t)result;
 696                 }
 697                 return (err);
 698         }
 699         if (strcmp(pr_name, "_intr_throttling") == 0) {
 700                 if (pr_val == NULL) {
 701                         err = EINVAL;
 702                         return (err);
 703                 }
 704                 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
 705 
 706                 if (result < ixgbe->capab->min_intr_throttle ||
 707                     result > ixgbe->capab->max_intr_throttle)
 708                         err = EINVAL;
 709                 else {
 710                         ixgbe->intr_throttling[0] = (uint32_t)result;
 711 
 712                         /*
 713                          * 82599 and X540 require the interupt throttling
 714                          * rate is a multiple of 8. This is enforced by the
 715                          * register definiton.
 716                          */
 717                         if (hw->mac.type >= ixgbe_mac_82599EB)
 718                                 ixgbe->intr_throttling[0] =
 719                                     ixgbe->intr_throttling[0] & 0xFF8;
 720 
 721                         for (i = 0; i < MAX_INTR_VECTOR; i++)
 722                                 ixgbe->intr_throttling[i] =
 723                                     ixgbe->intr_throttling[0];
 724 
 725                         /* Set interrupt throttling rate */
 726                         for (i = 0; i < ixgbe->intr_cnt; i++)
 727                                 IXGBE_WRITE_REG(hw, IXGBE_EITR(i),
 728                                     ixgbe->intr_throttling[i]);
 729                 }
 730                 return (err);
 731         }
 732         return (ENOTSUP);
 733 }
 734 
 735 int
 736 ixgbe_get_priv_prop(ixgbe_t *ixgbe, const char *pr_name,
 737     uint_t pr_valsize, void *pr_val)
 
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