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          --- old/usr/src/uts/common/io/ixgbe/ixgbe_api.h
          +++ new/usr/src/uts/common/io/ixgbe/ixgbe_api.h
   1    1  /******************************************************************************
   2    2  
   3      -  Copyright (c) 2001-2010, Intel Corporation 
        3 +  Copyright (c) 2001-2012, Intel Corporation 
   4    4    All rights reserved.
   5    5    
   6    6    Redistribution and use in source and binary forms, with or without 
   7    7    modification, are permitted provided that the following conditions are met:
   8    8    
   9    9     1. Redistributions of source code must retain the above copyright notice, 
  10   10        this list of conditions and the following disclaimer.
  11   11    
  12   12     2. Redistributions in binary form must reproduce the above copyright 
  13   13        notice, this list of conditions and the following disclaimer in the 
↓ open down ↓ 9 lines elided ↑ open up ↑
  23   23    ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
  24   24    LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
  25   25    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
  26   26    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
  27   27    INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
  28   28    CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
  29   29    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  30   30    POSSIBILITY OF SUCH DAMAGE.
  31   31  
  32   32  ******************************************************************************/
       33 +/*$FreeBSD: src/sys/dev/ixgbe/ixgbe_api.h,v 1.14 2012/07/05 20:51:44 jfv Exp $*/
  33   34  
  34   35  #ifndef _IXGBE_API_H_
  35   36  #define _IXGBE_API_H_
  36   37  
  37   38  #include "ixgbe_type.h"
  38   39  
  39   40  s32 ixgbe_init_shared_code(struct ixgbe_hw *hw);
  40   41  
       42 +extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);
       43 +extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw);
       44 +extern s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw);
       45 +extern s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw);
       46 +
  41   47  s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
  42   48  s32 ixgbe_init_hw(struct ixgbe_hw *hw);
  43   49  s32 ixgbe_reset_hw(struct ixgbe_hw *hw);
  44   50  s32 ixgbe_start_hw(struct ixgbe_hw *hw);
  45   51  void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw);
  46   52  s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw);
  47   53  enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw);
  48   54  s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr);
  49   55  s32 ixgbe_get_bus_info(struct ixgbe_hw *hw);
  50   56  u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw);
  51   57  u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw);
  52   58  s32 ixgbe_stop_adapter(struct ixgbe_hw *hw);
  53   59  s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num);
  54   60  s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);
  55      -s32 ixgbe_read_pba_length(struct ixgbe_hw *hw, u32 *pba_num_size);
  56   61  
  57   62  s32 ixgbe_identify_phy(struct ixgbe_hw *hw);
  58   63  s32 ixgbe_reset_phy(struct ixgbe_hw *hw);
  59   64  s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
  60      -                       u16 *phy_data);
       65 +                       u16 *phy_data);
  61   66  s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
  62      -                        u16 phy_data);
       67 +                        u16 phy_data);
  63   68  
  64   69  s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw);
  65   70  s32 ixgbe_check_phy_link(struct ixgbe_hw *hw,
  66      -                         ixgbe_link_speed *speed,
  67      -                         bool *link_up);
       71 +                         ixgbe_link_speed *speed,
       72 +                         bool *link_up);
  68   73  s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw,
  69      -                               ixgbe_link_speed speed,
  70      -                               bool autoneg,
  71      -                               bool autoneg_wait_to_complete);
       74 +                               ixgbe_link_speed speed,
       75 +                               bool autoneg,
       76 +                               bool autoneg_wait_to_complete);
  72   77  void ixgbe_disable_tx_laser(struct ixgbe_hw *hw);
  73   78  void ixgbe_enable_tx_laser(struct ixgbe_hw *hw);
  74   79  void ixgbe_flap_tx_laser(struct ixgbe_hw *hw);
  75   80  s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
  76      -                           bool autoneg, bool autoneg_wait_to_complete);
       81 +                     bool autoneg, bool autoneg_wait_to_complete);
  77   82  s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
  78      -                     bool *link_up, bool link_up_wait_to_complete);
       83 +                     bool *link_up, bool link_up_wait_to_complete);
  79   84  s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
  80      -                            bool *autoneg);
       85 +                                bool *autoneg);
  81   86  s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index);
  82   87  s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index);
  83   88  s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index);
  84   89  s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index);
  85   90  
  86   91  s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw);
  87   92  s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data);
       93 +s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
       94 +                              u16 words, u16 *data);
  88   95  s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data);
       96 +s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
       97 +                             u16 words, u16 *data);
       98 +
  89   99  s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val);
  90  100  s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw);
  91  101  
  92  102  s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
  93  103  s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
  94      -                  u32 enable_addr);
      104 +                  u32 enable_addr);
  95  105  s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index);
  96  106  s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
      107 +s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq);
  97  108  s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
  98  109  s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw);
  99  110  u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw);
 100  111  s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
 101      -                              u32 addr_count, ixgbe_mc_addr_itr func);
      112 +                              u32 addr_count, ixgbe_mc_addr_itr func);
 102  113  s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
 103      -                              u32 mc_addr_count, ixgbe_mc_addr_itr func);
      114 +                              u32 mc_addr_count, ixgbe_mc_addr_itr func,
      115 +                              bool clear);
 104  116  void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq);
 105  117  s32 ixgbe_enable_mc(struct ixgbe_hw *hw);
 106  118  s32 ixgbe_disable_mc(struct ixgbe_hw *hw);
 107  119  s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);
 108  120  s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan,
 109      -                   u32 vind, bool vlan_on);
 110      -
 111      -s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num);
 112      -
      121 +                   u32 vind, bool vlan_on);
      122 +s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
      123 +                   bool vlan_on, bool *vfta_changed);
      124 +s32 ixgbe_fc_enable(struct ixgbe_hw *hw);
      125 +s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
      126 +                         u8 ver);
 113  127  void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr);
 114  128  s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw,
 115      -                                   u16 *firmware_version);
      129 +                                   u16 *firmware_version);
 116  130  s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);
 117  131  s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);
 118  132  s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw);
 119  133  s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data);
 120  134  u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw);
 121  135  s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);
      136 +s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw);
      137 +s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw);
 122  138  s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);
 123      -s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 pballoc);
 124      -s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 pballoc);
      139 +s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl);
      140 +s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl);
 125  141  s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
 126      -                                          union ixgbe_atr_hash_dword input,
      142 +                                          union ixgbe_atr_hash_dword input,
 127  143                                            union ixgbe_atr_hash_dword common,
 128      -                                          u8 queue);
      144 +                                          u8 queue);
      145 +s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,
      146 +                                    union ixgbe_atr_input *input_mask);
      147 +s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw,
      148 +                                          union ixgbe_atr_input *input,
      149 +                                          u16 soft_id, u8 queue);
      150 +s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw,
      151 +                                          union ixgbe_atr_input *input,
      152 +                                          u16 soft_id);
 129  153  s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw,
 130      -                                        union ixgbe_atr_input *input,
 131      -                                        struct ixgbe_atr_input_masks *masks,
 132      -                                        u16 soft_id,
 133      -                                        u8 queue);
 134      -u32 ixgbe_atr_compute_hash_82599(union ixgbe_atr_input *input, u32 key);
      154 +                                        union ixgbe_atr_input *input,
      155 +                                        union ixgbe_atr_input *mask,
      156 +                                        u16 soft_id,
      157 +                                        u8 queue);
      158 +void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input,
      159 +                                          union ixgbe_atr_input *mask);
      160 +u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input,
      161 +                                     union ixgbe_atr_hash_dword common);
 135  162  s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
 136      -                        u8 *data);
      163 +                        u8 *data);
 137  164  s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
 138      -                         u8 data);
      165 +                         u8 data);
 139  166  s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data);
 140  167  s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
 141  168  s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
 142  169  s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps);
 143  170  s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask);
 144  171  void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask);
 145  172  s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
 146      -                         u16 *wwpn_prefix);
      173 +                         u16 *wwpn_prefix);
 147  174  s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs);
 148  175  
 149      -
 150  176  #endif /* _IXGBE_API_H_ */
    
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