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--- old/usr/src/uts/common/io/ixgbe/ixgbe_api.c
+++ new/usr/src/uts/common/io/ixgbe/ixgbe_api.c
1 1 /******************************************************************************
2 2
3 3 Copyright (c) 2001-2012, Intel Corporation
4 4 All rights reserved.
5 5
6 6 Redistribution and use in source and binary forms, with or without
7 7 modification, are permitted provided that the following conditions are met:
8 8
9 9 1. Redistributions of source code must retain the above copyright notice,
10 10 this list of conditions and the following disclaimer.
11 11
12 12 2. Redistributions in binary form must reproduce the above copyright
13 13 notice, this list of conditions and the following disclaimer in the
14 14 documentation and/or other materials provided with the distribution.
15 15
16 16 3. Neither the name of the Intel Corporation nor the names of its
17 17 contributors may be used to endorse or promote products derived from
18 18 this software without specific prior written permission.
19 19
20 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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23 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 30 POSSIBILITY OF SUCH DAMAGE.
31 31
32 32 ******************************************************************************/
33 -/*$FreeBSD$*/
33 +/*$FreeBSD: src/sys/dev/ixgbe/ixgbe_api.c,v 1.13 2012/07/05 20:51:44 jfv Exp $*/
34 34
35 35 #include "ixgbe_api.h"
36 36 #include "ixgbe_common.h"
37 37
38 -extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);
39 -extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw);
40 -
41 38 /**
42 39 * ixgbe_init_shared_code - Initialize the shared code
43 40 * @hw: pointer to hardware structure
44 41 *
45 42 * This will assign function pointers and assign the MAC type and PHY code.
46 43 * Does not touch the hardware. This function must be called prior to any
47 44 * other function in the shared code. The ixgbe_hw structure should be
48 45 * memset to 0 prior to calling this function. The following fields in
49 46 * hw structure should be filled in prior to calling this function:
50 47 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
51 48 * subsystem_vendor_id, and revision_id
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52 49 **/
53 50 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
54 51 {
55 52 s32 status;
56 53
57 54 DEBUGFUNC("ixgbe_init_shared_code");
58 55
59 56 /*
60 57 * Set the mac type
61 58 */
62 - (void) ixgbe_set_mac_type(hw);
59 + ixgbe_set_mac_type(hw);
63 60
64 61 switch (hw->mac.type) {
65 62 case ixgbe_mac_82598EB:
66 63 status = ixgbe_init_ops_82598(hw);
67 64 break;
68 65 case ixgbe_mac_82599EB:
69 66 status = ixgbe_init_ops_82599(hw);
70 67 break;
68 + case ixgbe_mac_X540:
69 + status = ixgbe_init_ops_X540(hw);
70 + break;
71 71 default:
72 72 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
73 73 break;
74 74 }
75 75
76 76 return status;
77 77 }
78 78
79 79 /**
80 80 * ixgbe_set_mac_type - Sets MAC type
81 81 * @hw: pointer to the HW structure
82 82 *
83 83 * This function sets the mac type of the adapter based on the
84 84 * vendor ID and device ID stored in the hw structure.
85 85 **/
86 86 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
87 87 {
88 88 s32 ret_val = IXGBE_SUCCESS;
89 89
90 90 DEBUGFUNC("ixgbe_set_mac_type\n");
91 91
92 92 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) {
93 93 switch (hw->device_id) {
94 94 case IXGBE_DEV_ID_82598:
95 95 case IXGBE_DEV_ID_82598_BX:
96 96 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
97 97 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
98 98 case IXGBE_DEV_ID_82598AT:
99 99 case IXGBE_DEV_ID_82598AT2:
100 100 case IXGBE_DEV_ID_82598EB_CX4:
101 101 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
102 102 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
103 103 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
104 104 case IXGBE_DEV_ID_82598EB_XF_LR:
105 105 case IXGBE_DEV_ID_82598EB_SFP_LOM:
106 106 hw->mac.type = ixgbe_mac_82598EB;
107 107 break;
108 108 case IXGBE_DEV_ID_82599_KX4:
109 109 case IXGBE_DEV_ID_82599_KX4_MEZZ:
110 110 case IXGBE_DEV_ID_82599_XAUI_LOM:
111 111 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
112 112 case IXGBE_DEV_ID_82599_KR:
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113 113 case IXGBE_DEV_ID_82599_SFP:
114 114 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
115 115 case IXGBE_DEV_ID_82599_SFP_FCOE:
116 116 case IXGBE_DEV_ID_82599_SFP_EM:
117 117 case IXGBE_DEV_ID_82599_SFP_SF2:
118 118 case IXGBE_DEV_ID_82599EN_SFP:
119 119 case IXGBE_DEV_ID_82599_CX4:
120 120 case IXGBE_DEV_ID_82599_T3_LOM:
121 121 hw->mac.type = ixgbe_mac_82599EB;
122 122 break;
123 + case IXGBE_DEV_ID_82599_VF:
124 + hw->mac.type = ixgbe_mac_82599_vf;
125 + break;
126 + case IXGBE_DEV_ID_X540_VF:
127 + hw->mac.type = ixgbe_mac_X540_vf;
128 + break;
129 + case IXGBE_DEV_ID_X540T:
130 + case IXGBE_DEV_ID_X540T1:
131 + hw->mac.type = ixgbe_mac_X540;
132 + break;
123 133 default:
124 134 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
125 135 break;
126 136 }
127 137 } else {
128 138 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
129 139 }
130 140
131 141 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
132 - hw->mac.type, ret_val);
142 + hw->mac.type, ret_val);
133 143 return ret_val;
134 144 }
135 145
136 146 /**
137 147 * ixgbe_init_hw - Initialize the hardware
138 148 * @hw: pointer to hardware structure
139 149 *
140 150 * Initialize the hardware by resetting and then starting the hardware
141 151 **/
142 152 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
143 153 {
144 154 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
145 - IXGBE_NOT_IMPLEMENTED);
155 + IXGBE_NOT_IMPLEMENTED);
146 156 }
147 157
148 158 /**
149 159 * ixgbe_reset_hw - Performs a hardware reset
150 160 * @hw: pointer to hardware structure
151 161 *
152 162 * Resets the hardware by resetting the transmit and receive units, masks and
153 163 * clears all interrupts, performs a PHY reset, and performs a MAC reset
154 164 **/
155 165 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
156 166 {
157 167 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
158 - IXGBE_NOT_IMPLEMENTED);
168 + IXGBE_NOT_IMPLEMENTED);
159 169 }
160 170
161 171 /**
162 172 * ixgbe_start_hw - Prepares hardware for Rx/Tx
163 173 * @hw: pointer to hardware structure
164 174 *
165 175 * Starts the hardware by filling the bus info structure and media type,
166 176 * clears all on chip counters, initializes receive address registers,
167 177 * multicast table, VLAN filter table, calls routine to setup link and
168 178 * flow control settings, and leaves transmit and receive units disabled
169 179 * and uninitialized.
170 180 **/
171 181 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
172 182 {
173 183 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
174 - IXGBE_NOT_IMPLEMENTED);
184 + IXGBE_NOT_IMPLEMENTED);
175 185 }
176 186
177 187 /**
178 188 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
179 189 * which is disabled by default in ixgbe_start_hw();
180 190 *
181 191 * @hw: pointer to hardware structure
182 192 *
183 193 * Enable relaxed ordering;
184 194 **/
185 195 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
186 196 {
187 197 if (hw->mac.ops.enable_relaxed_ordering)
188 198 hw->mac.ops.enable_relaxed_ordering(hw);
189 199 }
190 200
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191 201 /**
192 202 * ixgbe_clear_hw_cntrs - Clear hardware counters
193 203 * @hw: pointer to hardware structure
194 204 *
195 205 * Clears all hardware statistics counters by reading them from the hardware
196 206 * Statistics counters are clear on read.
197 207 **/
198 208 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
199 209 {
200 210 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
201 - IXGBE_NOT_IMPLEMENTED);
211 + IXGBE_NOT_IMPLEMENTED);
202 212 }
203 213
204 214 /**
205 215 * ixgbe_get_media_type - Get media type
206 216 * @hw: pointer to hardware structure
207 217 *
208 218 * Returns the media type (fiber, copper, backplane)
209 219 **/
210 220 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
211 221 {
212 222 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
213 - ixgbe_media_type_unknown);
223 + ixgbe_media_type_unknown);
214 224 }
215 225
216 226 /**
217 227 * ixgbe_get_mac_addr - Get MAC address
218 228 * @hw: pointer to hardware structure
219 229 * @mac_addr: Adapter MAC address
220 230 *
221 231 * Reads the adapter's MAC address from the first Receive Address Register
222 232 * (RAR0) A reset of the adapter must have been performed prior to calling
223 233 * this function in order for the MAC address to have been loaded from the
224 234 * EEPROM into RAR0
225 235 **/
226 236 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
227 237 {
228 238 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
229 - (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
239 + (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
230 240 }
231 241
232 242 /**
233 243 * ixgbe_get_san_mac_addr - Get SAN MAC address
234 244 * @hw: pointer to hardware structure
235 245 * @san_mac_addr: SAN MAC address
236 246 *
237 247 * Reads the SAN MAC address from the EEPROM, if it's available. This is
238 248 * per-port, so set_lan_id() must be called before reading the addresses.
239 249 **/
240 250 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
241 251 {
242 252 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
243 - (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
253 + (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
244 254 }
245 255
246 256 /**
247 257 * ixgbe_set_san_mac_addr - Write a SAN MAC address
248 258 * @hw: pointer to hardware structure
249 259 * @san_mac_addr: SAN MAC address
250 260 *
251 261 * Writes A SAN MAC address to the EEPROM.
252 262 **/
253 263 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
254 264 {
255 265 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
256 - (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
266 + (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
257 267 }
258 268
259 269 /**
260 270 * ixgbe_get_device_caps - Get additional device capabilities
261 271 * @hw: pointer to hardware structure
262 272 * @device_caps: the EEPROM word for device capabilities
263 273 *
264 274 * Reads the extra device capabilities from the EEPROM
265 275 **/
266 276 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
267 277 {
268 278 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
269 - (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
279 + (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
270 280 }
271 281
272 282 /**
273 283 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
274 284 * @hw: pointer to hardware structure
275 285 * @wwnn_prefix: the alternative WWNN prefix
276 286 * @wwpn_prefix: the alternative WWPN prefix
277 287 *
278 288 * This function will read the EEPROM from the alternative SAN MAC address
279 289 * block to check the support for the alternative WWNN/WWPN prefix support.
280 290 **/
281 291 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
282 - u16 *wwpn_prefix)
292 + u16 *wwpn_prefix)
283 293 {
284 294 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
285 - (hw, wwnn_prefix, wwpn_prefix),
286 - IXGBE_NOT_IMPLEMENTED);
295 + (hw, wwnn_prefix, wwpn_prefix),
296 + IXGBE_NOT_IMPLEMENTED);
287 297 }
288 298
289 299 /**
290 300 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
291 301 * @hw: pointer to hardware structure
292 302 * @bs: the fcoe boot status
293 303 *
294 304 * This function will read the FCOE boot status from the iSCSI FCOE block
295 305 **/
296 306 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
297 307 {
298 308 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
299 - (hw, bs),
300 - IXGBE_NOT_IMPLEMENTED);
309 + (hw, bs),
310 + IXGBE_NOT_IMPLEMENTED);
301 311 }
302 312
303 313 /**
304 314 * ixgbe_get_bus_info - Set PCI bus info
305 315 * @hw: pointer to hardware structure
306 316 *
307 317 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
308 318 **/
309 319 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
310 320 {
311 321 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
312 - IXGBE_NOT_IMPLEMENTED);
322 + IXGBE_NOT_IMPLEMENTED);
313 323 }
314 324
315 325 /**
316 326 * ixgbe_get_num_of_tx_queues - Get Tx queues
317 327 * @hw: pointer to hardware structure
318 328 *
319 329 * Returns the number of transmit queues for the given adapter.
320 330 **/
321 331 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
322 332 {
323 333 return hw->mac.max_tx_queues;
324 334 }
325 335
326 336 /**
327 337 * ixgbe_get_num_of_rx_queues - Get Rx queues
328 338 * @hw: pointer to hardware structure
329 339 *
330 340 * Returns the number of receive queues for the given adapter.
331 341 **/
332 342 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
333 343 {
334 344 return hw->mac.max_rx_queues;
335 345 }
336 346
337 347 /**
338 348 * ixgbe_stop_adapter - Disable Rx/Tx units
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339 349 * @hw: pointer to hardware structure
340 350 *
341 351 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
342 352 * disables transmit and receive units. The adapter_stopped flag is used by
343 353 * the shared code and drivers to determine if the adapter is in a stopped
344 354 * state and should not touch the hardware.
345 355 **/
346 356 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
347 357 {
348 358 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
349 - IXGBE_NOT_IMPLEMENTED);
359 + IXGBE_NOT_IMPLEMENTED);
350 360 }
351 361
352 362 /**
353 363 * ixgbe_read_pba_string - Reads part number string from EEPROM
354 364 * @hw: pointer to hardware structure
355 365 * @pba_num: stores the part number string from the EEPROM
356 366 * @pba_num_size: part number string buffer length
357 367 *
358 368 * Reads the part number string from the EEPROM.
359 369 **/
360 370 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
361 371 {
362 372 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
363 373 }
364 374
365 375 /**
366 - * ixgbe_read_pba_length - Reads part number string length from EEPROM
367 - * @hw: pointer to hardware structure
368 - * @pba_num_size: part number string buffer length
369 - *
370 - * Reads the part number length from the EEPROM.
371 - * Returns expected buffer size in pba_num_size.
372 - **/
373 -s32 ixgbe_read_pba_length(struct ixgbe_hw *hw, u32 *pba_num_size)
374 -{
375 - return ixgbe_read_pba_length_generic(hw, pba_num_size);
376 -}
377 -
378 -/**
379 376 * ixgbe_read_pba_num - Reads part number from EEPROM
380 377 * @hw: pointer to hardware structure
381 378 * @pba_num: stores the part number from the EEPROM
382 379 *
383 380 * Reads the part number from the EEPROM.
384 381 **/
385 382 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
386 383 {
387 384 return ixgbe_read_pba_num_generic(hw, pba_num);
388 385 }
389 386
390 387 /**
391 388 * ixgbe_identify_phy - Get PHY type
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392 389 * @hw: pointer to hardware structure
393 390 *
394 391 * Determines the physical layer module found on the current adapter.
395 392 **/
396 393 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
397 394 {
398 395 s32 status = IXGBE_SUCCESS;
399 396
400 397 if (hw->phy.type == ixgbe_phy_unknown) {
401 398 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
402 - IXGBE_NOT_IMPLEMENTED);
399 + IXGBE_NOT_IMPLEMENTED);
403 400 }
404 401
405 402 return status;
406 403 }
407 404
408 405 /**
409 406 * ixgbe_reset_phy - Perform a PHY reset
410 407 * @hw: pointer to hardware structure
411 408 **/
412 409 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
413 410 {
414 411 s32 status = IXGBE_SUCCESS;
415 412
416 413 if (hw->phy.type == ixgbe_phy_unknown) {
417 414 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
418 415 status = IXGBE_ERR_PHY;
419 416 }
420 417
421 418 if (status == IXGBE_SUCCESS) {
422 419 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
423 - IXGBE_NOT_IMPLEMENTED);
420 + IXGBE_NOT_IMPLEMENTED);
424 421 }
425 422 return status;
426 423 }
427 424
428 425 /**
429 426 * ixgbe_get_phy_firmware_version -
430 427 * @hw: pointer to hardware structure
431 428 * @firmware_version: pointer to firmware version
432 429 **/
433 430 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
434 431 {
435 432 s32 status = IXGBE_SUCCESS;
436 433
437 434 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
438 - (hw, firmware_version),
439 - IXGBE_NOT_IMPLEMENTED);
435 + (hw, firmware_version),
436 + IXGBE_NOT_IMPLEMENTED);
440 437 return status;
441 438 }
442 439
443 440 /**
444 441 * ixgbe_read_phy_reg - Read PHY register
445 442 * @hw: pointer to hardware structure
446 443 * @reg_addr: 32 bit address of PHY register to read
447 444 * @phy_data: Pointer to read data from PHY register
448 445 *
449 446 * Reads a value from a specified PHY register
450 447 **/
451 448 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
452 - u16 *phy_data)
449 + u16 *phy_data)
453 450 {
454 451 if (hw->phy.id == 0)
455 - (void) ixgbe_identify_phy(hw);
452 + ixgbe_identify_phy(hw);
456 453
457 454 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
458 - device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
455 + device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
459 456 }
460 457
461 458 /**
462 459 * ixgbe_write_phy_reg - Write PHY register
463 460 * @hw: pointer to hardware structure
464 461 * @reg_addr: 32 bit PHY register to write
465 462 * @phy_data: Data to write to the PHY register
466 463 *
467 464 * Writes a value to specified PHY register
468 465 **/
469 466 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
470 - u16 phy_data)
467 + u16 phy_data)
471 468 {
472 469 if (hw->phy.id == 0)
473 - (void) ixgbe_identify_phy(hw);
470 + ixgbe_identify_phy(hw);
474 471
475 472 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
476 - device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
473 + device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
477 474 }
478 475
479 476 /**
480 477 * ixgbe_setup_phy_link - Restart PHY autoneg
481 478 * @hw: pointer to hardware structure
482 479 *
483 480 * Restart autonegotiation and PHY and waits for completion.
484 481 **/
485 482 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
486 483 {
487 484 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
488 - IXGBE_NOT_IMPLEMENTED);
485 + IXGBE_NOT_IMPLEMENTED);
489 486 }
490 487
491 488 /**
492 489 * ixgbe_check_phy_link - Determine link and speed status
493 490 * @hw: pointer to hardware structure
494 491 *
495 492 * Reads a PHY register to determine if link is up and the current speed for
496 493 * the PHY.
497 494 **/
498 495 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
499 - bool *link_up)
496 + bool *link_up)
500 497 {
501 498 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
502 - link_up), IXGBE_NOT_IMPLEMENTED);
499 + link_up), IXGBE_NOT_IMPLEMENTED);
503 500 }
504 501
505 502 /**
506 503 * ixgbe_setup_phy_link_speed - Set auto advertise
507 504 * @hw: pointer to hardware structure
508 505 * @speed: new link speed
509 506 * @autoneg: TRUE if autonegotiation enabled
510 507 *
511 508 * Sets the auto advertised capabilities
512 509 **/
513 510 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
514 - bool autoneg,
515 - bool autoneg_wait_to_complete)
511 + bool autoneg,
512 + bool autoneg_wait_to_complete)
516 513 {
517 514 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
518 - autoneg, autoneg_wait_to_complete),
519 - IXGBE_NOT_IMPLEMENTED);
515 + autoneg, autoneg_wait_to_complete),
516 + IXGBE_NOT_IMPLEMENTED);
520 517 }
521 518
522 519 /**
523 520 * ixgbe_check_link - Get link and speed status
524 521 * @hw: pointer to hardware structure
525 522 *
526 523 * Reads the links register to determine if link is up and the current speed
527 524 **/
528 525 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
529 - bool *link_up, bool link_up_wait_to_complete)
526 + bool *link_up, bool link_up_wait_to_complete)
530 527 {
531 528 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
532 - link_up, link_up_wait_to_complete),
533 - IXGBE_NOT_IMPLEMENTED);
529 + link_up, link_up_wait_to_complete),
530 + IXGBE_NOT_IMPLEMENTED);
534 531 }
535 532
536 533 /**
537 534 * ixgbe_disable_tx_laser - Disable Tx laser
538 535 * @hw: pointer to hardware structure
539 536 *
540 537 * If the driver needs to disable the laser on SFI optics.
541 538 **/
542 539 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
543 540 {
544 541 if (hw->mac.ops.disable_tx_laser)
545 542 hw->mac.ops.disable_tx_laser(hw);
546 543 }
547 544
548 545 /**
549 546 * ixgbe_enable_tx_laser - Enable Tx laser
550 547 * @hw: pointer to hardware structure
551 548 *
552 549 * If the driver needs to enable the laser on SFI optics.
553 550 **/
554 551 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
555 552 {
556 553 if (hw->mac.ops.enable_tx_laser)
557 554 hw->mac.ops.enable_tx_laser(hw);
558 555 }
559 556
560 557 /**
561 558 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
562 559 * @hw: pointer to hardware structure
563 560 *
564 561 * When the driver changes the link speeds that it can support then
565 562 * flap the tx laser to alert the link partner to start autotry
566 563 * process on its end.
567 564 **/
568 565 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
569 566 {
570 567 if (hw->mac.ops.flap_tx_laser)
571 568 hw->mac.ops.flap_tx_laser(hw);
572 569 }
573 570
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574 571 /**
575 572 * ixgbe_setup_link - Set link speed
576 573 * @hw: pointer to hardware structure
577 574 * @speed: new link speed
578 575 * @autoneg: TRUE if autonegotiation enabled
579 576 *
580 577 * Configures link settings. Restarts the link.
581 578 * Performs autonegotiation if needed.
582 579 **/
583 580 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
584 - bool autoneg,
585 - bool autoneg_wait_to_complete)
581 + bool autoneg,
582 + bool autoneg_wait_to_complete)
586 583 {
587 584 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
588 - autoneg, autoneg_wait_to_complete),
589 - IXGBE_NOT_IMPLEMENTED);
585 + autoneg, autoneg_wait_to_complete),
586 + IXGBE_NOT_IMPLEMENTED);
590 587 }
591 588
592 589 /**
593 590 * ixgbe_get_link_capabilities - Returns link capabilities
594 591 * @hw: pointer to hardware structure
595 592 *
596 593 * Determines the link capabilities of the current configuration.
597 594 **/
598 595 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
599 - bool *autoneg)
596 + bool *autoneg)
600 597 {
601 598 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
602 - speed, autoneg), IXGBE_NOT_IMPLEMENTED);
599 + speed, autoneg), IXGBE_NOT_IMPLEMENTED);
603 600 }
604 601
605 602 /**
606 603 * ixgbe_led_on - Turn on LEDs
607 604 * @hw: pointer to hardware structure
608 605 * @index: led number to turn on
609 606 *
610 607 * Turns on the software controllable LEDs.
611 608 **/
612 609 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
613 610 {
614 611 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
615 - IXGBE_NOT_IMPLEMENTED);
612 + IXGBE_NOT_IMPLEMENTED);
616 613 }
617 614
618 615 /**
619 616 * ixgbe_led_off - Turn off LEDs
620 617 * @hw: pointer to hardware structure
621 618 * @index: led number to turn off
622 619 *
623 620 * Turns off the software controllable LEDs.
624 621 **/
625 622 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
626 623 {
627 624 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
628 - IXGBE_NOT_IMPLEMENTED);
625 + IXGBE_NOT_IMPLEMENTED);
629 626 }
630 627
631 628 /**
632 629 * ixgbe_blink_led_start - Blink LEDs
633 630 * @hw: pointer to hardware structure
634 631 * @index: led number to blink
635 632 *
636 633 * Blink LED based on index.
637 634 **/
638 635 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
639 636 {
640 637 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
641 - IXGBE_NOT_IMPLEMENTED);
638 + IXGBE_NOT_IMPLEMENTED);
642 639 }
643 640
644 641 /**
645 642 * ixgbe_blink_led_stop - Stop blinking LEDs
646 643 * @hw: pointer to hardware structure
647 644 *
648 645 * Stop blinking LED based on index.
649 646 **/
650 647 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
651 648 {
652 649 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
653 - IXGBE_NOT_IMPLEMENTED);
650 + IXGBE_NOT_IMPLEMENTED);
654 651 }
655 652
656 653 /**
657 654 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
658 655 * @hw: pointer to hardware structure
659 656 *
660 657 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
661 658 * ixgbe_hw struct in order to set up EEPROM access.
662 659 **/
663 660 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
664 661 {
665 662 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
666 - IXGBE_NOT_IMPLEMENTED);
663 + IXGBE_NOT_IMPLEMENTED);
667 664 }
668 665
669 666
670 667 /**
671 668 * ixgbe_write_eeprom - Write word to EEPROM
672 669 * @hw: pointer to hardware structure
673 670 * @offset: offset within the EEPROM to be written to
674 671 * @data: 16 bit word to be written to the EEPROM
675 672 *
676 673 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
677 674 * called after this function, the EEPROM will most likely contain an
678 675 * invalid checksum.
679 676 **/
680 677 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
681 678 {
682 679 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
683 - IXGBE_NOT_IMPLEMENTED);
680 + IXGBE_NOT_IMPLEMENTED);
684 681 }
685 682
686 683 /**
684 + * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
685 + * @hw: pointer to hardware structure
686 + * @offset: offset within the EEPROM to be written to
687 + * @data: 16 bit word(s) to be written to the EEPROM
688 + * @words: number of words
689 + *
690 + * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
691 + * called after this function, the EEPROM will most likely contain an
692 + * invalid checksum.
693 + **/
694 +s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
695 + u16 *data)
696 +{
697 + return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
698 + (hw, offset, words, data),
699 + IXGBE_NOT_IMPLEMENTED);
700 +}
701 +
702 +/**
687 703 * ixgbe_read_eeprom - Read word from EEPROM
688 704 * @hw: pointer to hardware structure
689 705 * @offset: offset within the EEPROM to be read
690 706 * @data: read 16 bit value from EEPROM
691 707 *
692 708 * Reads 16 bit value from EEPROM
693 709 **/
694 710 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
695 711 {
696 712 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
697 - IXGBE_NOT_IMPLEMENTED);
713 + IXGBE_NOT_IMPLEMENTED);
698 714 }
699 715
700 716 /**
717 + * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
718 + * @hw: pointer to hardware structure
719 + * @offset: offset within the EEPROM to be read
720 + * @data: read 16 bit word(s) from EEPROM
721 + * @words: number of words
722 + *
723 + * Reads 16 bit word(s) from EEPROM
724 + **/
725 +s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
726 + u16 words, u16 *data)
727 +{
728 + return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
729 + (hw, offset, words, data),
730 + IXGBE_NOT_IMPLEMENTED);
731 +}
732 +
733 +/**
701 734 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
702 735 * @hw: pointer to hardware structure
703 736 * @checksum_val: calculated checksum
704 737 *
705 738 * Performs checksum calculation and validates the EEPROM checksum
706 739 **/
707 740 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
708 741 {
709 742 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
710 - (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
743 + (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
711 744 }
712 745
713 746 /**
714 747 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
715 748 * @hw: pointer to hardware structure
716 749 **/
717 750 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
718 751 {
719 752 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
720 - IXGBE_NOT_IMPLEMENTED);
753 + IXGBE_NOT_IMPLEMENTED);
721 754 }
722 755
723 756 /**
724 757 * ixgbe_insert_mac_addr - Find a RAR for this mac address
725 758 * @hw: pointer to hardware structure
726 759 * @addr: Address to put into receive address register
727 760 * @vmdq: VMDq pool to assign
728 761 *
729 762 * Puts an ethernet address into a receive address register, or
730 763 * finds the rar that it is aleady in; adds to the pool list
731 764 **/
732 765 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
733 766 {
734 767 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
735 - (hw, addr, vmdq),
768 + (hw, addr, vmdq),
736 769 IXGBE_NOT_IMPLEMENTED);
737 770 }
738 771
739 772 /**
740 773 * ixgbe_set_rar - Set Rx address register
741 774 * @hw: pointer to hardware structure
742 775 * @index: Receive address register to write
743 776 * @addr: Address to put into receive address register
744 777 * @vmdq: VMDq "set"
745 778 * @enable_addr: set flag that address is active
746 779 *
747 780 * Puts an ethernet address into a receive address register.
748 781 **/
749 782 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
750 - u32 enable_addr)
783 + u32 enable_addr)
751 784 {
752 785 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
753 - enable_addr), IXGBE_NOT_IMPLEMENTED);
786 + enable_addr), IXGBE_NOT_IMPLEMENTED);
754 787 }
755 788
756 789 /**
757 790 * ixgbe_clear_rar - Clear Rx address register
758 791 * @hw: pointer to hardware structure
759 792 * @index: Receive address register to write
760 793 *
761 794 * Puts an ethernet address into a receive address register.
762 795 **/
763 796 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
764 797 {
765 798 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
766 - IXGBE_NOT_IMPLEMENTED);
799 + IXGBE_NOT_IMPLEMENTED);
767 800 }
768 801
769 802 /**
770 803 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
771 804 * @hw: pointer to hardware structure
772 805 * @rar: receive address register index to associate with VMDq index
773 806 * @vmdq: VMDq set or pool index
774 807 **/
775 808 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
776 809 {
777 810 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
778 - IXGBE_NOT_IMPLEMENTED);
811 + IXGBE_NOT_IMPLEMENTED);
812 +
779 813 }
780 814
781 815 /**
816 + * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
817 + * @hw: pointer to hardware structure
818 + * @vmdq: VMDq default pool index
819 + **/
820 +s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
821 +{
822 + return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
823 + (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
824 +}
825 +
826 +/**
782 827 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
783 828 * @hw: pointer to hardware structure
784 829 * @rar: receive address register index to disassociate with VMDq index
785 830 * @vmdq: VMDq set or pool index
786 831 **/
787 832 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
788 833 {
789 834 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
790 - IXGBE_NOT_IMPLEMENTED);
835 + IXGBE_NOT_IMPLEMENTED);
791 836 }
792 837
793 838 /**
794 839 * ixgbe_init_rx_addrs - Initializes receive address filters.
795 840 * @hw: pointer to hardware structure
796 841 *
797 842 * Places the MAC address in receive address register 0 and clears the rest
798 843 * of the receive address registers. Clears the multicast table. Assumes
799 844 * the receiver is in reset when the routine is called.
800 845 **/
801 846 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
802 847 {
803 848 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
804 - IXGBE_NOT_IMPLEMENTED);
849 + IXGBE_NOT_IMPLEMENTED);
805 850 }
806 851
807 852 /**
808 853 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
809 854 * @hw: pointer to hardware structure
810 855 **/
811 856 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
812 857 {
813 858 return hw->mac.num_rar_entries;
814 859 }
815 860
816 861 /**
817 862 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
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818 863 * @hw: pointer to hardware structure
819 864 * @addr_list: the list of new multicast addresses
820 865 * @addr_count: number of addresses
821 866 * @func: iterator function to walk the multicast address list
822 867 *
823 868 * The given list replaces any existing list. Clears the secondary addrs from
824 869 * receive address registers. Uses unused receive address registers for the
825 870 * first secondary addresses, and falls back to promiscuous mode as needed.
826 871 **/
827 872 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
828 - u32 addr_count, ixgbe_mc_addr_itr func)
873 + u32 addr_count, ixgbe_mc_addr_itr func)
829 874 {
830 875 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
831 - addr_list, addr_count, func),
832 - IXGBE_NOT_IMPLEMENTED);
876 + addr_list, addr_count, func),
877 + IXGBE_NOT_IMPLEMENTED);
833 878 }
834 879
835 880 /**
836 881 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
837 882 * @hw: pointer to hardware structure
838 883 * @mc_addr_list: the list of new multicast addresses
839 884 * @mc_addr_count: number of addresses
840 885 * @func: iterator function to walk the multicast address list
841 886 *
842 887 * The given list replaces any existing list. Clears the MC addrs from receive
843 888 * address registers and the multicast table. Uses unused receive address
844 889 * registers for the first multicast addresses, and hashes the rest into the
845 890 * multicast table.
846 891 **/
847 892 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
848 - u32 mc_addr_count, ixgbe_mc_addr_itr func)
893 + u32 mc_addr_count, ixgbe_mc_addr_itr func,
894 + bool clear)
849 895 {
850 896 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
851 - mc_addr_list, mc_addr_count, func),
852 - IXGBE_NOT_IMPLEMENTED);
897 + mc_addr_list, mc_addr_count, func, clear),
898 + IXGBE_NOT_IMPLEMENTED);
853 899 }
854 900
855 901 /**
856 902 * ixgbe_enable_mc - Enable multicast address in RAR
857 903 * @hw: pointer to hardware structure
858 904 *
859 905 * Enables multicast address in RAR and the use of the multicast hash table.
860 906 **/
861 907 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
862 908 {
863 909 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
864 - IXGBE_NOT_IMPLEMENTED);
910 + IXGBE_NOT_IMPLEMENTED);
865 911 }
866 912
867 913 /**
868 914 * ixgbe_disable_mc - Disable multicast address in RAR
869 915 * @hw: pointer to hardware structure
870 916 *
871 917 * Disables multicast address in RAR and the use of the multicast hash table.
872 918 **/
873 919 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
874 920 {
875 921 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
876 - IXGBE_NOT_IMPLEMENTED);
922 + IXGBE_NOT_IMPLEMENTED);
877 923 }
878 924
879 925 /**
880 926 * ixgbe_clear_vfta - Clear VLAN filter table
881 927 * @hw: pointer to hardware structure
882 928 *
883 929 * Clears the VLAN filer table, and the VMDq index associated with the filter
884 930 **/
885 931 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
886 932 {
887 933 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
888 - IXGBE_NOT_IMPLEMENTED);
934 + IXGBE_NOT_IMPLEMENTED);
889 935 }
890 936
891 937 /**
892 938 * ixgbe_set_vfta - Set VLAN filter table
893 939 * @hw: pointer to hardware structure
894 940 * @vlan: VLAN id to write to VLAN filter
895 941 * @vind: VMDq output index that maps queue to VLAN id in VFTA
896 942 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
897 943 *
898 944 * Turn on/off specified VLAN in the VLAN filter table.
899 945 **/
900 946 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
901 947 {
902 948 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
903 - vlan_on), IXGBE_NOT_IMPLEMENTED);
949 + vlan_on), IXGBE_NOT_IMPLEMENTED);
904 950 }
905 951
906 952 /**
953 + * ixgbe_set_vlvf - Set VLAN Pool Filter
954 + * @hw: pointer to hardware structure
955 + * @vlan: VLAN id to write to VLAN filter
956 + * @vind: VMDq output index that maps queue to VLAN id in VFVFB
957 + * @vlan_on: boolean flag to turn on/off VLAN in VFVF
958 + * @vfta_changed: pointer to boolean flag which indicates whether VFTA
959 + * should be changed
960 + *
961 + * Turn on/off specified bit in VLVF table.
962 + **/
963 +s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
964 + bool *vfta_changed)
965 +{
966 + return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
967 + vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
968 +}
969 +
970 +/**
907 971 * ixgbe_fc_enable - Enable flow control
908 972 * @hw: pointer to hardware structure
909 - * @packetbuf_num: packet buffer number (0-7)
910 973 *
911 974 * Configures the flow control settings based on SW configuration.
912 975 **/
913 -s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
976 +s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
914 977 {
915 - return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw, packetbuf_num),
916 - IXGBE_NOT_IMPLEMENTED);
978 + return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
979 + IXGBE_NOT_IMPLEMENTED);
917 980 }
918 981
919 982 /**
983 + * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
984 + * @hw: pointer to hardware structure
985 + * @maj: driver major number to be sent to firmware
986 + * @min: driver minor number to be sent to firmware
987 + * @build: driver build number to be sent to firmware
988 + * @ver: driver version number to be sent to firmware
989 + **/
990 +s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
991 + u8 ver)
992 +{
993 + return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
994 + build, ver), IXGBE_NOT_IMPLEMENTED);
995 +}
996 +
997 +
998 +/**
920 999 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
921 1000 * @hw: pointer to hardware structure
922 1001 * @reg: analog register to read
923 1002 * @val: read value
924 1003 *
925 1004 * Performs write operation to analog register specified.
926 1005 **/
927 1006 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
928 1007 {
929 1008 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
930 - val), IXGBE_NOT_IMPLEMENTED);
1009 + val), IXGBE_NOT_IMPLEMENTED);
931 1010 }
932 1011
933 1012 /**
934 1013 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
935 1014 * @hw: pointer to hardware structure
936 1015 * @reg: analog register to write
937 1016 * @val: value to write
938 1017 *
939 1018 * Performs write operation to Atlas analog register specified.
940 1019 **/
941 1020 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
942 1021 {
943 1022 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
944 - val), IXGBE_NOT_IMPLEMENTED);
1023 + val), IXGBE_NOT_IMPLEMENTED);
945 1024 }
946 1025
947 1026 /**
948 1027 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
949 1028 * @hw: pointer to hardware structure
950 1029 *
951 1030 * Initializes the Unicast Table Arrays to zero on device load. This
952 1031 * is part of the Rx init addr execution path.
953 1032 **/
954 1033 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
955 1034 {
956 1035 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
957 - IXGBE_NOT_IMPLEMENTED);
1036 + IXGBE_NOT_IMPLEMENTED);
958 1037 }
959 1038
960 1039 /**
961 1040 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
962 1041 * @hw: pointer to hardware structure
963 1042 * @byte_offset: byte offset to read
964 1043 * @data: value read
965 1044 *
966 1045 * Performs byte read operation to SFP module's EEPROM over I2C interface.
967 1046 **/
968 1047 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
969 - u8 *data)
1048 + u8 *data)
970 1049 {
971 1050 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
972 - dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1051 + dev_addr, data), IXGBE_NOT_IMPLEMENTED);
973 1052 }
974 1053
975 1054 /**
976 1055 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
977 1056 * @hw: pointer to hardware structure
978 1057 * @byte_offset: byte offset to write
979 1058 * @data: value to write
980 1059 *
981 1060 * Performs byte write operation to SFP module's EEPROM over I2C interface
982 1061 * at a specified device address.
983 1062 **/
984 1063 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
985 - u8 data)
1064 + u8 data)
986 1065 {
987 1066 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
988 - dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1067 + dev_addr, data), IXGBE_NOT_IMPLEMENTED);
989 1068 }
990 1069
991 1070 /**
992 1071 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
993 1072 * @hw: pointer to hardware structure
994 1073 * @byte_offset: EEPROM byte offset to write
995 1074 * @eeprom_data: value to write
996 1075 *
997 1076 * Performs byte write operation to SFP module's EEPROM over I2C interface.
998 1077 **/
999 1078 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1000 - u8 byte_offset, u8 eeprom_data)
1079 + u8 byte_offset, u8 eeprom_data)
1001 1080 {
1002 1081 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1003 - (hw, byte_offset, eeprom_data),
1004 - IXGBE_NOT_IMPLEMENTED);
1082 + (hw, byte_offset, eeprom_data),
1083 + IXGBE_NOT_IMPLEMENTED);
1005 1084 }
1006 1085
1007 1086 /**
1008 1087 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1009 1088 * @hw: pointer to hardware structure
1010 1089 * @byte_offset: EEPROM byte offset to read
1011 1090 * @eeprom_data: value read
1012 1091 *
1013 1092 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1014 1093 **/
1015 1094 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1016 1095 {
1017 1096 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1018 - (hw, byte_offset, eeprom_data),
1019 - IXGBE_NOT_IMPLEMENTED);
1097 + (hw, byte_offset, eeprom_data),
1098 + IXGBE_NOT_IMPLEMENTED);
1020 1099 }
1021 1100
1022 1101 /**
1023 1102 * ixgbe_get_supported_physical_layer - Returns physical layer type
1024 1103 * @hw: pointer to hardware structure
1025 1104 *
1026 1105 * Determines physical layer capabilities of the current configuration.
1027 1106 **/
1028 1107 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1029 1108 {
1030 1109 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1031 - (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1110 + (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1032 1111 }
1033 1112
1034 1113 /**
1035 - * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependant on device specifics
1114 + * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1036 1115 * @hw: pointer to hardware structure
1037 1116 * @regval: bitfield to write to the Rx DMA register
1038 1117 *
1039 1118 * Enables the Rx DMA unit of the device.
1040 1119 **/
1041 1120 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1042 1121 {
1043 1122 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1044 - (hw, regval), IXGBE_NOT_IMPLEMENTED);
1123 + (hw, regval), IXGBE_NOT_IMPLEMENTED);
1045 1124 }
1046 1125
1047 1126 /**
1127 + * ixgbe_disable_sec_rx_path - Stops the receive data path
1128 + * @hw: pointer to hardware structure
1129 + *
1130 + * Stops the receive data path.
1131 + **/
1132 +s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1133 +{
1134 + return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1135 + (hw), IXGBE_NOT_IMPLEMENTED);
1136 +}
1137 +
1138 +/**
1139 + * ixgbe_enable_sec_rx_path - Enables the receive data path
1140 + * @hw: pointer to hardware structure
1141 + *
1142 + * Enables the receive data path.
1143 + **/
1144 +s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1145 +{
1146 + return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1147 + (hw), IXGBE_NOT_IMPLEMENTED);
1148 +}
1149 +
1150 +/**
1048 1151 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1049 1152 * @hw: pointer to hardware structure
1050 1153 * @mask: Mask to specify which semaphore to acquire
1051 1154 *
1052 1155 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1053 1156 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1054 1157 **/
1055 1158 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
1056 1159 {
1057 1160 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1058 - (hw, mask), IXGBE_NOT_IMPLEMENTED);
1161 + (hw, mask), IXGBE_NOT_IMPLEMENTED);
1059 1162 }
1060 1163
1061 1164 /**
1062 1165 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1063 1166 * @hw: pointer to hardware structure
1064 1167 * @mask: Mask to specify which semaphore to release
1065 1168 *
1066 1169 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1067 1170 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1068 1171 **/
1069 1172 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
1070 1173 {
1071 1174 if (hw->mac.ops.release_swfw_sync)
1072 1175 hw->mac.ops.release_swfw_sync(hw, mask);
1073 1176 }
1074 1177
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