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3014 Intel X540 Support (fix lint)
@@ -96,11 +96,11 @@
if (hw->phy.type == ixgbe_phy_unknown) {
for (phy_addr = 0; phy_addr < IXGBE_MAX_PHY_ADDR; phy_addr++) {
if (ixgbe_validate_phy_addr(hw, phy_addr)) {
hw->phy.addr = phy_addr;
- ixgbe_get_phy_id(hw);
+ (void) ixgbe_get_phy_id(hw);
hw->phy.type =
ixgbe_get_phy_type_from_id(hw->phy.id);
if (hw->phy.type == ixgbe_phy_unknown) {
hw->phy.ops.read_reg(hw,
@@ -468,20 +468,23 @@
*
* Restart autonegotiation and PHY and waits for completion.
**/
s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw)
{
- s32 status = IXGBE_SUCCESS;
+ s32 status;
u32 time_out;
u32 max_time_out = 10;
u16 autoneg_reg = IXGBE_MII_AUTONEG_REG;
bool autoneg = FALSE;
ixgbe_link_speed speed;
DEBUGFUNC("ixgbe_setup_phy_link_generic");
+ status =
ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg);
+ if (status != IXGBE_SUCCESS)
+ return status;
if (speed & IXGBE_LINK_SPEED_10GB_FULL) {
/* Set or unset auto-negotiation 10G advertisement */
hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,
IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
@@ -686,20 +689,23 @@
*
* Restart autonegotiation and PHY and waits for completion.
**/
s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw)
{
- s32 status = IXGBE_SUCCESS;
+ s32 status;
u32 time_out;
u32 max_time_out = 10;
u16 autoneg_reg = IXGBE_MII_AUTONEG_REG;
bool autoneg = FALSE;
ixgbe_link_speed speed;
DEBUGFUNC("ixgbe_setup_phy_link_tnx");
+ status =
ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg);
+ if (status != IXGBE_SUCCESS)
+ return status;
if (speed & IXGBE_LINK_SPEED_10GB_FULL) {
/* Set or unset auto-negotiation 10G advertisement */
hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,
IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
@@ -1183,11 +1189,11 @@
if (hw->mac.type == ixgbe_mac_82598EB) {
status = IXGBE_SUCCESS;
goto out;
}
- ixgbe_get_device_caps(hw, &enforce_sfp);
+ (void) ixgbe_get_device_caps(hw, &enforce_sfp);
if (!(enforce_sfp & IXGBE_DEVICE_CAPS_ALLOW_ANY_SFP) &&
!((hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0) ||
(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1) ||
(hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0) ||
(hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1))) {
@@ -1527,17 +1533,17 @@
u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL);
DEBUGFUNC("ixgbe_i2c_start");
/* Start condition must begin with data and clock high */
- ixgbe_set_i2c_data(hw, &i2cctl, 1);
+ (void) ixgbe_set_i2c_data(hw, &i2cctl, 1);
ixgbe_raise_i2c_clk(hw, &i2cctl);
/* Setup time for start condition (4.7us) */
usec_delay(IXGBE_I2C_T_SU_STA);
- ixgbe_set_i2c_data(hw, &i2cctl, 0);
+ (void) ixgbe_set_i2c_data(hw, &i2cctl, 0);
/* Hold time for start condition (4us) */
usec_delay(IXGBE_I2C_T_HD_STA);
ixgbe_lower_i2c_clk(hw, &i2cctl);
@@ -1558,17 +1564,17 @@
u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL);
DEBUGFUNC("ixgbe_i2c_stop");
/* Stop condition must begin with data low and clock high */
- ixgbe_set_i2c_data(hw, &i2cctl, 0);
+ (void) ixgbe_set_i2c_data(hw, &i2cctl, 0);
ixgbe_raise_i2c_clk(hw, &i2cctl);
/* Setup time for stop condition (4us) */
usec_delay(IXGBE_I2C_T_SU_STO);
- ixgbe_set_i2c_data(hw, &i2cctl, 1);
+ (void) ixgbe_set_i2c_data(hw, &i2cctl, 1);
/* bus free time between stop and start (4.7us)*/
usec_delay(IXGBE_I2C_T_BUF);
}
@@ -1579,21 +1585,23 @@
*
* Clocks in one byte data via I2C data/clock
**/
static s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data)
{
- s32 i;
+ s32 i, status = IXGBE_SUCCESS;
bool bit = 0;
DEBUGFUNC("ixgbe_clock_in_i2c_byte");
for (i = 7; i >= 0; i--) {
- ixgbe_clock_in_i2c_bit(hw, &bit);
+ status = ixgbe_clock_in_i2c_bit(hw, &bit);
+ if (status != IXGBE_SUCCESS)
+ break;
*data |= bit << i;
}
- return IXGBE_SUCCESS;
+ return status;
}
/**
* ixgbe_clock_out_i2c_byte - Clocks out one byte via I2C
* @hw: pointer to hardware structure
@@ -1856,11 +1864,11 @@
DEBUGFUNC("ixgbe_i2c_bus_clear");
ixgbe_i2c_start(hw);
- ixgbe_set_i2c_data(hw, &i2cctl, 1);
+ (void) ixgbe_set_i2c_data(hw, &i2cctl, 1);
for (i = 0; i < 9; i++) {
ixgbe_raise_i2c_clk(hw, &i2cctl);
/* Min high period of clock is 4us */