3014 Intel X540 Support (fix lint)

@@ -718,20 +718,22 @@
  **/
 static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw,
                                       ixgbe_link_speed speed, bool autoneg,
                                       bool autoneg_wait_to_complete)
 {
-        s32 status = IXGBE_SUCCESS;
+        s32 status;
         ixgbe_link_speed link_capabilities = IXGBE_LINK_SPEED_UNKNOWN;
         u32 curr_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
         u32 autoc = curr_autoc;
         u32 link_mode = autoc & IXGBE_AUTOC_LMS_MASK;
 
         DEBUGFUNC("ixgbe_setup_mac_link_82598");
 
         /* Check to see if speed passed in is supported. */
-        ixgbe_get_link_capabilities(hw, &link_capabilities, &autoneg);
+        status = ixgbe_get_link_capabilities(hw, &link_capabilities, &autoneg);
+        if (status != IXGBE_SUCCESS)
+                return (status);
         speed &= link_capabilities;
 
         if (speed == IXGBE_LINK_SPEED_UNKNOWN)
                 status = IXGBE_ERR_LINK_SETUP;
 

@@ -780,12 +782,15 @@
         DEBUGFUNC("ixgbe_setup_copper_link_82598");
 
         /* Setup the PHY according to input speed */
         status = hw->phy.ops.setup_link_speed(hw, speed, autoneg,
                                               autoneg_wait_to_complete);
+        if (status == IXGBE_SUCCESS) {
         /* Set up MAC */
+                status =
         ixgbe_start_mac_link_82598(hw, autoneg_wait_to_complete);
+        }
 
         return status;
 }
 
 /**

@@ -1355,10 +1360,11 @@
                 for (; i < 4; i++)
                         IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), rxpktsize);
                 /* Setup the last four at 48KB...don't re-init i */
                 rxpktsize = IXGBE_RXPBSIZE_48KB;
                 /* Fall Through */
+                /* FALLTHRU */
         case PBA_STRATEGY_EQUAL:
         default:
                 /* Divide the remaining Rx packet buffer evenly among the TCs */
                 for (; i < IXGBE_MAX_PACKET_BUFFERS; i++)
                         IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), rxpktsize);

@@ -1366,8 +1372,6 @@
         }
 
         /* Setup Tx packet buffer sizes */
         for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++)
                 IXGBE_WRITE_REG(hw, IXGBE_TXPBSIZE(i), IXGBE_TXPBSIZE_40KB);
-
-        return;
 }