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--- old/./mr_sas.c
+++ new/./mr_sas.c
1 1 /*
2 2 * mr_sas.c: source for mr_sas driver
3 3 *
4 4 * Solaris MegaRAID device driver for SAS2.0 controllers
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5 5 * Copyright (c) 2008-2012, LSI Logic Corporation.
6 6 * All rights reserved.
7 7 *
8 8 * Version:
9 9 * Author:
10 10 * Swaminathan K S
11 11 * Arun Chandrashekhar
12 12 * Manju R
13 13 * Rasheed
14 14 * Shakeel Bukhari
15 + *
16 + * Redistribution and use in source and binary forms, with or without
17 + * modification, are permitted provided that the following conditions are met:
18 + *
19 + * 1. Redistributions of source code must retain the above copyright notice,
20 + * this list of conditions and the following disclaimer.
21 + *
22 + * 2. Redistributions in binary form must reproduce the above copyright notice,
23 + * this list of conditions and the following disclaimer in the documentation
24 + * and/or other materials provided with the distribution.
25 + *
26 + * 3. Neither the name of the author nor the names of its contributors may be
27 + * used to endorse or promote products derived from this software without
28 + * specific prior written permission.
29 + *
30 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
31 + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
32 + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
33 + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
34 + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
35 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
36 + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
37 + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
38 + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39 + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
40 + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
41 + * DAMAGE.
15 42 */
16 43
44 +/*
45 + * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
46 + * Copyright (c) 2011 Bayard G. Bell. All rights reserved.
47 + * Copyright 2012 Nexenta System, Inc. All rights reserved.
48 + */
49 +
17 50 #include <sys/types.h>
18 51 #include <sys/param.h>
19 52 #include <sys/file.h>
20 53 #include <sys/errno.h>
21 54 #include <sys/open.h>
22 55 #include <sys/cred.h>
23 56 #include <sys/modctl.h>
24 57 #include <sys/conf.h>
25 58 #include <sys/devops.h>
26 59 #include <sys/cmn_err.h>
27 60 #include <sys/kmem.h>
28 61 #include <sys/stat.h>
29 62 #include <sys/mkdev.h>
30 63 #include <sys/pci.h>
31 64 #include <sys/scsi/scsi.h>
32 65 #include <sys/ddi.h>
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33 66 #include <sys/sunddi.h>
34 67 #include <sys/atomic.h>
35 68 #include <sys/signal.h>
36 69 #include <sys/byteorder.h>
37 70 #include <sys/sdt.h>
38 71 #include <sys/fs/dv_node.h> /* devfs_clean */
39 72
40 73 #include "mr_sas.h"
41 74
42 75 /*
76 + * FMA header files
77 + */
78 +#include <sys/ddifm.h>
79 +#include <sys/fm/protocol.h>
80 +#include <sys/fm/util.h>
81 +#include <sys/fm/io/ddi.h>
82 +
83 +/*
43 84 * Local static data
44 85 */
45 86 static void *mrsas_state = NULL;
46 -static volatile boolean_t mrsas_relaxed_ordering = 0;
47 -volatile int debug_level_g = CL_NONE;
87 +static volatile boolean_t mrsas_relaxed_ordering = B_TRUE;
88 +volatile int debug_level_g = CL_NONE;
89 +static volatile int msi_enable = 1;
90 +static volatile int ctio_enable = 1;
48 91
49 -static volatile int msi_enable = 1;
50 -
51 92 /* Default Timeout value to issue online controller reset */
52 -volatile int debug_timeout_g = 0xF0; //0xB4;
93 +volatile int debug_timeout_g = 0xF0; /* 0xB4; */
53 94 /* Simulate consecutive firmware fault */
54 95 static volatile int debug_fw_faults_after_ocr_g = 0;
55 96 #ifdef OCRDEBUG
56 97 /* Simulate three consecutive timeout for an IO */
57 98 static volatile int debug_consecutive_timeout_after_ocr_g = 0;
58 99 #endif
59 100
60 -/* Enable OCR on firmware fault */
61 -static volatile int debug_support_ocr_isr_g = 0;
62 101 #pragma weak scsi_hba_open
63 102 #pragma weak scsi_hba_close
64 103 #pragma weak scsi_hba_ioctl
65 104
105 +/* Local static prototypes. */
106 +static int mrsas_getinfo(dev_info_t *, ddi_info_cmd_t, void *, void **);
107 +static int mrsas_attach(dev_info_t *, ddi_attach_cmd_t);
108 +#ifdef __sparc
109 +static int mrsas_reset(dev_info_t *, ddi_reset_cmd_t);
110 +#else
111 +static int mrsas_quiesce(dev_info_t *);
112 +#endif
113 +static int mrsas_detach(dev_info_t *, ddi_detach_cmd_t);
114 +static int mrsas_open(dev_t *, int, int, cred_t *);
115 +static int mrsas_close(dev_t, int, int, cred_t *);
116 +static int mrsas_ioctl(dev_t, int, intptr_t, int, cred_t *, int *);
66 117
118 +static int mrsas_tran_tgt_init(dev_info_t *, dev_info_t *,
119 + scsi_hba_tran_t *, struct scsi_device *);
120 +static struct scsi_pkt *mrsas_tran_init_pkt(struct scsi_address *, register
121 + struct scsi_pkt *, struct buf *, int, int, int, int,
122 + int (*)(), caddr_t);
123 +static int mrsas_tran_start(struct scsi_address *,
124 + register struct scsi_pkt *);
125 +static int mrsas_tran_abort(struct scsi_address *, struct scsi_pkt *);
126 +static int mrsas_tran_reset(struct scsi_address *, int);
127 +static int mrsas_tran_getcap(struct scsi_address *, char *, int);
128 +static int mrsas_tran_setcap(struct scsi_address *, char *, int, int);
129 +static void mrsas_tran_destroy_pkt(struct scsi_address *,
130 + struct scsi_pkt *);
131 +static void mrsas_tran_dmafree(struct scsi_address *, struct scsi_pkt *);
132 +static void mrsas_tran_sync_pkt(struct scsi_address *, struct scsi_pkt *);
133 +static int mrsas_tran_quiesce(dev_info_t *dip);
134 +static int mrsas_tran_unquiesce(dev_info_t *dip);
135 +static uint_t mrsas_isr();
136 +static uint_t mrsas_softintr();
137 +static void mrsas_undo_resources(dev_info_t *, struct mrsas_instance *);
138 +static struct mrsas_cmd *get_mfi_pkt(struct mrsas_instance *);
139 +static void return_mfi_pkt(struct mrsas_instance *,
140 + struct mrsas_cmd *);
67 141
142 +static void free_space_for_mfi(struct mrsas_instance *);
143 +static uint32_t read_fw_status_reg_ppc(struct mrsas_instance *);
144 +static void issue_cmd_ppc(struct mrsas_cmd *, struct mrsas_instance *);
145 +static int issue_cmd_in_poll_mode_ppc(struct mrsas_instance *,
146 + struct mrsas_cmd *);
147 +static int issue_cmd_in_sync_mode_ppc(struct mrsas_instance *,
148 + struct mrsas_cmd *);
149 +static void enable_intr_ppc(struct mrsas_instance *);
150 +static void disable_intr_ppc(struct mrsas_instance *);
151 +static int intr_ack_ppc(struct mrsas_instance *);
152 +static void flush_cache(struct mrsas_instance *instance);
153 +void display_scsi_inquiry(caddr_t);
154 +static int start_mfi_aen(struct mrsas_instance *instance);
155 +static int handle_drv_ioctl(struct mrsas_instance *instance,
156 + struct mrsas_ioctl *ioctl, int mode);
157 +static int handle_mfi_ioctl(struct mrsas_instance *instance,
158 + struct mrsas_ioctl *ioctl, int mode);
159 +static int handle_mfi_aen(struct mrsas_instance *instance,
160 + struct mrsas_aen *aen);
161 +static struct mrsas_cmd *build_cmd(struct mrsas_instance *,
162 + struct scsi_address *, struct scsi_pkt *, uchar_t *);
163 +static int alloc_additional_dma_buffer(struct mrsas_instance *);
164 +static void complete_cmd_in_sync_mode(struct mrsas_instance *,
165 + struct mrsas_cmd *);
166 +static int mrsas_kill_adapter(struct mrsas_instance *);
167 +static int mrsas_issue_init_mfi(struct mrsas_instance *);
168 +static int mrsas_reset_ppc(struct mrsas_instance *);
169 +static uint32_t mrsas_initiate_ocr_if_fw_is_faulty(struct mrsas_instance *);
170 +static int wait_for_outstanding(struct mrsas_instance *instance);
171 +static int register_mfi_aen(struct mrsas_instance *instance,
172 + uint32_t seq_num, uint32_t class_locale_word);
173 +static int issue_mfi_pthru(struct mrsas_instance *instance, struct
174 + mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
175 +static int issue_mfi_dcmd(struct mrsas_instance *instance, struct
176 + mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
177 +static int issue_mfi_smp(struct mrsas_instance *instance, struct
178 + mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
179 +static int issue_mfi_stp(struct mrsas_instance *instance, struct
180 + mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
181 +static int abort_aen_cmd(struct mrsas_instance *instance,
182 + struct mrsas_cmd *cmd_to_abort);
183 +
184 +static void mrsas_rem_intrs(struct mrsas_instance *instance);
185 +static int mrsas_add_intrs(struct mrsas_instance *instance, int intr_type);
186 +
187 +static void mrsas_tran_tgt_free(dev_info_t *, dev_info_t *,
188 + scsi_hba_tran_t *, struct scsi_device *);
189 +static int mrsas_tran_bus_config(dev_info_t *, uint_t,
190 + ddi_bus_config_op_t, void *, dev_info_t **);
191 +static int mrsas_parse_devname(char *, int *, int *);
192 +static int mrsas_config_all_devices(struct mrsas_instance *);
193 +static int mrsas_config_ld(struct mrsas_instance *, uint16_t,
194 + uint8_t, dev_info_t **);
195 +static int mrsas_name_node(dev_info_t *, char *, int);
196 +static void mrsas_issue_evt_taskq(struct mrsas_eventinfo *);
197 +static void free_additional_dma_buffer(struct mrsas_instance *);
198 +static void io_timeout_checker(void *);
199 +static void mrsas_fm_init(struct mrsas_instance *);
200 +static void mrsas_fm_fini(struct mrsas_instance *);
201 +
68 202 static struct mrsas_function_template mrsas_function_template_ppc = {
69 203 .read_fw_status_reg = read_fw_status_reg_ppc,
70 204 .issue_cmd = issue_cmd_ppc,
71 205 .issue_cmd_in_sync_mode = issue_cmd_in_sync_mode_ppc,
72 206 .issue_cmd_in_poll_mode = issue_cmd_in_poll_mode_ppc,
73 207 .enable_intr = enable_intr_ppc,
74 208 .disable_intr = disable_intr_ppc,
75 209 .intr_ack = intr_ack_ppc,
76 210 .init_adapter = mrsas_init_adapter_ppc
77 -// .reset_adapter = mrsas_reset_adapter_ppc
78 211 };
79 212
80 213
81 214 static struct mrsas_function_template mrsas_function_template_fusion = {
82 215 .read_fw_status_reg = tbolt_read_fw_status_reg,
83 216 .issue_cmd = tbolt_issue_cmd,
84 217 .issue_cmd_in_sync_mode = tbolt_issue_cmd_in_sync_mode,
85 218 .issue_cmd_in_poll_mode = tbolt_issue_cmd_in_poll_mode,
86 219 .enable_intr = tbolt_enable_intr,
87 220 .disable_intr = tbolt_disable_intr,
88 221 .intr_ack = tbolt_intr_ack,
89 222 .init_adapter = mrsas_init_adapter_tbolt
90 -// .reset_adapter = mrsas_reset_adapter_tbolt
91 223 };
92 224
93 225
94 226 ddi_dma_attr_t mrsas_generic_dma_attr = {
95 227 DMA_ATTR_V0, /* dma_attr_version */
96 228 0, /* low DMA address range */
97 229 0xFFFFFFFFU, /* high DMA address range */
98 - 0xFFFFFFFFU, /* DMA counter register */
230 + 0xFFFFFFFFU, /* DMA counter register */
99 231 8, /* DMA address alignment */
100 232 0x07, /* DMA burstsizes */
101 233 1, /* min DMA size */
102 234 0xFFFFFFFFU, /* max DMA size */
103 235 0xFFFFFFFFU, /* segment boundary */
104 236 MRSAS_MAX_SGE_CNT, /* dma_attr_sglen */
105 237 512, /* granularity of device */
106 238 0 /* bus specific DMA flags */
107 239 };
108 240
109 241 int32_t mrsas_max_cap_maxxfer = 0x1000000;
110 242
111 -//Fix for: Thunderbolt controller IO timeout when IO write size is 1MEG, Limit size to 256K
243 +/*
244 + * Fix for: Thunderbolt controller IO timeout when IO write size is 1MEG,
245 + * Limit size to 256K
246 + */
112 247 uint32_t mrsas_tbolt_max_cap_maxxfer = (512 * 512);
113 248
114 249 /*
115 250 * cb_ops contains base level routines
116 251 */
117 252 static struct cb_ops mrsas_cb_ops = {
118 253 mrsas_open, /* open */
119 254 mrsas_close, /* close */
120 255 nodev, /* strategy */
121 256 nodev, /* print */
122 257 nodev, /* dump */
123 258 nodev, /* read */
124 259 nodev, /* write */
125 260 mrsas_ioctl, /* ioctl */
126 261 nodev, /* devmap */
127 262 nodev, /* mmap */
128 263 nodev, /* segmap */
129 264 nochpoll, /* poll */
130 265 nodev, /* cb_prop_op */
131 266 0, /* streamtab */
132 267 D_NEW | D_HOTPLUG, /* cb_flag */
133 268 CB_REV, /* cb_rev */
134 269 nodev, /* cb_aread */
135 270 nodev /* cb_awrite */
136 271 };
137 272
138 273 /*
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139 274 * dev_ops contains configuration routines
140 275 */
141 276 static struct dev_ops mrsas_ops = {
142 277 DEVO_REV, /* rev, */
143 278 0, /* refcnt */
144 279 mrsas_getinfo, /* getinfo */
145 280 nulldev, /* identify */
146 281 nulldev, /* probe */
147 282 mrsas_attach, /* attach */
148 283 mrsas_detach, /* detach */
149 -#if defined(__SunOS_5_11)
150 - nodev,
151 -#else
284 +#ifdef __sparc
152 285 mrsas_reset, /* reset */
153 -#endif /* defined(__SunOS_5_11) */
286 +#else /* __sparc */
287 + nodev,
288 +#endif /* __sparc */
154 289 &mrsas_cb_ops, /* char/block ops */
155 290 NULL, /* bus ops */
156 291 NULL, /* power */
157 -#ifdef __SunOS_5_11
292 +#ifdef __sparc
293 + ddi_quiesce_not_needed
294 +#else /* __sparc */
158 295 mrsas_quiesce /* quiesce */
159 -#endif /*__SunOS_5_11 */
160 -
296 +#endif /* __sparc */
161 297 };
162 298
163 -char _depends_on[] = "misc/scsi";
164 -
165 299 static struct modldrv modldrv = {
166 300 &mod_driverops, /* module type - driver */
167 301 MRSAS_VERSION,
168 302 &mrsas_ops, /* driver ops */
169 303 };
170 304
171 305 static struct modlinkage modlinkage = {
172 306 MODREV_1, /* ml_rev - must be MODREV_1 */
173 307 &modldrv, /* ml_linkage */
174 308 NULL /* end of driver linkage */
175 309 };
176 310
177 311 static struct ddi_device_acc_attr endian_attr = {
178 312 DDI_DEVICE_ATTR_V1,
179 313 DDI_STRUCTURE_LE_ACC,
180 314 DDI_STRICTORDER_ACC,
181 315 DDI_DEFAULT_ACC
182 316 };
183 317
184 -
318 +/* Use the LSI Fast Path for the 2208 (tbolt) commands. */
185 319 unsigned int enable_fp = 1;
186 320
187 321
188 322 /*
189 323 * ************************************************************************** *
190 - * *
191 - * common entry points - for loadable kernel modules *
192 - * *
324 + * *
325 + * common entry points - for loadable kernel modules *
326 + * *
193 327 * ************************************************************************** *
194 328 */
195 329
196 330 /*
197 331 * _init - initialize a loadable module
198 332 * @void
199 333 *
200 334 * The driver should perform any one-time resource allocation or data
201 335 * initialization during driver loading in _init(). For example, the driver
202 336 * should initialize any mutexes global to the driver in this routine.
203 337 * The driver should not, however, use _init() to allocate or initialize
204 338 * anything that has to do with a particular instance of the device.
205 339 * Per-instance initialization must be done in attach().
206 340 */
207 341 int
208 342 _init(void)
209 343 {
210 344 int ret;
211 345
212 346 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
213 347
214 348 ret = ddi_soft_state_init(&mrsas_state,
215 349 sizeof (struct mrsas_instance), 0);
216 350
217 351 if (ret != DDI_SUCCESS) {
218 352 cmn_err(CE_WARN, "mr_sas: could not init state");
219 353 return (ret);
220 354 }
221 355
222 356 if ((ret = scsi_hba_init(&modlinkage)) != DDI_SUCCESS) {
223 357 cmn_err(CE_WARN, "mr_sas: could not init scsi hba");
224 358 ddi_soft_state_fini(&mrsas_state);
225 359 return (ret);
226 360 }
227 361
228 362 ret = mod_install(&modlinkage);
229 363
230 364 if (ret != DDI_SUCCESS) {
231 365 cmn_err(CE_WARN, "mr_sas: mod_install failed");
232 366 scsi_hba_fini(&modlinkage);
233 367 ddi_soft_state_fini(&mrsas_state);
234 368 }
235 369
236 370 return (ret);
237 371 }
238 372
239 373 /*
240 374 * _info - returns information about a loadable module.
241 375 * @void
242 376 *
243 377 * _info() is called to return module information. This is a typical entry
244 378 * point that does predefined role. It simply calls mod_info().
245 379 */
246 380 int
247 381 _info(struct modinfo *modinfop)
248 382 {
249 383 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
250 384
251 385 return (mod_info(&modlinkage, modinfop));
252 386 }
253 387
254 388 /*
255 389 * _fini - prepare a loadable module for unloading
256 390 * @void
257 391 *
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258 392 * In _fini(), the driver should release any resources that were allocated in
259 393 * _init(). The driver must remove itself from the system module list.
260 394 */
261 395 int
262 396 _fini(void)
263 397 {
264 398 int ret;
265 399
266 400 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
267 401
268 - if ((ret = mod_remove(&modlinkage)) != DDI_SUCCESS)
269 - {
270 - con_log(CL_ANN1, (CE_WARN, "_fini: mod_remove() failed, error 0x%X", ret));
402 + if ((ret = mod_remove(&modlinkage)) != DDI_SUCCESS) {
403 + con_log(CL_ANN1,
404 + (CE_WARN, "_fini: mod_remove() failed, error 0x%X", ret));
271 405 return (ret);
272 406 }
273 407
274 408 scsi_hba_fini(&modlinkage);
275 409 con_log(CL_DLEVEL1, (CE_NOTE, "_fini: scsi_hba_fini() done."));
276 410
277 411 ddi_soft_state_fini(&mrsas_state);
278 412 con_log(CL_DLEVEL1, (CE_NOTE, "_fini: ddi_soft_state_fini() done."));
279 413
280 414 return (ret);
281 415 }
282 416
283 417
284 418 /*
285 419 * ************************************************************************** *
286 - * *
287 - * common entry points - for autoconfiguration *
288 - * *
420 + * *
421 + * common entry points - for autoconfiguration *
422 + * *
289 423 * ************************************************************************** *
290 424 */
291 425 /*
292 426 * attach - adds a device to the system as part of initialization
293 427 * @dip:
294 428 * @cmd:
295 429 *
296 430 * The kernel calls a driver's attach() entry point to attach an instance of
297 431 * a device (for MegaRAID, it is instance of a controller) or to resume
298 432 * operation for an instance of a device that has been suspended or has been
299 433 * shut down by the power management framework
300 434 * The attach() entry point typically includes the following types of
301 435 * processing:
302 436 * - allocate a soft-state structure for the device instance (for MegaRAID,
303 437 * controller instance)
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304 438 * - initialize per-instance mutexes
305 439 * - initialize condition variables
306 440 * - register the device's interrupts (for MegaRAID, controller's interrupts)
307 441 * - map the registers and memory of the device instance (for MegaRAID,
308 442 * controller instance)
309 443 * - create minor device nodes for the device instance (for MegaRAID,
310 444 * controller instance)
311 445 * - report that the device instance (for MegaRAID, controller instance) has
312 446 * attached
313 447 */
314 -#if __SunOS_5_11
315 -#define DDI_PM_RESUME DDI_PM_RESUME_OBSOLETE
316 -#define DDI_PM_SUSPEND DDI_PM_SUSPEND_OBSOLETE
317 -#endif // __SunOS_5_11
318 448 static int
319 449 mrsas_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
320 450 {
321 451 int instance_no;
322 452 int nregs;
323 453 int i = 0;
324 - uint8_t irq;
454 + uint8_t irq;
325 455 uint16_t vendor_id;
326 456 uint16_t device_id;
327 457 uint16_t subsysvid;
328 458 uint16_t subsysid;
329 459 uint16_t command;
330 460 off_t reglength = 0;
331 461 int intr_types = 0;
332 462 char *data;
333 463
334 464 scsi_hba_tran_t *tran;
335 - ddi_dma_attr_t tran_dma_attr;
465 + ddi_dma_attr_t tran_dma_attr;
336 466 struct mrsas_instance *instance;
337 467
338 468 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
339 469
340 470 /* CONSTCOND */
341 471 ASSERT(NO_COMPETING_THREADS);
342 472
343 473 instance_no = ddi_get_instance(dip);
344 474
345 475 /*
346 476 * check to see whether this device is in a DMA-capable slot.
347 477 */
348 478 if (ddi_slaveonly(dip) == DDI_SUCCESS) {
349 479 cmn_err(CE_WARN,
350 480 "mr_sas%d: Device in slave-only slot, unused",
351 481 instance_no);
352 482 return (DDI_FAILURE);
353 483 }
354 484
355 485 switch (cmd) {
356 - case DDI_ATTACH:
486 + case DDI_ATTACH:
487 + /* allocate the soft state for the instance */
488 + if (ddi_soft_state_zalloc(mrsas_state, instance_no)
489 + != DDI_SUCCESS) {
490 + cmn_err(CE_WARN,
491 + "mr_sas%d: Failed to allocate soft state",
492 + instance_no);
493 + return (DDI_FAILURE);
494 + }
357 495
358 - /* allocate the soft state for the instance */
359 - if (ddi_soft_state_zalloc(mrsas_state, instance_no)
360 - != DDI_SUCCESS) {
361 - cmn_err(CE_WARN,
362 - "mr_sas%d: Failed to allocate soft state",
363 - instance_no);
496 + instance = (struct mrsas_instance *)ddi_get_soft_state
497 + (mrsas_state, instance_no);
364 498
365 - return (DDI_FAILURE);
366 - }
499 + if (instance == NULL) {
500 + cmn_err(CE_WARN,
501 + "mr_sas%d: Bad soft state", instance_no);
502 + ddi_soft_state_free(mrsas_state, instance_no);
503 + return (DDI_FAILURE);
504 + }
367 505
368 - instance = (struct mrsas_instance *)ddi_get_soft_state
369 - (mrsas_state, instance_no);
506 + instance->unroll.softs = 1;
370 507
371 - if (instance == NULL) {
372 - cmn_err(CE_WARN,
373 - "mr_sas%d: Bad soft state", instance_no);
508 + /* Setup the PCI configuration space handles */
509 + if (pci_config_setup(dip, &instance->pci_handle) !=
510 + DDI_SUCCESS) {
511 + cmn_err(CE_WARN,
512 + "mr_sas%d: pci config setup failed ",
513 + instance_no);
374 514
375 - ddi_soft_state_free(mrsas_state, instance_no);
515 + ddi_soft_state_free(mrsas_state, instance_no);
516 + return (DDI_FAILURE);
517 + }
376 518
377 - return (DDI_FAILURE);
378 - }
519 + if (ddi_dev_nregs(dip, &nregs) != DDI_SUCCESS) {
520 + cmn_err(CE_WARN,
521 + "mr_sas: failed to get registers.");
379 522
380 - bzero((caddr_t)instance,
381 - sizeof (struct mrsas_instance));
523 + pci_config_teardown(&instance->pci_handle);
524 + ddi_soft_state_free(mrsas_state, instance_no);
525 + return (DDI_FAILURE);
526 + }
382 527
383 - instance->unroll.softs = 1;
528 + vendor_id = pci_config_get16(instance->pci_handle,
529 + PCI_CONF_VENID);
530 + device_id = pci_config_get16(instance->pci_handle,
531 + PCI_CONF_DEVID);
384 532
385 - /* Setup the PCI configuration space handles */
386 - if (pci_config_setup(dip, &instance->pci_handle) !=
387 - DDI_SUCCESS) {
388 - cmn_err(CE_WARN,
389 - "mr_sas%d: pci config setup failed ",
390 - instance_no);
533 + subsysvid = pci_config_get16(instance->pci_handle,
534 + PCI_CONF_SUBVENID);
535 + subsysid = pci_config_get16(instance->pci_handle,
536 + PCI_CONF_SUBSYSID);
391 537
392 - ddi_soft_state_free(mrsas_state, instance_no);
393 - return (DDI_FAILURE);
394 - }
395 - if (instance->pci_handle == NULL) {
396 - cmn_err(CE_WARN,
397 - "mr_sas%d: pci config setup failed ",
398 - instance_no);
399 - ddi_soft_state_free(mrsas_state, instance_no);
400 - return (DDI_FAILURE);
401 - }
538 + pci_config_put16(instance->pci_handle, PCI_CONF_COMM,
539 + (pci_config_get16(instance->pci_handle,
540 + PCI_CONF_COMM) | PCI_COMM_ME));
541 + irq = pci_config_get8(instance->pci_handle,
542 + PCI_CONF_ILINE);
402 543
544 + con_log(CL_DLEVEL1, (CE_CONT, "mr_sas%d: "
545 + "0x%x:0x%x 0x%x:0x%x, irq:%d drv-ver:%s",
546 + instance_no, vendor_id, device_id, subsysvid,
547 + subsysid, irq, MRSAS_VERSION));
403 548
549 + /* enable bus-mastering */
550 + command = pci_config_get16(instance->pci_handle,
551 + PCI_CONF_COMM);
404 552
405 - if (ddi_dev_nregs(dip, &nregs) != DDI_SUCCESS) {
406 - cmn_err(CE_WARN,
407 - "mr_sas: failed to get registers.");
553 + if (!(command & PCI_COMM_ME)) {
554 + command |= PCI_COMM_ME;
408 555
409 - pci_config_teardown(&instance->pci_handle);
410 - ddi_soft_state_free(mrsas_state, instance_no);
411 - return (DDI_FAILURE);
412 - }
556 + pci_config_put16(instance->pci_handle,
557 + PCI_CONF_COMM, command);
413 558
414 - vendor_id = pci_config_get16(instance->pci_handle,
415 - PCI_CONF_VENID);
416 - device_id = pci_config_get16(instance->pci_handle,
417 - PCI_CONF_DEVID);
559 + con_log(CL_ANN, (CE_CONT, "mr_sas%d: "
560 + "enable bus-mastering", instance_no));
561 + } else {
562 + con_log(CL_DLEVEL1, (CE_CONT, "mr_sas%d: "
563 + "bus-mastering already set", instance_no));
564 + }
418 565
419 - subsysvid = pci_config_get16(instance->pci_handle,
420 - PCI_CONF_SUBVENID);
421 - subsysid = pci_config_get16(instance->pci_handle,
422 - PCI_CONF_SUBSYSID);
566 + /* initialize function pointers */
567 + switch (device_id) {
568 + case PCI_DEVICE_ID_LSI_TBOLT:
569 + case PCI_DEVICE_ID_LSI_INVADER:
570 + con_log(CL_ANN, (CE_NOTE,
571 + "mr_sas: 2208 T.B. device detected"));
423 572
424 - pci_config_put16(instance->pci_handle, PCI_CONF_COMM,
425 - (pci_config_get16(instance->pci_handle,
426 - PCI_CONF_COMM) | PCI_COMM_ME));
427 - irq = pci_config_get8(instance->pci_handle,
428 - PCI_CONF_ILINE);
573 + instance->func_ptr =
574 + &mrsas_function_template_fusion;
575 + instance->tbolt = 1;
576 + break;
429 577
430 - con_log(CL_DLEVEL1, (CE_CONT, "mr_sas%d: "
431 - "0x%x:0x%x 0x%x:0x%x, irq:%d drv-ver:%s",
432 - instance_no, vendor_id, device_id, subsysvid,
433 - subsysid, irq, MRSAS_VERSION));
578 + case PCI_DEVICE_ID_LSI_2108VDE:
579 + case PCI_DEVICE_ID_LSI_2108V:
580 + con_log(CL_ANN, (CE_NOTE,
581 + "mr_sas: 2108 Liberator device detected"));
434 582
435 - /* enable bus-mastering */
436 - command = pci_config_get16(instance->pci_handle,
437 - PCI_CONF_COMM);
583 + instance->func_ptr =
584 + &mrsas_function_template_ppc;
585 + break;
438 586
439 - if (!(command & PCI_COMM_ME)) {
440 - command |= PCI_COMM_ME;
587 + default:
588 + cmn_err(CE_WARN,
589 + "mr_sas: Invalid device detected");
441 590
442 - pci_config_put16(instance->pci_handle,
443 - PCI_CONF_COMM, command);
591 + pci_config_teardown(&instance->pci_handle);
592 + ddi_soft_state_free(mrsas_state, instance_no);
593 + return (DDI_FAILURE);
594 + }
444 595
445 - con_log(CL_ANN, (CE_CONT, "mr_sas%d: "
446 - "enable bus-mastering", instance_no));
447 - } else {
448 - con_log(CL_DLEVEL1, (CE_CONT, "mr_sas%d: "
449 - "bus-mastering already set", instance_no));
450 - }
596 + instance->baseaddress = pci_config_get32(
597 + instance->pci_handle, PCI_CONF_BASE0);
598 + instance->baseaddress &= 0x0fffc;
451 599
452 - /* initialize function pointers */
453 - switch(device_id) {
454 - case PCI_DEVICE_ID_LSI_TBOLT:
455 - case PCI_DEVICE_ID_LSI_INVADER:
456 - con_log(CL_ANN, (CE_NOTE,
457 - "mr_sas: 2208 T.B. device detected"));
600 + instance->dip = dip;
601 + instance->vendor_id = vendor_id;
602 + instance->device_id = device_id;
603 + instance->subsysvid = subsysvid;
604 + instance->subsysid = subsysid;
605 + instance->instance = instance_no;
458 606
459 - instance->func_ptr = &mrsas_function_template_fusion;
460 - instance->tbolt = 1;
461 - break;
607 + /* Initialize FMA */
608 + instance->fm_capabilities = ddi_prop_get_int(
609 + DDI_DEV_T_ANY, instance->dip, DDI_PROP_DONTPASS,
610 + "fm-capable", DDI_FM_EREPORT_CAPABLE |
611 + DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE
612 + | DDI_FM_ERRCB_CAPABLE);
462 613
463 - case PCI_DEVICE_ID_LSI_2108VDE:
464 - case PCI_DEVICE_ID_LSI_2108V:
465 - con_log(CL_ANN, (CE_NOTE,
466 - "mr_sas: 2108 Liberator device detected"));
614 + mrsas_fm_init(instance);
467 615
468 - instance->func_ptr = &mrsas_function_template_ppc;
469 - break;
616 + /* Setup register map */
617 + if ((ddi_dev_regsize(instance->dip,
618 + REGISTER_SET_IO_2108, ®length) != DDI_SUCCESS) ||
619 + reglength < MINIMUM_MFI_MEM_SZ) {
620 + goto fail_attach;
621 + }
622 + if (reglength > DEFAULT_MFI_MEM_SZ) {
623 + reglength = DEFAULT_MFI_MEM_SZ;
624 + con_log(CL_DLEVEL1, (CE_NOTE,
625 + "mr_sas: register length to map is 0x%lx bytes",
626 + reglength));
627 + }
628 + if (ddi_regs_map_setup(instance->dip,
629 + REGISTER_SET_IO_2108, &instance->regmap, 0,
630 + reglength, &endian_attr, &instance->regmap_handle)
631 + != DDI_SUCCESS) {
632 + cmn_err(CE_WARN,
633 + "mr_sas: couldn't map control registers");
634 + goto fail_attach;
635 + }
470 636
471 - default:
472 - cmn_err(CE_WARN,
473 - "mr_sas: Invalid device detected");
637 + instance->unroll.regs = 1;
474 638
475 - pci_config_teardown(&instance->pci_handle);
476 - ddi_soft_state_free(mrsas_state, instance_no);
477 - return (DDI_FAILURE);
639 + /*
640 + * Disable Interrupt Now.
641 + * Setup Software interrupt
642 + */
643 + instance->func_ptr->disable_intr(instance);
478 644
479 - }
645 + if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
646 + "mrsas-enable-msi", &data) == DDI_SUCCESS) {
647 + if (strncmp(data, "no", 3) == 0) {
648 + msi_enable = 0;
649 + con_log(CL_ANN1, (CE_WARN,
650 + "msi_enable = %d disabled", msi_enable));
651 + }
652 + ddi_prop_free(data);
653 + }
480 654
481 - instance->baseaddress = pci_config_get32(
482 - instance->pci_handle, PCI_CONF_BASE0);
483 - instance->baseaddress &= 0x0fffc;
655 + con_log(CL_DLEVEL1, (CE_NOTE, "msi_enable = %d", msi_enable));
484 656
485 - instance->dip = dip;
486 - instance->vendor_id = vendor_id;
487 - instance->device_id = device_id;
488 - instance->subsysvid = subsysvid;
489 - instance->subsysid = subsysid;
490 - instance->instance = instance_no;
657 + if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
658 + "mrsas-enable-fp", &data) == DDI_SUCCESS) {
659 + if (strncmp(data, "no", 3) == 0) {
660 + enable_fp = 0;
661 + cmn_err(CE_NOTE,
662 + "enable_fp = %d, Fast-Path disabled.\n",
663 + enable_fp);
664 + }
491 665
666 + ddi_prop_free(data);
667 + }
492 668
493 - /* Setup register map */
494 - if ((ddi_dev_regsize(instance->dip,
495 - REGISTER_SET_IO_2108, ®length) != DDI_SUCCESS) ||
496 - reglength < MINIMUM_MFI_MEM_SZ) {
669 + con_log(CL_DLEVEL1, (CE_NOTE, "enable_fp = %d\n", enable_fp));
670 +
671 + /* Check for all supported interrupt types */
672 + if (ddi_intr_get_supported_types(
673 + dip, &intr_types) != DDI_SUCCESS) {
674 + cmn_err(CE_WARN,
675 + "ddi_intr_get_supported_types() failed");
676 + goto fail_attach;
677 + }
678 +
679 + con_log(CL_DLEVEL1, (CE_NOTE,
680 + "ddi_intr_get_supported_types() ret: 0x%x", intr_types));
681 +
682 + /* Initialize and Setup Interrupt handler */
683 + if (msi_enable && (intr_types & DDI_INTR_TYPE_MSIX)) {
684 + if (mrsas_add_intrs(instance, DDI_INTR_TYPE_MSIX) !=
685 + DDI_SUCCESS) {
686 + cmn_err(CE_WARN,
687 + "MSIX interrupt query failed");
497 688 goto fail_attach;
498 689 }
499 - if (reglength > DEFAULT_MFI_MEM_SZ) {
500 - reglength = DEFAULT_MFI_MEM_SZ;
501 - con_log(CL_DLEVEL1, (CE_NOTE,
502 - "mr_sas: register length to map is "
503 - "0x%lx bytes", reglength));
504 - }
505 - if (ddi_regs_map_setup(instance->dip,
506 - REGISTER_SET_IO_2108, &instance->regmap, 0,
507 - reglength, &endian_attr, &instance->regmap_handle)
508 - != DDI_SUCCESS) {
690 + instance->intr_type = DDI_INTR_TYPE_MSIX;
691 + } else if (msi_enable && (intr_types & DDI_INTR_TYPE_MSI)) {
692 + if (mrsas_add_intrs(instance, DDI_INTR_TYPE_MSI) !=
693 + DDI_SUCCESS) {
509 694 cmn_err(CE_WARN,
510 - "mr_sas: couldn't map control registers");
695 + "MSI interrupt query failed");
511 696 goto fail_attach;
512 697 }
513 - if (instance->regmap_handle == NULL) {
698 + instance->intr_type = DDI_INTR_TYPE_MSI;
699 + } else if (intr_types & DDI_INTR_TYPE_FIXED) {
700 + msi_enable = 0;
701 + if (mrsas_add_intrs(instance, DDI_INTR_TYPE_FIXED) !=
702 + DDI_SUCCESS) {
514 703 cmn_err(CE_WARN,
515 - "mr_sas: couldn't map control registers");
704 + "FIXED interrupt query failed");
516 705 goto fail_attach;
517 706 }
707 + instance->intr_type = DDI_INTR_TYPE_FIXED;
708 + } else {
709 + cmn_err(CE_WARN, "Device cannot "
710 + "suppport either FIXED or MSI/X "
711 + "interrupts");
712 + goto fail_attach;
713 + }
518 714
519 - instance->unroll.regs = 1;
715 + instance->unroll.intr = 1;
520 716
521 - /*
522 - * Disable Interrupt Now.
523 - * Setup Software interrupt
524 - */
525 - instance->func_ptr->disable_intr(instance);
526 -
527 - if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
528 - "mrsas-enable-msi", &data) == DDI_SUCCESS) {
529 - if (strncmp(data, "no", 3) == 0) {
530 - msi_enable = 0;
531 - con_log(CL_ANN1, (CE_WARN,
532 - "msi_enable = %d disabled",
533 - msi_enable));
534 - }
535 - ddi_prop_free(data);
717 + if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
718 + "mrsas-enable-ctio", &data) == DDI_SUCCESS) {
719 + if (strncmp(data, "no", 3) == 0) {
720 + ctio_enable = 0;
721 + con_log(CL_ANN1, (CE_WARN,
722 + "ctio_enable = %d disabled", ctio_enable));
536 723 }
724 + ddi_prop_free(data);
725 + }
537 726
538 - con_log(CL_DLEVEL1, (CE_NOTE, "msi_enable = %d", msi_enable));
727 + con_log(CL_DLEVEL1, (CE_WARN, "ctio_enable = %d", ctio_enable));
539 728
540 - if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
541 - "mrsas-enable-fp", &data) == DDI_SUCCESS) {
542 - if (strncmp(data, "no", 3) == 0) {
543 - enable_fp = 0;
544 - cmn_err(CE_NOTE,
545 - "enable_fp = %d, Fast-Path disabled.\n",
546 - enable_fp);
547 - }
729 + /* setup the mfi based low level driver */
730 + if (mrsas_init_adapter(instance) != DDI_SUCCESS) {
731 + cmn_err(CE_WARN, "mr_sas: "
732 + "could not initialize the low level driver");
548 733
549 - ddi_prop_free(data);
550 - }
734 + goto fail_attach;
735 + }
551 736
552 - cmn_err(CE_NOTE, "enable_fp = %d\n", enable_fp);
737 + /* Initialize all Mutex */
738 + INIT_LIST_HEAD(&instance->completed_pool_list);
739 + mutex_init(&instance->completed_pool_mtx, NULL,
740 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
553 741
554 - /* Check for all supported interrupt types */
555 - if (ddi_intr_get_supported_types(
556 - dip, &intr_types) != DDI_SUCCESS) {
557 - cmn_err(CE_WARN,
558 - "ddi_intr_get_supported_types() failed");
559 - goto fail_attach;
560 - }
742 + mutex_init(&instance->sync_map_mtx, NULL,
743 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
561 744
562 - con_log(CL_DLEVEL1, (CE_NOTE,
563 - "ddi_intr_get_supported_types() ret: 0x%x",
564 - intr_types));
745 + mutex_init(&instance->app_cmd_pool_mtx, NULL,
746 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
565 747
566 - /* Initialize and Setup Interrupt handler */
567 - if (msi_enable && (intr_types & DDI_INTR_TYPE_MSIX)) {
568 - if (mrsas_add_intrs(instance,
569 - DDI_INTR_TYPE_MSIX) != DDI_SUCCESS) {
570 - cmn_err(CE_WARN,
571 - "MSIX interrupt query failed");
572 - goto fail_attach;
573 - }
574 - instance->intr_type = DDI_INTR_TYPE_MSIX;
575 - } else if (msi_enable && (intr_types &
576 - DDI_INTR_TYPE_MSI)) {
577 - if (mrsas_add_intrs(instance,
578 - DDI_INTR_TYPE_MSI) != DDI_SUCCESS) {
579 - cmn_err(CE_WARN,
580 - "MSI interrupt query failed");
581 - goto fail_attach;
582 - }
583 - instance->intr_type = DDI_INTR_TYPE_MSI;
584 - } else if (intr_types & DDI_INTR_TYPE_FIXED) {
585 - msi_enable = 0;
586 - if (mrsas_add_intrs(instance,
587 - DDI_INTR_TYPE_FIXED) != DDI_SUCCESS) {
588 - cmn_err(CE_WARN,
589 - "FIXED interrupt query failed");
590 - goto fail_attach;
591 - }
592 - instance->intr_type = DDI_INTR_TYPE_FIXED;
593 - } else {
594 - cmn_err(CE_WARN, "Device cannot "
595 - "suppport either FIXED or MSI/X "
596 - "interrupts");
597 - goto fail_attach;
598 - }
748 + mutex_init(&instance->config_dev_mtx, NULL,
749 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
599 750
600 - instance->unroll.intr = 1;
751 + mutex_init(&instance->cmd_pend_mtx, NULL,
752 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
601 753
754 + mutex_init(&instance->ocr_flags_mtx, NULL,
755 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
602 756
603 - /* setup the mfi based low level driver */
604 - if (mrsas_init_adapter(instance) != DDI_SUCCESS) {
605 - cmn_err(CE_WARN, "mr_sas: "
606 - "could not initialize the low level driver");
757 + mutex_init(&instance->int_cmd_mtx, NULL,
758 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
759 + cv_init(&instance->int_cmd_cv, NULL, CV_DRIVER, NULL);
607 760
608 - goto fail_attach;
609 - }
761 + mutex_init(&instance->cmd_pool_mtx, NULL,
762 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
610 763
611 - /* Initialize all Mutex */
612 - INIT_LIST_HEAD(&instance->completed_pool_list);
613 - mutex_init(&instance->completed_pool_mtx,
614 - "completed_pool_mtx", MUTEX_DRIVER,
615 - DDI_INTR_PRI(instance->intr_pri));
616 -
617 - mutex_init(&instance->sync_map_mtx,
618 - "sync_map_mtx", MUTEX_DRIVER,
619 - DDI_INTR_PRI(instance->intr_pri));
620 -
621 - mutex_init(&instance->app_cmd_pool_mtx,
622 - "app_cmd_pool_mtx", MUTEX_DRIVER,
623 - DDI_INTR_PRI(instance->intr_pri));
764 + mutex_init(&instance->reg_write_mtx, NULL,
765 + MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
624 766
625 - mutex_init(&instance->config_dev_mtx, "config_dev_mtx",
767 + if (instance->tbolt) {
768 + mutex_init(&instance->cmd_app_pool_mtx, NULL,
626 769 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
627 770
628 - mutex_init(&instance->cmd_pend_mtx, "cmd_pend_mtx",
771 + mutex_init(&instance->chip_mtx, NULL,
629 772 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
630 773
631 - mutex_init(&instance->ocr_flags_mtx, "ocr_flags_mtx",
632 - MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
774 + }
633 775
634 - mutex_init(&instance->int_cmd_mtx, "int_cmd_mtx",
635 - MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
636 - cv_init(&instance->int_cmd_cv, NULL, CV_DRIVER, NULL);
776 + instance->unroll.mutexs = 1;
637 777
638 - mutex_init(&instance->cmd_pool_mtx, "cmd_pool_mtx",
639 - MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
778 + instance->timeout_id = (timeout_id_t)-1;
640 779
641 - mutex_init(&instance->reg_write_mtx,"reg_write_mtx",
642 - MUTEX_DRIVER,DDI_INTR_PRI(instance->intr_pri));
780 + /* Register our soft-isr for highlevel interrupts. */
781 + instance->isr_level = instance->intr_pri;
782 + if (!(instance->tbolt)) {
783 + if (instance->isr_level == HIGH_LEVEL_INTR) {
784 + if (ddi_add_softintr(dip,
785 + DDI_SOFTINT_HIGH,
786 + &instance->soft_intr_id, NULL, NULL,
787 + mrsas_softintr, (caddr_t)instance) !=
788 + DDI_SUCCESS) {
789 + cmn_err(CE_WARN,
790 + "Software ISR did not register");
643 791
644 - if (instance->tbolt) {
645 - mutex_init(&instance->cmd_app_pool_mtx,
646 - "cmd_app_pool_mtx", MUTEX_DRIVER,
647 - DDI_INTR_PRI(instance->intr_pri));
792 + goto fail_attach;
793 + }
648 794
649 - mutex_init(&instance->chip_mtx,
650 - "chip_mtx", MUTEX_DRIVER,
651 - DDI_INTR_PRI(instance->intr_pri));
795 + instance->unroll.soft_isr = 1;
652 796
653 797 }
798 + }
654 799
655 - instance->unroll.mutexs = 1;
800 + instance->softint_running = 0;
656 801
657 - instance->timeout_id = (timeout_id_t)-1;
802 + /* Allocate a transport structure */
803 + tran = scsi_hba_tran_alloc(dip, SCSI_HBA_CANSLEEP);
658 804
659 - /* Register our soft-isr for highlevel interrupts. */
660 - instance->isr_level = instance->intr_pri;
661 - if (!(instance->tbolt)) {
662 - if (instance->isr_level == HIGH_LEVEL_INTR) {
663 - if (ddi_add_softintr(dip,
664 - DDI_SOFTINT_HIGH,
665 - &instance->soft_intr_id,
666 - NULL, NULL, mrsas_softintr,
667 - (caddr_t)instance) !=
668 - DDI_SUCCESS) {
669 - cmn_err(CE_WARN,
670 - "Software ISR "
671 - "did not register");
805 + if (tran == NULL) {
806 + cmn_err(CE_WARN,
807 + "scsi_hba_tran_alloc failed");
808 + goto fail_attach;
809 + }
672 810
673 - goto fail_attach;
674 - }
811 + instance->tran = tran;
812 + instance->unroll.tran = 1;
675 813
676 - instance->unroll.soft_isr = 1;
814 + tran->tran_hba_private = instance;
815 + tran->tran_tgt_init = mrsas_tran_tgt_init;
816 + tran->tran_tgt_probe = scsi_hba_probe;
817 + tran->tran_tgt_free = mrsas_tran_tgt_free;
818 + if (instance->tbolt) {
819 + tran->tran_init_pkt =
820 + mrsas_tbolt_tran_init_pkt;
821 + tran->tran_start =
822 + mrsas_tbolt_tran_start;
823 + } else {
824 + tran->tran_init_pkt = mrsas_tran_init_pkt;
825 + tran->tran_start = mrsas_tran_start;
826 + }
827 + tran->tran_abort = mrsas_tran_abort;
828 + tran->tran_reset = mrsas_tran_reset;
829 + tran->tran_getcap = mrsas_tran_getcap;
830 + tran->tran_setcap = mrsas_tran_setcap;
831 + tran->tran_destroy_pkt = mrsas_tran_destroy_pkt;
832 + tran->tran_dmafree = mrsas_tran_dmafree;
833 + tran->tran_sync_pkt = mrsas_tran_sync_pkt;
834 + tran->tran_quiesce = mrsas_tran_quiesce;
835 + tran->tran_unquiesce = mrsas_tran_unquiesce;
836 + tran->tran_bus_config = mrsas_tran_bus_config;
677 837
678 - }
679 - }
838 + if (mrsas_relaxed_ordering)
839 + mrsas_generic_dma_attr.dma_attr_flags |=
840 + DDI_DMA_RELAXED_ORDERING;
680 841
681 - instance->softint_running = 0;
682 842
683 - /* Allocate a transport structure */
684 - tran = scsi_hba_tran_alloc(dip, SCSI_HBA_CANSLEEP);
843 + tran_dma_attr = mrsas_generic_dma_attr;
844 + tran_dma_attr.dma_attr_sgllen = instance->max_num_sge;
685 845
686 - if (tran == NULL) {
687 - cmn_err(CE_WARN,
688 - "scsi_hba_tran_alloc failed");
689 - goto fail_attach;
690 - }
846 + /* Attach this instance of the hba */
847 + if (scsi_hba_attach_setup(dip, &tran_dma_attr, tran, 0)
848 + != DDI_SUCCESS) {
849 + cmn_err(CE_WARN,
850 + "scsi_hba_attach failed");
691 851
692 - instance->tran = tran;
693 - instance->unroll.tran = 1;
852 + goto fail_attach;
853 + }
854 + instance->unroll.tranSetup = 1;
855 + con_log(CL_ANN1,
856 + (CE_CONT, "scsi_hba_attach_setup() done."));
694 857
695 - tran->tran_hba_private = instance;
696 - tran->tran_tgt_init = mrsas_tran_tgt_init;
697 - tran->tran_tgt_probe = scsi_hba_probe;
698 - tran->tran_tgt_free = mrsas_tran_tgt_free;
699 - if (instance->tbolt) {
700 - tran->tran_init_pkt =
701 - mrsas_tbolt_tran_init_pkt;
702 - tran->tran_start =
703 - mrsas_tbolt_tran_start;
704 - } else {
705 - tran->tran_init_pkt = mrsas_tran_init_pkt;
706 - tran->tran_start = mrsas_tran_start;
707 - }
708 - tran->tran_abort = mrsas_tran_abort;
709 - tran->tran_reset = mrsas_tran_reset;
710 - tran->tran_getcap = mrsas_tran_getcap;
711 - tran->tran_setcap = mrsas_tran_setcap;
712 - tran->tran_destroy_pkt = mrsas_tran_destroy_pkt;
713 - tran->tran_dmafree = mrsas_tran_dmafree;
714 - tran->tran_sync_pkt = mrsas_tran_sync_pkt;
715 - tran->tran_quiesce = mrsas_tran_quiesce;
716 - tran->tran_unquiesce = mrsas_tran_unquiesce;
717 - tran->tran_bus_config = mrsas_tran_bus_config;
858 + /* create devctl node for cfgadm command */
859 + if (ddi_create_minor_node(dip, "devctl",
860 + S_IFCHR, INST2DEVCTL(instance_no),
861 + DDI_NT_SCSI_NEXUS, 0) == DDI_FAILURE) {
862 + cmn_err(CE_WARN,
863 + "mr_sas: failed to create devctl node.");
718 864
719 - if (mrsas_relaxed_ordering)
720 - mrsas_generic_dma_attr.dma_attr_flags |=
721 - DDI_DMA_RELAXED_ORDERING;
865 + goto fail_attach;
866 + }
722 867
868 + instance->unroll.devctl = 1;
723 869
724 - tran_dma_attr = mrsas_generic_dma_attr;
725 - tran_dma_attr.dma_attr_sgllen = instance->max_num_sge;
870 + /* create scsi node for cfgadm command */
871 + if (ddi_create_minor_node(dip, "scsi", S_IFCHR,
872 + INST2SCSI(instance_no), DDI_NT_SCSI_ATTACHMENT_POINT, 0) ==
873 + DDI_FAILURE) {
874 + cmn_err(CE_WARN,
875 + "mr_sas: failed to create scsi node.");
726 876
727 - /* Attach this instance of the hba */
728 - if (scsi_hba_attach_setup(dip, &tran_dma_attr, tran, 0)
729 - != DDI_SUCCESS) {
730 - cmn_err(CE_WARN,
731 - "scsi_hba_attach failed");
877 + goto fail_attach;
878 + }
732 879
733 - goto fail_attach;
734 - }
735 - instance->unroll.tranSetup = 1;
736 - con_log(CL_ANN1, (CE_CONT,
737 - "scsi_hba_attach_setup() done."));
880 + instance->unroll.scsictl = 1;
738 881
882 + (void) sprintf(instance->iocnode, "%d:lsirdctl",
883 + instance_no);
739 884
740 - /* create devctl node for cfgadm command */
741 - if (ddi_create_minor_node(dip, "devctl",
742 - S_IFCHR, INST2DEVCTL(instance_no),
743 - DDI_NT_SCSI_NEXUS, 0) == DDI_FAILURE) {
744 - cmn_err(CE_WARN,
745 - "mr_sas: failed to create devctl node.");
885 + /*
886 + * Create a node for applications
887 + * for issuing ioctl to the driver.
888 + */
889 + if (ddi_create_minor_node(dip, instance->iocnode,
890 + S_IFCHR, INST2LSIRDCTL(instance_no), DDI_PSEUDO, 0) ==
891 + DDI_FAILURE) {
892 + cmn_err(CE_WARN,
893 + "mr_sas: failed to create ioctl node.");
746 894
747 - goto fail_attach;
748 - }
895 + goto fail_attach;
896 + }
749 897
750 - instance->unroll.devctl = 1;
898 + instance->unroll.ioctl = 1;
751 899
752 - /* create scsi node for cfgadm command */
753 - if (ddi_create_minor_node(dip, "scsi", S_IFCHR,
754 - INST2SCSI(instance_no),
755 - DDI_NT_SCSI_ATTACHMENT_POINT, 0) ==
756 - DDI_FAILURE) {
757 - cmn_err(CE_WARN,
758 - "mr_sas: failed to create scsi node.");
900 + /* Create a taskq to handle dr events */
901 + if ((instance->taskq = ddi_taskq_create(dip,
902 + "mrsas_dr_taskq", 1, TASKQ_DEFAULTPRI, 0)) == NULL) {
903 + cmn_err(CE_WARN,
904 + "mr_sas: failed to create taskq ");
905 + instance->taskq = NULL;
906 + goto fail_attach;
907 + }
908 + instance->unroll.taskq = 1;
909 + con_log(CL_ANN1, (CE_CONT, "ddi_taskq_create() done."));
759 910
760 - goto fail_attach;
761 - }
911 + /* enable interrupt */
912 + instance->func_ptr->enable_intr(instance);
762 913
763 - instance->unroll.scsictl = 1;
914 + /* initiate AEN */
915 + if (start_mfi_aen(instance)) {
916 + cmn_err(CE_WARN,
917 + "mr_sas: failed to initiate AEN.");
918 + goto fail_attach;
919 + }
920 + instance->unroll.aenPend = 1;
921 + con_log(CL_ANN1,
922 + (CE_CONT, "AEN started for instance %d.", instance_no));
764 923
765 - (void) sprintf(instance->iocnode, "%d:lsirdctl",
766 - instance_no);
924 + /* Finally! We are on the air. */
925 + ddi_report_dev(dip);
767 926
768 - /*
769 - * Create a node for applications
770 - * for issuing ioctl to the driver.
771 - */
772 - if (ddi_create_minor_node(dip, instance->iocnode,
773 - S_IFCHR, INST2LSIRDCTL(instance_no),
774 - DDI_PSEUDO, 0) == DDI_FAILURE) {
775 - cmn_err(CE_WARN,
776 - "mr_sas: failed to create ioctl node.");
927 + /* FMA handle checking. */
928 + if (mrsas_check_acc_handle(instance->regmap_handle) !=
929 + DDI_SUCCESS) {
930 + goto fail_attach;
931 + }
932 + if (mrsas_check_acc_handle(instance->pci_handle) !=
933 + DDI_SUCCESS) {
934 + goto fail_attach;
935 + }
777 936
778 - goto fail_attach;
779 - }
937 + instance->mr_ld_list =
938 + kmem_zalloc(MRDRV_MAX_LD * sizeof (struct mrsas_ld),
939 + KM_SLEEP);
940 + instance->unroll.ldlist_buff = 1;
780 941
781 - instance->unroll.ioctl = 1;
782 -
783 - /* Create a taskq to handle dr events */
784 - if ((instance->taskq = ddi_taskq_create(dip,
785 - "mrsas_dr_taskq", 1,
786 - TASKQ_DEFAULTPRI, 0)) == NULL) {
787 - cmn_err(CE_WARN,
788 - "mr_sas: failed to create taskq ");
789 - instance->taskq = NULL;
790 - goto fail_attach;
942 +#ifdef PDSUPPORT
943 + if (instance->tbolt) {
944 + instance->mr_tbolt_pd_max = MRSAS_TBOLT_PD_TGT_MAX;
945 + instance->mr_tbolt_pd_list =
946 + kmem_zalloc(MRSAS_TBOLT_GET_PD_MAX(instance) *
947 + sizeof (struct mrsas_tbolt_pd), KM_SLEEP);
948 + ASSERT(instance->mr_tbolt_pd_list);
949 + for (i = 0; i < instance->mr_tbolt_pd_max; i++) {
950 + instance->mr_tbolt_pd_list[i].lun_type =
951 + MRSAS_TBOLT_PD_LUN;
952 + instance->mr_tbolt_pd_list[i].dev_id =
953 + (uint8_t)i;
791 954 }
792 - instance->unroll.taskq = 1;
793 - con_log(CL_ANN1, (CE_CONT,
794 - "ddi_taskq_create() done."));
795 955
796 - /* enable interrupt */
797 - instance->func_ptr->enable_intr(instance);
798 -
799 - /* initiate AEN */
800 - if (start_mfi_aen(instance)) {
801 - cmn_err(CE_WARN,
802 - "mr_sas: failed to initiate AEN.");
803 - goto fail_attach;
804 - }
805 - instance->unroll.aenPend = 1;
806 - con_log(CL_ANN1, (CE_CONT,
807 - "AEN started for instance %d.", instance_no));
808 -
809 - /* Finally! We are on the air. */
810 - ddi_report_dev(dip);
811 -
812 - instance->mr_ld_list =
813 - kmem_zalloc(MRDRV_MAX_LD * sizeof (struct mrsas_ld),
814 - KM_SLEEP);
815 - if (instance->mr_ld_list == NULL) {
816 - cmn_err(CE_WARN,
817 - "mr_sas attach(): failed to allocate ld_list array");
818 - goto fail_attach;
819 - }
820 - instance->unroll.ldlist_buff = 1;
821 -
822 -#ifdef PDSUPPORT
823 - if(instance->tbolt) {
824 - instance->mr_tbolt_pd_max = MRSAS_TBOLT_PD_TGT_MAX;
825 - instance->mr_tbolt_pd_list =
826 - kmem_zalloc(MRSAS_TBOLT_GET_PD_MAX(instance)
827 - * sizeof (struct mrsas_tbolt_pd), KM_SLEEP);
828 - ASSERT(instance->mr_tbolt_pd_list);
829 - for (i = 0; i < instance->mr_tbolt_pd_max; i++) {
830 - instance->mr_tbolt_pd_list[i].lun_type =
831 - MRSAS_TBOLT_PD_LUN;
832 - instance->mr_tbolt_pd_list[i].dev_id =
833 - (uint8_t)i;
834 - }
835 -
836 - instance->unroll.pdlist_buff = 1;
837 - }
956 + instance->unroll.pdlist_buff = 1;
957 + }
838 958 #endif
839 - break;
840 - case DDI_PM_RESUME:
841 - con_log(CL_ANN, (CE_NOTE,
842 - "mr_sas: DDI_PM_RESUME"));
843 - break;
844 - case DDI_RESUME:
845 - con_log(CL_ANN, (CE_NOTE,
846 - "mr_sas: DDI_RESUME"));
847 - break;
848 - default:
849 - con_log(CL_ANN, (CE_WARN,
850 - "mr_sas: invalid attach cmd=%x", cmd));
851 - return (DDI_FAILURE);
959 + break;
960 + case DDI_PM_RESUME:
961 + con_log(CL_ANN, (CE_NOTE, "mr_sas: DDI_PM_RESUME"));
962 + break;
963 + case DDI_RESUME:
964 + con_log(CL_ANN, (CE_NOTE, "mr_sas: DDI_RESUME"));
965 + break;
966 + default:
967 + con_log(CL_ANN,
968 + (CE_WARN, "mr_sas: invalid attach cmd=%x", cmd));
969 + return (DDI_FAILURE);
852 970 }
853 971
854 972
855 - cmn_err(CE_NOTE, "mrsas_attach() return SUCCESS instance_num %d", instance_no);
973 + con_log(CL_DLEVEL1,
974 + (CE_NOTE, "mrsas_attach() return SUCCESS instance_num %d",
975 + instance_no));
856 976 return (DDI_SUCCESS);
857 977
858 978 fail_attach:
859 979
860 980 mrsas_undo_resources(dip, instance);
861 981
982 + mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
983 + ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
984 +
985 + mrsas_fm_fini(instance);
986 +
862 987 pci_config_teardown(&instance->pci_handle);
863 988 ddi_soft_state_free(mrsas_state, instance_no);
864 989
865 - con_log(CL_ANN, (CE_WARN,
866 - "mr_sas: return failure from mrsas_attach"));
990 + con_log(CL_ANN, (CE_WARN, "mr_sas: return failure from mrsas_attach"));
867 991
868 - cmn_err(CE_WARN, "mrsas_attach() return FAILURE instance_num %d", instance_no);
992 + cmn_err(CE_WARN, "mrsas_attach() return FAILURE instance_num %d",
993 + instance_no);
869 994
870 995 return (DDI_FAILURE);
871 996 }
872 997
873 998 /*
874 999 * getinfo - gets device information
875 1000 * @dip:
876 1001 * @cmd:
877 1002 * @arg:
878 1003 * @resultp:
879 1004 *
880 1005 * The system calls getinfo() to obtain configuration information that only
881 1006 * the driver knows. The mapping of minor numbers to device instance is
882 1007 * entirely under the control of the driver. The system sometimes needs to ask
883 1008 * the driver which device a particular dev_t represents.
884 1009 * Given the device number return the devinfo pointer from the scsi_device
885 1010 * structure.
886 1011 */
887 1012 /*ARGSUSED*/
888 1013 static int
889 1014 mrsas_getinfo(dev_info_t *dip, ddi_info_cmd_t cmd, void *arg, void **resultp)
890 1015 {
891 1016 int rval;
892 1017 int mrsas_minor = getminor((dev_t)arg);
893 1018
894 1019 struct mrsas_instance *instance;
895 1020
896 1021 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
897 1022
898 1023 switch (cmd) {
899 1024 case DDI_INFO_DEVT2DEVINFO:
900 1025 instance = (struct mrsas_instance *)
901 1026 ddi_get_soft_state(mrsas_state,
902 1027 MINOR2INST(mrsas_minor));
903 1028
904 1029 if (instance == NULL) {
905 1030 *resultp = NULL;
906 1031 rval = DDI_FAILURE;
907 1032 } else {
908 1033 *resultp = instance->dip;
909 1034 rval = DDI_SUCCESS;
910 1035 }
911 1036 break;
912 1037 case DDI_INFO_DEVT2INSTANCE:
913 1038 *resultp = (void *)(intptr_t)
914 1039 (MINOR2INST(getminor((dev_t)arg)));
915 1040 rval = DDI_SUCCESS;
916 1041 break;
917 1042 default:
918 1043 *resultp = NULL;
919 1044 rval = DDI_FAILURE;
920 1045 }
921 1046
922 1047 return (rval);
923 1048 }
924 1049
925 1050 /*
926 1051 * detach - detaches a device from the system
927 1052 * @dip: pointer to the device's dev_info structure
928 1053 * @cmd: type of detach
929 1054 *
930 1055 * A driver's detach() entry point is called to detach an instance of a device
931 1056 * that is bound to the driver. The entry point is called with the instance of
932 1057 * the device node to be detached and with DDI_DETACH, which is specified as
933 1058 * the cmd argument to the entry point.
934 1059 * This routine is called during driver unload. We free all the allocated
935 1060 * resources and call the corresponding LLD so that it can also release all
936 1061 * its resources.
937 1062 */
938 1063 static int
939 1064 mrsas_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
940 1065 {
941 1066 int instance_no;
942 1067
943 1068 struct mrsas_instance *instance;
944 1069
945 1070 con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
946 1071
947 1072
948 1073 /* CONSTCOND */
949 1074 ASSERT(NO_COMPETING_THREADS);
950 1075
951 1076 instance_no = ddi_get_instance(dip);
952 1077
953 1078 instance = (struct mrsas_instance *)ddi_get_soft_state(mrsas_state,
954 1079 instance_no);
955 1080
956 1081 if (!instance) {
957 1082 cmn_err(CE_WARN,
958 1083 "mr_sas:%d could not get instance in detach",
959 1084 instance_no);
960 1085
961 1086 return (DDI_FAILURE);
962 1087 }
963 1088
964 1089 con_log(CL_ANN, (CE_NOTE,
965 1090 "mr_sas%d: detaching device 0x%4x:0x%4x:0x%4x:0x%4x",
966 1091 instance_no, instance->vendor_id, instance->device_id,
967 1092 instance->subsysvid, instance->subsysid));
968 1093
969 1094 switch (cmd) {
970 1095 case DDI_DETACH:
971 1096 con_log(CL_ANN, (CE_NOTE,
972 1097 "mrsas_detach: DDI_DETACH"));
973 1098
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974 1099 mutex_enter(&instance->config_dev_mtx);
975 1100 if (instance->timeout_id != (timeout_id_t)-1) {
976 1101 mutex_exit(&instance->config_dev_mtx);
977 1102 (void) untimeout(instance->timeout_id);
978 1103 instance->timeout_id = (timeout_id_t)-1;
979 1104 mutex_enter(&instance->config_dev_mtx);
980 1105 instance->unroll.timer = 0;
981 1106 }
982 1107 mutex_exit(&instance->config_dev_mtx);
983 1108
984 - if(instance->unroll.tranSetup == 1) {
1109 + if (instance->unroll.tranSetup == 1) {
985 1110 if (scsi_hba_detach(dip) != DDI_SUCCESS) {
986 1111 cmn_err(CE_WARN,
987 - "mr_sas2%d: failed to detach", instance_no);
1112 + "mr_sas2%d: failed to detach",
1113 + instance_no);
988 1114 return (DDI_FAILURE);
989 1115 }
990 1116 instance->unroll.tranSetup = 0;
991 - con_log(CL_ANN1, (CE_CONT, "scsi_hba_dettach() done."));
1117 + con_log(CL_ANN1,
1118 + (CE_CONT, "scsi_hba_dettach() done."));
992 1119 }
993 1120
994 1121 flush_cache(instance);
995 1122
996 1123 mrsas_undo_resources(dip, instance);
997 1124
1125 + mrsas_fm_fini(instance);
1126 +
998 1127 pci_config_teardown(&instance->pci_handle);
999 1128 ddi_soft_state_free(mrsas_state, instance_no);
1000 1129 break;
1001 1130
1002 1131 case DDI_PM_SUSPEND:
1003 1132 con_log(CL_ANN, (CE_NOTE,
1004 1133 "mrsas_detach: DDI_PM_SUSPEND"));
1005 1134
1006 1135 break;
1007 1136 case DDI_SUSPEND:
1008 1137 con_log(CL_ANN, (CE_NOTE,
1009 1138 "mrsas_detach: DDI_SUSPEND"));
1010 1139
1011 1140 break;
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1012 1141 default:
1013 1142 con_log(CL_ANN, (CE_WARN,
1014 1143 "invalid detach command:0x%x", cmd));
1015 1144 return (DDI_FAILURE);
1016 1145 }
1017 1146
1018 1147 return (DDI_SUCCESS);
1019 1148 }
1020 1149
1021 1150
1022 -static int
1023 -mrsas_undo_resources (dev_info_t *dip, struct mrsas_instance *instance)
1151 +static void
1152 +mrsas_undo_resources(dev_info_t *dip, struct mrsas_instance *instance)
1024 1153 {
1025 1154 int instance_no;
1026 1155
1027 1156 con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1028 1157
1029 1158
1030 1159 instance_no = ddi_get_instance(dip);
1031 1160
1032 1161
1033 - if(instance->unroll.ioctl == 1) {
1162 + if (instance->unroll.ioctl == 1) {
1034 1163 ddi_remove_minor_node(dip, instance->iocnode);
1035 1164 instance->unroll.ioctl = 0;
1036 1165 }
1037 1166
1038 - if(instance->unroll.scsictl == 1) {
1167 + if (instance->unroll.scsictl == 1) {
1039 1168 ddi_remove_minor_node(dip, "scsi");
1040 1169 instance->unroll.scsictl = 0;
1041 1170 }
1042 1171
1043 - if(instance->unroll.devctl == 1) {
1172 + if (instance->unroll.devctl == 1) {
1044 1173 ddi_remove_minor_node(dip, "devctl");
1045 1174 instance->unroll.devctl = 0;
1046 1175 }
1047 1176
1048 - if(instance->unroll.tranSetup == 1) {
1177 + if (instance->unroll.tranSetup == 1) {
1049 1178 if (scsi_hba_detach(dip) != DDI_SUCCESS) {
1050 1179 cmn_err(CE_WARN,
1051 - "mr_sas2%d: failed to detach", instance_no);
1052 - return (DDI_FAILURE);
1180 + "mr_sas2%d: failed to detach", instance_no);
1181 + return; /* DDI_FAILURE */
1053 1182 }
1054 1183 instance->unroll.tranSetup = 0;
1055 - con_log(CL_ANN1, (CE_CONT, "scsi_hba_dettach() done."));
1184 + con_log(CL_ANN1, (CE_CONT, "scsi_hba_dettach() done."));
1056 1185 }
1057 1186
1058 - if(instance->unroll.tran == 1) {
1187 + if (instance->unroll.tran == 1) {
1059 1188 scsi_hba_tran_free(instance->tran);
1060 1189 instance->unroll.tran = 0;
1061 1190 con_log(CL_ANN1, (CE_CONT, "scsi_hba_tran_free() done."));
1062 1191 }
1063 1192
1064 - if(instance->unroll.syncCmd == 1) {
1065 - if(instance->tbolt) {
1066 - if (abort_syncmap_cmd(instance, instance->map_update_cmd))
1193 + if (instance->unroll.syncCmd == 1) {
1194 + if (instance->tbolt) {
1195 + if (abort_syncmap_cmd(instance,
1196 + instance->map_update_cmd)) {
1067 1197 cmn_err(CE_WARN, "mrsas_detach: "
1068 - "failed to abort previous syncmap command");
1198 + "failed to abort previous syncmap command");
1199 + }
1069 1200
1070 1201 instance->unroll.syncCmd = 0;
1071 1202 con_log(CL_ANN1, (CE_CONT, "sync cmd aborted, done."));
1072 1203 }
1073 1204 }
1074 1205
1075 - if(instance->unroll.aenPend == 1) {
1076 - if (abort_aen_cmd(instance, instance->aen_cmd))
1206 + if (instance->unroll.aenPend == 1) {
1207 + if (abort_aen_cmd(instance, instance->aen_cmd))
1077 1208 cmn_err(CE_WARN, "mrsas_detach: "
1078 - "failed to abort prevous AEN command");
1209 + "failed to abort prevous AEN command");
1079 1210
1080 1211 instance->unroll.aenPend = 0;
1081 1212 con_log(CL_ANN1, (CE_CONT, "aen cmd aborted, done."));
1082 - /*This means the controller is fully initialzed and running */
1083 - // shutdown_controller();Shutdown should be a last command to controller.
1213 + /* This means the controller is fully initialized and running */
1214 + /* Shutdown should be a last command to controller. */
1215 + /* shutdown_controller(); */
1084 1216 }
1085 1217
1086 1218
1087 - if(instance->unroll.timer == 1) {
1088 - if (instance->timeout_id != (timeout_id_t)-1) {
1219 + if (instance->unroll.timer == 1) {
1220 + if (instance->timeout_id != (timeout_id_t)-1) {
1089 1221 (void) untimeout(instance->timeout_id);
1090 1222 instance->timeout_id = (timeout_id_t)-1;
1091 1223
1092 1224 instance->unroll.timer = 0;
1093 1225 }
1094 1226 }
1095 1227
1096 1228 instance->func_ptr->disable_intr(instance);
1097 1229
1098 1230
1099 - if(instance->unroll.mutexs == 1) {
1231 + if (instance->unroll.mutexs == 1) {
1100 1232 mutex_destroy(&instance->cmd_pool_mtx);
1101 1233 mutex_destroy(&instance->app_cmd_pool_mtx);
1102 1234 mutex_destroy(&instance->cmd_pend_mtx);
1103 1235 mutex_destroy(&instance->completed_pool_mtx);
1104 1236 mutex_destroy(&instance->sync_map_mtx);
1105 1237 mutex_destroy(&instance->int_cmd_mtx);
1106 1238 cv_destroy(&instance->int_cmd_cv);
1107 1239 mutex_destroy(&instance->config_dev_mtx);
1108 1240 mutex_destroy(&instance->ocr_flags_mtx);
1109 1241 mutex_destroy(&instance->reg_write_mtx);
1110 1242
1111 1243 if (instance->tbolt) {
1112 1244 mutex_destroy(&instance->cmd_app_pool_mtx);
1113 1245 mutex_destroy(&instance->chip_mtx);
1114 1246 }
1115 1247
1116 1248 instance->unroll.mutexs = 0;
1117 - con_log(CL_ANN1, (CE_CONT, "Destroy mutex & cv, done."));
1249 + con_log(CL_ANN1, (CE_CONT, "Destroy mutex & cv, done."));
1118 1250 }
1119 1251
1120 1252
1121 1253 if (instance->unroll.soft_isr == 1) {
1122 1254 ddi_remove_softintr(instance->soft_intr_id);
1123 1255 instance->unroll.soft_isr = 0;
1124 1256 }
1125 1257
1126 - if(instance->unroll.intr == 1) {
1258 + if (instance->unroll.intr == 1) {
1127 1259 mrsas_rem_intrs(instance);
1128 1260 instance->unroll.intr = 0;
1129 1261 }
1130 -
1131 1262
1132 - if(instance->unroll.taskq == 1) {
1263 +
1264 + if (instance->unroll.taskq == 1) {
1133 1265 if (instance->taskq) {
1134 1266 ddi_taskq_destroy(instance->taskq);
1135 1267 instance->unroll.taskq = 0;
1136 1268 }
1137 1269
1138 1270 }
1139 -
1140 - /*free dma memory allocated for
1141 - cmds/frames/queues/driver version etc */
1142 - if(instance->unroll.verBuff == 1) {
1143 - mrsas_free_dma_obj(instance, instance->drv_ver_dma_obj);
1271 +
1272 + /*
1273 + * free dma memory allocated for
1274 + * cmds/frames/queues/driver version etc
1275 + */
1276 + if (instance->unroll.verBuff == 1) {
1277 + (void) mrsas_free_dma_obj(instance, instance->drv_ver_dma_obj);
1144 1278 instance->unroll.verBuff = 0;
1145 1279 }
1146 1280
1147 - if(instance->unroll.pdlist_buff == 1) {
1148 - if (instance->mr_tbolt_pd_list != NULL)
1281 + if (instance->unroll.pdlist_buff == 1) {
1282 + if (instance->mr_tbolt_pd_list != NULL) {
1149 1283 kmem_free(instance->mr_tbolt_pd_list,
1150 - MRSAS_TBOLT_GET_PD_MAX(instance) * sizeof (struct mrsas_tbolt_pd));
1284 + MRSAS_TBOLT_GET_PD_MAX(instance) *
1285 + sizeof (struct mrsas_tbolt_pd));
1286 + }
1151 1287
1152 1288 instance->mr_tbolt_pd_list = NULL;
1153 1289 instance->unroll.pdlist_buff = 0;
1154 1290 }
1155 1291
1156 - if(instance->unroll.ldlist_buff == 1) {
1157 - if (instance->mr_ld_list != NULL)
1292 + if (instance->unroll.ldlist_buff == 1) {
1293 + if (instance->mr_ld_list != NULL) {
1158 1294 kmem_free(instance->mr_ld_list, MRDRV_MAX_LD
1159 - * sizeof (struct mrsas_ld));
1295 + * sizeof (struct mrsas_ld));
1296 + }
1160 1297
1161 1298 instance->mr_ld_list = NULL;
1162 1299 instance->unroll.ldlist_buff = 0;
1163 1300 }
1164 1301
1165 1302 if (instance->tbolt) {
1166 - if(instance->unroll.alloc_space_mpi2 == 1) {
1303 + if (instance->unroll.alloc_space_mpi2 == 1) {
1167 1304 free_space_for_mpi2(instance);
1168 1305 instance->unroll.alloc_space_mpi2 = 0;
1169 1306 }
1170 1307 } else {
1171 - if(instance->unroll.alloc_space_mfi == 1) {
1308 + if (instance->unroll.alloc_space_mfi == 1) {
1172 1309 free_space_for_mfi(instance);
1173 1310 instance->unroll.alloc_space_mfi = 0;
1174 1311 }
1175 1312 }
1176 1313
1177 - if(instance->unroll.regs == 1) {
1314 + if (instance->unroll.regs == 1) {
1178 1315 ddi_regs_map_free(&instance->regmap_handle);
1179 1316 instance->unroll.regs = 0;
1180 - con_log(CL_ANN1, (CE_CONT, "ddi_regs_map_free() done."));
1317 + con_log(CL_ANN1, (CE_CONT, "ddi_regs_map_free() done."));
1181 1318 }
1182 -
1183 - return (DDI_SUCCESS);
1184 1319 }
1185 1320
1186 1321
1187 1322
1188 1323 /*
1189 1324 * ************************************************************************** *
1190 - * *
1191 - * common entry points - for character driver types *
1192 - * *
1325 + * *
1326 + * common entry points - for character driver types *
1327 + * *
1193 1328 * ************************************************************************** *
1194 1329 */
1195 1330 /*
1196 1331 * open - gets access to a device
1197 1332 * @dev:
1198 1333 * @openflags:
1199 1334 * @otyp:
1200 1335 * @credp:
1201 1336 *
1202 1337 * Access to a device by one or more application programs is controlled
1203 1338 * through the open() and close() entry points. The primary function of
1204 1339 * open() is to verify that the open request is allowed.
1205 1340 */
1206 -static int
1341 +static int
1207 1342 mrsas_open(dev_t *dev, int openflags, int otyp, cred_t *credp)
1208 1343 {
1209 1344 int rval = 0;
1210 1345
1211 1346 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1212 1347
1213 1348 /* Check root permissions */
1214 1349 if (drv_priv(credp) != 0) {
1215 1350 con_log(CL_ANN, (CE_WARN,
1216 1351 "mr_sas: Non-root ioctl access denied!"));
1217 1352 return (EPERM);
1218 1353 }
1219 1354
1220 1355 /* Verify we are being opened as a character device */
1221 1356 if (otyp != OTYP_CHR) {
1222 1357 con_log(CL_ANN, (CE_WARN,
1223 1358 "mr_sas: ioctl node must be a char node"));
1224 1359 return (EINVAL);
1225 1360 }
1226 1361
1227 1362 if (ddi_get_soft_state(mrsas_state, MINOR2INST(getminor(*dev)))
1228 1363 == NULL) {
1229 1364 return (ENXIO);
1230 1365 }
1231 1366
1232 1367 if (scsi_hba_open) {
1233 1368 rval = scsi_hba_open(dev, openflags, otyp, credp);
1234 1369 }
1235 1370
1236 1371 return (rval);
1237 1372 }
1238 1373
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1239 1374 /*
1240 1375 * close - gives up access to a device
1241 1376 * @dev:
1242 1377 * @openflags:
1243 1378 * @otyp:
1244 1379 * @credp:
1245 1380 *
1246 1381 * close() should perform any cleanup necessary to finish using the minor
1247 1382 * device, and prepare the device (and driver) to be opened again.
1248 1383 */
1249 -static int
1384 +static int
1250 1385 mrsas_close(dev_t dev, int openflags, int otyp, cred_t *credp)
1251 1386 {
1252 1387 int rval = 0;
1253 1388
1254 1389 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1255 1390
1256 1391 /* no need for locks! */
1257 1392
1258 1393 if (scsi_hba_close) {
1259 1394 rval = scsi_hba_close(dev, openflags, otyp, credp);
1260 1395 }
1261 1396
1262 1397 return (rval);
1263 1398 }
1264 1399
1265 1400 /*
1266 1401 * ioctl - performs a range of I/O commands for character drivers
1267 1402 * @dev:
1268 1403 * @cmd:
1269 1404 * @arg:
1270 1405 * @mode:
1271 1406 * @credp:
1272 1407 * @rvalp:
1273 1408 *
1274 1409 * ioctl() routine must make sure that user data is copied into or out of the
1275 1410 * kernel address space explicitly using copyin(), copyout(), ddi_copyin(),
1276 1411 * and ddi_copyout(), as appropriate.
1277 1412 * This is a wrapper routine to serialize access to the actual ioctl routine.
1278 1413 * ioctl() should return 0 on success, or the appropriate error number. The
1279 1414 * driver may also set the value returned to the calling process through rvalp.
1280 1415 */
1281 1416
1282 1417 static int
1283 1418 mrsas_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp,
1284 1419 int *rvalp)
1285 1420 {
1286 1421 int rval = 0;
1287 1422
1288 1423 struct mrsas_instance *instance;
1289 1424 struct mrsas_ioctl *ioctl;
1290 1425 struct mrsas_aen aen;
1291 1426 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1292 1427
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1293 1428 instance = ddi_get_soft_state(mrsas_state, MINOR2INST(getminor(dev)));
1294 1429
1295 1430 if (instance == NULL) {
1296 1431 /* invalid minor number */
1297 1432 con_log(CL_ANN, (CE_WARN, "mr_sas: adapter not found."));
1298 1433 return (ENXIO);
1299 1434 }
1300 1435
1301 1436 ioctl = (struct mrsas_ioctl *)kmem_zalloc(sizeof (struct mrsas_ioctl),
1302 1437 KM_SLEEP);
1303 - if (ioctl == NULL) {
1304 - /* Failed to allocate memory for ioctl */
1305 - con_log(CL_ANN, (CE_WARN, "mr_sas_ioctl: failed to allocate memory for ioctl"));
1306 - return (ENXIO);
1307 - }
1438 + ASSERT(ioctl);
1308 1439
1309 1440 switch ((uint_t)cmd) {
1310 1441 case MRSAS_IOCTL_FIRMWARE:
1311 1442 if (ddi_copyin((void *)arg, ioctl,
1312 1443 sizeof (struct mrsas_ioctl), mode)) {
1313 1444 con_log(CL_ANN, (CE_WARN, "mrsas_ioctl: "
1314 1445 "ERROR IOCTL copyin"));
1315 1446 kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1316 1447 return (EFAULT);
1317 1448 }
1318 1449
1319 1450 if (ioctl->control_code == MRSAS_DRIVER_IOCTL_COMMON) {
1320 1451 rval = handle_drv_ioctl(instance, ioctl, mode);
1321 1452 } else {
1322 1453 rval = handle_mfi_ioctl(instance, ioctl, mode);
1323 1454 }
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1324 1455
1325 1456 if (ddi_copyout((void *)ioctl, (void *)arg,
1326 1457 (sizeof (struct mrsas_ioctl) - 1), mode)) {
1327 1458 con_log(CL_ANN, (CE_WARN,
1328 1459 "mrsas_ioctl: copy_to_user failed"));
1329 1460 rval = 1;
1330 1461 }
1331 1462
1332 1463 break;
1333 1464 case MRSAS_IOCTL_AEN:
1334 - con_log(CL_ANN, (CE_NOTE,
1335 - "mrsas_ioctl: IOCTL Register AEN.\n"));
1336 -
1337 1465 if (ddi_copyin((void *) arg, &aen,
1338 1466 sizeof (struct mrsas_aen), mode)) {
1339 1467 con_log(CL_ANN, (CE_WARN,
1340 1468 "mrsas_ioctl: ERROR AEN copyin"));
1341 1469 kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1342 1470 return (EFAULT);
1343 1471 }
1344 1472
1345 1473 rval = handle_mfi_aen(instance, &aen);
1346 1474
1347 1475 if (ddi_copyout((void *) &aen, (void *)arg,
1348 1476 sizeof (struct mrsas_aen), mode)) {
1349 1477 con_log(CL_ANN, (CE_WARN,
1350 1478 "mrsas_ioctl: copy_to_user failed"));
1351 1479 rval = 1;
1352 1480 }
1353 1481
1354 1482 break;
1355 1483 default:
1356 1484 rval = scsi_hba_ioctl(dev, cmd, arg,
1357 1485 mode, credp, rvalp);
1358 1486
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1359 1487 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_ioctl: "
1360 1488 "scsi_hba_ioctl called, ret = %x.", rval));
1361 1489 }
1362 1490
1363 1491 kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1364 1492 return (rval);
1365 1493 }
1366 1494
1367 1495 /*
1368 1496 * ************************************************************************** *
1369 - * *
1370 - * common entry points - for block driver types *
1371 - * *
1497 + * *
1498 + * common entry points - for block driver types *
1499 + * *
1372 1500 * ************************************************************************** *
1373 1501 */
1502 +#ifdef __sparc
1374 1503 /*
1375 1504 * reset - TBD
1376 1505 * @dip:
1377 1506 * @cmd:
1378 1507 *
1379 1508 * TBD
1380 1509 */
1381 1510 /*ARGSUSED*/
1382 1511 static int
1383 1512 mrsas_reset(dev_info_t *dip, ddi_reset_cmd_t cmd)
1384 1513 {
1385 1514 int instance_no;
1386 1515
1387 1516 struct mrsas_instance *instance;
1388 1517
1389 1518 instance_no = ddi_get_instance(dip);
1390 1519 instance = (struct mrsas_instance *)ddi_get_soft_state
1391 1520 (mrsas_state, instance_no);
1392 1521
1393 1522 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1394 1523
1395 1524 if (!instance) {
1396 1525 con_log(CL_ANN, (CE_WARN, "mr_sas:%d could not get adapter "
1397 1526 "in reset", instance_no));
1398 1527 return (DDI_FAILURE);
1399 1528 }
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1400 1529
1401 1530 instance->func_ptr->disable_intr(instance);
1402 1531
1403 1532 con_log(CL_ANN1, (CE_CONT, "flushing cache for instance %d",
1404 1533 instance_no));
1405 1534
1406 1535 flush_cache(instance);
1407 1536
1408 1537 return (DDI_SUCCESS);
1409 1538 }
1410 -
1411 -
1539 +#else /* __sparc */
1412 1540 /*ARGSUSED*/
1413 -int
1541 +static int
1414 1542 mrsas_quiesce(dev_info_t *dip)
1415 1543 {
1416 1544 int instance_no;
1417 1545
1418 1546 struct mrsas_instance *instance;
1419 1547
1420 1548 instance_no = ddi_get_instance(dip);
1421 1549 instance = (struct mrsas_instance *)ddi_get_soft_state
1422 1550 (mrsas_state, instance_no);
1423 1551
1424 1552 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1425 1553
1426 1554 if (!instance) {
1427 1555 con_log(CL_ANN1, (CE_WARN, "mr_sas:%d could not get adapter "
1428 1556 "in quiesce", instance_no));
1429 1557 return (DDI_FAILURE);
1430 1558 }
1431 1559 if (instance->deadadapter || instance->adapterresetinprogress) {
1432 1560 con_log(CL_ANN1, (CE_WARN, "mr_sas:%d adapter is not in "
1433 1561 "healthy state", instance_no));
1434 1562 return (DDI_FAILURE);
1435 1563 }
1436 1564
1437 1565 if (abort_aen_cmd(instance, instance->aen_cmd)) {
1438 1566 con_log(CL_ANN1, (CE_WARN, "mrsas_quiesce: "
1439 1567 "failed to abort prevous AEN command QUIESCE"));
1440 1568 }
1441 1569
1442 1570 if (instance->tbolt) {
1443 1571 if (abort_syncmap_cmd(instance,
1444 1572 instance->map_update_cmd)) {
1445 1573 cmn_err(CE_WARN,
1446 1574 "mrsas_detach: failed to abort "
1447 1575 "previous syncmap command");
1448 1576 return (DDI_FAILURE);
1449 1577 }
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1450 1578 }
1451 1579
1452 1580 instance->func_ptr->disable_intr(instance);
1453 1581
1454 1582 con_log(CL_ANN1, (CE_CONT, "flushing cache for instance %d",
1455 1583 instance_no));
1456 1584
1457 1585 flush_cache(instance);
1458 1586
1459 1587 if (wait_for_outstanding(instance)) {
1460 - con_log(CL_ANN1, (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
1588 + con_log(CL_ANN1,
1589 + (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
1461 1590 return (DDI_FAILURE);
1462 1591 }
1463 1592 return (DDI_SUCCESS);
1464 1593 }
1594 +#endif /* __sparc */
1465 1595
1466 1596 /*
1467 1597 * ************************************************************************** *
1468 - * *
1469 - * entry points (SCSI HBA) *
1470 - * *
1598 + * *
1599 + * entry points (SCSI HBA) *
1600 + * *
1471 1601 * ************************************************************************** *
1472 1602 */
1473 1603 /*
1474 1604 * tran_tgt_init - initialize a target device instance
1475 1605 * @hba_dip:
1476 1606 * @tgt_dip:
1477 1607 * @tran:
1478 1608 * @sd:
1479 1609 *
1480 1610 * The tran_tgt_init() entry point enables the HBA to allocate and initialize
1481 1611 * any per-target resources. tran_tgt_init() also enables the HBA to qualify
1482 1612 * the device's address as valid and supportable for that particular HBA.
1483 1613 * By returning DDI_FAILURE, the instance of the target driver for that device
1484 1614 * is not probed or attached.
1485 1615 */
1486 1616 /*ARGSUSED*/
1487 1617 static int
1488 1618 mrsas_tran_tgt_init(dev_info_t *hba_dip, dev_info_t *tgt_dip,
1489 1619 scsi_hba_tran_t *tran, struct scsi_device *sd)
1490 1620 {
1491 1621 struct mrsas_instance *instance;
1492 1622 uint16_t tgt = sd->sd_address.a_target;
1493 1623 uint8_t lun = sd->sd_address.a_lun;
1494 1624 dev_info_t *child = NULL;
1495 1625
1496 1626 con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init target %d lun %d",
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1497 1627 tgt, lun));
1498 1628
1499 1629 instance = ADDR2MR(&sd->sd_address);
1500 1630
1501 1631 if (ndi_dev_is_persistent_node(tgt_dip) == 0) {
1502 1632 /*
1503 1633 * If no persistent node exists, we don't allow .conf node
1504 1634 * to be created.
1505 1635 */
1506 1636 if ((child = mrsas_find_child(instance, tgt, lun)) != NULL) {
1507 - con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init find child ="
1637 + con_log(CL_DLEVEL2,
1638 + (CE_NOTE, "mrsas_tgt_init find child ="
1508 1639 " %p t = %d l = %d", (void *)child, tgt, lun));
1509 1640 if (ndi_merge_node(tgt_dip, mrsas_name_node) !=
1510 1641 DDI_SUCCESS)
1511 1642 /* Create this .conf node */
1512 1643 return (DDI_SUCCESS);
1513 1644 }
1514 1645 con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init in ndi_per "
1515 1646 "DDI_FAILURE t = %d l = %d", tgt, lun));
1516 1647 return (DDI_FAILURE);
1517 1648
1518 1649 }
1519 1650
1520 1651 con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init dev_dip %p tgt_dip %p",
1521 1652 (void *)instance->mr_ld_list[tgt].dip, (void *)tgt_dip));
1522 1653
1523 1654 if (tgt < MRDRV_MAX_LD && lun == 0) {
1524 1655 if (instance->mr_ld_list[tgt].dip == NULL &&
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1525 1656 strcmp(ddi_driver_name(sd->sd_dev), "sd") == 0) {
1526 1657 mutex_enter(&instance->config_dev_mtx);
1527 1658 instance->mr_ld_list[tgt].dip = tgt_dip;
1528 1659 instance->mr_ld_list[tgt].lun_type = MRSAS_LD_LUN;
1529 1660 instance->mr_ld_list[tgt].flag = MRDRV_TGT_VALID;
1530 1661 mutex_exit(&instance->config_dev_mtx);
1531 1662 }
1532 1663 }
1533 1664
1534 1665 #ifdef PDSUPPORT
1535 - else if(instance->tbolt) {
1666 + else if (instance->tbolt) {
1536 1667 if (instance->mr_tbolt_pd_list[tgt].dip == NULL) {
1537 1668 mutex_enter(&instance->config_dev_mtx);
1538 1669 instance->mr_tbolt_pd_list[tgt].dip = tgt_dip;
1539 - instance->mr_tbolt_pd_list[tgt].flag =
1670 + instance->mr_tbolt_pd_list[tgt].flag =
1540 1671 MRDRV_TGT_VALID;
1541 1672 mutex_exit(&instance->config_dev_mtx);
1542 1673 con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_tgt_init:"
1543 1674 "t%xl%x", tgt, lun));
1544 1675 }
1545 1676 }
1546 1677 #endif
1547 1678
1548 1679 return (DDI_SUCCESS);
1549 1680 }
1550 1681
1551 1682 /*ARGSUSED*/
1552 1683 static void
1553 1684 mrsas_tran_tgt_free(dev_info_t *hba_dip, dev_info_t *tgt_dip,
1554 1685 scsi_hba_tran_t *hba_tran, struct scsi_device *sd)
1555 1686 {
1556 1687 struct mrsas_instance *instance;
1557 1688 int tgt = sd->sd_address.a_target;
1558 1689 int lun = sd->sd_address.a_lun;
1559 1690
1560 1691 instance = ADDR2MR(&sd->sd_address);
1561 1692
1562 1693 con_log(CL_DLEVEL2, (CE_NOTE, "tgt_free t = %d l = %d", tgt, lun));
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1563 1694
1564 1695 if (tgt < MRDRV_MAX_LD && lun == 0) {
1565 1696 if (instance->mr_ld_list[tgt].dip == tgt_dip) {
1566 1697 mutex_enter(&instance->config_dev_mtx);
1567 1698 instance->mr_ld_list[tgt].dip = NULL;
1568 1699 mutex_exit(&instance->config_dev_mtx);
1569 1700 }
1570 1701 }
1571 1702
1572 1703 #ifdef PDSUPPORT
1573 - else if(instance->tbolt) {
1704 + else if (instance->tbolt) {
1574 1705 mutex_enter(&instance->config_dev_mtx);
1575 1706 instance->mr_tbolt_pd_list[tgt].dip = NULL;
1576 1707 mutex_exit(&instance->config_dev_mtx);
1577 1708 con_log(CL_ANN1, (CE_NOTE, "tgt_free: Setting dip = NULL"
1578 1709 "for tgt:%x", tgt));
1579 1710 }
1580 1711 #endif
1581 -
1712 +
1582 1713 }
1583 1714
1584 1715 dev_info_t *
1585 1716 mrsas_find_child(struct mrsas_instance *instance, uint16_t tgt, uint8_t lun)
1586 1717 {
1587 1718 dev_info_t *child = NULL;
1588 1719 char addr[SCSI_MAXNAMELEN];
1589 1720 char tmp[MAXNAMELEN];
1590 1721
1591 1722 (void) sprintf(addr, "%x,%x", tgt, lun);
1592 1723 for (child = ddi_get_child(instance->dip); child;
1593 1724 child = ddi_get_next_sibling(child)) {
1594 1725
1595 1726 if (ndi_dev_is_persistent_node(child) == 0) {
1596 1727 continue;
1597 1728 }
1598 1729
1599 1730 if (mrsas_name_node(child, tmp, MAXNAMELEN) !=
1600 1731 DDI_SUCCESS) {
1601 1732 continue;
1602 1733 }
1603 1734
1604 1735 if (strcmp(addr, tmp) == 0) {
1605 1736 break;
1606 1737 }
1607 1738 }
1608 1739 con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_find_child: return child = %p",
1609 1740 (void *)child));
1610 1741 return (child);
1611 1742 }
1612 1743
1613 1744 /*
1614 1745 * mrsas_name_node -
1615 1746 * @dip:
1616 1747 * @name:
1617 1748 * @len:
1618 1749 */
1619 1750 static int
1620 1751 mrsas_name_node(dev_info_t *dip, char *name, int len)
1621 1752 {
1622 1753 int tgt, lun;
1623 1754
1624 1755 tgt = ddi_prop_get_int(DDI_DEV_T_ANY, dip,
1625 1756 DDI_PROP_DONTPASS, "target", -1);
1626 1757 con_log(CL_DLEVEL2, (CE_NOTE,
1627 1758 "mrsas_name_node: dip %p tgt %d", (void *)dip, tgt));
1628 1759 if (tgt == -1) {
1629 1760 return (DDI_FAILURE);
1630 1761 }
1631 1762 lun = ddi_prop_get_int(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS,
1632 1763 "lun", -1);
1633 1764 con_log(CL_DLEVEL2,
1634 1765 (CE_NOTE, "mrsas_name_node: tgt %d lun %d", tgt, lun));
1635 1766 if (lun == -1) {
1636 1767 return (DDI_FAILURE);
1637 1768 }
1638 1769 (void) snprintf(name, len, "%x,%x", tgt, lun);
1639 1770 return (DDI_SUCCESS);
1640 1771 }
1641 1772
1642 1773 /*
1643 1774 * tran_init_pkt - allocate & initialize a scsi_pkt structure
1644 1775 * @ap:
1645 1776 * @pkt:
1646 1777 * @bp:
1647 1778 * @cmdlen:
1648 1779 * @statuslen:
1649 1780 * @tgtlen:
1650 1781 * @flags:
1651 1782 * @callback:
1652 1783 *
1653 1784 * The tran_init_pkt() entry point allocates and initializes a scsi_pkt
1654 1785 * structure and DMA resources for a target driver request. The
1655 1786 * tran_init_pkt() entry point is called when the target driver calls the
1656 1787 * SCSA function scsi_init_pkt(). Each call of the tran_init_pkt() entry point
1657 1788 * is a request to perform one or more of three possible services:
1658 1789 * - allocation and initialization of a scsi_pkt structure
1659 1790 * - allocation of DMA resources for data transfer
1660 1791 * - reallocation of DMA resources for the next portion of the data transfer
1661 1792 */
1662 1793 static struct scsi_pkt *
1663 1794 mrsas_tran_init_pkt(struct scsi_address *ap, register struct scsi_pkt *pkt,
1664 1795 struct buf *bp, int cmdlen, int statuslen, int tgtlen,
1665 1796 int flags, int (*callback)(), caddr_t arg)
1666 1797 {
1667 1798 struct scsa_cmd *acmd;
1668 1799 struct mrsas_instance *instance;
1669 1800 struct scsi_pkt *new_pkt;
1670 1801
1671 1802 con_log(CL_DLEVEL1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1672 1803
1673 1804 instance = ADDR2MR(ap);
1674 1805
1675 1806 /* step #1 : pkt allocation */
1676 1807 if (pkt == NULL) {
1677 1808 pkt = scsi_hba_pkt_alloc(instance->dip, ap, cmdlen, statuslen,
1678 1809 tgtlen, sizeof (struct scsa_cmd), callback, arg);
1679 1810 if (pkt == NULL) {
1680 1811 return (NULL);
1681 1812 }
1682 1813
1683 1814 acmd = PKT2CMD(pkt);
1684 1815
1685 1816 /*
1686 1817 * Initialize the new pkt - we redundantly initialize
1687 1818 * all the fields for illustrative purposes.
1688 1819 */
1689 1820 acmd->cmd_pkt = pkt;
1690 1821 acmd->cmd_flags = 0;
1691 1822 acmd->cmd_scblen = statuslen;
1692 1823 acmd->cmd_cdblen = cmdlen;
1693 1824 acmd->cmd_dmahandle = NULL;
1694 1825 acmd->cmd_ncookies = 0;
1695 1826 acmd->cmd_cookie = 0;
1696 1827 acmd->cmd_cookiecnt = 0;
1697 1828 acmd->cmd_nwin = 0;
1698 1829
1699 1830 pkt->pkt_address = *ap;
1700 1831 pkt->pkt_comp = (void (*)())NULL;
1701 1832 pkt->pkt_flags = 0;
1702 1833 pkt->pkt_time = 0;
1703 1834 pkt->pkt_resid = 0;
1704 1835 pkt->pkt_state = 0;
1705 1836 pkt->pkt_statistics = 0;
1706 1837 pkt->pkt_reason = 0;
1707 1838 new_pkt = pkt;
1708 1839 } else {
1709 1840 acmd = PKT2CMD(pkt);
1710 1841 new_pkt = NULL;
1711 1842 }
1712 1843
1713 1844 /* step #2 : dma allocation/move */
1714 1845 if (bp && bp->b_bcount != 0) {
1715 1846 if (acmd->cmd_dmahandle == NULL) {
1716 1847 if (mrsas_dma_alloc(instance, pkt, bp, flags,
1717 1848 callback) == DDI_FAILURE) {
1718 1849 if (new_pkt) {
1719 1850 scsi_hba_pkt_free(ap, new_pkt);
1720 1851 }
1721 1852 return ((struct scsi_pkt *)NULL);
1722 1853 }
1723 1854 } else {
1724 1855 if (mrsas_dma_move(instance, pkt, bp) == DDI_FAILURE) {
1725 1856 return ((struct scsi_pkt *)NULL);
1726 1857 }
1727 1858 }
1728 1859 }
1729 1860
1730 1861 return (pkt);
1731 1862 }
1732 1863
1733 1864 /*
1734 1865 * tran_start - transport a SCSI command to the addressed target
1735 1866 * @ap:
1736 1867 * @pkt:
1737 1868 *
1738 1869 * The tran_start() entry point for a SCSI HBA driver is called to transport a
1739 1870 * SCSI command to the addressed target. The SCSI command is described
1740 1871 * entirely within the scsi_pkt structure, which the target driver allocated
1741 1872 * through the HBA driver's tran_init_pkt() entry point. If the command
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1742 1873 * involves a data transfer, DMA resources must also have been allocated for
1743 1874 * the scsi_pkt structure.
1744 1875 *
1745 1876 * Return Values :
1746 1877 * TRAN_BUSY - request queue is full, no more free scbs
1747 1878 * TRAN_ACCEPT - pkt has been submitted to the instance
1748 1879 */
1749 1880 static int
1750 1881 mrsas_tran_start(struct scsi_address *ap, register struct scsi_pkt *pkt)
1751 1882 {
1752 - uchar_t cmd_done = 0;
1883 + uchar_t cmd_done = 0;
1753 1884
1754 1885 struct mrsas_instance *instance = ADDR2MR(ap);
1755 1886 struct mrsas_cmd *cmd;
1756 1887
1757 1888 con_log(CL_DLEVEL1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1758 1889 if (instance->deadadapter == 1) {
1759 1890 con_log(CL_ANN1, (CE_WARN,
1760 1891 "mrsas_tran_start: return TRAN_FATAL_ERROR "
1761 1892 "for IO, as the HBA doesnt take any more IOs"));
1762 1893 if (pkt) {
1763 1894 pkt->pkt_reason = CMD_DEV_GONE;
1764 1895 pkt->pkt_statistics = STAT_DISCON;
1765 1896 }
1766 1897 return (TRAN_FATAL_ERROR);
1767 1898 }
1768 1899
1769 1900 if (instance->adapterresetinprogress) {
1770 1901 con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_start: Reset flag set, "
1771 1902 "returning mfi_pkt and setting TRAN_BUSY\n"));
1772 1903 return (TRAN_BUSY);
1773 1904 }
1774 1905
1775 1906 con_log(CL_ANN1, (CE_CONT, "chkpnt:%s:%d:SCSI CDB[0]=0x%x time:%x",
1776 1907 __func__, __LINE__, pkt->pkt_cdbp[0], pkt->pkt_time));
1777 1908
1778 1909 pkt->pkt_reason = CMD_CMPLT;
1779 1910 *pkt->pkt_scbp = STATUS_GOOD; /* clear arq scsi_status */
1780 1911
1781 1912 cmd = build_cmd(instance, ap, pkt, &cmd_done);
1782 1913
1783 1914 /*
1784 1915 * Check if the command is already completed by the mrsas_build_cmd()
1785 1916 * routine. In which case the busy_flag would be clear and scb will be
1786 1917 * NULL and appropriate reason provided in pkt_reason field
1787 1918 */
1788 1919 if (cmd_done) {
1789 1920 pkt->pkt_reason = CMD_CMPLT;
1790 1921 pkt->pkt_scbp[0] = STATUS_GOOD;
1791 1922 pkt->pkt_state |= STATE_GOT_BUS | STATE_GOT_TARGET
1792 1923 | STATE_SENT_CMD;
1793 1924 if (((pkt->pkt_flags & FLAG_NOINTR) == 0) && pkt->pkt_comp) {
1794 1925 (*pkt->pkt_comp)(pkt);
1795 1926 }
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1796 1927
1797 1928 return (TRAN_ACCEPT);
1798 1929 }
1799 1930
1800 1931 if (cmd == NULL) {
1801 1932 return (TRAN_BUSY);
1802 1933 }
1803 1934
1804 1935 if ((pkt->pkt_flags & FLAG_NOINTR) == 0) {
1805 1936 if (instance->fw_outstanding > instance->max_fw_cmds) {
1806 - cmn_err(CE_WARN, "mr_sas:Firmware BUSY, fw_outstanding(0x%X) > max_fw_cmds(0x%X)",
1807 - instance->fw_outstanding, instance->max_fw_cmds );
1937 + con_log(CL_ANN, (CE_CONT, "mr_sas:Firmware busy"));
1938 + DTRACE_PROBE2(start_tran_err,
1939 + uint16_t, instance->fw_outstanding,
1940 + uint16_t, instance->max_fw_cmds);
1808 1941 return_mfi_pkt(instance, cmd);
1809 1942 return (TRAN_BUSY);
1810 1943 }
1811 1944
1812 1945 /* Synchronize the Cmd frame for the controller */
1813 1946 (void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle, 0, 0,
1814 1947 DDI_DMA_SYNC_FORDEV);
1815 1948 con_log(CL_ANN, (CE_CONT, "issue_cmd_ppc: SCSI CDB[0]=0x%x"
1816 1949 "cmd->index:%x\n", pkt->pkt_cdbp[0], cmd->index));
1817 1950 instance->func_ptr->issue_cmd(cmd, instance);
1818 1951
1819 1952 } else {
1820 1953 struct mrsas_header *hdr = &cmd->frame->hdr;
1821 1954
1955 + instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd);
1822 1956
1823 - instance->func_ptr-> issue_cmd_in_poll_mode(instance, cmd);
1824 -
1825 1957 pkt->pkt_reason = CMD_CMPLT;
1826 1958 pkt->pkt_statistics = 0;
1827 1959 pkt->pkt_state |= STATE_XFERRED_DATA | STATE_GOT_STATUS;
1828 1960
1829 1961 switch (ddi_get8(cmd->frame_dma_obj.acc_handle,
1830 1962 &hdr->cmd_status)) {
1831 1963 case MFI_STAT_OK:
1832 1964 pkt->pkt_scbp[0] = STATUS_GOOD;
1833 1965 break;
1834 1966
1835 1967 case MFI_STAT_SCSI_DONE_WITH_ERROR:
1836 1968 con_log(CL_ANN, (CE_CONT,
1837 - "mrsas_tran_start: scsi done with error"));
1969 + "mrsas_tran_start: scsi done with error"));
1838 1970 pkt->pkt_reason = CMD_CMPLT;
1839 1971 pkt->pkt_statistics = 0;
1840 1972
1841 1973 ((struct scsi_status *)pkt->pkt_scbp)->sts_chk = 1;
1842 1974 break;
1843 1975
1844 1976 case MFI_STAT_DEVICE_NOT_FOUND:
1845 1977 con_log(CL_ANN, (CE_CONT,
1846 - "mrsas_tran_start: device not found error"));
1978 + "mrsas_tran_start: device not found error"));
1847 1979 pkt->pkt_reason = CMD_DEV_GONE;
1848 1980 pkt->pkt_statistics = STAT_DISCON;
1849 1981 break;
1850 1982
1851 1983 default:
1852 1984 ((struct scsi_status *)pkt->pkt_scbp)->sts_busy = 1;
1853 1985 }
1854 1986
1987 + (void) mrsas_common_check(instance, cmd);
1988 + DTRACE_PROBE2(start_nointr_done, uint8_t, hdr->cmd,
1989 + uint8_t, hdr->cmd_status);
1855 1990 return_mfi_pkt(instance, cmd);
1856 1991
1857 1992 if (pkt->pkt_comp) {
1858 1993 (*pkt->pkt_comp)(pkt);
1859 1994 }
1860 1995
1861 1996 }
1862 1997
1863 1998 return (TRAN_ACCEPT);
1864 1999 }
1865 2000
1866 2001 /*
1867 2002 * tran_abort - Abort any commands that are currently in transport
1868 2003 * @ap:
1869 2004 * @pkt:
1870 2005 *
1871 2006 * The tran_abort() entry point for a SCSI HBA driver is called to abort any
1872 2007 * commands that are currently in transport for a particular target. This entry
1873 2008 * point is called when a target driver calls scsi_abort(). The tran_abort()
1874 2009 * entry point should attempt to abort the command denoted by the pkt
1875 2010 * parameter. If the pkt parameter is NULL, tran_abort() should attempt to
1876 2011 * abort all outstanding commands in the transport layer for the particular
1877 2012 * target or logical unit.
1878 2013 */
1879 2014 /*ARGSUSED*/
1880 2015 static int
1881 2016 mrsas_tran_abort(struct scsi_address *ap, struct scsi_pkt *pkt)
1882 2017 {
1883 2018 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1884 2019
1885 2020 /* abort command not supported by H/W */
1886 2021
1887 2022 return (DDI_FAILURE);
1888 2023 }
1889 2024
1890 2025 /*
1891 2026 * tran_reset - reset either the SCSI bus or target
1892 2027 * @ap:
1893 2028 * @level:
1894 2029 *
1895 2030 * The tran_reset() entry point for a SCSI HBA driver is called to reset either
1896 2031 * the SCSI bus or a particular SCSI target device. This entry point is called
1897 2032 * when a target driver calls scsi_reset(). The tran_reset() entry point must
1898 2033 * reset the SCSI bus if level is RESET_ALL. If level is RESET_TARGET, just the
1899 2034 * particular target or logical unit must be reset.
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1900 2035 */
1901 2036 /*ARGSUSED*/
1902 2037 static int
1903 2038 mrsas_tran_reset(struct scsi_address *ap, int level)
1904 2039 {
1905 2040 struct mrsas_instance *instance = ADDR2MR(ap);
1906 2041
1907 2042 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1908 2043
1909 2044 if (wait_for_outstanding(instance)) {
1910 - con_log(CL_ANN1, (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
2045 + con_log(CL_ANN1,
2046 + (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
1911 2047 return (DDI_FAILURE);
1912 2048 } else {
1913 2049 return (DDI_SUCCESS);
1914 2050 }
1915 2051 }
1916 2052
2053 +#if 0
1917 2054 /*
1918 2055 * tran_bus_reset - reset the SCSI bus
1919 2056 * @dip:
1920 2057 * @level:
1921 2058 *
1922 2059 * The tran_bus_reset() vector in the scsi_hba_tran structure should be
1923 2060 * initialized during the HBA driver's attach(). The vector should point to
1924 2061 * an HBA entry point that is to be called when a user initiates a bus reset.
1925 2062 * Implementation is hardware specific. If the HBA driver cannot reset the
1926 2063 * SCSI bus without affecting the targets, the driver should fail RESET_BUS
1927 2064 * or not initialize this vector.
1928 2065 */
1929 2066 /*ARGSUSED*/
1930 2067 static int
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1931 2068 mrsas_tran_bus_reset(dev_info_t *dip, int level)
1932 2069 {
1933 2070 int instance_no = ddi_get_instance(dip);
1934 2071
1935 2072 struct mrsas_instance *instance = ddi_get_soft_state(mrsas_state,
1936 2073 instance_no);
1937 2074
1938 2075 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1939 2076
1940 2077 if (wait_for_outstanding(instance)) {
1941 - con_log(CL_ANN1, (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
2078 + con_log(CL_ANN1,
2079 + (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
1942 2080 return (DDI_FAILURE);
1943 2081 } else {
1944 2082 return (DDI_SUCCESS);
1945 2083 }
1946 2084 }
2085 +#endif
1947 2086
1948 2087 /*
1949 2088 * tran_getcap - get one of a set of SCSA-defined capabilities
1950 2089 * @ap:
1951 2090 * @cap:
1952 2091 * @whom:
1953 2092 *
1954 2093 * The target driver can request the current setting of the capability for a
1955 2094 * particular target by setting the whom parameter to nonzero. A whom value of
1956 2095 * zero indicates a request for the current setting of the general capability
1957 2096 * for the SCSI bus or for adapter hardware. The tran_getcap() should return -1
1958 2097 * for undefined capabilities or the current value of the requested capability.
1959 2098 */
1960 2099 /*ARGSUSED*/
1961 2100 static int
1962 2101 mrsas_tran_getcap(struct scsi_address *ap, char *cap, int whom)
1963 2102 {
1964 2103 int rval = 0;
1965 2104
1966 2105 struct mrsas_instance *instance = ADDR2MR(ap);
1967 2106
1968 2107 con_log(CL_DLEVEL2, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1969 2108
1970 2109 /* we do allow inquiring about capabilities for other targets */
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1971 2110 if (cap == NULL) {
1972 2111 return (-1);
1973 2112 }
1974 2113
1975 2114 switch (scsi_hba_lookup_capstr(cap)) {
1976 2115 case SCSI_CAP_DMA_MAX:
1977 2116 if (instance->tbolt) {
1978 2117 /* Limit to 256k max transfer */
1979 2118 rval = mrsas_tbolt_max_cap_maxxfer;
1980 2119 } else {
1981 - /* Limit to 16MB max transfer */
1982 - rval = mrsas_max_cap_maxxfer;
2120 + /* Limit to 16MB max transfer */
2121 + rval = mrsas_max_cap_maxxfer;
1983 2122 }
1984 2123 break;
1985 2124 case SCSI_CAP_MSG_OUT:
1986 2125 rval = 1;
1987 2126 break;
1988 2127 case SCSI_CAP_DISCONNECT:
1989 2128 rval = 0;
1990 2129 break;
1991 2130 case SCSI_CAP_SYNCHRONOUS:
1992 2131 rval = 0;
1993 2132 break;
1994 2133 case SCSI_CAP_WIDE_XFER:
1995 2134 rval = 1;
1996 2135 break;
1997 2136 case SCSI_CAP_TAGGED_QING:
1998 2137 rval = 1;
1999 2138 break;
2000 2139 case SCSI_CAP_UNTAGGED_QING:
2001 2140 rval = 1;
2002 2141 break;
2003 2142 case SCSI_CAP_PARITY:
2004 2143 rval = 1;
2005 2144 break;
2006 2145 case SCSI_CAP_INITIATOR_ID:
2007 2146 rval = instance->init_id;
2008 2147 break;
2009 2148 case SCSI_CAP_ARQ:
2010 2149 rval = 1;
2011 2150 break;
2012 2151 case SCSI_CAP_LINKED_CMDS:
2013 2152 rval = 0;
2014 2153 break;
2015 2154 case SCSI_CAP_RESET_NOTIFICATION:
2016 2155 rval = 1;
2017 2156 break;
2018 2157 case SCSI_CAP_GEOMETRY:
2019 2158 rval = -1;
2020 2159
2021 2160 break;
2022 2161 default:
2023 2162 con_log(CL_DLEVEL2, (CE_NOTE, "Default cap coming 0x%x",
2024 2163 scsi_hba_lookup_capstr(cap)));
2025 2164 rval = -1;
2026 2165 break;
2027 2166 }
2028 2167
2029 2168 return (rval);
2030 2169 }
2031 2170
2032 2171 /*
2033 2172 * tran_setcap - set one of a set of SCSA-defined capabilities
2034 2173 * @ap:
2035 2174 * @cap:
2036 2175 * @value:
2037 2176 * @whom:
2038 2177 *
2039 2178 * The target driver might request that the new value be set for a particular
2040 2179 * target by setting the whom parameter to nonzero. A whom value of zero
2041 2180 * means that request is to set the new value for the SCSI bus or for adapter
2042 2181 * hardware in general.
2043 2182 * The tran_setcap() should return the following values as appropriate:
2044 2183 * - -1 for undefined capabilities
2045 2184 * - 0 if the HBA driver cannot set the capability to the requested value
2046 2185 * - 1 if the HBA driver is able to set the capability to the requested value
2047 2186 */
2048 2187 /*ARGSUSED*/
2049 2188 static int
2050 2189 mrsas_tran_setcap(struct scsi_address *ap, char *cap, int value, int whom)
2051 2190 {
2052 2191 int rval = 1;
2053 2192
2054 2193 con_log(CL_DLEVEL2, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2055 2194
2056 2195 /* We don't allow setting capabilities for other targets */
2057 2196 if (cap == NULL || whom == 0) {
2058 2197 return (-1);
2059 2198 }
2060 2199
2061 2200 switch (scsi_hba_lookup_capstr(cap)) {
2062 2201 case SCSI_CAP_DMA_MAX:
2063 2202 case SCSI_CAP_MSG_OUT:
2064 2203 case SCSI_CAP_PARITY:
2065 2204 case SCSI_CAP_LINKED_CMDS:
2066 2205 case SCSI_CAP_RESET_NOTIFICATION:
2067 2206 case SCSI_CAP_DISCONNECT:
2068 2207 case SCSI_CAP_SYNCHRONOUS:
2069 2208 case SCSI_CAP_UNTAGGED_QING:
2070 2209 case SCSI_CAP_WIDE_XFER:
2071 2210 case SCSI_CAP_INITIATOR_ID:
2072 2211 case SCSI_CAP_ARQ:
2073 2212 /*
2074 2213 * None of these are settable via
2075 2214 * the capability interface.
2076 2215 */
2077 2216 break;
2078 2217 case SCSI_CAP_TAGGED_QING:
2079 2218 rval = 1;
2080 2219 break;
2081 2220 case SCSI_CAP_SECTOR_SIZE:
2082 2221 rval = 1;
2083 2222 break;
2084 2223
2085 2224 case SCSI_CAP_TOTAL_SECTORS:
2086 2225 rval = 1;
2087 2226 break;
2088 2227 default:
2089 2228 rval = -1;
2090 2229 break;
2091 2230 }
2092 2231
2093 2232 return (rval);
2094 2233 }
2095 2234
2096 2235 /*
2097 2236 * tran_destroy_pkt - deallocate scsi_pkt structure
2098 2237 * @ap:
2099 2238 * @pkt:
2100 2239 *
2101 2240 * The tran_destroy_pkt() entry point is the HBA driver function that
2102 2241 * deallocates scsi_pkt structures. The tran_destroy_pkt() entry point is
2103 2242 * called when the target driver calls scsi_destroy_pkt(). The
2104 2243 * tran_destroy_pkt() entry point must free any DMA resources that have been
2105 2244 * allocated for the packet. An implicit DMA synchronization occurs if the
2106 2245 * DMA resources are freed and any cached data remains after the completion
2107 2246 * of the transfer.
2108 2247 */
2109 2248 static void
2110 2249 mrsas_tran_destroy_pkt(struct scsi_address *ap, struct scsi_pkt *pkt)
2111 2250 {
2112 2251 struct scsa_cmd *acmd = PKT2CMD(pkt);
2113 2252
2114 2253 con_log(CL_DLEVEL2, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2115 2254
2116 2255 if (acmd->cmd_flags & CFLAG_DMAVALID) {
2117 2256 acmd->cmd_flags &= ~CFLAG_DMAVALID;
2118 2257
2119 2258 (void) ddi_dma_unbind_handle(acmd->cmd_dmahandle);
2120 2259
2121 2260 ddi_dma_free_handle(&acmd->cmd_dmahandle);
2122 2261
2123 2262 acmd->cmd_dmahandle = NULL;
2124 2263 }
2125 2264
2126 2265 /* free the pkt */
2127 2266 scsi_hba_pkt_free(ap, pkt);
2128 2267 }
2129 2268
2130 2269 /*
2131 2270 * tran_dmafree - deallocates DMA resources
2132 2271 * @ap:
2133 2272 * @pkt:
2134 2273 *
2135 2274 * The tran_dmafree() entry point deallocates DMAQ resources that have been
2136 2275 * allocated for a scsi_pkt structure. The tran_dmafree() entry point is
2137 2276 * called when the target driver calls scsi_dmafree(). The tran_dmafree() must
2138 2277 * free only DMA resources allocated for a scsi_pkt structure, not the
2139 2278 * scsi_pkt itself. When DMA resources are freed, a DMA synchronization is
2140 2279 * implicitly performed.
2141 2280 */
2142 2281 /*ARGSUSED*/
2143 2282 static void
2144 2283 mrsas_tran_dmafree(struct scsi_address *ap, struct scsi_pkt *pkt)
2145 2284 {
2146 2285 register struct scsa_cmd *acmd = PKT2CMD(pkt);
2147 2286
2148 2287 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2149 2288
2150 2289 if (acmd->cmd_flags & CFLAG_DMAVALID) {
2151 2290 acmd->cmd_flags &= ~CFLAG_DMAVALID;
2152 2291
2153 2292 (void) ddi_dma_unbind_handle(acmd->cmd_dmahandle);
2154 2293
2155 2294 ddi_dma_free_handle(&acmd->cmd_dmahandle);
2156 2295
2157 2296 acmd->cmd_dmahandle = NULL;
2158 2297 }
2159 2298 }
2160 2299
2161 2300 /*
2162 2301 * tran_sync_pkt - synchronize the DMA object allocated
2163 2302 * @ap:
2164 2303 * @pkt:
2165 2304 *
2166 2305 * The tran_sync_pkt() entry point synchronizes the DMA object allocated for
2167 2306 * the scsi_pkt structure before or after a DMA transfer. The tran_sync_pkt()
2168 2307 * entry point is called when the target driver calls scsi_sync_pkt(). If the
2169 2308 * data transfer direction is a DMA read from device to memory, tran_sync_pkt()
2170 2309 * must synchronize the CPU's view of the data. If the data transfer direction
2171 2310 * is a DMA write from memory to device, tran_sync_pkt() must synchronize the
2172 2311 * device's view of the data.
2173 2312 */
2174 2313 /*ARGSUSED*/
2175 2314 static void
2176 2315 mrsas_tran_sync_pkt(struct scsi_address *ap, struct scsi_pkt *pkt)
2177 2316 {
2178 2317 register struct scsa_cmd *acmd = PKT2CMD(pkt);
2179 2318
2180 2319 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2181 2320
2182 2321 if (acmd->cmd_flags & CFLAG_DMAVALID) {
2183 2322 (void) ddi_dma_sync(acmd->cmd_dmahandle, acmd->cmd_dma_offset,
2184 2323 acmd->cmd_dma_len, (acmd->cmd_flags & CFLAG_DMASEND) ?
2185 2324 DDI_DMA_SYNC_FORDEV : DDI_DMA_SYNC_FORCPU);
2186 2325 }
2187 2326 }
2188 2327
2189 2328 /*ARGSUSED*/
2190 2329 static int
2191 2330 mrsas_tran_quiesce(dev_info_t *dip)
2192 2331 {
2193 2332 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2194 2333
2195 2334 return (1);
2196 2335 }
2197 2336
2198 2337 /*ARGSUSED*/
2199 2338 static int
2200 2339 mrsas_tran_unquiesce(dev_info_t *dip)
2201 2340 {
2202 2341 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2203 2342
2204 2343 return (1);
2205 2344 }
2206 2345
2207 2346
2208 2347 /*
2209 2348 * mrsas_isr(caddr_t)
2210 2349 *
2211 2350 * The Interrupt Service Routine
2212 2351 *
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2213 2352 * Collect status for all completed commands and do callback
2214 2353 *
2215 2354 */
2216 2355 static uint_t
2217 2356 mrsas_isr(struct mrsas_instance *instance)
2218 2357 {
2219 2358 int need_softintr;
2220 2359 uint32_t producer;
2221 2360 uint32_t consumer;
2222 2361 uint32_t context;
2223 - uint32_t status, value;
2224 2362 int retval;
2225 2363
2226 2364 struct mrsas_cmd *cmd;
2227 2365 struct mrsas_header *hdr;
2228 2366 struct scsi_pkt *pkt;
2229 2367
2230 2368 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2231 2369 ASSERT(instance);
2232 2370 if (instance->tbolt) {
2233 2371 mutex_enter(&instance->chip_mtx);
2234 2372 if ((instance->intr_type == DDI_INTR_TYPE_FIXED) &&
2235 2373 !(instance->func_ptr->intr_ack(instance))) {
2236 2374 mutex_exit(&instance->chip_mtx);
2237 2375 return (DDI_INTR_UNCLAIMED);
2238 2376 }
2239 2377 retval = mr_sas_tbolt_process_outstanding_cmd(instance);
2240 2378 mutex_exit(&instance->chip_mtx);
2241 2379 return (retval);
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2242 2380 } else {
2243 2381 if ((instance->intr_type == DDI_INTR_TYPE_FIXED) &&
2244 2382 !instance->func_ptr->intr_ack(instance)) {
2245 2383 return (DDI_INTR_UNCLAIMED);
2246 2384 }
2247 2385 }
2248 2386
2249 2387 (void) ddi_dma_sync(instance->mfi_internal_dma_obj.dma_handle,
2250 2388 0, 0, DDI_DMA_SYNC_FORCPU);
2251 2389
2390 + if (mrsas_check_dma_handle(instance->mfi_internal_dma_obj.dma_handle)
2391 + != DDI_SUCCESS) {
2392 + mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
2393 + ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
2394 + con_log(CL_ANN1, (CE_WARN,
2395 + "mr_sas_isr(): FMA check, returning DDI_INTR_UNCLAIMED"));
2396 + return (DDI_INTR_CLAIMED);
2397 + }
2398 + con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2399 +
2252 2400 #ifdef OCRDEBUG
2253 2401 if (debug_consecutive_timeout_after_ocr_g == 1) {
2254 2402 con_log(CL_ANN1, (CE_NOTE,
2255 - "simulating consecutive timeout after ocr"));
2403 + "simulating consecutive timeout after ocr"));
2256 2404 return (DDI_INTR_CLAIMED);
2257 2405 }
2258 2406 #endif
2259 2407
2260 2408 mutex_enter(&instance->completed_pool_mtx);
2261 2409 mutex_enter(&instance->cmd_pend_mtx);
2262 2410
2263 2411 producer = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
2264 2412 instance->producer);
2265 2413 consumer = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
2266 2414 instance->consumer);
2267 2415
2268 2416 con_log(CL_ANN, (CE_CONT, " producer %x consumer %x ",
2269 2417 producer, consumer));
2270 2418 if (producer == consumer) {
2271 - con_log(CL_ANN, (CE_WARN, "producer == consumer case"));
2419 + con_log(CL_ANN, (CE_WARN, "producer == consumer case"));
2420 + DTRACE_PROBE2(isr_pc_err, uint32_t, producer,
2421 + uint32_t, consumer);
2272 2422 mutex_exit(&instance->cmd_pend_mtx);
2273 2423 mutex_exit(&instance->completed_pool_mtx);
2274 2424 return (DDI_INTR_CLAIMED);
2275 2425 }
2276 2426
2277 2427 while (consumer != producer) {
2278 2428 context = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
2279 2429 &instance->reply_queue[consumer]);
2280 2430 cmd = instance->cmd_list[context];
2281 2431
2282 2432 if (cmd->sync_cmd == MRSAS_TRUE) {
2283 - hdr = (struct mrsas_header *)&cmd->frame->hdr;
2284 - if (hdr) {
2285 - mlist_del_init(&cmd->list);
2286 - }
2433 + hdr = (struct mrsas_header *)&cmd->frame->hdr;
2434 + if (hdr) {
2435 + mlist_del_init(&cmd->list);
2436 + }
2287 2437 } else {
2288 2438 pkt = cmd->pkt;
2289 2439 if (pkt) {
2290 2440 mlist_del_init(&cmd->list);
2291 2441 }
2292 2442 }
2293 2443
2294 2444 mlist_add_tail(&cmd->list, &instance->completed_pool_list);
2295 2445
2296 2446 consumer++;
2297 2447 if (consumer == (instance->max_fw_cmds + 1)) {
2298 2448 consumer = 0;
2299 2449 }
2300 2450 }
2301 2451 ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
2302 2452 instance->consumer, consumer);
2303 2453 mutex_exit(&instance->cmd_pend_mtx);
2304 2454 mutex_exit(&instance->completed_pool_mtx);
2305 2455
2306 2456 (void) ddi_dma_sync(instance->mfi_internal_dma_obj.dma_handle,
2307 2457 0, 0, DDI_DMA_SYNC_FORDEV);
2308 2458
2309 2459 if (instance->softint_running) {
2310 2460 need_softintr = 0;
2311 2461 } else {
2312 2462 need_softintr = 1;
2313 2463 }
2314 2464
2315 2465 if (instance->isr_level == HIGH_LEVEL_INTR) {
2316 2466 if (need_softintr) {
2317 2467 ddi_trigger_softintr(instance->soft_intr_id);
2318 2468 }
2319 2469 } else {
2320 2470 /*
2321 2471 * Not a high-level interrupt, therefore call the soft level
2322 2472 * interrupt explicitly
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2323 2473 */
2324 2474 (void) mrsas_softintr(instance);
2325 2475 }
2326 2476
2327 2477 return (DDI_INTR_CLAIMED);
2328 2478 }
2329 2479
2330 2480
2331 2481 /*
2332 2482 * ************************************************************************** *
2333 - * *
2334 - * libraries *
2335 - * *
2483 + * *
2484 + * libraries *
2485 + * *
2336 2486 * ************************************************************************** *
2337 2487 */
2338 2488 /*
2339 2489 * get_mfi_pkt : Get a command from the free pool
2340 2490 * After successful allocation, the caller of this routine
2341 2491 * must clear the frame buffer (memset to zero) before
2342 2492 * using the packet further.
2343 2493 *
2344 2494 * ***** Note *****
2345 2495 * After clearing the frame buffer the context id of the
2346 2496 * frame buffer SHOULD be restored back.
2347 2497 */
2348 2498 static struct mrsas_cmd *
2349 2499 get_mfi_pkt(struct mrsas_instance *instance)
2350 2500 {
2351 - mlist_t *head = &instance->cmd_pool_list;
2501 + mlist_t *head = &instance->cmd_pool_list;
2352 2502 struct mrsas_cmd *cmd = NULL;
2353 2503
2354 2504 mutex_enter(&instance->cmd_pool_mtx);
2355 - ASSERT(mutex_owned(&instance->cmd_pool_mtx));
2356 2505
2357 2506 if (!mlist_empty(head)) {
2358 2507 cmd = mlist_entry(head->next, struct mrsas_cmd, list);
2359 2508 mlist_del_init(head->next);
2360 2509 }
2361 2510 if (cmd != NULL) {
2362 2511 cmd->pkt = NULL;
2363 2512 cmd->retry_count_for_ocr = 0;
2364 2513 cmd->drv_pkt_time = 0;
2365 2514
2366 2515 }
2367 2516 mutex_exit(&instance->cmd_pool_mtx);
2368 2517
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2369 2518 return (cmd);
2370 2519 }
2371 2520
2372 2521 static struct mrsas_cmd *
2373 2522 get_mfi_app_pkt(struct mrsas_instance *instance)
2374 2523 {
2375 2524 mlist_t *head = &instance->app_cmd_pool_list;
2376 2525 struct mrsas_cmd *cmd = NULL;
2377 2526
2378 2527 mutex_enter(&instance->app_cmd_pool_mtx);
2379 - ASSERT(mutex_owned(&instance->app_cmd_pool_mtx));
2380 2528
2381 2529 if (!mlist_empty(head)) {
2382 2530 cmd = mlist_entry(head->next, struct mrsas_cmd, list);
2383 2531 mlist_del_init(head->next);
2384 2532 }
2385 - if (cmd != NULL){
2533 + if (cmd != NULL) {
2386 2534 cmd->pkt = NULL;
2387 2535 cmd->retry_count_for_ocr = 0;
2388 2536 cmd->drv_pkt_time = 0;
2389 2537 }
2390 2538
2391 2539 mutex_exit(&instance->app_cmd_pool_mtx);
2392 2540
2393 2541 return (cmd);
2394 2542 }
2395 2543 /*
2396 2544 * return_mfi_pkt : Return a cmd to free command pool
2397 2545 */
2398 2546 static void
2399 2547 return_mfi_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
2400 2548 {
2401 2549 mutex_enter(&instance->cmd_pool_mtx);
2402 - ASSERT(mutex_owned(&instance->cmd_pool_mtx));
2403 -
2550 + /* use mlist_add_tail for debug assistance */
2404 2551 mlist_add_tail(&cmd->list, &instance->cmd_pool_list);
2405 2552
2406 2553 mutex_exit(&instance->cmd_pool_mtx);
2407 2554 }
2408 2555
2409 2556 static void
2410 2557 return_mfi_app_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
2411 2558 {
2412 2559 mutex_enter(&instance->app_cmd_pool_mtx);
2413 - ASSERT(mutex_owned(&instance->app_cmd_pool_mtx));
2414 2560
2415 2561 mlist_add(&cmd->list, &instance->app_cmd_pool_list);
2416 2562
2417 2563 mutex_exit(&instance->app_cmd_pool_mtx);
2418 2564 }
2419 2565 void
2420 2566 push_pending_mfi_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
2421 2567 {
2422 2568 struct scsi_pkt *pkt;
2423 2569 struct mrsas_header *hdr;
2424 2570 con_log(CL_DLEVEL2, (CE_NOTE, "push_pending_pkt(): Called\n"));
2425 2571 mutex_enter(&instance->cmd_pend_mtx);
2426 - ASSERT(mutex_owned(&instance->cmd_pend_mtx));
2427 - mlist_del_init(&cmd->list);
2572 + mlist_del_init(&cmd->list);
2428 2573 mlist_add_tail(&cmd->list, &instance->cmd_pend_list);
2429 2574 if (cmd->sync_cmd == MRSAS_TRUE) {
2430 2575 hdr = (struct mrsas_header *)&cmd->frame->hdr;
2431 2576 if (hdr) {
2432 2577 con_log(CL_ANN1, (CE_CONT,
2433 2578 "push_pending_mfi_pkt: "
2434 2579 "cmd %p index %x "
2435 2580 "time %llx",
2436 2581 (void *)cmd, cmd->index,
2437 2582 gethrtime()));
2438 - /* Wait for specified interval */
2583 + /* Wait for specified interval */
2439 2584 cmd->drv_pkt_time = ddi_get16(
2440 2585 cmd->frame_dma_obj.acc_handle, &hdr->timeout);
2441 2586 if (cmd->drv_pkt_time < debug_timeout_g)
2442 2587 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
2443 2588 con_log(CL_ANN1, (CE_CONT,
2444 - "push_pending_pkt(): "
2445 - "Called IO Timeout Value %x\n",
2446 - cmd->drv_pkt_time));
2589 + "push_pending_pkt(): "
2590 + "Called IO Timeout Value %x\n",
2591 + cmd->drv_pkt_time));
2447 2592 }
2448 2593 if (hdr && instance->timeout_id == (timeout_id_t)-1) {
2449 2594 instance->timeout_id = timeout(io_timeout_checker,
2450 2595 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
2451 2596 }
2452 2597 } else {
2453 2598 pkt = cmd->pkt;
2454 2599 if (pkt) {
2455 2600 con_log(CL_ANN1, (CE_CONT,
2456 2601 "push_pending_mfi_pkt: "
2457 2602 "cmd %p index %x pkt %p, "
2458 2603 "time %llx",
2459 2604 (void *)cmd, cmd->index, (void *)pkt,
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2460 2605 gethrtime()));
2461 2606 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
2462 2607 }
2463 2608 if (pkt && instance->timeout_id == (timeout_id_t)-1) {
2464 2609 instance->timeout_id = timeout(io_timeout_checker,
2465 2610 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
2466 2611 }
2467 2612 }
2468 2613
2469 2614 mutex_exit(&instance->cmd_pend_mtx);
2470 -
2615 +
2471 2616 }
2472 2617
2473 2618 int
2474 2619 mrsas_print_pending_cmds(struct mrsas_instance *instance)
2475 2620 {
2476 2621 mlist_t *head = &instance->cmd_pend_list;
2477 2622 mlist_t *tmp = head;
2478 2623 struct mrsas_cmd *cmd = NULL;
2479 2624 struct mrsas_header *hdr;
2480 2625 unsigned int flag = 1;
2481 2626 struct scsi_pkt *pkt;
2482 2627 int saved_level;
2483 2628 int cmd_count = 0;
2484 2629
2485 -
2486 2630 saved_level = debug_level_g;
2487 2631 debug_level_g = CL_ANN1;
2488 2632
2489 2633 cmn_err(CE_NOTE, "mrsas_print_pending_cmds(): Called\n");
2490 2634
2491 2635 while (flag) {
2492 2636 mutex_enter(&instance->cmd_pend_mtx);
2493 2637 tmp = tmp->next;
2494 2638 if (tmp == head) {
2495 2639 mutex_exit(&instance->cmd_pend_mtx);
2496 2640 flag = 0;
2497 - con_log(CL_ANN1, (CE_CONT, "mrsas_print_pending_cmds(): NO MORE CMDS PENDING....\n"));
2641 + con_log(CL_ANN1, (CE_CONT, "mrsas_print_pending_cmds():"
2642 + " NO MORE CMDS PENDING....\n"));
2498 2643 break;
2499 2644 } else {
2500 2645 cmd = mlist_entry(tmp, struct mrsas_cmd, list);
2501 2646 mutex_exit(&instance->cmd_pend_mtx);
2502 2647 if (cmd) {
2503 2648 if (cmd->sync_cmd == MRSAS_TRUE) {
2504 - hdr = (struct mrsas_header *)&cmd->frame->hdr;
2649 + hdr = (struct mrsas_header *)
2650 + &cmd->frame->hdr;
2505 2651 if (hdr) {
2506 - con_log(CL_ANN1, (CE_CONT,
2507 - "print: cmd %p index 0x%x drv_pkt_time 0x%x (NO-PKT) hdr %p\n",
2508 - (void *)cmd, cmd->index, cmd->drv_pkt_time, (void *)hdr));
2652 + con_log(CL_ANN1, (CE_CONT,
2653 + "print: cmd %p index 0x%x "
2654 + "drv_pkt_time 0x%x (NO-PKT)"
2655 + " hdr %p\n", (void *)cmd,
2656 + cmd->index,
2657 + cmd->drv_pkt_time,
2658 + (void *)hdr));
2509 2659 }
2510 2660 } else {
2511 2661 pkt = cmd->pkt;
2512 2662 if (pkt) {
2513 2663 con_log(CL_ANN1, (CE_CONT,
2514 - "print: cmd %p index 0x%x drv_pkt_time 0x%x pkt %p \n",
2515 - (void *)cmd, cmd->index, cmd->drv_pkt_time, (void *)pkt));
2664 + "print: cmd %p index 0x%x "
2665 + "drv_pkt_time 0x%x pkt %p \n",
2666 + (void *)cmd, cmd->index,
2667 + cmd->drv_pkt_time, (void *)pkt));
2516 2668 }
2517 2669 }
2518 2670
2519 - if (++cmd_count == 1)
2520 - mrsas_print_cmd_details(instance, cmd, 0xDD);
2521 - else
2522 - mrsas_print_cmd_details(instance, cmd, 1);
2671 + if (++cmd_count == 1) {
2672 + mrsas_print_cmd_details(instance, cmd,
2673 + 0xDD);
2674 + } else {
2675 + mrsas_print_cmd_details(instance, cmd,
2676 + 1);
2677 + }
2523 2678
2524 2679 }
2525 2680 }
2526 2681 }
2527 2682 con_log(CL_ANN1, (CE_CONT, "mrsas_print_pending_cmds(): Done\n"));
2528 2683
2529 -
2684 +
2530 2685 debug_level_g = saved_level;
2531 2686
2532 2687 return (DDI_SUCCESS);
2533 2688 }
2534 2689
2535 2690
2536 2691 int
2537 2692 mrsas_complete_pending_cmds(struct mrsas_instance *instance)
2538 2693 {
2539 2694
2540 2695 struct mrsas_cmd *cmd = NULL;
2541 2696 struct scsi_pkt *pkt;
2542 2697 struct mrsas_header *hdr;
2543 2698
2544 2699 struct mlist_head *pos, *next;
2545 2700
2546 2701 con_log(CL_ANN1, (CE_NOTE,
2547 2702 "mrsas_complete_pending_cmds(): Called"));
2548 2703
2549 2704 mutex_enter(&instance->cmd_pend_mtx);
2550 2705 mlist_for_each_safe(pos, next, &instance->cmd_pend_list) {
2551 2706 cmd = mlist_entry(pos, struct mrsas_cmd, list);
2552 2707 if (cmd) {
2553 2708 pkt = cmd->pkt;
2554 2709 if (pkt) { /* for IO */
2555 2710 if (((pkt->pkt_flags & FLAG_NOINTR)
2556 2711 == 0) && pkt->pkt_comp) {
2557 2712 pkt->pkt_reason
2558 2713 = CMD_DEV_GONE;
2559 2714 pkt->pkt_statistics
2560 2715 = STAT_DISCON;
2561 2716 con_log(CL_ANN1, (CE_CONT,
2562 2717 "fail and posting to scsa "
2563 2718 "cmd %p index %x"
2564 2719 " pkt %p "
2565 2720 "time : %llx",
2566 2721 (void *)cmd, cmd->index,
2567 2722 (void *)pkt, gethrtime()));
2568 2723 (*pkt->pkt_comp)(pkt);
2569 2724 }
2570 2725 } else { /* for DCMDS */
2571 2726 if (cmd->sync_cmd == MRSAS_TRUE) {
2572 2727 hdr = (struct mrsas_header *)&cmd->frame->hdr;
2573 2728 con_log(CL_ANN1, (CE_CONT,
2574 2729 "posting invalid status to application "
2575 2730 "cmd %p index %x"
2576 2731 " hdr %p "
2577 2732 "time : %llx",
2578 2733 (void *)cmd, cmd->index,
2579 2734 (void *)hdr, gethrtime()));
2580 2735 hdr->cmd_status = MFI_STAT_INVALID_STATUS;
2581 2736 complete_cmd_in_sync_mode(instance, cmd);
2582 2737 }
2583 2738 }
2584 2739 mlist_del_init(&cmd->list);
2585 2740 } else {
2586 2741 con_log(CL_ANN1, (CE_CONT,
2587 2742 "mrsas_complete_pending_cmds:"
2588 2743 "NULL command\n"));
2589 2744 }
2590 2745 con_log(CL_ANN1, (CE_CONT,
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2591 2746 "mrsas_complete_pending_cmds:"
2592 2747 "looping for more commands\n"));
2593 2748 }
2594 2749 mutex_exit(&instance->cmd_pend_mtx);
2595 2750
2596 2751 con_log(CL_ANN1, (CE_CONT, "mrsas_complete_pending_cmds(): DONE\n"));
2597 2752 return (DDI_SUCCESS);
2598 2753 }
2599 2754
2600 2755 void
2601 -mrsas_print_cmd_details(struct mrsas_instance *instance,
2602 - struct mrsas_cmd *cmd, int detail )
2756 +mrsas_print_cmd_details(struct mrsas_instance *instance, struct mrsas_cmd *cmd,
2757 + int detail)
2603 2758 {
2604 2759 struct scsi_pkt *pkt = cmd->pkt;
2605 2760 Mpi2RaidSCSIIORequest_t *scsi_io = cmd->scsi_io_request;
2606 - MPI2_SCSI_IO_VENDOR_UNIQUE *raidContext;
2607 - uint8_t *cdb_p;
2608 - char str[100], *strp;
2609 - int i, j, len;
2761 + int i;
2610 2762 int saved_level;
2763 + ddi_acc_handle_t acc_handle =
2764 + instance->mpi2_frame_pool_dma_obj.acc_handle;
2611 2765
2612 -
2613 2766 if (detail == 0xDD) {
2614 2767 saved_level = debug_level_g;
2615 2768 debug_level_g = CL_ANN1;
2616 2769 }
2617 2770
2618 2771
2619 2772 if (instance->tbolt) {
2620 - con_log(CL_ANN1, (CE_CONT, "print_cmd_details: cmd %p cmd->index 0x%x SMID 0x%x timer 0x%x sec\n",
2621 - (void *)cmd, cmd->index, cmd->SMID, cmd->drv_pkt_time));
2773 + con_log(CL_ANN1, (CE_CONT, "print_cmd_details: cmd %p "
2774 + "cmd->index 0x%x SMID 0x%x timer 0x%x sec\n",
2775 + (void *)cmd, cmd->index, cmd->SMID, cmd->drv_pkt_time));
2776 + } else {
2777 + con_log(CL_ANN1, (CE_CONT, "print_cmd_details: cmd %p "
2778 + "cmd->index 0x%x timer 0x%x sec\n",
2779 + (void *)cmd, cmd->index, cmd->drv_pkt_time));
2622 2780 }
2623 - else {
2624 - con_log(CL_ANN1, (CE_CONT, "print_cmd_details: cmd %p cmd->index 0x%x timer 0x%x sec\n",
2625 - (void *)cmd, cmd->index, cmd->drv_pkt_time));
2626 - }
2627 2781
2628 - if(pkt) {
2782 + if (pkt) {
2629 2783 con_log(CL_ANN1, (CE_CONT, "scsi_pkt CDB[0]=0x%x",
2630 - pkt->pkt_cdbp[0]));
2631 - }else {
2784 + pkt->pkt_cdbp[0]));
2785 + } else {
2632 2786 con_log(CL_ANN1, (CE_CONT, "NO-PKT"));
2633 2787 }
2634 2788
2635 - if((detail==0xDD) && instance->tbolt) {
2789 + if ((detail == 0xDD) && instance->tbolt) {
2636 2790 con_log(CL_ANN1, (CE_CONT, "RAID_SCSI_IO_REQUEST\n"));
2637 - con_log(CL_ANN1, (CE_CONT, "DevHandle=0x%X Function=0x%X IoFlags=0x%X SGLFlags=0x%X DataLength=0x%X\n",
2638 - ddi_get16(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->DevHandle),
2639 - ddi_get8(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->Function),
2640 - ddi_get16(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->IoFlags),
2641 - ddi_get16(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->SGLFlags),
2642 - ddi_get32(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->DataLength) ));
2791 + con_log(CL_ANN1, (CE_CONT, "DevHandle=0x%X Function=0x%X "
2792 + "IoFlags=0x%X SGLFlags=0x%X DataLength=0x%X\n",
2793 + ddi_get16(acc_handle, &scsi_io->DevHandle),
2794 + ddi_get8(acc_handle, &scsi_io->Function),
2795 + ddi_get16(acc_handle, &scsi_io->IoFlags),
2796 + ddi_get16(acc_handle, &scsi_io->SGLFlags),
2797 + ddi_get32(acc_handle, &scsi_io->DataLength)));
2643 2798
2644 - for(i=0; i < 32; i++)
2645 - con_log(CL_ANN1, (CE_CONT, "CDB[%d]=0x%x ",i,
2646 - ddi_get8(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->CDB.CDB32[i]) ));
2799 + for (i = 0; i < 32; i++) {
2800 + con_log(CL_ANN1, (CE_CONT, "CDB[%d]=0x%x ", i,
2801 + ddi_get8(acc_handle, &scsi_io->CDB.CDB32[i])));
2802 + }
2647 2803
2648 2804 con_log(CL_ANN1, (CE_CONT, "RAID-CONTEXT\n"));
2649 - con_log(CL_ANN1, (CE_CONT, "status=0x%X extStatus=0x%X ldTargetId=0x%X timeoutValue=0x%X"
2650 - "regLockFlags=0x%X RAIDFlags=0x%X regLockRowLBA=0x%lX regLockLength=0x%X spanArm=0x%X\n",
2651 - ddi_get8(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.status),
2652 - ddi_get8(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.extStatus),
2653 - ddi_get16(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.ldTargetId),
2654 - ddi_get16(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.timeoutValue),
2655 - ddi_get8(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.regLockFlags),
2656 - ddi_get8(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.RAIDFlags),
2657 - ddi_get64(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.regLockRowLBA),
2658 - ddi_get32(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.regLockLength),
2659 - ddi_get8(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.spanArm) ));
2660 -
2661 -
2805 + con_log(CL_ANN1, (CE_CONT, "status=0x%X extStatus=0x%X "
2806 + "ldTargetId=0x%X timeoutValue=0x%X regLockFlags=0x%X "
2807 + "RAIDFlags=0x%X regLockRowLBA=0x%" PRIu64
2808 + " regLockLength=0x%X spanArm=0x%X\n",
2809 + ddi_get8(acc_handle, &scsi_io->RaidContext.status),
2810 + ddi_get8(acc_handle, &scsi_io->RaidContext.extStatus),
2811 + ddi_get16(acc_handle, &scsi_io->RaidContext.ldTargetId),
2812 + ddi_get16(acc_handle, &scsi_io->RaidContext.timeoutValue),
2813 + ddi_get8(acc_handle, &scsi_io->RaidContext.regLockFlags),
2814 + ddi_get8(acc_handle, &scsi_io->RaidContext.RAIDFlags),
2815 + ddi_get64(acc_handle, &scsi_io->RaidContext.regLockRowLBA),
2816 + ddi_get32(acc_handle, &scsi_io->RaidContext.regLockLength),
2817 + ddi_get8(acc_handle, &scsi_io->RaidContext.spanArm)));
2662 2818 }
2663 2819
2664 2820 if (detail == 0xDD) {
2665 2821 debug_level_g = saved_level;
2666 2822 }
2667 -
2668 - return;
2669 2823 }
2670 2824
2671 2825
2672 2826 int
2673 2827 mrsas_issue_pending_cmds(struct mrsas_instance *instance)
2674 2828 {
2675 2829 mlist_t *head = &instance->cmd_pend_list;
2676 2830 mlist_t *tmp = head->next;
2677 2831 struct mrsas_cmd *cmd = NULL;
2678 2832 struct scsi_pkt *pkt;
2679 2833
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2680 2834 con_log(CL_ANN1, (CE_NOTE, "mrsas_issue_pending_cmds(): Called"));
2681 2835 while (tmp != head) {
2682 2836 mutex_enter(&instance->cmd_pend_mtx);
2683 2837 cmd = mlist_entry(tmp, struct mrsas_cmd, list);
2684 2838 tmp = tmp->next;
2685 2839 mutex_exit(&instance->cmd_pend_mtx);
2686 2840 if (cmd) {
2687 2841 con_log(CL_ANN1, (CE_CONT,
2688 2842 "mrsas_issue_pending_cmds(): "
2689 2843 "Got a cmd: cmd %p index 0x%x drv_pkt_time 0x%x ",
2690 - (void *)cmd, cmd->index, cmd->drv_pkt_time));
2844 + (void *)cmd, cmd->index, cmd->drv_pkt_time));
2691 2845
2846 + /* Reset command timeout value */
2692 2847 if (cmd->drv_pkt_time < debug_timeout_g)
2693 - cmd->drv_pkt_time = (uint16_t)debug_timeout_g; /* Reset command timeout value */
2848 + cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
2694 2849
2695 2850 cmd->retry_count_for_ocr++;
2696 2851
2697 2852 cmn_err(CE_CONT, "cmd retry count = %d\n",
2698 2853 cmd->retry_count_for_ocr);
2699 2854
2700 2855 if (cmd->retry_count_for_ocr > IO_RETRY_COUNT) {
2701 - cmn_err(CE_WARN,
2702 - "mrsas_issue_pending_cmds(): cmd->retry_count exceeded limit >%d\n",
2856 + cmn_err(CE_WARN, "mrsas_issue_pending_cmds(): "
2857 + "cmd->retry_count exceeded limit >%d\n",
2703 2858 IO_RETRY_COUNT);
2704 2859 mrsas_print_cmd_details(instance, cmd, 0xDD);
2705 2860
2706 2861 cmn_err(CE_WARN,
2707 - "mrsas_issue_pending_cmds():"
2862 + "mrsas_issue_pending_cmds():"
2708 2863 "Calling KILL Adapter\n");
2709 2864 if (instance->tbolt)
2710 - (void) mrsas_tbolt_kill_adapter(instance);
2865 + mrsas_tbolt_kill_adapter(instance);
2711 2866 else
2712 2867 (void) mrsas_kill_adapter(instance);
2713 2868 return (DDI_FAILURE);
2714 2869 }
2715 2870
2716 2871 pkt = cmd->pkt;
2717 2872 if (pkt) {
2718 2873 con_log(CL_ANN1, (CE_CONT,
2719 2874 "PENDING PKT-CMD ISSUE: cmd %p index %x "
2720 2875 "pkt %p time %llx",
2721 2876 (void *)cmd, cmd->index,
2722 2877 (void *)pkt,
2723 2878 gethrtime()));
2724 2879
2725 2880 } else {
2726 2881 cmn_err(CE_CONT,
2727 - "mrsas_issue_pending_cmds(): "
2728 - "NO-PKT, cmd %p index 0x%x drv_pkt_time 0x%x ",
2729 - (void *)cmd, cmd->index, cmd->drv_pkt_time);
2882 + "mrsas_issue_pending_cmds(): NO-PKT, "
2883 + "cmd %p index 0x%x drv_pkt_time 0x%x ",
2884 + (void *)cmd, cmd->index, cmd->drv_pkt_time);
2730 2885 }
2731 2886
2732 2887
2733 2888 if (cmd->sync_cmd == MRSAS_TRUE) {
2734 - cmn_err(CE_CONT, "mrsas_issue_pending_cmds(): SYNC_CMD == TRUE \n");
2735 -
2736 - instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd);
2889 + cmn_err(CE_CONT, "mrsas_issue_pending_cmds(): "
2890 + "SYNC_CMD == TRUE \n");
2891 + instance->func_ptr->issue_cmd_in_sync_mode(
2892 + instance, cmd);
2737 2893 } else {
2738 2894 instance->func_ptr->issue_cmd(cmd, instance);
2739 2895 }
2740 2896 } else {
2741 2897 con_log(CL_ANN1, (CE_CONT,
2742 2898 "mrsas_issue_pending_cmds: NULL command\n"));
2743 2899 }
2744 2900 con_log(CL_ANN1, (CE_CONT,
2745 2901 "mrsas_issue_pending_cmds:"
2746 2902 "looping for more commands"));
2747 2903 }
2748 2904 con_log(CL_ANN1, (CE_CONT, "mrsas_issue_pending_cmds(): DONE\n"));
2749 2905 return (DDI_SUCCESS);
2750 2906 }
2751 2907
2752 2908
2753 2909
2754 2910 /*
2755 2911 * destroy_mfi_frame_pool
2756 2912 */
2757 2913 void
2758 2914 destroy_mfi_frame_pool(struct mrsas_instance *instance)
2759 2915 {
2760 2916 int i;
2761 2917 uint32_t max_cmd = instance->max_fw_cmds;
2762 2918
2763 2919 struct mrsas_cmd *cmd;
2764 2920
2765 2921 /* return all frames to pool */
2766 2922
2767 2923 for (i = 0; i < max_cmd; i++) {
2768 2924
2769 2925 cmd = instance->cmd_list[i];
2770 2926
2771 2927 if (cmd->frame_dma_obj_status == DMA_OBJ_ALLOCATED)
2772 2928 (void) mrsas_free_dma_obj(instance, cmd->frame_dma_obj);
2773 2929
2774 2930 cmd->frame_dma_obj_status = DMA_OBJ_FREED;
2775 2931 }
2776 2932
2777 2933 }
2778 2934
2779 2935 /*
2780 2936 * create_mfi_frame_pool
2781 2937 */
2782 2938 int
2783 2939 create_mfi_frame_pool(struct mrsas_instance *instance)
2784 2940 {
2785 2941 int i = 0;
2786 2942 int cookie_cnt;
2787 2943 uint16_t max_cmd;
2788 2944 uint16_t sge_sz;
2789 2945 uint32_t sgl_sz;
2790 2946 uint32_t tot_frame_size;
2791 2947 struct mrsas_cmd *cmd;
2792 2948 int retval = DDI_SUCCESS;
2793 2949
2794 2950 max_cmd = instance->max_fw_cmds;
2795 2951 sge_sz = sizeof (struct mrsas_sge_ieee);
2796 2952 /* calculated the number of 64byte frames required for SGL */
2797 2953 sgl_sz = sge_sz * instance->max_num_sge;
2798 2954 tot_frame_size = sgl_sz + MRMFI_FRAME_SIZE + SENSE_LENGTH;
2799 2955
2800 2956 con_log(CL_DLEVEL3, (CE_NOTE, "create_mfi_frame_pool: "
2801 2957 "sgl_sz %x tot_frame_size %x", sgl_sz, tot_frame_size));
2802 2958
2803 2959 while (i < max_cmd) {
2804 2960 cmd = instance->cmd_list[i];
2805 2961
2806 2962 cmd->frame_dma_obj.size = tot_frame_size;
2807 2963 cmd->frame_dma_obj.dma_attr = mrsas_generic_dma_attr;
2808 2964 cmd->frame_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
2809 2965 cmd->frame_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
2810 2966 cmd->frame_dma_obj.dma_attr.dma_attr_sgllen = 1;
2811 2967 cmd->frame_dma_obj.dma_attr.dma_attr_align = 64;
2812 2968
2813 2969 cookie_cnt = mrsas_alloc_dma_obj(instance, &cmd->frame_dma_obj,
2814 2970 (uchar_t)DDI_STRUCTURE_LE_ACC);
2815 2971
2816 2972 if (cookie_cnt == -1 || cookie_cnt > 1) {
2817 2973 cmn_err(CE_WARN,
2818 2974 "create_mfi_frame_pool: could not alloc.");
2819 2975 retval = DDI_FAILURE;
2820 2976 goto mrsas_undo_frame_pool;
2821 2977 }
2822 2978
2823 2979 bzero(cmd->frame_dma_obj.buffer, tot_frame_size);
2824 2980
2825 2981 cmd->frame_dma_obj_status = DMA_OBJ_ALLOCATED;
2826 2982 cmd->frame = (union mrsas_frame *)cmd->frame_dma_obj.buffer;
2827 2983 cmd->frame_phys_addr =
2828 2984 cmd->frame_dma_obj.dma_cookie[0].dmac_address;
2829 2985
2830 2986 cmd->sense = (uint8_t *)(((unsigned long)
2831 2987 cmd->frame_dma_obj.buffer) +
2832 2988 tot_frame_size - SENSE_LENGTH);
2833 2989 cmd->sense_phys_addr =
2834 2990 cmd->frame_dma_obj.dma_cookie[0].dmac_address +
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2835 2991 tot_frame_size - SENSE_LENGTH;
2836 2992
2837 2993 if (!cmd->frame || !cmd->sense) {
2838 2994 cmn_err(CE_WARN,
2839 2995 "mr_sas: pci_pool_alloc failed");
2840 2996 retval = ENOMEM;
2841 2997 goto mrsas_undo_frame_pool;
2842 2998 }
2843 2999
2844 3000 ddi_put32(cmd->frame_dma_obj.acc_handle,
2845 - &cmd->frame->io.context, cmd->index);
3001 + &cmd->frame->io.context, cmd->index);
2846 3002 i++;
2847 3003
2848 3004 con_log(CL_DLEVEL3, (CE_NOTE, "[%x]-%x",
2849 3005 cmd->index, cmd->frame_phys_addr));
2850 3006 }
2851 3007
2852 3008 return (DDI_SUCCESS);
2853 3009
2854 3010 mrsas_undo_frame_pool:
2855 3011 if (i > 0)
2856 - destroy_mfi_frame_pool(instance);
3012 + destroy_mfi_frame_pool(instance);
2857 3013
2858 3014 return (retval);
2859 3015 }
2860 3016
2861 3017 /*
2862 3018 * free_additional_dma_buffer
2863 3019 */
2864 3020 static void
2865 3021 free_additional_dma_buffer(struct mrsas_instance *instance)
2866 3022 {
2867 3023 if (instance->mfi_internal_dma_obj.status == DMA_OBJ_ALLOCATED) {
2868 3024 (void) mrsas_free_dma_obj(instance,
2869 3025 instance->mfi_internal_dma_obj);
2870 3026 instance->mfi_internal_dma_obj.status = DMA_OBJ_FREED;
2871 3027 }
2872 3028
2873 3029 if (instance->mfi_evt_detail_obj.status == DMA_OBJ_ALLOCATED) {
2874 3030 (void) mrsas_free_dma_obj(instance,
2875 3031 instance->mfi_evt_detail_obj);
2876 3032 instance->mfi_evt_detail_obj.status = DMA_OBJ_FREED;
2877 3033 }
2878 3034 }
2879 3035
2880 3036 /*
2881 3037 * alloc_additional_dma_buffer
2882 3038 */
2883 3039 static int
2884 3040 alloc_additional_dma_buffer(struct mrsas_instance *instance)
2885 3041 {
2886 3042 uint32_t reply_q_sz;
2887 3043 uint32_t internal_buf_size = PAGESIZE*2;
2888 3044
2889 3045 /* max cmds plus 1 + producer & consumer */
2890 3046 reply_q_sz = sizeof (uint32_t) * (instance->max_fw_cmds + 1 + 2);
2891 3047
2892 3048 instance->mfi_internal_dma_obj.size = internal_buf_size;
2893 3049 instance->mfi_internal_dma_obj.dma_attr = mrsas_generic_dma_attr;
2894 3050 instance->mfi_internal_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
2895 3051 instance->mfi_internal_dma_obj.dma_attr.dma_attr_count_max =
2896 3052 0xFFFFFFFFU;
2897 3053 instance->mfi_internal_dma_obj.dma_attr.dma_attr_sgllen = 1;
2898 3054
2899 3055 if (mrsas_alloc_dma_obj(instance, &instance->mfi_internal_dma_obj,
2900 3056 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
2901 3057 cmn_err(CE_WARN,
2902 3058 "mr_sas: could not alloc reply queue");
2903 3059 return (DDI_FAILURE);
2904 3060 }
2905 3061
2906 3062 bzero(instance->mfi_internal_dma_obj.buffer, internal_buf_size);
2907 3063
2908 3064 instance->mfi_internal_dma_obj.status |= DMA_OBJ_ALLOCATED;
2909 3065
2910 3066 instance->producer = (uint32_t *)((unsigned long)
2911 3067 instance->mfi_internal_dma_obj.buffer);
2912 3068 instance->consumer = (uint32_t *)((unsigned long)
2913 3069 instance->mfi_internal_dma_obj.buffer + 4);
2914 3070 instance->reply_queue = (uint32_t *)((unsigned long)
2915 3071 instance->mfi_internal_dma_obj.buffer + 8);
2916 3072 instance->internal_buf = (caddr_t)(((unsigned long)
2917 3073 instance->mfi_internal_dma_obj.buffer) + reply_q_sz + 8);
2918 3074 instance->internal_buf_dmac_add =
2919 3075 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address +
2920 3076 (reply_q_sz + 8);
2921 3077 instance->internal_buf_size = internal_buf_size -
2922 3078 (reply_q_sz + 8);
2923 3079
2924 3080 /* allocate evt_detail */
2925 3081 instance->mfi_evt_detail_obj.size = sizeof (struct mrsas_evt_detail);
2926 3082 instance->mfi_evt_detail_obj.dma_attr = mrsas_generic_dma_attr;
2927 3083 instance->mfi_evt_detail_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
2928 3084 instance->mfi_evt_detail_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
2929 3085 instance->mfi_evt_detail_obj.dma_attr.dma_attr_sgllen = 1;
2930 3086 instance->mfi_evt_detail_obj.dma_attr.dma_attr_align = 1;
2931 3087
2932 3088 if (mrsas_alloc_dma_obj(instance, &instance->mfi_evt_detail_obj,
2933 3089 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
2934 3090 cmn_err(CE_WARN, "alloc_additional_dma_buffer: "
2935 3091 "could not allocate data transfer buffer.");
2936 3092 goto mrsas_undo_internal_buff;
2937 3093 }
2938 3094
2939 3095 bzero(instance->mfi_evt_detail_obj.buffer,
2940 3096 sizeof (struct mrsas_evt_detail));
2941 3097
2942 3098 instance->mfi_evt_detail_obj.status |= DMA_OBJ_ALLOCATED;
2943 3099
2944 3100 return (DDI_SUCCESS);
2945 3101
2946 3102 mrsas_undo_internal_buff:
2947 3103 if (instance->mfi_internal_dma_obj.status == DMA_OBJ_ALLOCATED) {
2948 3104 (void) mrsas_free_dma_obj(instance,
2949 3105 instance->mfi_internal_dma_obj);
2950 3106 instance->mfi_internal_dma_obj.status = DMA_OBJ_FREED;
2951 3107 }
2952 3108
2953 3109 return (DDI_FAILURE);
2954 3110 }
2955 3111
2956 3112
2957 3113 void
2958 3114 mrsas_free_cmd_pool(struct mrsas_instance *instance)
2959 3115 {
2960 3116 int i;
2961 3117 uint32_t max_cmd;
2962 3118 size_t sz;
2963 3119
2964 3120 /* already freed */
2965 3121 if (instance->cmd_list == NULL) {
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2966 3122 return;
2967 3123 }
2968 3124
2969 3125 max_cmd = instance->max_fw_cmds;
2970 3126
2971 3127 /* size of cmd_list array */
2972 3128 sz = sizeof (struct mrsas_cmd *) * max_cmd;
2973 3129
2974 3130 /* First free each cmd */
2975 3131 for (i = 0; i < max_cmd; i++) {
2976 - if (instance->cmd_list[i] != NULL)
2977 - kmem_free(instance->cmd_list[i],sizeof (struct mrsas_cmd));
3132 + if (instance->cmd_list[i] != NULL) {
3133 + kmem_free(instance->cmd_list[i],
3134 + sizeof (struct mrsas_cmd));
3135 + }
2978 3136
2979 3137 instance->cmd_list[i] = NULL;
2980 3138 }
2981 3139
2982 3140 /* Now, free cmd_list array */
2983 3141 if (instance->cmd_list != NULL)
2984 - kmem_free(instance->cmd_list,sz);
3142 + kmem_free(instance->cmd_list, sz);
2985 3143
2986 3144 instance->cmd_list = NULL;
2987 3145
2988 3146 INIT_LIST_HEAD(&instance->cmd_pool_list);
2989 3147 INIT_LIST_HEAD(&instance->cmd_pend_list);
2990 3148 if (instance->tbolt) {
2991 3149 INIT_LIST_HEAD(&instance->cmd_app_pool_list);
2992 - }
2993 - else {
3150 + } else {
2994 3151 INIT_LIST_HEAD(&instance->app_cmd_pool_list);
2995 3152 }
2996 3153
2997 3154 }
2998 3155
2999 3156
3000 3157 /*
3001 3158 * mrsas_alloc_cmd_pool
3002 3159 */
3003 3160 int
3004 3161 mrsas_alloc_cmd_pool(struct mrsas_instance *instance)
3005 3162 {
3006 3163 int i;
3007 3164 int count;
3008 3165 uint32_t max_cmd;
3009 3166 uint32_t reserve_cmd;
3010 3167 size_t sz;
3011 3168
3012 3169 struct mrsas_cmd *cmd;
3013 3170
3014 3171 max_cmd = instance->max_fw_cmds;
3015 3172 con_log(CL_ANN1, (CE_NOTE, "mrsas_alloc_cmd_pool: "
3016 3173 "max_cmd %x", max_cmd));
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3017 3174
3018 3175
3019 3176 sz = sizeof (struct mrsas_cmd *) * max_cmd;
3020 3177
3021 3178 /*
3022 3179 * instance->cmd_list is an array of struct mrsas_cmd pointers.
3023 3180 * Allocate the dynamic array first and then allocate individual
3024 3181 * commands.
3025 3182 */
3026 3183 instance->cmd_list = kmem_zalloc(sz, KM_SLEEP);
3027 - if (instance->cmd_list == NULL) {
3028 - con_log(CL_NONE, (CE_WARN,
3029 - "Failed to allocate memory for cmd_list"));
3030 - return (DDI_FAILURE);
3031 - }
3184 + ASSERT(instance->cmd_list);
3032 3185
3033 3186 /* create a frame pool and assign one frame to each cmd */
3034 3187 for (count = 0; count < max_cmd; count++) {
3035 - instance->cmd_list[count] = kmem_zalloc(sizeof (struct mrsas_cmd),
3036 - KM_SLEEP);
3037 - if (instance->cmd_list[count] == NULL) {
3038 - con_log(CL_NONE, (CE_WARN,
3039 - "Failed to allocate memory for mrsas_cmd"));
3040 - goto mrsas_undo_cmds;
3041 - }
3188 + instance->cmd_list[count] =
3189 + kmem_zalloc(sizeof (struct mrsas_cmd), KM_SLEEP);
3190 + ASSERT(instance->cmd_list[count]);
3042 3191 }
3043 3192
3044 3193 /* add all the commands to command pool */
3045 3194
3046 3195 INIT_LIST_HEAD(&instance->cmd_pool_list);
3047 3196 INIT_LIST_HEAD(&instance->cmd_pend_list);
3048 3197 INIT_LIST_HEAD(&instance->app_cmd_pool_list);
3049 3198
3050 - reserve_cmd = MRSAS_APP_RESERVED_CMDS;
3199 + reserve_cmd = MRSAS_APP_RESERVED_CMDS;
3051 3200
3052 - for (i = 0; i < reserve_cmd; i++) {
3053 - cmd = instance->cmd_list[i];
3054 - cmd->index = i;
3201 + for (i = 0; i < reserve_cmd; i++) {
3202 + cmd = instance->cmd_list[i];
3203 + cmd->index = i;
3055 3204 mlist_add_tail(&cmd->list, &instance->app_cmd_pool_list);
3056 3205 }
3057 -
3058 3206
3207 +
3059 3208 for (i = reserve_cmd; i < max_cmd; i++) {
3060 - cmd = instance->cmd_list[i];
3061 - cmd->index = i;
3209 + cmd = instance->cmd_list[i];
3210 + cmd->index = i;
3062 3211 mlist_add_tail(&cmd->list, &instance->cmd_pool_list);
3063 3212 }
3064 3213
3065 3214 return (DDI_SUCCESS);
3066 3215
3067 3216 mrsas_undo_cmds:
3068 3217 if (count > 0) {
3069 3218 /* free each cmd */
3070 3219 for (i = 0; i < count; i++) {
3071 - if (instance->cmd_list[i] != NULL)
3072 - kmem_free(instance->cmd_list[i],sizeof (struct mrsas_cmd));
3220 + if (instance->cmd_list[i] != NULL) {
3221 + kmem_free(instance->cmd_list[i],
3222 + sizeof (struct mrsas_cmd));
3223 + }
3073 3224 instance->cmd_list[i] = NULL;
3074 3225 }
3075 3226 }
3076 3227
3077 3228 mrsas_undo_cmd_list:
3078 3229 if (instance->cmd_list != NULL)
3079 - kmem_free(instance->cmd_list,sz);
3230 + kmem_free(instance->cmd_list, sz);
3080 3231 instance->cmd_list = NULL;
3081 3232
3082 3233 return (DDI_FAILURE);
3083 3234 }
3084 3235
3085 3236
3086 3237 /*
3087 3238 * free_space_for_mfi
3088 3239 */
3089 3240 static void
3090 3241 free_space_for_mfi(struct mrsas_instance *instance)
3091 3242 {
3092 3243
3093 3244 /* already freed */
3094 3245 if (instance->cmd_list == NULL) {
3095 3246 return;
3096 3247 }
3097 3248
3098 3249 /* Free additional dma buffer */
3099 3250 free_additional_dma_buffer(instance);
3100 3251
3101 3252 /* Free the MFI frame pool */
3102 3253 destroy_mfi_frame_pool(instance);
3103 3254
3104 3255 /* Free all the commands in the cmd_list */
|
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↑ open up ↑ |
3105 3256 /* Free the cmd_list buffer itself */
3106 3257 mrsas_free_cmd_pool(instance);
3107 3258 }
3108 3259
3109 3260 /*
3110 3261 * alloc_space_for_mfi
3111 3262 */
3112 3263 static int
3113 3264 alloc_space_for_mfi(struct mrsas_instance *instance)
3114 3265 {
3115 - /* Allocate command pool ( memory for cmd_list & individual commands )*/
3266 + /* Allocate command pool (memory for cmd_list & individual commands) */
3116 3267 if (mrsas_alloc_cmd_pool(instance)) {
3117 3268 cmn_err(CE_WARN, "error creating cmd pool");
3118 - return (DDI_FAILURE);
3269 + return (DDI_FAILURE);
3119 3270 }
3120 3271
3121 3272 /* Allocate MFI Frame pool */
3122 3273 if (create_mfi_frame_pool(instance)) {
3123 3274 cmn_err(CE_WARN, "error creating frame DMA pool");
3124 3275 goto mfi_undo_cmd_pool;
3125 3276 }
3126 3277
3127 3278 /* Allocate additional DMA buffer */
3128 3279 if (alloc_additional_dma_buffer(instance)) {
3129 3280 cmn_err(CE_WARN, "error creating frame DMA pool");
3130 3281 goto mfi_undo_frame_pool;
3131 3282 }
3132 3283
3133 3284 return (DDI_SUCCESS);
3134 3285
3135 3286 mfi_undo_frame_pool:
3136 3287 destroy_mfi_frame_pool(instance);
3137 3288
3138 3289 mfi_undo_cmd_pool:
3139 3290 mrsas_free_cmd_pool(instance);
3140 3291
3141 3292 return (DDI_FAILURE);
3142 3293 }
3143 3294
3144 3295
3145 3296
3146 3297 /*
3147 3298 * get_ctrl_info
3148 3299 */
|
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3149 3300 static int
3150 3301 get_ctrl_info(struct mrsas_instance *instance,
3151 3302 struct mrsas_ctrl_info *ctrl_info)
3152 3303 {
3153 3304 int ret = 0;
3154 3305
3155 3306 struct mrsas_cmd *cmd;
3156 3307 struct mrsas_dcmd_frame *dcmd;
3157 3308 struct mrsas_ctrl_info *ci;
3158 3309
3159 - if(instance->tbolt) {
3310 + if (instance->tbolt) {
3160 3311 cmd = get_raid_msg_mfi_pkt(instance);
3161 - }
3162 - else {
3312 + } else {
3163 3313 cmd = get_mfi_pkt(instance);
3164 3314 }
3165 3315
3166 3316 if (!cmd) {
3167 - cmn_err(CE_WARN,
3168 - "Failed to get a cmd from free-pool in get_ctrl_info(). fw_outstanding=0x%X max_fw_cmds=0x%X",
3169 - instance->fw_outstanding, instance->max_fw_cmds);
3317 + con_log(CL_ANN, (CE_WARN,
3318 + "Failed to get a cmd for ctrl info"));
3319 + DTRACE_PROBE2(info_mfi_err, uint16_t, instance->fw_outstanding,
3320 + uint16_t, instance->max_fw_cmds);
3170 3321 return (DDI_FAILURE);
3171 3322 }
3172 3323
3173 3324 /* Clear the frame buffer and assign back the context id */
3174 3325 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3175 3326 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3176 3327 cmd->index);
3177 3328
3178 3329 dcmd = &cmd->frame->dcmd;
3179 3330
3180 3331 ci = (struct mrsas_ctrl_info *)instance->internal_buf;
3181 3332
3182 3333 if (!ci) {
3183 3334 cmn_err(CE_WARN,
3184 3335 "Failed to alloc mem for ctrl info");
3185 3336 return_mfi_pkt(instance, cmd);
3186 3337 return (DDI_FAILURE);
3187 3338 }
3188 3339
3189 3340 (void) memset(ci, 0, sizeof (struct mrsas_ctrl_info));
3190 3341
3191 3342 /* for( i = 0; i < DCMD_MBOX_SZ; i++ ) dcmd->mbox.b[i] = 0; */
3192 3343 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
3193 3344
3194 3345 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
3195 3346 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status,
3196 3347 MFI_CMD_STATUS_POLL_MODE);
3197 3348 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 1);
3198 3349 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
3199 3350 MFI_FRAME_DIR_READ);
3200 3351 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
3201 3352 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len,
3202 3353 sizeof (struct mrsas_ctrl_info));
|
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3203 3354 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
3204 3355 MR_DCMD_CTRL_GET_INFO);
3205 3356 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].phys_addr,
3206 3357 instance->internal_buf_dmac_add);
3207 3358 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].length,
3208 3359 sizeof (struct mrsas_ctrl_info));
3209 3360
3210 3361 cmd->frame_count = 1;
3211 3362
3212 3363 if (instance->tbolt) {
3213 - mr_sas_tbolt_build_mfi_cmd(instance, cmd);
3214 - }
3215 -
3364 + mr_sas_tbolt_build_mfi_cmd(instance, cmd);
3365 + }
3366 +
3216 3367 if (!instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3217 - ret = 0;
3368 + ret = 0;
3218 3369
3219 - ctrl_info->max_request_size = ddi_get32(
3220 - cmd->frame_dma_obj.acc_handle, &ci->max_request_size);
3370 + ctrl_info->max_request_size = ddi_get32(
3371 + cmd->frame_dma_obj.acc_handle, &ci->max_request_size);
3221 3372
3222 - ctrl_info->ld_present_count = ddi_get16(
3223 - cmd->frame_dma_obj.acc_handle, &ci->ld_present_count);
3373 + ctrl_info->ld_present_count = ddi_get16(
3374 + cmd->frame_dma_obj.acc_handle, &ci->ld_present_count);
3224 3375
3225 - ctrl_info->properties.on_off_properties =
3226 - ddi_get32(cmd->frame_dma_obj.acc_handle,
3227 - &ci->properties.on_off_properties);
3228 - ddi_rep_get8(cmd->frame_dma_obj.acc_handle,
3229 - (uint8_t *)(ctrl_info->product_name),
3230 - (uint8_t *)(ci->product_name), 80 * sizeof (char),
3231 - DDI_DEV_AUTOINCR);
3232 - /* should get more members of ci with ddi_get when needed */
3376 + ctrl_info->properties.on_off_properties = ddi_get32(
3377 + cmd->frame_dma_obj.acc_handle,
3378 + &ci->properties.on_off_properties);
3379 + ddi_rep_get8(cmd->frame_dma_obj.acc_handle,
3380 + (uint8_t *)(ctrl_info->product_name),
3381 + (uint8_t *)(ci->product_name), 80 * sizeof (char),
3382 + DDI_DEV_AUTOINCR);
3383 + /* should get more members of ci with ddi_get when needed */
3233 3384 } else {
3234 3385 cmn_err(CE_WARN, "get_ctrl_info: Ctrl info failed");
3235 3386 ret = -1;
3236 3387 }
3237 3388
3238 - if(instance->tbolt) {
3239 - return_raid_msg_mfi_pkt(instance, cmd);
3389 + if (mrsas_common_check(instance, cmd) != DDI_SUCCESS) {
3390 + ret = -1;
3240 3391 }
3241 - else {
3392 + if (instance->tbolt) {
3393 + return_raid_msg_mfi_pkt(instance, cmd);
3394 + } else {
3242 3395 return_mfi_pkt(instance, cmd);
3243 3396 }
3244 -
3397 +
3245 3398 return (ret);
3246 3399 }
3247 3400
3248 3401 /*
3249 3402 * abort_aen_cmd
3250 3403 */
3251 3404 static int
3252 3405 abort_aen_cmd(struct mrsas_instance *instance,
3253 3406 struct mrsas_cmd *cmd_to_abort)
3254 3407 {
3255 3408 int ret = 0;
3256 3409
3257 3410 struct mrsas_cmd *cmd;
3258 3411 struct mrsas_abort_frame *abort_fr;
|
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3259 3412
3260 3413 con_log(CL_ANN1, (CE_NOTE, "chkpnt: abort_aen:%d", __LINE__));
3261 3414
3262 3415 if (instance->tbolt) {
3263 3416 cmd = get_raid_msg_mfi_pkt(instance);
3264 3417 } else {
3265 3418 cmd = get_mfi_pkt(instance);
3266 3419 }
3267 3420
3268 3421 if (!cmd) {
3269 - cmn_err(CE_WARN,
3270 - "Failed to get a cmd from free-pool in abort_aen_cmd(). fw_outstanding=0x%X max_fw_cmds=0x%X",
3271 - instance->fw_outstanding, instance->max_fw_cmds);
3422 + con_log(CL_ANN1, (CE_WARN,
3423 + "abort_aen_cmd():Failed to get a cmd for abort_aen_cmd"));
3424 + DTRACE_PROBE2(abort_mfi_err, uint16_t, instance->fw_outstanding,
3425 + uint16_t, instance->max_fw_cmds);
3272 3426 return (DDI_FAILURE);
3273 3427 }
3428 +
3274 3429 /* Clear the frame buffer and assign back the context id */
3275 3430 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3276 3431 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3277 3432 cmd->index);
3278 3433
3279 3434 abort_fr = &cmd->frame->abort;
3280 3435
3281 3436 /* prepare and issue the abort frame */
3282 3437 ddi_put8(cmd->frame_dma_obj.acc_handle,
3283 3438 &abort_fr->cmd, MFI_CMD_OP_ABORT);
3284 3439 ddi_put8(cmd->frame_dma_obj.acc_handle, &abort_fr->cmd_status,
3285 3440 MFI_CMD_STATUS_SYNC_MODE);
3286 3441 ddi_put16(cmd->frame_dma_obj.acc_handle, &abort_fr->flags, 0);
3287 3442 ddi_put32(cmd->frame_dma_obj.acc_handle, &abort_fr->abort_context,
3288 3443 cmd_to_abort->index);
3289 3444 ddi_put32(cmd->frame_dma_obj.acc_handle,
3290 3445 &abort_fr->abort_mfi_phys_addr_lo, cmd_to_abort->frame_phys_addr);
3291 3446 ddi_put32(cmd->frame_dma_obj.acc_handle,
3292 3447 &abort_fr->abort_mfi_phys_addr_hi, 0);
3293 3448
3294 3449 instance->aen_cmd->abort_aen = 1;
3295 3450
3296 3451 cmd->frame_count = 1;
3297 3452
3298 3453 if (instance->tbolt) {
3299 3454 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
3300 3455 }
3301 3456
3302 3457 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3303 3458 con_log(CL_ANN1, (CE_WARN,
3304 3459 "abort_aen_cmd: issue_cmd_in_poll_mode failed"));
3305 3460 ret = -1;
3306 3461 } else {
3307 3462 ret = 0;
3308 3463 }
3309 3464
3310 3465 instance->aen_cmd->abort_aen = 1;
3311 3466 instance->aen_cmd = 0;
3312 3467
3313 3468 if (instance->tbolt) {
3314 3469 return_raid_msg_mfi_pkt(instance, cmd);
3315 3470 } else {
|
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32 lines elided |
↑ open up ↑ |
3316 3471 return_mfi_pkt(instance, cmd);
3317 3472 }
3318 3473
3319 3474 atomic_add_16(&instance->fw_outstanding, (-1));
3320 3475
3321 3476 return (ret);
3322 3477 }
3323 3478
3324 3479
3325 3480 static int
3326 -mrsas_build_init_cmd(struct mrsas_instance *instance, struct mrsas_cmd **cmd_ptr)
3481 +mrsas_build_init_cmd(struct mrsas_instance *instance,
3482 + struct mrsas_cmd **cmd_ptr)
3327 3483 {
3328 3484 struct mrsas_cmd *cmd;
3329 3485 struct mrsas_init_frame *init_frame;
3330 3486 struct mrsas_init_queue_info *initq_info;
3331 - struct mrsas_drv_ver drv_ver_info;
3487 + struct mrsas_drv_ver drv_ver_info;
3332 3488
3333 3489
3334 3490 /*
3335 3491 * Prepare a init frame. Note the init frame points to queue info
3336 3492 * structure. Each frame has SGL allocated after first 64 bytes. For
3337 3493 * this frame - since we don't need any SGL - we use SGL's space as
3338 3494 * queue info structure
3339 3495 */
3340 3496 cmd = *cmd_ptr;
3341 3497
3342 3498
3343 3499 /* Clear the frame buffer and assign back the context id */
3344 3500 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3345 3501 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3346 3502 cmd->index);
3347 3503
3348 3504 init_frame = (struct mrsas_init_frame *)cmd->frame;
3349 3505 initq_info = (struct mrsas_init_queue_info *)
3350 3506 ((unsigned long)init_frame + 64);
3351 3507
3352 3508 (void) memset(init_frame, 0, MRMFI_FRAME_SIZE);
3353 3509 (void) memset(initq_info, 0, sizeof (struct mrsas_init_queue_info));
3354 3510
3355 3511 ddi_put32(cmd->frame_dma_obj.acc_handle, &initq_info->init_flags, 0);
3356 3512
3357 3513 ddi_put32(cmd->frame_dma_obj.acc_handle,
3358 3514 &initq_info->reply_queue_entries, instance->max_fw_cmds + 1);
3359 3515
3360 3516 ddi_put32(cmd->frame_dma_obj.acc_handle,
3361 3517 &initq_info->producer_index_phys_addr_hi, 0);
3362 3518 ddi_put32(cmd->frame_dma_obj.acc_handle,
3363 3519 &initq_info->producer_index_phys_addr_lo,
3364 3520 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address);
3365 3521
3366 3522 ddi_put32(cmd->frame_dma_obj.acc_handle,
3367 3523 &initq_info->consumer_index_phys_addr_hi, 0);
3368 3524 ddi_put32(cmd->frame_dma_obj.acc_handle,
3369 3525 &initq_info->consumer_index_phys_addr_lo,
3370 3526 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 4);
3371 3527
3372 3528 ddi_put32(cmd->frame_dma_obj.acc_handle,
3373 3529 &initq_info->reply_queue_start_phys_addr_hi, 0);
3374 3530 ddi_put32(cmd->frame_dma_obj.acc_handle,
3375 3531 &initq_info->reply_queue_start_phys_addr_lo,
3376 3532 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 8);
3377 3533
3378 3534 ddi_put8(cmd->frame_dma_obj.acc_handle,
3379 3535 &init_frame->cmd, MFI_CMD_OP_INIT);
|
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38 lines elided |
↑ open up ↑ |
3380 3536 ddi_put8(cmd->frame_dma_obj.acc_handle, &init_frame->cmd_status,
3381 3537 MFI_CMD_STATUS_POLL_MODE);
3382 3538 ddi_put16(cmd->frame_dma_obj.acc_handle, &init_frame->flags, 0);
3383 3539 ddi_put32(cmd->frame_dma_obj.acc_handle,
3384 3540 &init_frame->queue_info_new_phys_addr_lo,
3385 3541 cmd->frame_phys_addr + 64);
3386 3542 ddi_put32(cmd->frame_dma_obj.acc_handle,
3387 3543 &init_frame->queue_info_new_phys_addr_hi, 0);
3388 3544
3389 3545
3390 - /* fill driver version information*/
3546 + /* fill driver version information */
3391 3547 fill_up_drv_ver(&drv_ver_info);
3392 3548
3393 3549 /* allocate the driver version data transfer buffer */
3394 - instance->drv_ver_dma_obj.size = sizeof(drv_ver_info.drv_ver);
3550 + instance->drv_ver_dma_obj.size = sizeof (drv_ver_info.drv_ver);
3395 3551 instance->drv_ver_dma_obj.dma_attr = mrsas_generic_dma_attr;
3396 3552 instance->drv_ver_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
3397 3553 instance->drv_ver_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
3398 3554 instance->drv_ver_dma_obj.dma_attr.dma_attr_sgllen = 1;
3399 3555 instance->drv_ver_dma_obj.dma_attr.dma_attr_align = 1;
3400 3556
3401 3557 if (mrsas_alloc_dma_obj(instance, &instance->drv_ver_dma_obj,
3402 3558 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
3403 3559 con_log(CL_ANN, (CE_WARN,
3404 3560 "init_mfi : Could not allocate driver version buffer."));
3405 3561 return (DDI_FAILURE);
3406 3562 }
3407 - /* copy driver version to dma buffer*/
3408 - (void) memset(instance->drv_ver_dma_obj.buffer, 0,sizeof(drv_ver_info.drv_ver));
3563 + /* copy driver version to dma buffer */
3564 + (void) memset(instance->drv_ver_dma_obj.buffer, 0,
3565 + sizeof (drv_ver_info.drv_ver));
3409 3566 ddi_rep_put8(cmd->frame_dma_obj.acc_handle,
3410 - (uint8_t *)drv_ver_info.drv_ver,
3411 - (uint8_t *)instance->drv_ver_dma_obj.buffer,
3412 - sizeof(drv_ver_info.drv_ver), DDI_DEV_AUTOINCR);
3567 + (uint8_t *)drv_ver_info.drv_ver,
3568 + (uint8_t *)instance->drv_ver_dma_obj.buffer,
3569 + sizeof (drv_ver_info.drv_ver), DDI_DEV_AUTOINCR);
3413 3570
3414 3571
3415 - /*copy driver version physical address to init frame*/
3416 - ddi_put64(cmd->frame_dma_obj.acc_handle,
3417 - &init_frame->driverversion, instance->drv_ver_dma_obj.dma_cookie[0].dmac_address);
3572 + /* copy driver version physical address to init frame */
3573 + ddi_put64(cmd->frame_dma_obj.acc_handle, &init_frame->driverversion,
3574 + instance->drv_ver_dma_obj.dma_cookie[0].dmac_address);
3418 3575
3419 3576 ddi_put32(cmd->frame_dma_obj.acc_handle, &init_frame->data_xfer_len,
3420 3577 sizeof (struct mrsas_init_queue_info));
3421 3578
3422 3579 cmd->frame_count = 1;
3423 3580
3424 3581 *cmd_ptr = cmd;
3425 3582
3426 3583 return (DDI_SUCCESS);
3427 3584 }
3428 3585
3429 3586
3430 3587 /*
3431 3588 * mrsas_init_adapter_ppc - Initialize MFI interface adapter.
3432 3589 */
3433 3590 int
3434 -mrsas_init_adapter_ppc (struct mrsas_instance *instance)
3591 +mrsas_init_adapter_ppc(struct mrsas_instance *instance)
3435 3592 {
3436 3593 struct mrsas_cmd *cmd;
3437 3594
3438 - /* allocate memory for mfi adapter(cmd pool, individual commands, mfi frames etc */
3439 - if (alloc_space_for_mfi(instance) != DDI_SUCCESS){
3595 + /*
3596 + * allocate memory for mfi adapter(cmd pool, individual commands, mfi
3597 + * frames etc
3598 + */
3599 + if (alloc_space_for_mfi(instance) != DDI_SUCCESS) {
3440 3600 con_log(CL_ANN, (CE_NOTE,
3441 - "Error, failed to allocate memory for MFI adapter"));
3442 - return (DDI_FAILURE);
3601 + "Error, failed to allocate memory for MFI adapter"));
3602 + return (DDI_FAILURE);
3443 3603 }
3444 3604
3445 3605 /* Build INIT command */
3446 3606 cmd = get_mfi_pkt(instance);
3447 3607
3448 - if (mrsas_build_init_cmd(instance, &cmd) != DDI_SUCCESS){
3449 - con_log(CL_ANN, (CE_NOTE,
3450 - "Error, failed to build INIT command"));
3608 + if (mrsas_build_init_cmd(instance, &cmd) != DDI_SUCCESS) {
3609 + con_log(CL_ANN,
3610 + (CE_NOTE, "Error, failed to build INIT command"));
3451 3611
3452 3612 goto fail_undo_alloc_mfi_space;
3453 3613 }
3454 3614
3455 - //Disalbe interrupt before sending init frame ( see linux driver code)
3456 - /* send INIT MFI frame in polled mode */
3615 + /*
3616 + * Disable interrupt before sending init frame ( see linux driver code)
3617 + * send INIT MFI frame in polled mode
3618 + */
3457 3619 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3458 3620 con_log(CL_ANN, (CE_WARN, "failed to init firmware"));
3459 3621 goto fail_fw_init;
3460 3622 }
3461 3623
3462 - if (instance->func_ptr->read_fw_status_reg(instance) & 0x04000000) {
3624 + if (mrsas_common_check(instance, cmd) != DDI_SUCCESS)
3625 + goto fail_fw_init;
3626 + return_mfi_pkt(instance, cmd);
3627 +
3628 + if (ctio_enable &&
3629 + (instance->func_ptr->read_fw_status_reg(instance) & 0x04000000)) {
3463 3630 con_log(CL_ANN, (CE_NOTE, "mr_sas: IEEE SGL's supported"));
3464 3631 instance->flag_ieee = 1;
3632 + } else {
3633 + instance->flag_ieee = 0;
3465 3634 }
3466 3635
3467 3636 instance->unroll.alloc_space_mfi = 1;
3468 3637 instance->unroll.verBuff = 1;
3469 3638
3470 3639 return (DDI_SUCCESS);
3471 3640
3472 3641
3473 3642 fail_fw_init:
3474 - mrsas_free_dma_obj(instance, instance->drv_ver_dma_obj);
3643 + (void) mrsas_free_dma_obj(instance, instance->drv_ver_dma_obj);
3475 3644
3476 3645 fail_undo_alloc_mfi_space:
3477 3646 return_mfi_pkt(instance, cmd);
3478 3647 free_space_for_mfi(instance);
3479 3648
3480 3649 return (DDI_FAILURE);
3481 3650
3482 3651 }
3483 3652
3484 3653 /*
3485 3654 * mrsas_init_adapter - Initialize adapter.
3486 3655 */
3487 3656 int
3488 -mrsas_init_adapter (struct mrsas_instance *instance)
3657 +mrsas_init_adapter(struct mrsas_instance *instance)
3489 3658 {
3490 3659 struct mrsas_ctrl_info ctrl_info;
3491 3660
3492 3661
3493 3662 /* we expect the FW state to be READY */
3494 3663 if (mfi_state_transition_to_ready(instance)) {
3495 3664 con_log(CL_ANN, (CE_WARN, "mr_sas: F/W is not ready"));
3496 3665 return (DDI_FAILURE);
3497 3666 }
3498 3667
3499 3668 /* get various operational parameters from status register */
3500 3669 instance->max_num_sge =
3501 3670 (instance->func_ptr->read_fw_status_reg(instance) &
3502 3671 0xFF0000) >> 0x10;
3503 3672 instance->max_num_sge =
3504 3673 (instance->max_num_sge > MRSAS_MAX_SGE_CNT) ?
3505 3674 MRSAS_MAX_SGE_CNT : instance->max_num_sge;
3506 3675
3507 3676 /*
3508 3677 * Reduce the max supported cmds by 1. This is to ensure that the
3509 3678 * reply_q_sz (1 more than the max cmd that driver may send)
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3510 3679 * does not exceed max cmds that the FW can support
3511 3680 */
3512 3681 instance->max_fw_cmds =
3513 3682 instance->func_ptr->read_fw_status_reg(instance) & 0xFFFF;
3514 3683 instance->max_fw_cmds = instance->max_fw_cmds - 1;
3515 3684
3516 3685
3517 3686
3518 3687 /* Initialize adapter */
3519 3688 if (instance->func_ptr->init_adapter(instance) != DDI_SUCCESS) {
3520 - con_log(CL_ANN, (CE_WARN, "mr_sas: "
3521 - "could not initialize adapter"));
3689 + con_log(CL_ANN,
3690 + (CE_WARN, "mr_sas: could not initialize adapter"));
3522 3691 return (DDI_FAILURE);
3523 3692 }
3524 -
3693 +
3525 3694 /* gather misc FW related information */
3526 3695 instance->disable_online_ctrl_reset = 0;
3527 3696
3528 3697 if (!get_ctrl_info(instance, &ctrl_info)) {
3529 3698 instance->max_sectors_per_req = ctrl_info.max_request_size;
3530 3699 con_log(CL_ANN1, (CE_NOTE,
3531 3700 "product name %s ld present %d",
3532 3701 ctrl_info.product_name, ctrl_info.ld_present_count));
3533 3702 } else {
3534 3703 instance->max_sectors_per_req = instance->max_num_sge *
3535 3704 PAGESIZE / 512;
3536 3705 }
3537 3706
3538 - if (ctrl_info.properties.on_off_properties & DISABLE_OCR_PROP_FLAG) {
3707 + if (ctrl_info.properties.on_off_properties & DISABLE_OCR_PROP_FLAG)
3539 3708 instance->disable_online_ctrl_reset = 1;
3540 - con_log(CL_ANN1, (CE_NOTE,
3541 - "Disable online control Flag is set\n"));
3542 - }
3543 - else {
3544 - con_log(CL_ANN1, (CE_NOTE,
3545 - "Disable online control Flag is not set\n"));
3546 - }
3547 3709
3548 3710 return (DDI_SUCCESS);
3549 3711
3550 3712 }
3551 3713
3552 3714
3553 3715
3554 3716 static int
3555 3717 mrsas_issue_init_mfi(struct mrsas_instance *instance)
3556 3718 {
3557 3719 struct mrsas_cmd *cmd;
3558 3720 struct mrsas_init_frame *init_frame;
3559 3721 struct mrsas_init_queue_info *initq_info;
3560 3722
3561 3723 /*
3562 3724 * Prepare a init frame. Note the init frame points to queue info
3563 3725 * structure. Each frame has SGL allocated after first 64 bytes. For
3564 3726 * this frame - since we don't need any SGL - we use SGL's space as
3565 3727 * queue info structure
3566 3728 */
3567 3729 con_log(CL_ANN1, (CE_NOTE,
3568 3730 "mrsas_issue_init_mfi: entry\n"));
3569 3731 cmd = get_mfi_app_pkt(instance);
3570 3732
3571 3733 if (!cmd) {
3572 3734 con_log(CL_ANN1, (CE_WARN,
3573 3735 "mrsas_issue_init_mfi: get_pkt failed\n"));
3574 3736 return (DDI_FAILURE);
3575 3737 }
3576 3738
3577 3739 /* Clear the frame buffer and assign back the context id */
3578 3740 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3579 3741 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3580 3742 cmd->index);
3581 3743
3582 3744 init_frame = (struct mrsas_init_frame *)cmd->frame;
3583 3745 initq_info = (struct mrsas_init_queue_info *)
3584 3746 ((unsigned long)init_frame + 64);
3585 3747
3586 3748 (void) memset(init_frame, 0, MRMFI_FRAME_SIZE);
3587 3749 (void) memset(initq_info, 0, sizeof (struct mrsas_init_queue_info));
3588 3750
3589 3751 ddi_put32(cmd->frame_dma_obj.acc_handle, &initq_info->init_flags, 0);
3590 3752
3591 3753 ddi_put32(cmd->frame_dma_obj.acc_handle,
3592 3754 &initq_info->reply_queue_entries, instance->max_fw_cmds + 1);
3593 3755 ddi_put32(cmd->frame_dma_obj.acc_handle,
3594 3756 &initq_info->producer_index_phys_addr_hi, 0);
3595 3757 ddi_put32(cmd->frame_dma_obj.acc_handle,
3596 3758 &initq_info->producer_index_phys_addr_lo,
3597 3759 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address);
3598 3760 ddi_put32(cmd->frame_dma_obj.acc_handle,
3599 3761 &initq_info->consumer_index_phys_addr_hi, 0);
3600 3762 ddi_put32(cmd->frame_dma_obj.acc_handle,
3601 3763 &initq_info->consumer_index_phys_addr_lo,
3602 3764 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 4);
3603 3765
3604 3766 ddi_put32(cmd->frame_dma_obj.acc_handle,
3605 3767 &initq_info->reply_queue_start_phys_addr_hi, 0);
3606 3768 ddi_put32(cmd->frame_dma_obj.acc_handle,
3607 3769 &initq_info->reply_queue_start_phys_addr_lo,
3608 3770 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 8);
3609 3771
3610 3772 ddi_put8(cmd->frame_dma_obj.acc_handle,
3611 3773 &init_frame->cmd, MFI_CMD_OP_INIT);
3612 3774 ddi_put8(cmd->frame_dma_obj.acc_handle, &init_frame->cmd_status,
3613 3775 MFI_CMD_STATUS_POLL_MODE);
3614 3776 ddi_put16(cmd->frame_dma_obj.acc_handle, &init_frame->flags, 0);
3615 3777 ddi_put32(cmd->frame_dma_obj.acc_handle,
3616 3778 &init_frame->queue_info_new_phys_addr_lo,
3617 3779 cmd->frame_phys_addr + 64);
3618 3780 ddi_put32(cmd->frame_dma_obj.acc_handle,
3619 3781 &init_frame->queue_info_new_phys_addr_hi, 0);
3620 3782
3621 3783 ddi_put32(cmd->frame_dma_obj.acc_handle, &init_frame->data_xfer_len,
3622 3784 sizeof (struct mrsas_init_queue_info));
3623 3785
3624 3786 cmd->frame_count = 1;
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3625 3787
3626 3788 /* issue the init frame in polled mode */
3627 3789 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3628 3790 con_log(CL_ANN1, (CE_WARN,
3629 3791 "mrsas_issue_init_mfi():failed to "
3630 3792 "init firmware"));
3631 3793 return_mfi_app_pkt(instance, cmd);
3632 3794 return (DDI_FAILURE);
3633 3795 }
3634 3796
3797 + if (mrsas_common_check(instance, cmd) != DDI_SUCCESS) {
3798 + return_mfi_pkt(instance, cmd);
3799 + return (DDI_FAILURE);
3800 + }
3801 +
3635 3802 return_mfi_app_pkt(instance, cmd);
3636 3803 con_log(CL_ANN1, (CE_CONT, "mrsas_issue_init_mfi: Done"));
3637 3804
3638 3805 return (DDI_SUCCESS);
3639 3806 }
3640 3807 /*
3641 3808 * mfi_state_transition_to_ready : Move the FW to READY state
3642 3809 *
3643 3810 * @reg_set : MFI register set
3644 3811 */
3645 3812 int
3646 3813 mfi_state_transition_to_ready(struct mrsas_instance *instance)
3647 3814 {
3648 3815 int i;
3649 3816 uint8_t max_wait;
3650 3817 uint32_t fw_ctrl = 0;
3651 3818 uint32_t fw_state;
3652 3819 uint32_t cur_state;
3653 3820 uint32_t cur_abs_reg_val;
3654 3821 uint32_t prev_abs_reg_val;
3655 3822 uint32_t status;
3656 3823
3657 3824 cur_abs_reg_val =
3658 3825 instance->func_ptr->read_fw_status_reg(instance);
3659 3826 fw_state =
3660 3827 cur_abs_reg_val & MFI_STATE_MASK;
3661 3828 con_log(CL_ANN1, (CE_CONT,
3662 3829 "mfi_state_transition_to_ready:FW state = 0x%x", fw_state));
3663 3830
3664 3831 while (fw_state != MFI_STATE_READY) {
3665 3832 con_log(CL_ANN, (CE_CONT,
3666 3833 "mfi_state_transition_to_ready:FW state%x", fw_state));
3667 3834
3668 3835 switch (fw_state) {
3669 3836 case MFI_STATE_FAULT:
3670 3837 con_log(CL_ANN, (CE_NOTE,
3671 3838 "mr_sas: FW in FAULT state!!"));
3672 3839
3673 3840 return (ENODEV);
3674 3841 case MFI_STATE_WAIT_HANDSHAKE:
3675 3842 /* set the CLR bit in IMR0 */
3676 3843 con_log(CL_ANN1, (CE_NOTE,
3677 3844 "mr_sas: FW waiting for HANDSHAKE"));
3678 3845 /*
3679 3846 * PCI_Hot Plug: MFI F/W requires
3680 3847 * (MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG)
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36 lines elided |
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3681 3848 * to be set
3682 3849 */
3683 3850 /* WR_IB_MSG_0(MFI_INIT_CLEAR_HANDSHAKE, instance); */
3684 3851 if (!instance->tbolt) {
3685 3852 WR_IB_DOORBELL(MFI_INIT_CLEAR_HANDSHAKE |
3686 3853 MFI_INIT_HOTPLUG, instance);
3687 3854 } else {
3688 3855 WR_RESERVED0_REGISTER(MFI_INIT_CLEAR_HANDSHAKE |
3689 3856 MFI_INIT_HOTPLUG, instance);
3690 3857 }
3691 - max_wait = (instance->tbolt == 1) ? 180 : 2;
3858 + max_wait = (instance->tbolt == 1) ? 180 : 2;
3692 3859 cur_state = MFI_STATE_WAIT_HANDSHAKE;
3693 3860 break;
3694 3861 case MFI_STATE_BOOT_MESSAGE_PENDING:
3695 3862 /* set the CLR bit in IMR0 */
3696 3863 con_log(CL_ANN1, (CE_NOTE,
3697 3864 "mr_sas: FW state boot message pending"));
3698 3865 /*
3699 3866 * PCI_Hot Plug: MFI F/W requires
3700 3867 * (MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG)
3701 3868 * to be set
3702 3869 */
3703 3870 if (!instance->tbolt) {
3704 3871 WR_IB_DOORBELL(MFI_INIT_HOTPLUG, instance);
3705 3872 } else {
3706 3873 WR_RESERVED0_REGISTER(MFI_INIT_HOTPLUG,
3707 3874 instance);
3708 3875 }
3709 - max_wait = (instance->tbolt == 1) ? 180 : 10;
3876 + max_wait = (instance->tbolt == 1) ? 180 : 10;
3710 3877 cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
3711 3878 break;
3712 3879 case MFI_STATE_OPERATIONAL:
3713 3880 /* bring it to READY state; assuming max wait 2 secs */
3714 3881 instance->func_ptr->disable_intr(instance);
3715 3882 con_log(CL_ANN1, (CE_NOTE,
3716 3883 "mr_sas: FW in OPERATIONAL state"));
3717 3884 /*
3718 3885 * PCI_Hot Plug: MFI F/W requires
3719 3886 * (MFI_INIT_READY | MFI_INIT_MFIMODE | MFI_INIT_ABORT)
3720 3887 * to be set
3721 3888 */
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3722 3889 /* WR_IB_DOORBELL(MFI_INIT_READY, instance); */
3723 3890 if (!instance->tbolt) {
3724 3891 WR_IB_DOORBELL(MFI_RESET_FLAGS, instance);
3725 3892 } else {
3726 3893 WR_RESERVED0_REGISTER(MFI_RESET_FLAGS,
3727 3894 instance);
3728 3895
3729 3896 for (i = 0; i < (10 * 1000); i++) {
3730 3897 status =
3731 3898 RD_RESERVED0_REGISTER(instance);
3732 - if (status & 1)
3899 + if (status & 1) {
3733 3900 delay(1 *
3734 3901 drv_usectohz(MILLISEC));
3735 - else
3902 + } else {
3736 3903 break;
3904 + }
3737 3905 }
3738 3906
3739 3907 }
3740 - max_wait = (instance->tbolt == 1) ? 180 : 10;
3908 + max_wait = (instance->tbolt == 1) ? 180 : 10;
3741 3909 cur_state = MFI_STATE_OPERATIONAL;
3742 3910 break;
3743 3911 case MFI_STATE_UNDEFINED:
3744 3912 /* this state should not last for more than 2 seconds */
3745 3913 con_log(CL_ANN1, (CE_NOTE, "FW state undefined"));
3746 3914
3747 - max_wait = (instance->tbolt == 1) ? 180 : 2;
3915 + max_wait = (instance->tbolt == 1) ? 180 : 2;
3748 3916 cur_state = MFI_STATE_UNDEFINED;
3749 3917 break;
3750 3918 case MFI_STATE_BB_INIT:
3751 - max_wait = (instance->tbolt == 1) ? 180 : 2;
3919 + max_wait = (instance->tbolt == 1) ? 180 : 2;
3752 3920 cur_state = MFI_STATE_BB_INIT;
3753 3921 break;
3754 3922 case MFI_STATE_FW_INIT:
3755 - max_wait = (instance->tbolt == 1) ? 180 : 2;
3923 + max_wait = (instance->tbolt == 1) ? 180 : 2;
3756 3924 cur_state = MFI_STATE_FW_INIT;
3757 3925 break;
3758 3926 case MFI_STATE_FW_INIT_2:
3759 - max_wait = 180;
3927 + max_wait = 180;
3760 3928 cur_state = MFI_STATE_FW_INIT_2;
3761 3929 break;
3762 3930 case MFI_STATE_DEVICE_SCAN:
3763 3931 max_wait = 180;
3764 3932 cur_state = MFI_STATE_DEVICE_SCAN;
3765 3933 prev_abs_reg_val = cur_abs_reg_val;
3766 3934 con_log(CL_NONE, (CE_NOTE,
3767 3935 "Device scan in progress ...\n"));
3768 3936 break;
3769 3937 case MFI_STATE_FLUSH_CACHE:
3770 - max_wait = 180;
3938 + max_wait = 180;
3771 3939 cur_state = MFI_STATE_FLUSH_CACHE;
3772 3940 break;
3773 3941 default:
3774 3942 con_log(CL_ANN1, (CE_NOTE,
3775 3943 "mr_sas: Unknown state 0x%x", fw_state));
3776 3944 return (ENODEV);
3777 3945 }
3778 3946
3779 3947 /* the cur_state should not last for more than max_wait secs */
3780 3948 for (i = 0; i < (max_wait * MILLISEC); i++) {
3781 3949 /* fw_state = RD_OB_MSG_0(instance) & MFI_STATE_MASK; */
3782 3950 cur_abs_reg_val =
3783 3951 instance->func_ptr->read_fw_status_reg(instance);
3784 3952 fw_state = cur_abs_reg_val & MFI_STATE_MASK;
3785 3953
3786 3954 if (fw_state == cur_state) {
3787 3955 delay(1 * drv_usectohz(MILLISEC));
3788 3956 } else {
3789 3957 break;
3790 3958 }
3791 3959 }
3792 3960 if (fw_state == MFI_STATE_DEVICE_SCAN) {
3793 3961 if (prev_abs_reg_val != cur_abs_reg_val) {
3794 3962 continue;
3795 3963 }
3796 3964 }
3797 3965
3798 3966 /* return error if fw_state hasn't changed after max_wait */
3799 3967 if (fw_state == cur_state) {
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3800 3968 con_log(CL_ANN1, (CE_WARN,
3801 3969 "FW state hasn't changed in %d secs", max_wait));
3802 3970 return (ENODEV);
3803 3971 }
3804 3972 };
3805 3973
3806 3974 if (!instance->tbolt) {
3807 3975 fw_ctrl = RD_IB_DOORBELL(instance);
3808 3976 con_log(CL_ANN1, (CE_CONT,
3809 3977 "mfi_state_transition_to_ready:FW ctrl = 0x%x", fw_ctrl));
3810 - }
3811 3978
3812 -#if 0
3813 - /*
3814 - * Write 0xF to the doorbell register to do the following.
3815 - * - Abort all outstanding commands (bit 0).
3816 - * - Transition from OPERATIONAL to READY state (bit 1).
3817 - * - Discard (possible) low MFA posted in 64-bit mode (bit-2).
3818 - * - Set to release FW to continue running (i.e. BIOS handshake
3819 - * (bit 3).
3820 - */
3821 - if (!instance->tbolt) {
3979 + /*
3980 + * Write 0xF to the doorbell register to do the following.
3981 + * - Abort all outstanding commands (bit 0).
3982 + * - Transition from OPERATIONAL to READY state (bit 1).
3983 + * - Discard (possible) low MFA posted in 64-bit mode (bit-2).
3984 + * - Set to release FW to continue running (i.e. BIOS handshake
3985 + * (bit 3).
3986 + */
3822 3987 WR_IB_DOORBELL(0xF, instance);
3823 3988 }
3824 -#endif
3825 3989
3990 + if (mrsas_check_acc_handle(instance->regmap_handle) != DDI_SUCCESS) {
3991 + return (EIO);
3992 + }
3993 +
3826 3994 return (DDI_SUCCESS);
3827 3995 }
3828 3996
3829 3997 /*
3830 3998 * get_seq_num
3831 3999 */
3832 4000 static int
3833 4001 get_seq_num(struct mrsas_instance *instance,
3834 4002 struct mrsas_evt_log_info *eli)
3835 4003 {
3836 4004 int ret = DDI_SUCCESS;
3837 4005
3838 4006 dma_obj_t dcmd_dma_obj;
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3839 4007 struct mrsas_cmd *cmd;
3840 4008 struct mrsas_dcmd_frame *dcmd;
3841 4009 struct mrsas_evt_log_info *eli_tmp;
3842 4010 if (instance->tbolt) {
3843 4011 cmd = get_raid_msg_mfi_pkt(instance);
3844 4012 } else {
3845 4013 cmd = get_mfi_pkt(instance);
3846 4014 }
3847 4015
3848 4016 if (!cmd) {
3849 - cmn_err(CE_WARN,
3850 - "Failed to get a cmd from free-pool in get_seq_num(). fw_outstanding=0x%X max_fw_cmds=0x%X",
3851 - instance->fw_outstanding, instance->max_fw_cmds);
4017 + cmn_err(CE_WARN, "mr_sas: failed to get a cmd");
4018 + DTRACE_PROBE2(seq_num_mfi_err, uint16_t,
4019 + instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
3852 4020 return (ENOMEM);
3853 4021 }
3854 4022
3855 4023 /* Clear the frame buffer and assign back the context id */
3856 4024 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3857 4025 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3858 4026 cmd->index);
3859 4027
3860 - dcmd = &cmd->frame->dcmd;
4028 + dcmd = &cmd->frame->dcmd;
3861 4029
3862 4030 /* allocate the data transfer buffer */
3863 4031 dcmd_dma_obj.size = sizeof (struct mrsas_evt_log_info);
3864 4032 dcmd_dma_obj.dma_attr = mrsas_generic_dma_attr;
3865 4033 dcmd_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
3866 4034 dcmd_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
3867 4035 dcmd_dma_obj.dma_attr.dma_attr_sgllen = 1;
3868 4036 dcmd_dma_obj.dma_attr.dma_attr_align = 1;
3869 4037
3870 4038 if (mrsas_alloc_dma_obj(instance, &dcmd_dma_obj,
3871 4039 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
3872 4040 cmn_err(CE_WARN,
3873 4041 "get_seq_num: could not allocate data transfer buffer.");
3874 4042 return (DDI_FAILURE);
3875 4043 }
3876 4044
3877 4045 (void) memset(dcmd_dma_obj.buffer, 0,
3878 4046 sizeof (struct mrsas_evt_log_info));
3879 4047
3880 4048 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
3881 4049
3882 4050 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
3883 4051 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0);
3884 4052 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 1);
3885 4053 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
3886 4054 MFI_FRAME_DIR_READ);
3887 4055 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
3888 4056 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len,
3889 4057 sizeof (struct mrsas_evt_log_info));
3890 4058 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
3891 4059 MR_DCMD_CTRL_EVENT_GET_INFO);
3892 4060 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].length,
3893 4061 sizeof (struct mrsas_evt_log_info));
3894 4062 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].phys_addr,
3895 4063 dcmd_dma_obj.dma_cookie[0].dmac_address);
3896 4064
3897 4065 cmd->sync_cmd = MRSAS_TRUE;
3898 4066 cmd->frame_count = 1;
3899 4067
3900 4068 if (instance->tbolt) {
3901 4069 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
3902 4070 }
3903 4071
3904 4072 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
3905 4073 cmn_err(CE_WARN, "get_seq_num: "
3906 4074 "failed to issue MRSAS_DCMD_CTRL_EVENT_GET_INFO");
3907 4075 ret = DDI_FAILURE;
3908 4076 } else {
3909 4077 eli_tmp = (struct mrsas_evt_log_info *)dcmd_dma_obj.buffer;
3910 4078 eli->newest_seq_num = ddi_get32(cmd->frame_dma_obj.acc_handle,
3911 4079 &eli_tmp->newest_seq_num);
3912 4080 ret = DDI_SUCCESS;
3913 4081 }
3914 4082
3915 4083 if (mrsas_free_dma_obj(instance, dcmd_dma_obj) != DDI_SUCCESS)
3916 4084 ret = DDI_FAILURE;
3917 4085
3918 4086 if (instance->tbolt) {
3919 4087 return_raid_msg_mfi_pkt(instance, cmd);
3920 4088 } else {
3921 4089 return_mfi_pkt(instance, cmd);
3922 4090 }
3923 4091
3924 4092 return (ret);
3925 4093 }
3926 4094
3927 4095 /*
3928 4096 * start_mfi_aen
3929 4097 */
3930 4098 static int
3931 4099 start_mfi_aen(struct mrsas_instance *instance)
3932 4100 {
3933 4101 int ret = 0;
3934 4102
3935 4103 struct mrsas_evt_log_info eli;
3936 4104 union mrsas_evt_class_locale class_locale;
3937 4105
3938 4106 /* get the latest sequence number from FW */
3939 4107 (void) memset(&eli, 0, sizeof (struct mrsas_evt_log_info));
3940 4108
3941 4109 if (get_seq_num(instance, &eli)) {
3942 4110 cmn_err(CE_WARN, "start_mfi_aen: failed to get seq num");
3943 4111 return (-1);
3944 4112 }
3945 4113
3946 4114 /* register AEN with FW for latest sequence number plus 1 */
3947 4115 class_locale.members.reserved = 0;
3948 4116 class_locale.members.locale = LE_16(MR_EVT_LOCALE_ALL);
3949 4117 class_locale.members.class = MR_EVT_CLASS_INFO;
3950 4118 class_locale.word = LE_32(class_locale.word);
3951 4119 ret = register_mfi_aen(instance, eli.newest_seq_num + 1,
3952 4120 class_locale.word);
3953 4121
3954 4122 if (ret) {
3955 4123 cmn_err(CE_WARN, "start_mfi_aen: aen registration failed");
3956 4124 return (-1);
3957 4125 }
3958 4126
3959 4127
3960 4128 return (ret);
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3961 4129 }
3962 4130
3963 4131 /*
3964 4132 * flush_cache
3965 4133 */
3966 4134 static void
3967 4135 flush_cache(struct mrsas_instance *instance)
3968 4136 {
3969 4137 struct mrsas_cmd *cmd = NULL;
3970 4138 struct mrsas_dcmd_frame *dcmd;
3971 - uint32_t max_cmd = instance->max_fw_cmds;
3972 4139 if (instance->tbolt) {
3973 4140 cmd = get_raid_msg_mfi_pkt(instance);
3974 4141 } else {
3975 4142 cmd = get_mfi_pkt(instance);
3976 4143 }
3977 4144
3978 4145 if (!cmd) {
3979 - cmn_err(CE_WARN,
3980 - "Failed to get a cmd from free-pool in flush_cache(). fw_outstanding=0x%X max_fw_cmds=0x%X",
3981 - instance->fw_outstanding, instance->max_fw_cmds);
4146 + con_log(CL_ANN1, (CE_WARN,
4147 + "flush_cache():Failed to get a cmd for flush_cache"));
4148 + DTRACE_PROBE2(flush_cache_err, uint16_t,
4149 + instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
3982 4150 return;
3983 4151 }
3984 4152
3985 4153 /* Clear the frame buffer and assign back the context id */
3986 4154 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3987 4155 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3988 4156 cmd->index);
3989 4157
3990 4158 dcmd = &cmd->frame->dcmd;
3991 4159
3992 4160 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
3993 4161
3994 4162 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
3995 4163 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0x0);
3996 4164 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 0);
3997 4165 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
3998 4166 MFI_FRAME_DIR_NONE);
3999 4167 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
4000 4168 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len, 0);
4001 4169 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
4002 4170 MR_DCMD_CTRL_CACHE_FLUSH);
4003 4171 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->mbox.b[0],
4004 4172 MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE);
4005 4173
4006 4174 cmd->frame_count = 1;
4007 4175
4008 4176 if (instance->tbolt) {
4009 4177 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
4010 4178 }
4011 4179
4012 4180 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
4013 4181 con_log(CL_ANN1, (CE_WARN,
4014 4182 "flush_cache: failed to issue MFI_DCMD_CTRL_CACHE_FLUSH"));
4015 4183 }
4016 4184 con_log(CL_ANN1, (CE_CONT, "flush_cache done"));
4017 4185 if (instance->tbolt) {
4018 4186 return_raid_msg_mfi_pkt(instance, cmd);
4019 4187 } else {
4020 4188 return_mfi_pkt(instance, cmd);
4021 4189 }
4022 4190
4023 4191 }
4024 4192
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4025 4193 /*
4026 4194 * service_mfi_aen- Completes an AEN command
4027 4195 * @instance: Adapter soft state
4028 4196 * @cmd: Command to be completed
4029 4197 *
4030 4198 */
4031 4199 void
4032 4200 service_mfi_aen(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
4033 4201 {
4034 4202 uint32_t seq_num;
4035 - uint32_t i;
4036 4203 struct mrsas_evt_detail *evt_detail =
4037 4204 (struct mrsas_evt_detail *)instance->mfi_evt_detail_obj.buffer;
4038 4205 int rval = 0;
4039 4206 int tgt = 0;
4040 4207 uint8_t dtype;
4041 4208 #ifdef PDSUPPORT
4042 4209 mrsas_pd_address_t *pd_addr;
4043 4210 #endif
4044 4211 ddi_acc_handle_t acc_handle;
4045 4212
4046 4213 con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
4047 4214
4048 4215 acc_handle = cmd->frame_dma_obj.acc_handle;
4049 4216 cmd->cmd_status = ddi_get8(acc_handle, &cmd->frame->io.cmd_status);
4050 4217 if (cmd->cmd_status == ENODATA) {
4051 4218 cmd->cmd_status = 0;
4052 4219 }
4053 4220
4054 4221 /*
4055 4222 * log the MFI AEN event to the sysevent queue so that
4056 4223 * application will get noticed
4057 4224 */
4058 4225 if (ddi_log_sysevent(instance->dip, DDI_VENDOR_LSI, "LSIMEGA", "SAS",
4059 4226 NULL, NULL, DDI_NOSLEEP) != DDI_SUCCESS) {
4060 4227 int instance_no = ddi_get_instance(instance->dip);
4061 4228 con_log(CL_ANN, (CE_WARN,
4062 4229 "mr_sas%d: Failed to log AEN event", instance_no));
4063 4230 }
4064 4231 /*
4065 4232 * Check for any ld devices that has changed state. i.e. online
4066 4233 * or offline.
4067 4234 */
4068 4235 con_log(CL_ANN1, (CE_CONT,
4069 4236 "AEN: code = %x class = %x locale = %x args = %x",
4070 4237 ddi_get32(acc_handle, &evt_detail->code),
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4071 4238 evt_detail->cl.members.class,
4072 4239 ddi_get16(acc_handle, &evt_detail->cl.members.locale),
4073 4240 ddi_get8(acc_handle, &evt_detail->arg_type)));
4074 4241
4075 4242 switch (ddi_get32(acc_handle, &evt_detail->code)) {
4076 4243 case MR_EVT_CFG_CLEARED: {
4077 4244 for (tgt = 0; tgt < MRDRV_MAX_LD; tgt++) {
4078 4245 if (instance->mr_ld_list[tgt].dip != NULL) {
4079 4246 mutex_enter(&instance->config_dev_mtx);
4080 4247 instance->mr_ld_list[tgt].flag =
4081 - ~MRDRV_TGT_VALID;
4248 + (uint8_t)~MRDRV_TGT_VALID;
4082 4249 mutex_exit(&instance->config_dev_mtx);
4083 4250 rval = mrsas_service_evt(instance, tgt, 0,
4084 4251 MRSAS_EVT_UNCONFIG_TGT, NULL);
4085 4252 con_log(CL_ANN1, (CE_WARN,
4086 4253 "mr_sas: CFG CLEARED AEN rval = %d "
4087 4254 "tgt id = %d", rval, tgt));
4088 4255 }
4089 4256 }
4090 4257 break;
4091 4258 }
4092 4259
4093 4260 case MR_EVT_LD_DELETED: {
4094 4261 tgt = ddi_get16(acc_handle, &evt_detail->args.ld.target_id);
4095 4262 mutex_enter(&instance->config_dev_mtx);
4096 - instance->mr_ld_list[tgt].flag = ~MRDRV_TGT_VALID;
4263 + instance->mr_ld_list[tgt].flag = (uint8_t)~MRDRV_TGT_VALID;
4097 4264 mutex_exit(&instance->config_dev_mtx);
4098 4265 rval = mrsas_service_evt(instance,
4099 4266 ddi_get16(acc_handle, &evt_detail->args.ld.target_id), 0,
4100 4267 MRSAS_EVT_UNCONFIG_TGT, NULL);
4101 4268 con_log(CL_ANN1, (CE_WARN, "mr_sas: LD DELETED AEN rval = %d "
4102 4269 "tgt id = %d index = %d", rval,
4103 4270 ddi_get16(acc_handle, &evt_detail->args.ld.target_id),
4104 4271 ddi_get8(acc_handle, &evt_detail->args.ld.ld_index)));
4105 4272 break;
4106 4273 } /* End of MR_EVT_LD_DELETED */
4107 4274
4108 4275 case MR_EVT_LD_CREATED: {
4109 4276 rval = mrsas_service_evt(instance,
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4110 4277 ddi_get16(acc_handle, &evt_detail->args.ld.target_id), 0,
4111 4278 MRSAS_EVT_CONFIG_TGT, NULL);
4112 4279 con_log(CL_ANN1, (CE_WARN, "mr_sas: LD CREATED AEN rval = %d "
4113 4280 "tgt id = %d index = %d", rval,
4114 4281 ddi_get16(acc_handle, &evt_detail->args.ld.target_id),
4115 4282 ddi_get8(acc_handle, &evt_detail->args.ld.ld_index)));
4116 4283 break;
4117 4284 } /* End of MR_EVT_LD_CREATED */
4118 4285
4119 4286 #ifdef PDSUPPORT
4120 - case MR_EVT_PD_REMOVED_EXT: {
4287 + case MR_EVT_PD_REMOVED_EXT: {
4121 4288 if (instance->tbolt) {
4122 4289 pd_addr = &evt_detail->args.pd_addr;
4123 4290 dtype = pd_addr->scsi_dev_type;
4124 4291 con_log(CL_DLEVEL1, (CE_NOTE,
4125 - " MR_EVT_PD_REMOVED_EXT: dtype = %x,"
4292 + " MR_EVT_PD_REMOVED_EXT: dtype = %x,"
4126 4293 " arg_type = %d ", dtype, evt_detail->arg_type));
4127 - tgt = ddi_get16(acc_handle, &evt_detail->args.pd.device_id);
4294 + tgt = ddi_get16(acc_handle,
4295 + &evt_detail->args.pd.device_id);
4128 4296 mutex_enter(&instance->config_dev_mtx);
4129 - instance->mr_tbolt_pd_list[tgt].flag = (uint8_t)~MRDRV_TGT_VALID;
4297 + instance->mr_tbolt_pd_list[tgt].flag =
4298 + (uint8_t)~MRDRV_TGT_VALID;
4130 4299 mutex_exit(&instance->config_dev_mtx);
4131 - rval = mrsas_service_evt(instance,
4132 - ddi_get16(acc_handle, &evt_detail->args.pd.device_id),
4133 - 1, MRSAS_EVT_UNCONFIG_TGT, NULL);
4300 + rval = mrsas_service_evt(instance, ddi_get16(
4301 + acc_handle, &evt_detail->args.pd.device_id),
4302 + 1, MRSAS_EVT_UNCONFIG_TGT, NULL);
4134 4303 con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_REMOVED:"
4135 4304 "rval = %d tgt id = %d ", rval,
4136 - ddi_get16(acc_handle, &evt_detail->args.pd.device_id)));
4137 - break;
4305 + ddi_get16(acc_handle,
4306 + &evt_detail->args.pd.device_id)));
4138 4307 }
4139 - }/* End of MR_EVT_PD_REMOVED_EXT */
4308 + break;
4309 + } /* End of MR_EVT_PD_REMOVED_EXT */
4140 4310
4141 4311 case MR_EVT_PD_INSERTED_EXT: {
4142 4312 if (instance->tbolt) {
4143 4313 rval = mrsas_service_evt(instance,
4144 - ddi_get16(acc_handle, &evt_detail->args.pd.device_id),
4145 - 1, MRSAS_EVT_CONFIG_TGT, NULL);
4314 + ddi_get16(acc_handle,
4315 + &evt_detail->args.pd.device_id),
4316 + 1, MRSAS_EVT_CONFIG_TGT, NULL);
4146 4317 con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_INSERTEDi_EXT:"
4147 - "rval = %d tgt id = %d ", rval,
4148 - ddi_get16(acc_handle, &evt_detail->args.pd.device_id)));
4149 - break;
4318 + "rval = %d tgt id = %d ", rval,
4319 + ddi_get16(acc_handle,
4320 + &evt_detail->args.pd.device_id)));
4150 4321 }
4151 - }/* End of MR_EVT_PD_INSERTED_EXT */
4322 + break;
4323 + } /* End of MR_EVT_PD_INSERTED_EXT */
4152 4324
4153 4325 case MR_EVT_PD_STATE_CHANGE: {
4154 4326 if (instance->tbolt) {
4155 - tgt = ddi_get16(acc_handle, &evt_detail->args.pd.device_id);
4156 - if ((evt_detail->args.pd_state.prevState == PD_SYSTEM) &&
4157 - (evt_detail->args.pd_state.newState != PD_SYSTEM)) {
4327 + tgt = ddi_get16(acc_handle,
4328 + &evt_detail->args.pd.device_id);
4329 + if ((evt_detail->args.pd_state.prevState ==
4330 + PD_SYSTEM) &&
4331 + (evt_detail->args.pd_state.newState != PD_SYSTEM)) {
4158 4332 mutex_enter(&instance->config_dev_mtx);
4159 4333 instance->mr_tbolt_pd_list[tgt].flag =
4160 - (uint8_t)~MRDRV_TGT_VALID;
4334 + (uint8_t)~MRDRV_TGT_VALID;
4161 4335 mutex_exit(&instance->config_dev_mtx);
4162 4336 rval = mrsas_service_evt(instance,
4163 - ddi_get16(acc_handle,
4164 - &evt_detail->args.pd.device_id),
4337 + ddi_get16(acc_handle,
4338 + &evt_detail->args.pd.device_id),
4165 4339 1, MRSAS_EVT_UNCONFIG_TGT, NULL);
4166 4340 con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_REMOVED:"
4167 - "rval = %d tgt id = %d ", rval,
4168 - ddi_get16(acc_handle,
4169 - &evt_detail->args.pd.device_id)));
4341 + "rval = %d tgt id = %d ", rval,
4342 + ddi_get16(acc_handle,
4343 + &evt_detail->args.pd.device_id)));
4170 4344 break;
4171 - }
4345 + }
4172 4346 if ((evt_detail->args.pd_state.prevState
4173 - == UNCONFIGURED_GOOD) &&
4174 - (evt_detail->args.pd_state.newState == PD_SYSTEM)) {
4347 + == UNCONFIGURED_GOOD) &&
4348 + (evt_detail->args.pd_state.newState == PD_SYSTEM)) {
4175 4349 rval = mrsas_service_evt(instance,
4176 - ddi_get16(acc_handle,
4177 - &evt_detail->args.pd.device_id),
4178 - 1, MRSAS_EVT_CONFIG_TGT, NULL);
4350 + ddi_get16(acc_handle,
4351 + &evt_detail->args.pd.device_id),
4352 + 1, MRSAS_EVT_CONFIG_TGT, NULL);
4179 4353 con_log(CL_ANN1, (CE_WARN,
4180 - "mr_sas: PD_INSERTED: rval = %d "
4181 - " tgt id = %d ", rval,
4182 - ddi_get16(acc_handle,
4183 - &evt_detail->args.pd.device_id)));
4354 + "mr_sas: PD_INSERTED: rval = %d "
4355 + " tgt id = %d ", rval,
4356 + ddi_get16(acc_handle,
4357 + &evt_detail->args.pd.device_id)));
4184 4358 break;
4185 - }
4359 + }
4186 4360 }
4361 + break;
4187 4362 }
4188 4363 #endif
4189 4364
4190 4365 } /* End of Main Switch */
4191 4366
4192 4367 /* get copy of seq_num and class/locale for re-registration */
4193 4368 seq_num = ddi_get32(acc_handle, &evt_detail->seq_num);
4194 4369 seq_num++;
4195 4370 (void) memset(instance->mfi_evt_detail_obj.buffer, 0,
4196 4371 sizeof (struct mrsas_evt_detail));
4197 4372
4198 4373 ddi_put8(acc_handle, &cmd->frame->dcmd.cmd_status, 0x0);
4199 4374 ddi_put32(acc_handle, &cmd->frame->dcmd.mbox.w[0], seq_num);
4200 4375
4201 4376 instance->aen_seq_num = seq_num;
4202 4377
4203 4378 cmd->frame_count = 1;
4204 4379
4205 4380 cmd->retry_count_for_ocr = 0;
4206 4381 cmd->drv_pkt_time = 0;
4207 4382
4208 4383 /* Issue the aen registration frame */
4209 4384 instance->func_ptr->issue_cmd(cmd, instance);
4210 4385 }
4211 4386
4212 4387 /*
4213 4388 * complete_cmd_in_sync_mode - Completes an internal command
4214 4389 * @instance: Adapter soft state
4215 4390 * @cmd: Command to be completed
4216 4391 *
4217 4392 * The issue_cmd_in_sync_mode() function waits for a command to complete
4218 4393 * after it issues a command. This function wakes up that waiting routine by
4219 4394 * calling wake_up() on the wait queue.
4220 4395 */
4221 4396 static void
4222 4397 complete_cmd_in_sync_mode(struct mrsas_instance *instance,
4223 4398 struct mrsas_cmd *cmd)
4224 4399 {
4225 4400 cmd->cmd_status = ddi_get8(cmd->frame_dma_obj.acc_handle,
4226 4401 &cmd->frame->io.cmd_status);
4227 4402
4228 4403 cmd->sync_cmd = MRSAS_FALSE;
4229 4404
4230 4405 con_log(CL_ANN1, (CE_NOTE, "complete_cmd_in_sync_mode called %p \n",
4231 4406 (void *)cmd));
4232 4407
4233 4408 mutex_enter(&instance->int_cmd_mtx);
4234 4409 if (cmd->cmd_status == ENODATA) {
4235 4410 cmd->cmd_status = 0;
4236 4411 }
4237 4412 cv_broadcast(&instance->int_cmd_cv);
4238 4413 mutex_exit(&instance->int_cmd_mtx);
4239 4414
4240 4415 }
4241 4416
4242 4417 /*
4243 4418 * Call this function inside mrsas_softintr.
4244 4419 * mrsas_initiate_ocr_if_fw_is_faulty - Initiates OCR if FW status is faulty
4245 4420 * @instance: Adapter soft state
4246 4421 */
4247 4422
4248 4423 static uint32_t
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4249 4424 mrsas_initiate_ocr_if_fw_is_faulty(struct mrsas_instance *instance)
4250 4425 {
4251 4426 uint32_t cur_abs_reg_val;
4252 4427 uint32_t fw_state;
4253 4428
4254 4429 cur_abs_reg_val = instance->func_ptr->read_fw_status_reg(instance);
4255 4430 fw_state = cur_abs_reg_val & MFI_STATE_MASK;
4256 4431 if (fw_state == MFI_STATE_FAULT) {
4257 4432 if (instance->disable_online_ctrl_reset == 1) {
4258 4433 cmn_err(CE_WARN,
4259 - "mrsas_initiate_ocr_if_fw_is_faulty: "
4260 - "FW in Fault state, detected in ISR: "
4261 - "FW doesn't support ocr ");
4434 + "mrsas_initiate_ocr_if_fw_is_faulty: "
4435 + "FW in Fault state, detected in ISR: "
4436 + "FW doesn't support ocr ");
4262 4437
4263 4438 return (ADAPTER_RESET_NOT_REQUIRED);
4264 4439 } else {
4265 4440 con_log(CL_ANN, (CE_NOTE,
4266 - "mrsas_initiate_ocr_if_fw_is_faulty: "
4267 - "FW in Fault state, detected in ISR: FW supports ocr "));
4441 + "mrsas_initiate_ocr_if_fw_is_faulty: FW in Fault "
4442 + "state, detected in ISR: FW supports ocr "));
4268 4443
4269 4444 return (ADAPTER_RESET_REQUIRED);
4270 4445 }
4271 4446 }
4272 4447
4273 4448 return (ADAPTER_RESET_NOT_REQUIRED);
4274 4449 }
4275 4450
4276 4451 /*
4277 4452 * mrsas_softintr - The Software ISR
4278 4453 * @param arg : HBA soft state
4279 4454 *
4280 4455 * called from high-level interrupt if hi-level interrupt are not there,
4281 4456 * otherwise triggered as a soft interrupt
4282 4457 */
4283 4458 static uint_t
4284 4459 mrsas_softintr(struct mrsas_instance *instance)
4285 4460 {
4286 4461 struct scsi_pkt *pkt;
4287 4462 struct scsa_cmd *acmd;
4288 4463 struct mrsas_cmd *cmd;
4289 4464 struct mlist_head *pos, *next;
4290 4465 mlist_t process_list;
4291 4466 struct mrsas_header *hdr;
4292 4467 struct scsi_arq_status *arqstat;
4293 4468
4294 4469 con_log(CL_ANN1, (CE_NOTE, "mrsas_softintr() called."));
4295 4470
4296 4471 ASSERT(instance);
4297 4472
4298 4473 mutex_enter(&instance->completed_pool_mtx);
4299 4474
4300 4475 if (mlist_empty(&instance->completed_pool_list)) {
4301 4476 mutex_exit(&instance->completed_pool_mtx);
4302 4477 return (DDI_INTR_CLAIMED);
4303 4478 }
4304 4479
4305 4480 instance->softint_running = 1;
4306 4481
4307 4482 INIT_LIST_HEAD(&process_list);
4308 4483 mlist_splice(&instance->completed_pool_list, &process_list);
4309 4484 INIT_LIST_HEAD(&instance->completed_pool_list);
4310 4485
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4311 4486 mutex_exit(&instance->completed_pool_mtx);
4312 4487
4313 4488 /* perform all callbacks first, before releasing the SCBs */
4314 4489 mlist_for_each_safe(pos, next, &process_list) {
4315 4490 cmd = mlist_entry(pos, struct mrsas_cmd, list);
4316 4491
4317 4492 /* syncronize the Cmd frame for the controller */
4318 4493 (void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle,
4319 4494 0, 0, DDI_DMA_SYNC_FORCPU);
4320 4495
4496 + if (mrsas_check_dma_handle(cmd->frame_dma_obj.dma_handle) !=
4497 + DDI_SUCCESS) {
4498 + mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
4499 + ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4500 + con_log(CL_ANN1, (CE_WARN,
4501 + "mrsas_softintr: "
4502 + "FMA check reports DMA handle failure"));
4503 + return (DDI_INTR_CLAIMED);
4504 + }
4505 +
4321 4506 hdr = &cmd->frame->hdr;
4322 4507
4323 4508 /* remove the internal command from the process list */
4324 4509 mlist_del_init(&cmd->list);
4325 4510
4326 4511 switch (ddi_get8(cmd->frame_dma_obj.acc_handle, &hdr->cmd)) {
4327 4512 case MFI_CMD_OP_PD_SCSI:
4328 4513 case MFI_CMD_OP_LD_SCSI:
4329 4514 case MFI_CMD_OP_LD_READ:
4330 4515 case MFI_CMD_OP_LD_WRITE:
4331 4516 /*
4332 4517 * MFI_CMD_OP_PD_SCSI and MFI_CMD_OP_LD_SCSI
4333 4518 * could have been issued either through an
4334 4519 * IO path or an IOCTL path. If it was via IOCTL,
4335 4520 * we will send it to internal completion.
4336 4521 */
4337 4522 if (cmd->sync_cmd == MRSAS_TRUE) {
4338 4523 complete_cmd_in_sync_mode(instance, cmd);
4339 4524 break;
4340 4525 }
4341 4526
4342 4527 /* regular commands */
4343 4528 acmd = cmd->cmd;
4344 4529 pkt = CMD2PKT(acmd);
4345 4530
4346 4531 if (acmd->cmd_flags & CFLAG_DMAVALID) {
4347 4532 if (acmd->cmd_flags & CFLAG_CONSISTENT) {
4348 4533 (void) ddi_dma_sync(acmd->cmd_dmahandle,
4349 4534 acmd->cmd_dma_offset,
4350 4535 acmd->cmd_dma_len,
4351 4536 DDI_DMA_SYNC_FORCPU);
4352 4537 }
4353 4538 }
4354 4539
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4355 4540 pkt->pkt_reason = CMD_CMPLT;
4356 4541 pkt->pkt_statistics = 0;
4357 4542 pkt->pkt_state = STATE_GOT_BUS
4358 4543 | STATE_GOT_TARGET | STATE_SENT_CMD
4359 4544 | STATE_XFERRED_DATA | STATE_GOT_STATUS;
4360 4545
4361 4546 con_log(CL_ANN, (CE_CONT,
4362 4547 "CDB[0] = %x completed for %s: size %lx context %x",
4363 4548 pkt->pkt_cdbp[0], ((acmd->islogical) ? "LD" : "PD"),
4364 4549 acmd->cmd_dmacount, hdr->context));
4550 + DTRACE_PROBE3(softintr_cdb, uint8_t, pkt->pkt_cdbp[0],
4551 + uint_t, acmd->cmd_cdblen, ulong_t,
4552 + acmd->cmd_dmacount);
4365 4553
4366 4554 if (pkt->pkt_cdbp[0] == SCMD_INQUIRY) {
4367 4555 struct scsi_inquiry *inq;
4368 4556
4369 4557 if (acmd->cmd_dmacount != 0) {
4370 4558 bp_mapin(acmd->cmd_buf);
4371 4559 inq = (struct scsi_inquiry *)
4372 4560 acmd->cmd_buf->b_un.b_addr;
4373 4561
4374 4562 /* don't expose physical drives to OS */
4375 4563 if (acmd->islogical &&
4376 4564 (hdr->cmd_status == MFI_STAT_OK)) {
4377 4565 display_scsi_inquiry(
4378 4566 (caddr_t)inq);
4379 4567 } else if ((hdr->cmd_status ==
4380 4568 MFI_STAT_OK) && inq->inq_dtype ==
4381 4569 DTYPE_DIRECT) {
4382 4570
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8 lines elided |
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4383 4571 display_scsi_inquiry(
4384 4572 (caddr_t)inq);
4385 4573
4386 4574 /* for physical disk */
4387 4575 hdr->cmd_status =
4388 4576 MFI_STAT_DEVICE_NOT_FOUND;
4389 4577 }
4390 4578 }
4391 4579 }
4392 4580
4581 + DTRACE_PROBE2(softintr_done, uint8_t, hdr->cmd,
4582 + uint8_t, hdr->cmd_status);
4583 +
4393 4584 switch (hdr->cmd_status) {
4394 4585 case MFI_STAT_OK:
4395 4586 pkt->pkt_scbp[0] = STATUS_GOOD;
4396 4587 break;
4397 4588 case MFI_STAT_LD_CC_IN_PROGRESS:
4398 4589 case MFI_STAT_LD_RECON_IN_PROGRESS:
4399 4590 pkt->pkt_scbp[0] = STATUS_GOOD;
4400 4591 break;
4401 4592 case MFI_STAT_LD_INIT_IN_PROGRESS:
4402 - con_log(CL_ANN, (CE_WARN, "Initialization in Progress"));
4593 + con_log(CL_ANN,
4594 + (CE_WARN, "Initialization in Progress"));
4403 4595 pkt->pkt_reason = CMD_TRAN_ERR;
4404 4596
4405 4597 break;
4406 4598 case MFI_STAT_SCSI_DONE_WITH_ERROR:
4407 4599 con_log(CL_ANN, (CE_CONT, "scsi_done error"));
4408 4600
4409 4601 pkt->pkt_reason = CMD_CMPLT;
4410 4602 ((struct scsi_status *)
4411 4603 pkt->pkt_scbp)->sts_chk = 1;
4412 4604
4413 4605 if (pkt->pkt_cdbp[0] == SCMD_TEST_UNIT_READY) {
4414 -
4415 - con_log(CL_ANN, (CE_WARN, "TEST_UNIT_READY fail"));
4416 -
4606 + con_log(CL_ANN,
4607 + (CE_WARN, "TEST_UNIT_READY fail"));
4417 4608 } else {
4418 4609 pkt->pkt_state |= STATE_ARQ_DONE;
4419 4610 arqstat = (void *)(pkt->pkt_scbp);
4420 4611 arqstat->sts_rqpkt_reason = CMD_CMPLT;
4421 4612 arqstat->sts_rqpkt_resid = 0;
4422 4613 arqstat->sts_rqpkt_state |=
4423 4614 STATE_GOT_BUS | STATE_GOT_TARGET
4424 4615 | STATE_SENT_CMD
4425 4616 | STATE_XFERRED_DATA;
4426 4617 *(uint8_t *)&arqstat->sts_rqpkt_status =
4427 4618 STATUS_GOOD;
4428 4619 ddi_rep_get8(
4429 4620 cmd->frame_dma_obj.acc_handle,
4430 4621 (uint8_t *)
4431 4622 &(arqstat->sts_sensedata),
4432 4623 cmd->sense,
4433 4624 sizeof (struct scsi_extended_sense),
4434 4625 DDI_DEV_AUTOINCR);
4435 4626 }
4436 4627 break;
4437 4628 case MFI_STAT_LD_OFFLINE:
4438 4629 case MFI_STAT_DEVICE_NOT_FOUND:
4439 4630 con_log(CL_ANN, (CE_CONT,
4440 4631 "mrsas_softintr:device not found error"));
4441 4632 pkt->pkt_reason = CMD_DEV_GONE;
4442 4633 pkt->pkt_statistics = STAT_DISCON;
4443 4634 break;
4444 4635 case MFI_STAT_LD_LBA_OUT_OF_RANGE:
4445 4636 pkt->pkt_state |= STATE_ARQ_DONE;
4446 4637 pkt->pkt_reason = CMD_CMPLT;
4447 4638 ((struct scsi_status *)
4448 4639 pkt->pkt_scbp)->sts_chk = 1;
4449 4640
4450 4641 arqstat = (void *)(pkt->pkt_scbp);
4451 4642 arqstat->sts_rqpkt_reason = CMD_CMPLT;
4452 4643 arqstat->sts_rqpkt_resid = 0;
4453 4644 arqstat->sts_rqpkt_state |= STATE_GOT_BUS
4454 4645 | STATE_GOT_TARGET | STATE_SENT_CMD
4455 4646 | STATE_XFERRED_DATA;
4456 4647 *(uint8_t *)&arqstat->sts_rqpkt_status =
4457 4648 STATUS_GOOD;
4458 4649
4459 4650 arqstat->sts_sensedata.es_valid = 1;
4460 4651 arqstat->sts_sensedata.es_key =
4461 4652 KEY_ILLEGAL_REQUEST;
4462 4653 arqstat->sts_sensedata.es_class =
4463 4654 CLASS_EXTENDED_SENSE;
4464 4655
4465 4656 /*
4466 4657 * LOGICAL BLOCK ADDRESS OUT OF RANGE:
4467 4658 * ASC: 0x21h; ASCQ: 0x00h;
4468 4659 */
4469 4660 arqstat->sts_sensedata.es_add_code = 0x21;
4470 4661 arqstat->sts_sensedata.es_qual_code = 0x00;
4471 4662
4472 4663 break;
|
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4473 4664
4474 4665 default:
4475 4666 con_log(CL_ANN, (CE_CONT, "Unknown status!"));
4476 4667 pkt->pkt_reason = CMD_TRAN_ERR;
4477 4668
4478 4669 break;
4479 4670 }
4480 4671
4481 4672 atomic_add_16(&instance->fw_outstanding, (-1));
4482 4673
4674 + (void) mrsas_common_check(instance, cmd);
4675 +
4676 + if (acmd->cmd_dmahandle) {
4677 + if (mrsas_check_dma_handle(
4678 + acmd->cmd_dmahandle) != DDI_SUCCESS) {
4679 + ddi_fm_service_impact(instance->dip,
4680 + DDI_SERVICE_UNAFFECTED);
4681 + pkt->pkt_reason = CMD_TRAN_ERR;
4682 + pkt->pkt_statistics = 0;
4683 + }
4684 + }
4685 +
4483 4686 /* Call the callback routine */
4484 4687 if (((pkt->pkt_flags & FLAG_NOINTR) == 0) &&
4485 4688 pkt->pkt_comp) {
4486 4689
4487 4690 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_softintr: "
4488 4691 "posting to scsa cmd %p index %x pkt %p "
4489 4692 "time %llx", (void *)cmd, cmd->index,
4490 4693 (void *)pkt, gethrtime()));
4491 4694 (*pkt->pkt_comp)(pkt);
4492 4695
4493 4696 }
4494 4697
4495 4698 return_mfi_pkt(instance, cmd);
4496 4699 break;
4497 4700
4498 4701 case MFI_CMD_OP_SMP:
4499 4702 case MFI_CMD_OP_STP:
4500 4703 complete_cmd_in_sync_mode(instance, cmd);
4501 4704 break;
4502 4705
4503 4706 case MFI_CMD_OP_DCMD:
4504 4707 /* see if got an event notification */
4505 4708 if (ddi_get32(cmd->frame_dma_obj.acc_handle,
4506 4709 &cmd->frame->dcmd.opcode) ==
4507 4710 MR_DCMD_CTRL_EVENT_WAIT) {
4508 4711 if ((instance->aen_cmd == cmd) &&
4509 4712 (instance->aen_cmd->abort_aen)) {
4510 4713 con_log(CL_ANN, (CE_WARN,
4511 4714 "mrsas_softintr: "
4512 4715 "aborted_aen returned"));
4513 4716 } else {
4514 4717 atomic_add_16(&instance->fw_outstanding,
4515 4718 (-1));
4516 4719 service_mfi_aen(instance, cmd);
4517 4720 }
4518 4721 } else {
4519 4722 complete_cmd_in_sync_mode(instance, cmd);
4520 4723 }
4521 4724
4522 4725 break;
4523 4726
|
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31 lines elided |
↑ open up ↑ |
4524 4727 case MFI_CMD_OP_ABORT:
4525 4728 con_log(CL_ANN, (CE_NOTE, "MFI_CMD_OP_ABORT complete"));
4526 4729 /*
4527 4730 * MFI_CMD_OP_ABORT successfully completed
4528 4731 * in the synchronous mode
4529 4732 */
4530 4733 complete_cmd_in_sync_mode(instance, cmd);
4531 4734 break;
4532 4735
4533 4736 default:
4737 + mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
4738 + ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4739 +
4534 4740 if (cmd->pkt != NULL) {
4535 4741 pkt = cmd->pkt;
4536 4742 if (((pkt->pkt_flags & FLAG_NOINTR) == 0) &&
4537 4743 pkt->pkt_comp) {
4538 4744
4539 4745 con_log(CL_ANN1, (CE_CONT, "posting to "
4540 4746 "scsa cmd %p index %x pkt %p"
4541 4747 "time %llx, default ", (void *)cmd,
4542 4748 cmd->index, (void *)pkt,
4543 4749 gethrtime()));
4544 4750
4545 4751 (*pkt->pkt_comp)(pkt);
4546 4752
4547 4753 }
4548 4754 }
4549 4755 con_log(CL_ANN, (CE_WARN, "Cmd type unknown !"));
4550 4756 break;
4551 4757 }
4552 4758 }
4553 4759
4554 4760 instance->softint_running = 0;
4555 4761
4556 4762 return (DDI_INTR_CLAIMED);
4557 4763 }
4558 4764
4559 4765 /*
4560 4766 * mrsas_alloc_dma_obj
4561 4767 *
4562 4768 * Allocate the memory and other resources for an dma object.
4563 4769 */
4564 4770 int
4565 4771 mrsas_alloc_dma_obj(struct mrsas_instance *instance, dma_obj_t *obj,
4566 4772 uchar_t endian_flags)
4567 4773 {
4568 4774 int i;
4569 4775 size_t alen = 0;
4570 4776 uint_t cookie_cnt;
4571 4777 struct ddi_device_acc_attr tmp_endian_attr;
4572 4778
4573 4779 tmp_endian_attr = endian_attr;
4574 4780 tmp_endian_attr.devacc_attr_endian_flags = endian_flags;
4575 4781 tmp_endian_attr.devacc_attr_access = DDI_DEFAULT_ACC;
4576 4782
4577 4783 i = ddi_dma_alloc_handle(instance->dip, &obj->dma_attr,
4578 4784 DDI_DMA_SLEEP, NULL, &obj->dma_handle);
4579 4785 if (i != DDI_SUCCESS) {
4580 4786
4581 4787 switch (i) {
4582 4788 case DDI_DMA_BADATTR :
4583 4789 con_log(CL_ANN, (CE_WARN,
4584 4790 "Failed ddi_dma_alloc_handle- Bad attribute"));
4585 4791 break;
4586 4792 case DDI_DMA_NORESOURCES :
4587 4793 con_log(CL_ANN, (CE_WARN,
4588 4794 "Failed ddi_dma_alloc_handle- No Resources"));
4589 4795 break;
4590 4796 default :
4591 4797 con_log(CL_ANN, (CE_WARN,
4592 4798 "Failed ddi_dma_alloc_handle: "
4593 4799 "unknown status %d", i));
4594 4800 break;
4595 4801 }
4596 4802
4597 4803 return (-1);
4598 4804 }
4599 4805
4600 4806 if ((ddi_dma_mem_alloc(obj->dma_handle, obj->size, &tmp_endian_attr,
|
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↑ open up ↑ |
4601 4807 DDI_DMA_RDWR | DDI_DMA_STREAMING, DDI_DMA_SLEEP, NULL,
4602 4808 &obj->buffer, &alen, &obj->acc_handle) != DDI_SUCCESS) ||
4603 4809 alen < obj->size) {
4604 4810
4605 4811 ddi_dma_free_handle(&obj->dma_handle);
4606 4812
4607 4813 con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_mem_alloc"));
4608 4814
4609 4815 return (-1);
4610 4816 }
4611 - if (obj->dma_handle == NULL) {
4612 - con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_mem_alloc"));
4613 - return (-1);
4614 - }
4615 4817
4616 4818 if (ddi_dma_addr_bind_handle(obj->dma_handle, NULL, obj->buffer,
4617 4819 obj->size, DDI_DMA_RDWR | DDI_DMA_STREAMING, DDI_DMA_SLEEP,
4618 4820 NULL, &obj->dma_cookie[0], &cookie_cnt) != DDI_SUCCESS) {
4619 4821
4620 4822 ddi_dma_mem_free(&obj->acc_handle);
4621 4823 ddi_dma_free_handle(&obj->dma_handle);
4622 4824
4623 4825 con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_addr_bind_handle"));
4624 4826
4625 4827 return (-1);
4626 4828 }
4627 - if (obj->acc_handle == NULL) {
4628 - ddi_dma_mem_free(&obj->acc_handle);
4629 - ddi_dma_free_handle(&obj->dma_handle);
4630 4829
4631 - con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_addr_bind_handle"));
4830 + if (mrsas_check_dma_handle(obj->dma_handle) != DDI_SUCCESS) {
4831 + ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4632 4832 return (-1);
4633 4833 }
4634 4834
4835 + if (mrsas_check_acc_handle(obj->acc_handle) != DDI_SUCCESS) {
4836 + ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4837 + return (-1);
4838 + }
4635 4839
4636 4840 return (cookie_cnt);
4637 4841 }
4638 4842
4639 4843 /*
4640 4844 * mrsas_free_dma_obj(struct mrsas_instance *, dma_obj_t)
4641 4845 *
4642 4846 * De-allocate the memory and other resources for an dma object, which must
4643 4847 * have been alloated by a previous call to mrsas_alloc_dma_obj()
4644 4848 */
4645 4849 int
4646 4850 mrsas_free_dma_obj(struct mrsas_instance *instance, dma_obj_t obj)
4647 4851 {
4648 4852
4649 - if ( (obj.dma_handle == NULL) || (obj.acc_handle == NULL) ) {
4853 + if ((obj.dma_handle == NULL) || (obj.acc_handle == NULL)) {
4650 4854 return (DDI_SUCCESS);
4651 4855 }
4652 4856
4857 + /*
4858 + * NOTE: These check-handle functions fail if *_handle == NULL, but
4859 + * this function succeeds because of the previous check.
4860 + */
4861 + if (mrsas_check_dma_handle(obj.dma_handle) != DDI_SUCCESS) {
4862 + ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
4863 + return (DDI_FAILURE);
4864 + }
4865 +
4866 + if (mrsas_check_acc_handle(obj.acc_handle) != DDI_SUCCESS) {
4867 + ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
4868 + return (DDI_FAILURE);
4869 + }
4870 +
4653 4871 (void) ddi_dma_unbind_handle(obj.dma_handle);
4654 4872 ddi_dma_mem_free(&obj.acc_handle);
4655 4873 ddi_dma_free_handle(&obj.dma_handle);
4656 4874 obj.acc_handle = NULL;
4657 4875 return (DDI_SUCCESS);
4658 4876 }
4659 4877
4660 4878 /*
4661 4879 * mrsas_dma_alloc(instance_t *, struct scsi_pkt *, struct buf *,
4662 4880 * int, int (*)())
4663 4881 *
4664 4882 * Allocate dma resources for a new scsi command
4665 4883 */
4666 4884 int
4667 4885 mrsas_dma_alloc(struct mrsas_instance *instance, struct scsi_pkt *pkt,
4668 4886 struct buf *bp, int flags, int (*callback)())
4669 4887 {
4670 4888 int dma_flags;
4671 4889 int (*cb)(caddr_t);
4672 4890 int i;
4673 4891
4674 4892 ddi_dma_attr_t tmp_dma_attr = mrsas_generic_dma_attr;
4675 4893 struct scsa_cmd *acmd = PKT2CMD(pkt);
4676 4894
4677 4895 acmd->cmd_buf = bp;
4678 4896
4679 4897 if (bp->b_flags & B_READ) {
4680 4898 acmd->cmd_flags &= ~CFLAG_DMASEND;
4681 4899 dma_flags = DDI_DMA_READ;
4682 4900 } else {
4683 4901 acmd->cmd_flags |= CFLAG_DMASEND;
4684 4902 dma_flags = DDI_DMA_WRITE;
4685 4903 }
4686 4904
4687 4905 if (flags & PKT_CONSISTENT) {
4688 4906 acmd->cmd_flags |= CFLAG_CONSISTENT;
4689 4907 dma_flags |= DDI_DMA_CONSISTENT;
4690 4908 }
4691 4909
4692 4910 if (flags & PKT_DMA_PARTIAL) {
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↑ open up ↑ |
4693 4911 dma_flags |= DDI_DMA_PARTIAL;
4694 4912 }
4695 4913
4696 4914 dma_flags |= DDI_DMA_REDZONE;
4697 4915
4698 4916 cb = (callback == NULL_FUNC) ? DDI_DMA_DONTWAIT : DDI_DMA_SLEEP;
4699 4917
4700 4918 tmp_dma_attr.dma_attr_sgllen = instance->max_num_sge;
4701 4919 tmp_dma_attr.dma_attr_addr_hi = 0xffffffffffffffffull;
4702 4920 if (instance->tbolt) {
4703 - //OCR-RESET FIX
4704 - tmp_dma_attr.dma_attr_count_max = (U64)mrsas_tbolt_max_cap_maxxfer; //limit to 256K
4705 - tmp_dma_attr.dma_attr_maxxfer = (U64)mrsas_tbolt_max_cap_maxxfer; //limit to 256K
4921 + /* OCR-RESET FIX */
4922 + tmp_dma_attr.dma_attr_count_max =
4923 + (U64)mrsas_tbolt_max_cap_maxxfer; /* limit to 256K */
4924 + tmp_dma_attr.dma_attr_maxxfer =
4925 + (U64)mrsas_tbolt_max_cap_maxxfer; /* limit to 256K */
4706 4926 }
4707 4927
4708 -
4709 4928 if ((i = ddi_dma_alloc_handle(instance->dip, &tmp_dma_attr,
4710 4929 cb, 0, &acmd->cmd_dmahandle)) != DDI_SUCCESS) {
4711 4930 switch (i) {
4712 4931 case DDI_DMA_BADATTR:
4713 4932 bioerror(bp, EFAULT);
4714 4933 return (DDI_FAILURE);
4715 4934
4716 4935 case DDI_DMA_NORESOURCES:
4717 4936 bioerror(bp, 0);
4718 4937 return (DDI_FAILURE);
4719 4938
4720 4939 default:
4721 4940 con_log(CL_ANN, (CE_PANIC, "ddi_dma_alloc_handle: "
4722 4941 "impossible result (0x%x)", i));
4723 4942 bioerror(bp, EFAULT);
4724 4943 return (DDI_FAILURE);
4725 4944 }
4726 4945 }
4727 4946
4728 4947 i = ddi_dma_buf_bind_handle(acmd->cmd_dmahandle, bp, dma_flags,
4729 4948 cb, 0, &acmd->cmd_dmacookies[0], &acmd->cmd_ncookies);
4730 4949
4731 4950 switch (i) {
4732 4951 case DDI_DMA_PARTIAL_MAP:
4733 4952 if ((dma_flags & DDI_DMA_PARTIAL) == 0) {
4734 4953 con_log(CL_ANN, (CE_PANIC, "ddi_dma_buf_bind_handle: "
4735 4954 "DDI_DMA_PARTIAL_MAP impossible"));
4736 4955 goto no_dma_cookies;
4737 4956 }
4738 4957
4739 4958 if (ddi_dma_numwin(acmd->cmd_dmahandle, &acmd->cmd_nwin) ==
4740 4959 DDI_FAILURE) {
4741 4960 con_log(CL_ANN, (CE_PANIC, "ddi_dma_numwin failed"));
4742 4961 goto no_dma_cookies;
4743 4962 }
4744 4963
4745 4964 if (ddi_dma_getwin(acmd->cmd_dmahandle, acmd->cmd_curwin,
4746 4965 &acmd->cmd_dma_offset, &acmd->cmd_dma_len,
4747 4966 &acmd->cmd_dmacookies[0], &acmd->cmd_ncookies) ==
4748 4967 DDI_FAILURE) {
4749 4968
4750 4969 con_log(CL_ANN, (CE_PANIC, "ddi_dma_getwin failed"));
4751 4970 goto no_dma_cookies;
4752 4971 }
4753 4972
4754 4973 goto get_dma_cookies;
4755 4974 case DDI_DMA_MAPPED:
4756 4975 acmd->cmd_nwin = 1;
4757 4976 acmd->cmd_dma_len = 0;
4758 4977 acmd->cmd_dma_offset = 0;
4759 4978
4760 4979 get_dma_cookies:
4761 4980 i = 0;
4762 4981 acmd->cmd_dmacount = 0;
4763 4982 for (;;) {
4764 4983 acmd->cmd_dmacount +=
4765 4984 acmd->cmd_dmacookies[i++].dmac_size;
4766 4985
4767 4986 if (i == instance->max_num_sge ||
4768 4987 i == acmd->cmd_ncookies)
4769 4988 break;
4770 4989
4771 4990 ddi_dma_nextcookie(acmd->cmd_dmahandle,
4772 4991 &acmd->cmd_dmacookies[i]);
4773 4992 }
4774 4993
4775 4994 acmd->cmd_cookie = i;
4776 4995 acmd->cmd_cookiecnt = i;
4777 4996
4778 4997 acmd->cmd_flags |= CFLAG_DMAVALID;
4779 4998
4780 4999 if (bp->b_bcount >= acmd->cmd_dmacount) {
4781 5000 pkt->pkt_resid = bp->b_bcount - acmd->cmd_dmacount;
4782 5001 } else {
4783 5002 pkt->pkt_resid = 0;
4784 5003 }
4785 5004
4786 5005 return (DDI_SUCCESS);
4787 5006 case DDI_DMA_NORESOURCES:
4788 5007 bioerror(bp, 0);
4789 5008 break;
4790 5009 case DDI_DMA_NOMAPPING:
4791 5010 bioerror(bp, EFAULT);
4792 5011 break;
4793 5012 case DDI_DMA_TOOBIG:
4794 5013 bioerror(bp, EINVAL);
4795 5014 break;
4796 5015 case DDI_DMA_INUSE:
4797 5016 con_log(CL_ANN, (CE_PANIC, "ddi_dma_buf_bind_handle:"
4798 5017 " DDI_DMA_INUSE impossible"));
4799 5018 break;
4800 5019 default:
4801 5020 con_log(CL_ANN, (CE_PANIC, "ddi_dma_buf_bind_handle: "
4802 5021 "impossible result (0x%x)", i));
4803 5022 break;
4804 5023 }
4805 5024
4806 5025 no_dma_cookies:
4807 5026 ddi_dma_free_handle(&acmd->cmd_dmahandle);
4808 5027 acmd->cmd_dmahandle = NULL;
4809 5028 acmd->cmd_flags &= ~CFLAG_DMAVALID;
4810 5029 return (DDI_FAILURE);
4811 5030 }
4812 5031
4813 5032 /*
4814 5033 * mrsas_dma_move(struct mrsas_instance *, struct scsi_pkt *, struct buf *)
4815 5034 *
4816 5035 * move dma resources to next dma window
4817 5036 *
4818 5037 */
4819 5038 int
4820 5039 mrsas_dma_move(struct mrsas_instance *instance, struct scsi_pkt *pkt,
4821 5040 struct buf *bp)
4822 5041 {
4823 5042 int i = 0;
4824 5043
4825 5044 struct scsa_cmd *acmd = PKT2CMD(pkt);
4826 5045
4827 5046 /*
4828 5047 * If there are no more cookies remaining in this window,
4829 5048 * must move to the next window first.
4830 5049 */
4831 5050 if (acmd->cmd_cookie == acmd->cmd_ncookies) {
4832 5051 if (acmd->cmd_curwin == acmd->cmd_nwin && acmd->cmd_nwin == 1) {
4833 5052 return (DDI_SUCCESS);
4834 5053 }
4835 5054
4836 5055 /* at last window, cannot move */
4837 5056 if (++acmd->cmd_curwin >= acmd->cmd_nwin) {
4838 5057 return (DDI_FAILURE);
4839 5058 }
4840 5059
4841 5060 if (ddi_dma_getwin(acmd->cmd_dmahandle, acmd->cmd_curwin,
4842 5061 &acmd->cmd_dma_offset, &acmd->cmd_dma_len,
4843 5062 &acmd->cmd_dmacookies[0], &acmd->cmd_ncookies) ==
4844 5063 DDI_FAILURE) {
4845 5064 return (DDI_FAILURE);
4846 5065 }
4847 5066
4848 5067 acmd->cmd_cookie = 0;
4849 5068 } else {
4850 5069 /* still more cookies in this window - get the next one */
4851 5070 ddi_dma_nextcookie(acmd->cmd_dmahandle,
4852 5071 &acmd->cmd_dmacookies[0]);
4853 5072 }
4854 5073
4855 5074 /* get remaining cookies in this window, up to our maximum */
4856 5075 for (;;) {
4857 5076 acmd->cmd_dmacount += acmd->cmd_dmacookies[i++].dmac_size;
4858 5077 acmd->cmd_cookie++;
4859 5078
4860 5079 if (i == instance->max_num_sge ||
4861 5080 acmd->cmd_cookie == acmd->cmd_ncookies) {
4862 5081 break;
4863 5082 }
4864 5083
4865 5084 ddi_dma_nextcookie(acmd->cmd_dmahandle,
4866 5085 &acmd->cmd_dmacookies[i]);
4867 5086 }
4868 5087
4869 5088 acmd->cmd_cookiecnt = i;
4870 5089
4871 5090 if (bp->b_bcount >= acmd->cmd_dmacount) {
4872 5091 pkt->pkt_resid = bp->b_bcount - acmd->cmd_dmacount;
4873 5092 } else {
4874 5093 pkt->pkt_resid = 0;
4875 5094 }
4876 5095
4877 5096 return (DDI_SUCCESS);
4878 5097 }
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4879 5098
4880 5099 /*
4881 5100 * build_cmd
4882 5101 */
4883 5102 static struct mrsas_cmd *
4884 5103 build_cmd(struct mrsas_instance *instance, struct scsi_address *ap,
4885 5104 struct scsi_pkt *pkt, uchar_t *cmd_done)
4886 5105 {
4887 5106 uint16_t flags = 0;
4888 5107 uint32_t i;
4889 - uint32_t context;
5108 + uint32_t context;
4890 5109 uint32_t sge_bytes;
4891 5110 uint32_t tmp_data_xfer_len;
4892 5111 ddi_acc_handle_t acc_handle;
4893 5112 struct mrsas_cmd *cmd;
4894 5113 struct mrsas_sge64 *mfi_sgl;
4895 5114 struct mrsas_sge_ieee *mfi_sgl_ieee;
4896 5115 struct scsa_cmd *acmd = PKT2CMD(pkt);
4897 - struct mrsas_pthru_frame *pthru;
5116 + struct mrsas_pthru_frame *pthru;
4898 5117 struct mrsas_io_frame *ldio;
4899 5118
4900 5119 /* find out if this is logical or physical drive command. */
4901 5120 acmd->islogical = MRDRV_IS_LOGICAL(ap);
4902 5121 acmd->device_id = MAP_DEVICE_ID(instance, ap);
4903 5122 *cmd_done = 0;
4904 5123
4905 5124 /* get the command packet */
4906 5125 if (!(cmd = get_mfi_pkt(instance))) {
4907 - cmn_err(CE_WARN,
4908 - "Failed to get a cmd from free-pool in build_cmd(). fw_outstanding=0x%X max_fw_cmds=0x%X",
4909 - instance->fw_outstanding, instance->max_fw_cmds);
5126 + DTRACE_PROBE2(build_cmd_mfi_err, uint16_t,
5127 + instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
4910 5128 return (NULL);
4911 5129 }
4912 5130
4913 5131 acc_handle = cmd->frame_dma_obj.acc_handle;
4914 5132
4915 5133 /* Clear the frame buffer and assign back the context id */
4916 5134 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
4917 5135 ddi_put32(acc_handle, &cmd->frame->hdr.context, cmd->index);
4918 5136
4919 5137 cmd->pkt = pkt;
4920 5138 cmd->cmd = acmd;
5139 + DTRACE_PROBE3(build_cmds, uint8_t, pkt->pkt_cdbp[0],
5140 + ulong_t, acmd->cmd_dmacount, ulong_t, acmd->cmd_dma_len);
4921 5141
4922 5142 /* lets get the command directions */
4923 5143 if (acmd->cmd_flags & CFLAG_DMASEND) {
4924 5144 flags = MFI_FRAME_DIR_WRITE;
4925 5145
4926 5146 if (acmd->cmd_flags & CFLAG_CONSISTENT) {
4927 5147 (void) ddi_dma_sync(acmd->cmd_dmahandle,
4928 5148 acmd->cmd_dma_offset, acmd->cmd_dma_len,
4929 5149 DDI_DMA_SYNC_FORDEV);
4930 5150 }
4931 5151 } else if (acmd->cmd_flags & ~CFLAG_DMASEND) {
4932 5152 flags = MFI_FRAME_DIR_READ;
4933 5153
4934 5154 if (acmd->cmd_flags & CFLAG_CONSISTENT) {
4935 5155 (void) ddi_dma_sync(acmd->cmd_dmahandle,
4936 5156 acmd->cmd_dma_offset, acmd->cmd_dma_len,
4937 5157 DDI_DMA_SYNC_FORCPU);
4938 5158 }
4939 5159 } else {
4940 5160 flags = MFI_FRAME_DIR_NONE;
4941 5161 }
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4942 5162
4943 5163 if (instance->flag_ieee) {
4944 5164 flags |= MFI_FRAME_IEEE;
4945 5165 }
4946 5166 flags |= MFI_FRAME_SGL64;
4947 5167
4948 5168 switch (pkt->pkt_cdbp[0]) {
4949 5169
4950 5170 /*
4951 5171 * case SCMD_SYNCHRONIZE_CACHE:
4952 - * flush_cache(instance);
5172 + * flush_cache(instance);
4953 5173 * return_mfi_pkt(instance, cmd);
4954 5174 * *cmd_done = 1;
4955 5175 *
4956 5176 * return (NULL);
4957 5177 */
4958 5178
4959 5179 case SCMD_READ:
4960 5180 case SCMD_WRITE:
4961 5181 case SCMD_READ_G1:
4962 5182 case SCMD_WRITE_G1:
4963 5183 case SCMD_READ_G4:
4964 5184 case SCMD_WRITE_G4:
4965 5185 case SCMD_READ_G5:
4966 5186 case SCMD_WRITE_G5:
4967 5187 if (acmd->islogical) {
4968 5188 ldio = (struct mrsas_io_frame *)cmd->frame;
4969 5189
4970 5190 /*
4971 5191 * preare the Logical IO frame:
4972 5192 * 2nd bit is zero for all read cmds
4973 5193 */
4974 5194 ddi_put8(acc_handle, &ldio->cmd,
4975 5195 (pkt->pkt_cdbp[0] & 0x02) ? MFI_CMD_OP_LD_WRITE
4976 5196 : MFI_CMD_OP_LD_READ);
4977 5197 ddi_put8(acc_handle, &ldio->cmd_status, 0x0);
4978 5198 ddi_put8(acc_handle, &ldio->scsi_status, 0x0);
4979 5199 ddi_put8(acc_handle, &ldio->target_id, acmd->device_id);
4980 5200 ddi_put16(acc_handle, &ldio->timeout, 0);
4981 5201 ddi_put8(acc_handle, &ldio->reserved_0, 0);
4982 5202 ddi_put16(acc_handle, &ldio->pad_0, 0);
4983 5203 ddi_put16(acc_handle, &ldio->flags, flags);
4984 5204
4985 5205 /* Initialize sense Information */
4986 5206 bzero(cmd->sense, SENSE_LENGTH);
4987 5207 ddi_put8(acc_handle, &ldio->sense_len, SENSE_LENGTH);
4988 5208 ddi_put32(acc_handle, &ldio->sense_buf_phys_addr_hi, 0);
4989 5209 ddi_put32(acc_handle, &ldio->sense_buf_phys_addr_lo,
4990 5210 cmd->sense_phys_addr);
4991 5211 ddi_put32(acc_handle, &ldio->start_lba_hi, 0);
4992 5212 ddi_put8(acc_handle, &ldio->access_byte,
4993 5213 (acmd->cmd_cdblen != 6) ? pkt->pkt_cdbp[1] : 0);
4994 5214 ddi_put8(acc_handle, &ldio->sge_count,
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4995 5215 acmd->cmd_cookiecnt);
4996 5216 if (instance->flag_ieee) {
4997 5217 mfi_sgl_ieee =
4998 5218 (struct mrsas_sge_ieee *)&ldio->sgl;
4999 5219 } else {
5000 5220 mfi_sgl = (struct mrsas_sge64 *)&ldio->sgl;
5001 5221 }
5002 5222
5003 5223 context = ddi_get32(acc_handle, &ldio->context);
5004 5224
5005 - if (acmd->cmd_cdblen == CDB_GROUP0) { /* 6-byte cdb */
5225 + if (acmd->cmd_cdblen == CDB_GROUP0) {
5226 + /* 6-byte cdb */
5006 5227 ddi_put32(acc_handle, &ldio->lba_count, (
5007 5228 (uint16_t)(pkt->pkt_cdbp[4])));
5008 5229
5009 5230 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5010 5231 ((uint32_t)(pkt->pkt_cdbp[3])) |
5011 5232 ((uint32_t)(pkt->pkt_cdbp[2]) << 8) |
5012 5233 ((uint32_t)((pkt->pkt_cdbp[1]) & 0x1F)
5013 5234 << 16)));
5014 - } else if (acmd->cmd_cdblen == CDB_GROUP1) { /* 10-byte cdb */
5235 + } else if (acmd->cmd_cdblen == CDB_GROUP1) {
5236 + /* 10-byte cdb */
5015 5237 ddi_put32(acc_handle, &ldio->lba_count, (
5016 5238 ((uint16_t)(pkt->pkt_cdbp[8])) |
5017 5239 ((uint16_t)(pkt->pkt_cdbp[7]) << 8)));
5018 5240
5019 5241 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5020 5242 ((uint32_t)(pkt->pkt_cdbp[5])) |
5021 5243 ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
5022 5244 ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
5023 5245 ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
5024 - } else if (acmd->cmd_cdblen == CDB_GROUP5) { /* 12-byte cdb */
5246 + } else if (acmd->cmd_cdblen == CDB_GROUP5) {
5247 + /* 12-byte cdb */
5025 5248 ddi_put32(acc_handle, &ldio->lba_count, (
5026 5249 ((uint32_t)(pkt->pkt_cdbp[9])) |
5027 5250 ((uint32_t)(pkt->pkt_cdbp[8]) << 8) |
5028 5251 ((uint32_t)(pkt->pkt_cdbp[7]) << 16) |
5029 5252 ((uint32_t)(pkt->pkt_cdbp[6]) << 24)));
5030 5253
5031 5254 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5032 5255 ((uint32_t)(pkt->pkt_cdbp[5])) |
5033 5256 ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
5034 5257 ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
5035 5258 ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
5036 - } else if (acmd->cmd_cdblen == CDB_GROUP4) { /* 16-byte cdb */
5259 + } else if (acmd->cmd_cdblen == CDB_GROUP4) {
5260 + /* 16-byte cdb */
5037 5261 ddi_put32(acc_handle, &ldio->lba_count, (
5038 5262 ((uint32_t)(pkt->pkt_cdbp[13])) |
5039 5263 ((uint32_t)(pkt->pkt_cdbp[12]) << 8) |
5040 5264 ((uint32_t)(pkt->pkt_cdbp[11]) << 16) |
5041 5265 ((uint32_t)(pkt->pkt_cdbp[10]) << 24)));
5042 5266
5043 5267 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5044 5268 ((uint32_t)(pkt->pkt_cdbp[9])) |
5045 5269 ((uint32_t)(pkt->pkt_cdbp[8]) << 8) |
5046 5270 ((uint32_t)(pkt->pkt_cdbp[7]) << 16) |
5047 5271 ((uint32_t)(pkt->pkt_cdbp[6]) << 24)));
5048 5272
5049 5273 ddi_put32(acc_handle, &ldio->start_lba_hi, (
5050 5274 ((uint32_t)(pkt->pkt_cdbp[5])) |
5051 5275 ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
5052 5276 ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
5053 5277 ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
5054 5278 }
5055 5279
5056 5280 break;
5057 5281 }
5058 5282 /* fall through For all non-rd/wr cmds */
5059 5283 default:
5060 5284
5061 5285 switch (pkt->pkt_cdbp[0]) {
5062 5286 case SCMD_MODE_SENSE:
5063 5287 case SCMD_MODE_SENSE_G1: {
5064 5288 union scsi_cdb *cdbp;
5065 5289 uint16_t page_code;
5066 5290
5067 5291 cdbp = (void *)pkt->pkt_cdbp;
5068 5292 page_code = (uint16_t)cdbp->cdb_un.sg.scsi[0];
5069 5293 switch (page_code) {
5070 5294 case 0x3:
5071 5295 case 0x4:
5072 5296 (void) mrsas_mode_sense_build(pkt);
5073 5297 return_mfi_pkt(instance, cmd);
5074 5298 *cmd_done = 1;
5075 5299 return (NULL);
5076 5300 }
5077 5301 break;
5078 5302 }
5079 5303 default:
5080 5304 break;
5081 5305 }
5082 5306
5083 5307 pthru = (struct mrsas_pthru_frame *)cmd->frame;
5084 5308
5085 5309 /* prepare the DCDB frame */
5086 5310 ddi_put8(acc_handle, &pthru->cmd, (acmd->islogical) ?
5087 5311 MFI_CMD_OP_LD_SCSI : MFI_CMD_OP_PD_SCSI);
5088 5312 ddi_put8(acc_handle, &pthru->cmd_status, 0x0);
5089 5313 ddi_put8(acc_handle, &pthru->scsi_status, 0x0);
5090 5314 ddi_put8(acc_handle, &pthru->target_id, acmd->device_id);
5091 5315 ddi_put8(acc_handle, &pthru->lun, 0);
5092 5316 ddi_put8(acc_handle, &pthru->cdb_len, acmd->cmd_cdblen);
5093 5317 ddi_put16(acc_handle, &pthru->timeout, 0);
5094 5318 ddi_put16(acc_handle, &pthru->flags, flags);
5095 5319 tmp_data_xfer_len = 0;
5096 5320 for (i = 0; i < acmd->cmd_cookiecnt; i++) {
5097 5321 tmp_data_xfer_len += acmd->cmd_dmacookies[i].dmac_size;
5098 5322 }
5099 5323 ddi_put32(acc_handle, &pthru->data_xfer_len,
5100 5324 tmp_data_xfer_len);
5101 5325 ddi_put8(acc_handle, &pthru->sge_count, acmd->cmd_cookiecnt);
5102 5326 if (instance->flag_ieee) {
5103 5327 mfi_sgl_ieee = (struct mrsas_sge_ieee *)&pthru->sgl;
5104 5328 } else {
5105 5329 mfi_sgl = (struct mrsas_sge64 *)&pthru->sgl;
5106 5330 }
5107 5331
5108 5332 bzero(cmd->sense, SENSE_LENGTH);
5109 5333 ddi_put8(acc_handle, &pthru->sense_len, SENSE_LENGTH);
5110 5334 ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_hi, 0);
5111 5335 ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_lo,
5112 5336 cmd->sense_phys_addr);
5113 5337
5114 5338 context = ddi_get32(acc_handle, &pthru->context);
5115 5339 ddi_rep_put8(acc_handle, (uint8_t *)pkt->pkt_cdbp,
5116 5340 (uint8_t *)pthru->cdb, acmd->cmd_cdblen, DDI_DEV_AUTOINCR);
5117 5341
5118 5342 break;
5119 5343 }
5120 5344 #ifdef lint
5121 5345 context = context;
5122 5346 #endif
5123 5347 /* prepare the scatter-gather list for the firmware */
5124 5348 if (instance->flag_ieee) {
5125 5349 for (i = 0; i < acmd->cmd_cookiecnt; i++, mfi_sgl_ieee++) {
5126 5350 ddi_put64(acc_handle, &mfi_sgl_ieee->phys_addr,
5127 5351 acmd->cmd_dmacookies[i].dmac_laddress);
5128 5352 ddi_put32(acc_handle, &mfi_sgl_ieee->length,
5129 5353 acmd->cmd_dmacookies[i].dmac_size);
5130 5354 }
5131 5355 sge_bytes = sizeof (struct mrsas_sge_ieee)*acmd->cmd_cookiecnt;
5132 5356 } else {
5133 5357 for (i = 0; i < acmd->cmd_cookiecnt; i++, mfi_sgl++) {
5134 5358 ddi_put64(acc_handle, &mfi_sgl->phys_addr,
5135 5359 acmd->cmd_dmacookies[i].dmac_laddress);
5136 5360 ddi_put32(acc_handle, &mfi_sgl->length,
5137 5361 acmd->cmd_dmacookies[i].dmac_size);
5138 5362 }
5139 5363 sge_bytes = sizeof (struct mrsas_sge64)*acmd->cmd_cookiecnt;
5140 5364 }
5141 5365
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5142 5366 cmd->frame_count = (sge_bytes / MRMFI_FRAME_SIZE) +
5143 5367 ((sge_bytes % MRMFI_FRAME_SIZE) ? 1 : 0) + 1;
5144 5368
5145 5369 if (cmd->frame_count >= 8) {
5146 5370 cmd->frame_count = 8;
5147 5371 }
5148 5372
5149 5373 return (cmd);
5150 5374 }
5151 5375
5376 +#ifndef __sparc
5152 5377 /*
5153 5378 * wait_for_outstanding - Wait for all outstanding cmds
5154 5379 * @instance: Adapter soft state
5155 5380 *
5156 5381 * This function waits for upto MRDRV_RESET_WAIT_TIME seconds for FW to
5157 5382 * complete all its outstanding commands. Returns error if one or more IOs
5158 5383 * are pending after this time period.
5159 5384 */
5160 5385 static int
5161 5386 wait_for_outstanding(struct mrsas_instance *instance)
5162 5387 {
5163 5388 int i;
5164 5389 uint32_t wait_time = 90;
5165 5390
5166 5391 for (i = 0; i < wait_time; i++) {
5167 5392 if (!instance->fw_outstanding) {
5168 5393 break;
5169 5394 }
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5170 5395
5171 5396 drv_usecwait(MILLISEC); /* wait for 1000 usecs */;
5172 5397 }
5173 5398
5174 5399 if (instance->fw_outstanding) {
5175 5400 return (1);
5176 5401 }
5177 5402
5178 5403 return (0);
5179 5404 }
5405 +#endif /* __sparc */
5180 5406
5181 -
5182 5407 /*
5183 5408 * issue_mfi_pthru
5184 5409 */
5185 5410 static int
5186 5411 issue_mfi_pthru(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5187 5412 struct mrsas_cmd *cmd, int mode)
5188 5413 {
5189 5414 void *ubuf;
5190 5415 uint32_t kphys_addr = 0;
5191 5416 uint32_t xferlen = 0;
5192 - uint32_t new_xfer_length =0;
5417 + uint32_t new_xfer_length = 0;
5193 5418 uint_t model;
5194 5419 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
5195 5420 dma_obj_t pthru_dma_obj;
5196 5421 struct mrsas_pthru_frame *kpthru;
5197 5422 struct mrsas_pthru_frame *pthru;
5198 5423 int i;
5199 5424 pthru = &cmd->frame->pthru;
5200 5425 kpthru = (struct mrsas_pthru_frame *)&ioctl->frame[0];
5201 5426
5202 5427 if (instance->adapterresetinprogress) {
5203 5428 con_log(CL_ANN1, (CE_WARN, "issue_mfi_pthru: Reset flag set, "
5204 5429 "returning mfi_pkt and setting TRAN_BUSY\n"));
5205 5430 return (DDI_FAILURE);
5206 5431 }
5207 5432 model = ddi_model_convert_from(mode & FMODELS);
5208 5433 if (model == DDI_MODEL_ILP32) {
5209 5434 con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP32"));
5210 5435
5211 5436 xferlen = kpthru->sgl.sge32[0].length;
5212 5437
5213 5438 ubuf = (void *)(ulong_t)kpthru->sgl.sge32[0].phys_addr;
5214 5439 } else {
5215 5440 #ifdef _ILP32
5216 5441 con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP32"));
5217 5442 xferlen = kpthru->sgl.sge32[0].length;
5218 5443 ubuf = (void *)(ulong_t)kpthru->sgl.sge32[0].phys_addr;
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5219 5444 #else
5220 5445 con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP64"));
5221 5446 xferlen = kpthru->sgl.sge64[0].length;
5222 5447 ubuf = (void *)(ulong_t)kpthru->sgl.sge64[0].phys_addr;
5223 5448 #endif
5224 5449 }
5225 5450
5226 5451 if (xferlen) {
5227 5452 /* means IOCTL requires DMA */
5228 5453 /* allocate the data transfer buffer */
5229 - //pthru_dma_obj.size = xferlen;
5230 - MRSAS_GET_BOUNDARY_ALIGNED_LEN(xferlen,new_xfer_length,PAGESIZE);
5454 + /* pthru_dma_obj.size = xferlen; */
5455 + MRSAS_GET_BOUNDARY_ALIGNED_LEN(xferlen, new_xfer_length,
5456 + PAGESIZE);
5231 5457 pthru_dma_obj.size = new_xfer_length;
5232 5458 pthru_dma_obj.dma_attr = mrsas_generic_dma_attr;
5233 5459 pthru_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5234 5460 pthru_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5235 5461 pthru_dma_obj.dma_attr.dma_attr_sgllen = 1;
5236 5462 pthru_dma_obj.dma_attr.dma_attr_align = 1;
5237 5463
5238 5464 /* allocate kernel buffer for DMA */
5239 5465 if (mrsas_alloc_dma_obj(instance, &pthru_dma_obj,
5240 5466 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5241 5467 con_log(CL_ANN, (CE_WARN, "issue_mfi_pthru: "
5242 5468 "could not allocate data transfer buffer."));
5243 5469 return (DDI_FAILURE);
5244 5470 }
5245 5471 (void) memset(pthru_dma_obj.buffer, 0, xferlen);
5246 5472
5247 5473 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5248 5474 if (kpthru->flags & MFI_FRAME_DIR_WRITE) {
5249 5475 for (i = 0; i < xferlen; i++) {
5250 5476 if (ddi_copyin((uint8_t *)ubuf+i,
5251 5477 (uint8_t *)pthru_dma_obj.buffer+i,
5252 5478 1, mode)) {
5253 5479 con_log(CL_ANN, (CE_WARN,
5254 5480 "issue_mfi_pthru : "
5255 5481 "copy from user space failed"));
5256 5482 return (DDI_FAILURE);
5257 5483 }
5258 5484 }
5259 5485 }
5260 5486
5261 5487 kphys_addr = pthru_dma_obj.dma_cookie[0].dmac_address;
5262 5488 }
5263 5489
5264 5490 ddi_put8(acc_handle, &pthru->cmd, kpthru->cmd);
5265 5491 ddi_put8(acc_handle, &pthru->sense_len, SENSE_LENGTH);
5266 5492 ddi_put8(acc_handle, &pthru->cmd_status, 0);
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5267 5493 ddi_put8(acc_handle, &pthru->scsi_status, 0);
5268 5494 ddi_put8(acc_handle, &pthru->target_id, kpthru->target_id);
5269 5495 ddi_put8(acc_handle, &pthru->lun, kpthru->lun);
5270 5496 ddi_put8(acc_handle, &pthru->cdb_len, kpthru->cdb_len);
5271 5497 ddi_put8(acc_handle, &pthru->sge_count, kpthru->sge_count);
5272 5498 ddi_put16(acc_handle, &pthru->timeout, kpthru->timeout);
5273 5499 ddi_put32(acc_handle, &pthru->data_xfer_len, kpthru->data_xfer_len);
5274 5500
5275 5501 ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_hi, 0);
5276 5502 pthru->sense_buf_phys_addr_lo = cmd->sense_phys_addr;
5277 - /*ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_lo, 0); */
5503 + /* ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_lo, 0); */
5278 5504
5279 5505 ddi_rep_put8(acc_handle, (uint8_t *)kpthru->cdb, (uint8_t *)pthru->cdb,
5280 5506 pthru->cdb_len, DDI_DEV_AUTOINCR);
5281 5507
5282 5508 ddi_put16(acc_handle, &pthru->flags, kpthru->flags & ~MFI_FRAME_SGL64);
5283 5509 ddi_put32(acc_handle, &pthru->sgl.sge32[0].length, xferlen);
5284 5510 ddi_put32(acc_handle, &pthru->sgl.sge32[0].phys_addr, kphys_addr);
5285 5511
5286 5512 cmd->sync_cmd = MRSAS_TRUE;
5287 5513 cmd->frame_count = 1;
5288 5514
5289 5515 if (instance->tbolt) {
5290 5516 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
5291 5517 }
5292 5518
5293 5519 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
5294 5520 con_log(CL_ANN, (CE_WARN,
5295 5521 "issue_mfi_pthru: fw_ioctl failed"));
5296 5522 } else {
5297 5523 if (xferlen && kpthru->flags & MFI_FRAME_DIR_READ) {
5298 5524 for (i = 0; i < xferlen; i++) {
5299 5525 if (ddi_copyout(
5300 5526 (uint8_t *)pthru_dma_obj.buffer+i,
5301 5527 (uint8_t *)ubuf+i, 1, mode)) {
5302 5528 con_log(CL_ANN, (CE_WARN,
5303 5529 "issue_mfi_pthru : "
5304 5530 "copy to user space failed"));
5305 5531 return (DDI_FAILURE);
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5306 5532 }
5307 5533 }
5308 5534 }
5309 5535 }
5310 5536
5311 5537 kpthru->cmd_status = ddi_get8(acc_handle, &pthru->cmd_status);
5312 5538 kpthru->scsi_status = ddi_get8(acc_handle, &pthru->scsi_status);
5313 5539
5314 5540 con_log(CL_ANN, (CE_CONT, "issue_mfi_pthru: cmd_status %x, "
5315 5541 "scsi_status %x", kpthru->cmd_status, kpthru->scsi_status));
5316 -
5542 + DTRACE_PROBE3(issue_pthru, uint8_t, kpthru->cmd, uint8_t,
5543 + kpthru->cmd_status, uint8_t, kpthru->scsi_status);
5544 +
5317 5545 if (kpthru->sense_len) {
5318 - uint sense_len = SENSE_LENGTH;
5319 - void *sense_ubuf = (void *)(ulong_t)kpthru->sense_buf_phys_addr_lo;
5546 + uint_t sense_len = SENSE_LENGTH;
5547 + void *sense_ubuf =
5548 + (void *)(ulong_t)kpthru->sense_buf_phys_addr_lo;
5320 5549 if (kpthru->sense_len <= SENSE_LENGTH) {
5321 5550 sense_len = kpthru->sense_len;
5322 5551 }
5323 -
5552 +
5324 5553 for (i = 0; i < sense_len; i++) {
5325 5554 if (ddi_copyout(
5326 5555 (uint8_t *)cmd->sense+i,
5327 5556 (uint8_t *)sense_ubuf+i, 1, mode)) {
5328 5557 con_log(CL_ANN, (CE_WARN,
5329 5558 "issue_mfi_pthru : "
5330 5559 "copy to user space failed"));
5331 5560 }
5332 5561 con_log(CL_DLEVEL1, (CE_WARN,
5333 - "Copying Sense info sense_buff[%d] = 0x%X\n",i,*((uint8_t *)cmd->sense+i)));
5562 + "Copying Sense info sense_buff[%d] = 0x%X",
5563 + i, *((uint8_t *)cmd->sense + i)));
5334 5564 }
5335 5565 }
5336 5566 (void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle, 0, 0,
5337 - DDI_DMA_SYNC_FORDEV);
5567 + DDI_DMA_SYNC_FORDEV);
5338 5568
5339 5569 if (xferlen) {
5340 5570 /* free kernel buffer */
5341 5571 if (mrsas_free_dma_obj(instance, pthru_dma_obj) != DDI_SUCCESS)
5342 5572 return (DDI_FAILURE);
5343 5573 }
5344 5574
5345 5575 return (DDI_SUCCESS);
5346 5576 }
5347 5577
5348 5578 /*
5349 5579 * issue_mfi_dcmd
5350 5580 */
5351 5581 static int
5352 5582 issue_mfi_dcmd(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5353 5583 struct mrsas_cmd *cmd, int mode)
5354 5584 {
5355 5585 void *ubuf;
5356 5586 uint32_t kphys_addr = 0;
5357 5587 uint32_t xferlen = 0;
5358 - uint32_t new_xfer_length = 0;
5588 + uint32_t new_xfer_length = 0;
5359 5589 uint32_t model;
5360 5590 dma_obj_t dcmd_dma_obj;
5361 5591 struct mrsas_dcmd_frame *kdcmd;
5362 5592 struct mrsas_dcmd_frame *dcmd;
5363 5593 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
5364 5594 int i;
5365 5595 dcmd = &cmd->frame->dcmd;
5366 5596 kdcmd = (struct mrsas_dcmd_frame *)&ioctl->frame[0];
5367 5597
5368 5598 if (instance->adapterresetinprogress) {
5369 - con_log(CL_ANN1, (CE_WARN, "Reset flag set, "
5370 - "returning mfi_pkt and setting TRAN_BUSY\n"));
5599 + con_log(CL_ANN1, (CE_NOTE, "Reset flag set, "
5600 + "returning mfi_pkt and setting TRAN_BUSY"));
5371 5601 return (DDI_FAILURE);
5372 5602 }
5373 5603 model = ddi_model_convert_from(mode & FMODELS);
5374 5604 if (model == DDI_MODEL_ILP32) {
5375 5605 con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_ILP32"));
5376 5606
5377 5607 xferlen = kdcmd->sgl.sge32[0].length;
5378 5608
5379 5609 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
5380 5610 } else {
5381 5611 #ifdef _ILP32
5382 5612 con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_ILP32"));
5383 5613 xferlen = kdcmd->sgl.sge32[0].length;
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5384 5614 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
5385 5615 #else
5386 5616 con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_LP64"));
5387 5617 xferlen = kdcmd->sgl.sge64[0].length;
5388 5618 ubuf = (void *)(ulong_t)kdcmd->sgl.sge64[0].phys_addr;
5389 5619 #endif
5390 5620 }
5391 5621 if (xferlen) {
5392 5622 /* means IOCTL requires DMA */
5393 5623 /* allocate the data transfer buffer */
5394 - //dcmd_dma_obj.size = xferlen;
5395 - MRSAS_GET_BOUNDARY_ALIGNED_LEN(xferlen,new_xfer_length,PAGESIZE);
5624 + /* dcmd_dma_obj.size = xferlen; */
5625 + MRSAS_GET_BOUNDARY_ALIGNED_LEN(xferlen, new_xfer_length,
5626 + PAGESIZE);
5396 5627 dcmd_dma_obj.size = new_xfer_length;
5397 5628 dcmd_dma_obj.dma_attr = mrsas_generic_dma_attr;
5398 5629 dcmd_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5399 5630 dcmd_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5400 5631 dcmd_dma_obj.dma_attr.dma_attr_sgllen = 1;
5401 5632 dcmd_dma_obj.dma_attr.dma_attr_align = 1;
5402 5633
5403 5634 /* allocate kernel buffer for DMA */
5404 5635 if (mrsas_alloc_dma_obj(instance, &dcmd_dma_obj,
5405 5636 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5406 - con_log(CL_ANN, (CE_WARN, "issue_mfi_dcmd: "
5407 - "could not allocate data transfer buffer."));
5637 + con_log(CL_ANN,
5638 + (CE_WARN, "issue_mfi_dcmd: could not "
5639 + "allocate data transfer buffer."));
5408 5640 return (DDI_FAILURE);
5409 5641 }
5410 5642 (void) memset(dcmd_dma_obj.buffer, 0, xferlen);
5411 5643
5412 5644 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5413 5645 if (kdcmd->flags & MFI_FRAME_DIR_WRITE) {
5414 5646 for (i = 0; i < xferlen; i++) {
5415 5647 if (ddi_copyin((uint8_t *)ubuf + i,
5416 5648 (uint8_t *)dcmd_dma_obj.buffer + i,
5417 5649 1, mode)) {
5418 5650 con_log(CL_ANN, (CE_WARN,
5419 5651 "issue_mfi_dcmd : "
5420 5652 "copy from user space failed"));
5421 5653 return (DDI_FAILURE);
5422 5654 }
5423 5655 }
5424 5656 }
5425 5657
5426 5658 kphys_addr = dcmd_dma_obj.dma_cookie[0].dmac_address;
5427 5659 }
5428 5660
5429 5661 ddi_put8(acc_handle, &dcmd->cmd, kdcmd->cmd);
5430 5662 ddi_put8(acc_handle, &dcmd->cmd_status, 0);
5431 5663 ddi_put8(acc_handle, &dcmd->sge_count, kdcmd->sge_count);
5432 5664 ddi_put16(acc_handle, &dcmd->timeout, kdcmd->timeout);
5433 5665 ddi_put32(acc_handle, &dcmd->data_xfer_len, kdcmd->data_xfer_len);
5434 5666 ddi_put32(acc_handle, &dcmd->opcode, kdcmd->opcode);
5435 5667
5436 5668 ddi_rep_put8(acc_handle, (uint8_t *)kdcmd->mbox.b,
5437 5669 (uint8_t *)dcmd->mbox.b, DCMD_MBOX_SZ, DDI_DEV_AUTOINCR);
5438 5670
5439 5671 ddi_put16(acc_handle, &dcmd->flags, kdcmd->flags & ~MFI_FRAME_SGL64);
5440 5672 ddi_put32(acc_handle, &dcmd->sgl.sge32[0].length, xferlen);
5441 5673 ddi_put32(acc_handle, &dcmd->sgl.sge32[0].phys_addr, kphys_addr);
5442 5674
5443 5675 cmd->sync_cmd = MRSAS_TRUE;
5444 5676 cmd->frame_count = 1;
5445 5677
5446 5678 if (instance->tbolt) {
5447 5679 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
5448 5680 }
5449 5681
5450 5682 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
5451 5683 con_log(CL_ANN, (CE_WARN, "issue_mfi_dcmd: fw_ioctl failed"));
5452 5684 } else {
5453 5685 if (xferlen && (kdcmd->flags & MFI_FRAME_DIR_READ)) {
5454 5686 for (i = 0; i < xferlen; i++) {
5455 5687 if (ddi_copyout(
5456 5688 (uint8_t *)dcmd_dma_obj.buffer + i,
5457 5689 (uint8_t *)ubuf + i,
5458 5690 1, mode)) {
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5459 5691 con_log(CL_ANN, (CE_WARN,
5460 5692 "issue_mfi_dcmd : "
5461 5693 "copy to user space failed"));
5462 5694 return (DDI_FAILURE);
5463 5695 }
5464 5696 }
5465 5697 }
5466 5698 }
5467 5699
5468 5700 kdcmd->cmd_status = ddi_get8(acc_handle, &dcmd->cmd_status);
5469 - con_log(CL_ANN, (CE_CONT, "issue_mfi_dcmd: cmd_status %x", kdcmd->cmd_status));
5701 + con_log(CL_ANN,
5702 + (CE_CONT, "issue_mfi_dcmd: cmd_status %x", kdcmd->cmd_status));
5703 + DTRACE_PROBE3(issue_dcmd, uint32_t, kdcmd->opcode, uint8_t,
5704 + kdcmd->cmd, uint8_t, kdcmd->cmd_status);
5470 5705
5471 5706 if (xferlen) {
5472 5707 /* free kernel buffer */
5473 - if (mrsas_free_dma_obj(instance, dcmd_dma_obj) != DDI_SUCCESS)
5474 - return (DDI_FAILURE);
5708 + if (mrsas_free_dma_obj(instance, dcmd_dma_obj) != DDI_SUCCESS)
5709 + return (DDI_FAILURE);
5475 5710 }
5476 5711
5477 5712 return (DDI_SUCCESS);
5478 5713 }
5479 5714
5480 5715 /*
5481 5716 * issue_mfi_smp
5482 5717 */
5483 5718 static int
5484 5719 issue_mfi_smp(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5485 5720 struct mrsas_cmd *cmd, int mode)
5486 5721 {
5487 5722 void *request_ubuf;
5488 5723 void *response_ubuf;
5489 5724 uint32_t request_xferlen = 0;
5490 5725 uint32_t response_xferlen = 0;
5491 5726 uint32_t new_xfer_length1 = 0;
5492 5727 uint32_t new_xfer_length2 = 0;
5493 5728 uint_t model;
5494 5729 dma_obj_t request_dma_obj;
5495 5730 dma_obj_t response_dma_obj;
5496 5731 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
5497 5732 struct mrsas_smp_frame *ksmp;
5498 5733 struct mrsas_smp_frame *smp;
5499 5734 struct mrsas_sge32 *sge32;
5500 5735 #ifndef _ILP32
5501 5736 struct mrsas_sge64 *sge64;
5502 5737 #endif
5503 5738 int i;
5504 5739 uint64_t tmp_sas_addr;
5505 5740
5506 5741 smp = &cmd->frame->smp;
5507 5742 ksmp = (struct mrsas_smp_frame *)&ioctl->frame[0];
5508 5743
5509 5744 if (instance->adapterresetinprogress) {
5510 5745 con_log(CL_ANN1, (CE_WARN, "Reset flag set, "
5511 5746 "returning mfi_pkt and setting TRAN_BUSY\n"));
5512 5747 return (DDI_FAILURE);
5513 5748 }
5514 5749 model = ddi_model_convert_from(mode & FMODELS);
5515 5750 if (model == DDI_MODEL_ILP32) {
5516 5751 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: DDI_MODEL_ILP32"));
5517 5752
5518 5753 sge32 = &ksmp->sgl[0].sge32[0];
5519 5754 response_xferlen = sge32[0].length;
5520 5755 request_xferlen = sge32[1].length;
5521 5756 con_log(CL_ANN, (CE_CONT, "issue_mfi_smp: "
5522 5757 "response_xferlen = %x, request_xferlen = %x",
5523 5758 response_xferlen, request_xferlen));
5524 5759
5525 5760 response_ubuf = (void *)(ulong_t)sge32[0].phys_addr;
5526 5761 request_ubuf = (void *)(ulong_t)sge32[1].phys_addr;
5527 5762 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: "
5528 5763 "response_ubuf = %p, request_ubuf = %p",
5529 5764 response_ubuf, request_ubuf));
5530 5765 } else {
5531 5766 #ifdef _ILP32
5532 5767 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: DDI_MODEL_ILP32"));
5533 5768
5534 5769 sge32 = &ksmp->sgl[0].sge32[0];
5535 5770 response_xferlen = sge32[0].length;
5536 5771 request_xferlen = sge32[1].length;
5537 5772 con_log(CL_ANN, (CE_CONT, "issue_mfi_smp: "
5538 5773 "response_xferlen = %x, request_xferlen = %x",
5539 5774 response_xferlen, request_xferlen));
5540 5775
5541 5776 response_ubuf = (void *)(ulong_t)sge32[0].phys_addr;
5542 5777 request_ubuf = (void *)(ulong_t)sge32[1].phys_addr;
5543 5778 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: "
5544 5779 "response_ubuf = %p, request_ubuf = %p",
5545 5780 response_ubuf, request_ubuf));
5546 5781 #else
5547 5782 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: DDI_MODEL_LP64"));
5548 5783
5549 5784 sge64 = &ksmp->sgl[0].sge64[0];
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5550 5785 response_xferlen = sge64[0].length;
5551 5786 request_xferlen = sge64[1].length;
5552 5787
5553 5788 response_ubuf = (void *)(ulong_t)sge64[0].phys_addr;
5554 5789 request_ubuf = (void *)(ulong_t)sge64[1].phys_addr;
5555 5790 #endif
5556 5791 }
5557 5792 if (request_xferlen) {
5558 5793 /* means IOCTL requires DMA */
5559 5794 /* allocate the data transfer buffer */
5560 - //request_dma_obj.size = request_xferlen;
5561 - MRSAS_GET_BOUNDARY_ALIGNED_LEN(request_xferlen,new_xfer_length1,PAGESIZE);
5795 + /* request_dma_obj.size = request_xferlen; */
5796 + MRSAS_GET_BOUNDARY_ALIGNED_LEN(request_xferlen,
5797 + new_xfer_length1, PAGESIZE);
5562 5798 request_dma_obj.size = new_xfer_length1;
5563 5799 request_dma_obj.dma_attr = mrsas_generic_dma_attr;
5564 5800 request_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5565 5801 request_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5566 5802 request_dma_obj.dma_attr.dma_attr_sgllen = 1;
5567 5803 request_dma_obj.dma_attr.dma_attr_align = 1;
5568 5804
5569 5805 /* allocate kernel buffer for DMA */
5570 5806 if (mrsas_alloc_dma_obj(instance, &request_dma_obj,
5571 5807 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5572 5808 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5573 5809 "could not allocate data transfer buffer."));
5574 5810 return (DDI_FAILURE);
5575 5811 }
5576 5812 (void) memset(request_dma_obj.buffer, 0, request_xferlen);
5577 5813
5578 5814 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5579 5815 for (i = 0; i < request_xferlen; i++) {
5580 5816 if (ddi_copyin((uint8_t *)request_ubuf + i,
5581 5817 (uint8_t *)request_dma_obj.buffer + i,
5582 5818 1, mode)) {
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5583 5819 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5584 5820 "copy from user space failed"));
5585 5821 return (DDI_FAILURE);
5586 5822 }
5587 5823 }
5588 5824 }
5589 5825
5590 5826 if (response_xferlen) {
5591 5827 /* means IOCTL requires DMA */
5592 5828 /* allocate the data transfer buffer */
5593 - //response_dma_obj.size = response_xferlen;
5594 - MRSAS_GET_BOUNDARY_ALIGNED_LEN(response_xferlen,new_xfer_length2,PAGESIZE);
5829 + /* response_dma_obj.size = response_xferlen; */
5830 + MRSAS_GET_BOUNDARY_ALIGNED_LEN(response_xferlen,
5831 + new_xfer_length2, PAGESIZE);
5595 5832 response_dma_obj.size = new_xfer_length2;
5596 5833 response_dma_obj.dma_attr = mrsas_generic_dma_attr;
5597 5834 response_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5598 5835 response_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5599 5836 response_dma_obj.dma_attr.dma_attr_sgllen = 1;
5600 5837 response_dma_obj.dma_attr.dma_attr_align = 1;
5601 5838
5602 5839 /* allocate kernel buffer for DMA */
5603 5840 if (mrsas_alloc_dma_obj(instance, &response_dma_obj,
5604 5841 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5605 5842 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5606 5843 "could not allocate data transfer buffer."));
5607 5844 return (DDI_FAILURE);
5608 5845 }
5609 5846 (void) memset(response_dma_obj.buffer, 0, response_xferlen);
5610 5847
5611 5848 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5612 5849 for (i = 0; i < response_xferlen; i++) {
5613 5850 if (ddi_copyin((uint8_t *)response_ubuf + i,
5614 5851 (uint8_t *)response_dma_obj.buffer + i,
5615 5852 1, mode)) {
5616 5853 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5617 5854 "copy from user space failed"));
5618 5855 return (DDI_FAILURE);
5619 5856 }
5620 5857 }
5621 5858 }
5622 5859
5623 5860 ddi_put8(acc_handle, &smp->cmd, ksmp->cmd);
5624 5861 ddi_put8(acc_handle, &smp->cmd_status, 0);
5625 5862 ddi_put8(acc_handle, &smp->connection_status, 0);
5626 5863 ddi_put8(acc_handle, &smp->sge_count, ksmp->sge_count);
5627 5864 /* smp->context = ksmp->context; */
5628 5865 ddi_put16(acc_handle, &smp->timeout, ksmp->timeout);
5629 5866 ddi_put32(acc_handle, &smp->data_xfer_len, ksmp->data_xfer_len);
5630 5867
5631 5868 bcopy((void *)&ksmp->sas_addr, (void *)&tmp_sas_addr,
5632 5869 sizeof (uint64_t));
5633 5870 ddi_put64(acc_handle, &smp->sas_addr, tmp_sas_addr);
5634 5871
5635 5872 ddi_put16(acc_handle, &smp->flags, ksmp->flags & ~MFI_FRAME_SGL64);
5636 5873
5637 5874 model = ddi_model_convert_from(mode & FMODELS);
5638 5875 if (model == DDI_MODEL_ILP32) {
5639 5876 con_log(CL_ANN1, (CE_CONT,
5640 5877 "issue_mfi_smp: DDI_MODEL_ILP32"));
5641 5878
5642 5879 sge32 = &smp->sgl[0].sge32[0];
5643 5880 ddi_put32(acc_handle, &sge32[0].length, response_xferlen);
5644 5881 ddi_put32(acc_handle, &sge32[0].phys_addr,
5645 5882 response_dma_obj.dma_cookie[0].dmac_address);
5646 5883 ddi_put32(acc_handle, &sge32[1].length, request_xferlen);
5647 5884 ddi_put32(acc_handle, &sge32[1].phys_addr,
5648 5885 request_dma_obj.dma_cookie[0].dmac_address);
5649 5886 } else {
5650 5887 #ifdef _ILP32
5651 5888 con_log(CL_ANN1, (CE_CONT,
5652 5889 "issue_mfi_smp: DDI_MODEL_ILP32"));
5653 5890 sge32 = &smp->sgl[0].sge32[0];
5654 5891 ddi_put32(acc_handle, &sge32[0].length, response_xferlen);
5655 5892 ddi_put32(acc_handle, &sge32[0].phys_addr,
5656 5893 response_dma_obj.dma_cookie[0].dmac_address);
5657 5894 ddi_put32(acc_handle, &sge32[1].length, request_xferlen);
5658 5895 ddi_put32(acc_handle, &sge32[1].phys_addr,
5659 5896 request_dma_obj.dma_cookie[0].dmac_address);
5660 5897 #else
5661 5898 con_log(CL_ANN1, (CE_CONT,
5662 5899 "issue_mfi_smp: DDI_MODEL_LP64"));
5663 5900 sge64 = &smp->sgl[0].sge64[0];
5664 5901 ddi_put32(acc_handle, &sge64[0].length, response_xferlen);
5665 5902 ddi_put64(acc_handle, &sge64[0].phys_addr,
5666 5903 response_dma_obj.dma_cookie[0].dmac_address);
5667 5904 ddi_put32(acc_handle, &sge64[1].length, request_xferlen);
5668 5905 ddi_put64(acc_handle, &sge64[1].phys_addr,
5669 5906 request_dma_obj.dma_cookie[0].dmac_address);
5670 5907 #endif
5671 5908 }
5672 5909 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp : "
5673 5910 "smp->response_xferlen = %d, smp->request_xferlen = %d "
5674 5911 "smp->data_xfer_len = %d", ddi_get32(acc_handle, &sge32[0].length),
5675 5912 ddi_get32(acc_handle, &sge32[1].length),
5676 5913 ddi_get32(acc_handle, &smp->data_xfer_len)));
5677 5914
5678 5915 cmd->sync_cmd = MRSAS_TRUE;
5679 5916 cmd->frame_count = 1;
5680 5917
5681 5918 if (instance->tbolt) {
5682 5919 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
5683 5920 }
5684 5921
5685 5922 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
5686 5923 con_log(CL_ANN, (CE_WARN,
5687 5924 "issue_mfi_smp: fw_ioctl failed"));
5688 5925 } else {
5689 5926 con_log(CL_ANN1, (CE_CONT,
5690 5927 "issue_mfi_smp: copy to user space"));
5691 5928
5692 5929 if (request_xferlen) {
5693 5930 for (i = 0; i < request_xferlen; i++) {
5694 5931 if (ddi_copyout(
5695 5932 (uint8_t *)request_dma_obj.buffer +
5696 5933 i, (uint8_t *)request_ubuf + i,
5697 5934 1, mode)) {
5698 5935 con_log(CL_ANN, (CE_WARN,
5699 5936 "issue_mfi_smp : copy to user space"
5700 5937 " failed"));
5701 5938 return (DDI_FAILURE);
5702 5939 }
5703 5940 }
5704 5941 }
5705 5942
5706 5943 if (response_xferlen) {
5707 5944 for (i = 0; i < response_xferlen; i++) {
5708 5945 if (ddi_copyout(
5709 5946 (uint8_t *)response_dma_obj.buffer
5710 5947 + i, (uint8_t *)response_ubuf
5711 5948 + i, 1, mode)) {
5712 5949 con_log(CL_ANN, (CE_WARN,
5713 5950 "issue_mfi_smp : copy to "
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5714 5951 "user space failed"));
5715 5952 return (DDI_FAILURE);
5716 5953 }
5717 5954 }
5718 5955 }
5719 5956 }
5720 5957
5721 5958 ksmp->cmd_status = ddi_get8(acc_handle, &smp->cmd_status);
5722 5959 con_log(CL_ANN1, (CE_NOTE, "issue_mfi_smp: smp->cmd_status = %d",
5723 5960 ksmp->cmd_status));
5961 + DTRACE_PROBE2(issue_smp, uint8_t, ksmp->cmd, uint8_t, ksmp->cmd_status);
5724 5962
5725 5963 if (request_xferlen) {
5726 5964 /* free kernel buffer */
5727 5965 if (mrsas_free_dma_obj(instance, request_dma_obj) !=
5728 5966 DDI_SUCCESS)
5729 5967 return (DDI_FAILURE);
5730 5968 }
5731 5969
5732 5970 if (response_xferlen) {
5733 5971 /* free kernel buffer */
5734 5972 if (mrsas_free_dma_obj(instance, response_dma_obj) !=
5735 5973 DDI_SUCCESS)
5736 5974 return (DDI_FAILURE);
5737 5975 }
5738 5976
5739 5977 return (DDI_SUCCESS);
5740 5978 }
5741 5979
5742 5980 /*
5743 5981 * issue_mfi_stp
5744 5982 */
5745 5983 static int
5746 5984 issue_mfi_stp(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5747 5985 struct mrsas_cmd *cmd, int mode)
5748 5986 {
5749 5987 void *fis_ubuf;
5750 5988 void *data_ubuf;
5751 5989 uint32_t fis_xferlen = 0;
5752 5990 uint32_t new_xfer_length1 = 0;
5753 5991 uint32_t new_xfer_length2 = 0;
5754 5992 uint32_t data_xferlen = 0;
5755 5993 uint_t model;
5756 5994 dma_obj_t fis_dma_obj;
5757 5995 dma_obj_t data_dma_obj;
5758 5996 struct mrsas_stp_frame *kstp;
5759 5997 struct mrsas_stp_frame *stp;
5760 5998 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
5761 5999 int i;
5762 6000
5763 6001 stp = &cmd->frame->stp;
5764 6002 kstp = (struct mrsas_stp_frame *)&ioctl->frame[0];
5765 6003
5766 6004 if (instance->adapterresetinprogress) {
5767 6005 con_log(CL_ANN1, (CE_WARN, "Reset flag set, "
5768 6006 "returning mfi_pkt and setting TRAN_BUSY\n"));
5769 6007 return (DDI_FAILURE);
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5770 6008 }
5771 6009 model = ddi_model_convert_from(mode & FMODELS);
5772 6010 if (model == DDI_MODEL_ILP32) {
5773 6011 con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_ILP32"));
5774 6012
5775 6013 fis_xferlen = kstp->sgl.sge32[0].length;
5776 6014 data_xferlen = kstp->sgl.sge32[1].length;
5777 6015
5778 6016 fis_ubuf = (void *)(ulong_t)kstp->sgl.sge32[0].phys_addr;
5779 6017 data_ubuf = (void *)(ulong_t)kstp->sgl.sge32[1].phys_addr;
5780 - }
5781 - else
5782 - {
6018 + } else {
5783 6019 #ifdef _ILP32
5784 6020 con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_ILP32"));
5785 6021
5786 6022 fis_xferlen = kstp->sgl.sge32[0].length;
5787 6023 data_xferlen = kstp->sgl.sge32[1].length;
5788 6024
5789 6025 fis_ubuf = (void *)(ulong_t)kstp->sgl.sge32[0].phys_addr;
5790 6026 data_ubuf = (void *)(ulong_t)kstp->sgl.sge32[1].phys_addr;
5791 6027 #else
5792 6028 con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_LP64"));
5793 6029
5794 6030 fis_xferlen = kstp->sgl.sge64[0].length;
5795 6031 data_xferlen = kstp->sgl.sge64[1].length;
5796 6032
5797 6033 fis_ubuf = (void *)(ulong_t)kstp->sgl.sge64[0].phys_addr;
5798 6034 data_ubuf = (void *)(ulong_t)kstp->sgl.sge64[1].phys_addr;
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5799 6035 #endif
5800 6036 }
5801 6037
5802 6038
5803 6039 if (fis_xferlen) {
5804 6040 con_log(CL_ANN, (CE_CONT, "issue_mfi_stp: "
5805 6041 "fis_ubuf = %p fis_xferlen = %x", fis_ubuf, fis_xferlen));
5806 6042
5807 6043 /* means IOCTL requires DMA */
5808 6044 /* allocate the data transfer buffer */
5809 - //fis_dma_obj.size = fis_xferlen;
5810 - MRSAS_GET_BOUNDARY_ALIGNED_LEN(fis_xferlen,new_xfer_length1,PAGESIZE);
6045 + /* fis_dma_obj.size = fis_xferlen; */
6046 + MRSAS_GET_BOUNDARY_ALIGNED_LEN(fis_xferlen,
6047 + new_xfer_length1, PAGESIZE);
5811 6048 fis_dma_obj.size = new_xfer_length1;
5812 6049 fis_dma_obj.dma_attr = mrsas_generic_dma_attr;
5813 6050 fis_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5814 6051 fis_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5815 6052 fis_dma_obj.dma_attr.dma_attr_sgllen = 1;
5816 6053 fis_dma_obj.dma_attr.dma_attr_align = 1;
5817 6054
5818 6055 /* allocate kernel buffer for DMA */
5819 6056 if (mrsas_alloc_dma_obj(instance, &fis_dma_obj,
5820 6057 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5821 6058 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp : "
5822 6059 "could not allocate data transfer buffer."));
5823 6060 return (DDI_FAILURE);
5824 6061 }
5825 6062 (void) memset(fis_dma_obj.buffer, 0, fis_xferlen);
5826 6063
5827 6064 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5828 6065 for (i = 0; i < fis_xferlen; i++) {
5829 6066 if (ddi_copyin((uint8_t *)fis_ubuf + i,
5830 6067 (uint8_t *)fis_dma_obj.buffer + i, 1, mode)) {
5831 6068 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
5832 6069 "copy from user space failed"));
5833 6070 return (DDI_FAILURE);
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5834 6071 }
5835 6072 }
5836 6073 }
5837 6074
5838 6075 if (data_xferlen) {
5839 6076 con_log(CL_ANN, (CE_CONT, "issue_mfi_stp: data_ubuf = %p "
5840 6077 "data_xferlen = %x", data_ubuf, data_xferlen));
5841 6078
5842 6079 /* means IOCTL requires DMA */
5843 6080 /* allocate the data transfer buffer */
5844 - //data_dma_obj.size = data_xferlen;
5845 - MRSAS_GET_BOUNDARY_ALIGNED_LEN(data_xferlen,new_xfer_length2,PAGESIZE);
6081 + /* data_dma_obj.size = data_xferlen; */
6082 + MRSAS_GET_BOUNDARY_ALIGNED_LEN(data_xferlen, new_xfer_length2,
6083 + PAGESIZE);
5846 6084 data_dma_obj.size = new_xfer_length2;
5847 6085 data_dma_obj.dma_attr = mrsas_generic_dma_attr;
5848 6086 data_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5849 6087 data_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5850 6088 data_dma_obj.dma_attr.dma_attr_sgllen = 1;
5851 6089 data_dma_obj.dma_attr.dma_attr_align = 1;
5852 6090
5853 -/* allocate kernel buffer for DMA */
6091 + /* allocate kernel buffer for DMA */
5854 6092 if (mrsas_alloc_dma_obj(instance, &data_dma_obj,
5855 6093 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5856 6094 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
5857 6095 "could not allocate data transfer buffer."));
5858 6096 return (DDI_FAILURE);
5859 6097 }
5860 6098 (void) memset(data_dma_obj.buffer, 0, data_xferlen);
5861 6099
5862 6100 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5863 6101 for (i = 0; i < data_xferlen; i++) {
5864 6102 if (ddi_copyin((uint8_t *)data_ubuf + i,
5865 6103 (uint8_t *)data_dma_obj.buffer + i, 1, mode)) {
5866 6104 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
5867 6105 "copy from user space failed"));
5868 6106 return (DDI_FAILURE);
5869 6107 }
5870 6108 }
5871 6109 }
5872 6110
5873 6111 ddi_put8(acc_handle, &stp->cmd, kstp->cmd);
5874 6112 ddi_put8(acc_handle, &stp->cmd_status, 0);
5875 6113 ddi_put8(acc_handle, &stp->connection_status, 0);
5876 6114 ddi_put8(acc_handle, &stp->target_id, kstp->target_id);
5877 6115 ddi_put8(acc_handle, &stp->sge_count, kstp->sge_count);
5878 6116
5879 6117 ddi_put16(acc_handle, &stp->timeout, kstp->timeout);
5880 6118 ddi_put32(acc_handle, &stp->data_xfer_len, kstp->data_xfer_len);
5881 6119
5882 6120 ddi_rep_put8(acc_handle, (uint8_t *)kstp->fis, (uint8_t *)stp->fis, 10,
5883 6121 DDI_DEV_AUTOINCR);
5884 6122
5885 6123 ddi_put16(acc_handle, &stp->flags, kstp->flags & ~MFI_FRAME_SGL64);
5886 6124 ddi_put32(acc_handle, &stp->stp_flags, kstp->stp_flags);
5887 6125 ddi_put32(acc_handle, &stp->sgl.sge32[0].length, fis_xferlen);
5888 6126 ddi_put32(acc_handle, &stp->sgl.sge32[0].phys_addr,
5889 6127 fis_dma_obj.dma_cookie[0].dmac_address);
5890 6128 ddi_put32(acc_handle, &stp->sgl.sge32[1].length, data_xferlen);
5891 6129 ddi_put32(acc_handle, &stp->sgl.sge32[1].phys_addr,
5892 6130 data_dma_obj.dma_cookie[0].dmac_address);
5893 6131
5894 6132 cmd->sync_cmd = MRSAS_TRUE;
5895 6133 cmd->frame_count = 1;
5896 6134
5897 6135 if (instance->tbolt) {
5898 6136 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
5899 6137 }
5900 6138
5901 6139 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
5902 6140 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: fw_ioctl failed"));
5903 6141 } else {
5904 6142
5905 6143 if (fis_xferlen) {
5906 6144 for (i = 0; i < fis_xferlen; i++) {
5907 6145 if (ddi_copyout(
5908 6146 (uint8_t *)fis_dma_obj.buffer + i,
5909 6147 (uint8_t *)fis_ubuf + i, 1, mode)) {
5910 6148 con_log(CL_ANN, (CE_WARN,
5911 6149 "issue_mfi_stp : copy to "
5912 6150 "user space failed"));
5913 6151 return (DDI_FAILURE);
5914 6152 }
5915 6153 }
5916 6154 }
5917 6155 }
5918 6156 if (data_xferlen) {
5919 6157 for (i = 0; i < data_xferlen; i++) {
5920 6158 if (ddi_copyout(
5921 6159 (uint8_t *)data_dma_obj.buffer + i,
5922 6160 (uint8_t *)data_ubuf + i, 1, mode)) {
5923 6161 con_log(CL_ANN, (CE_WARN,
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5924 6162 "issue_mfi_stp : copy to"
5925 6163 " user space failed"));
5926 6164 return (DDI_FAILURE);
5927 6165 }
5928 6166 }
5929 6167 }
5930 6168
5931 6169 kstp->cmd_status = ddi_get8(acc_handle, &stp->cmd_status);
5932 6170 con_log(CL_ANN1, (CE_NOTE, "issue_mfi_stp: stp->cmd_status = %d",
5933 6171 kstp->cmd_status));
6172 + DTRACE_PROBE2(issue_stp, uint8_t, kstp->cmd, uint8_t, kstp->cmd_status);
5934 6173
5935 6174 if (fis_xferlen) {
5936 6175 /* free kernel buffer */
5937 6176 if (mrsas_free_dma_obj(instance, fis_dma_obj) != DDI_SUCCESS)
5938 6177 return (DDI_FAILURE);
5939 6178 }
5940 6179
5941 6180 if (data_xferlen) {
5942 6181 /* free kernel buffer */
5943 6182 if (mrsas_free_dma_obj(instance, data_dma_obj) != DDI_SUCCESS)
5944 6183 return (DDI_FAILURE);
5945 6184 }
5946 6185
5947 6186 return (DDI_SUCCESS);
5948 6187 }
5949 6188
5950 6189 /*
5951 6190 * fill_up_drv_ver
5952 6191 */
5953 6192 void
5954 6193 fill_up_drv_ver(struct mrsas_drv_ver *dv)
5955 6194 {
5956 6195 (void) memset(dv, 0, sizeof (struct mrsas_drv_ver));
5957 6196
5958 6197 (void) memcpy(dv->signature, "$LSI LOGIC$", strlen("$LSI LOGIC$"));
5959 6198 (void) memcpy(dv->os_name, "Solaris", strlen("Solaris"));
5960 6199 (void) memcpy(dv->drv_name, "mr_sas", strlen("mr_sas"));
5961 6200 (void) memcpy(dv->drv_ver, MRSAS_VERSION, strlen(MRSAS_VERSION));
5962 6201 (void) memcpy(dv->drv_rel_date, MRSAS_RELDATE,
5963 6202 strlen(MRSAS_RELDATE));
5964 6203
5965 6204 }
5966 6205
5967 6206 /*
5968 6207 * handle_drv_ioctl
5969 6208 */
5970 6209 static int
5971 6210 handle_drv_ioctl(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5972 6211 int mode)
5973 6212 {
5974 6213 int i;
5975 6214 int rval = DDI_SUCCESS;
5976 6215 int *props = NULL;
5977 6216 void *ubuf;
5978 6217
5979 6218 uint8_t *pci_conf_buf;
5980 6219 uint32_t xferlen;
5981 6220 uint32_t num_props;
5982 6221 uint_t model;
5983 6222 struct mrsas_dcmd_frame *kdcmd;
5984 6223 struct mrsas_drv_ver dv;
5985 6224 struct mrsas_pci_information pi;
5986 6225
5987 6226 kdcmd = (struct mrsas_dcmd_frame *)&ioctl->frame[0];
5988 6227
5989 6228 model = ddi_model_convert_from(mode & FMODELS);
5990 6229 if (model == DDI_MODEL_ILP32) {
5991 6230 con_log(CL_ANN1, (CE_CONT,
5992 6231 "handle_drv_ioctl: DDI_MODEL_ILP32"));
5993 6232
5994 6233 xferlen = kdcmd->sgl.sge32[0].length;
5995 6234
5996 6235 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
5997 6236 } else {
5998 6237 #ifdef _ILP32
5999 6238 con_log(CL_ANN1, (CE_CONT,
6000 6239 "handle_drv_ioctl: DDI_MODEL_ILP32"));
6001 6240 xferlen = kdcmd->sgl.sge32[0].length;
6002 6241 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
6003 6242 #else
6004 6243 con_log(CL_ANN1, (CE_CONT,
6005 6244 "handle_drv_ioctl: DDI_MODEL_LP64"));
6006 6245 xferlen = kdcmd->sgl.sge64[0].length;
6007 6246 ubuf = (void *)(ulong_t)kdcmd->sgl.sge64[0].phys_addr;
6008 6247 #endif
6009 6248 }
6010 6249 con_log(CL_ANN1, (CE_CONT, "handle_drv_ioctl: "
6011 6250 "dataBuf=%p size=%d bytes", ubuf, xferlen));
6012 6251
6013 6252 switch (kdcmd->opcode) {
6014 6253 case MRSAS_DRIVER_IOCTL_DRIVER_VERSION:
6015 6254 con_log(CL_ANN1, (CE_CONT, "handle_drv_ioctl: "
6016 6255 "MRSAS_DRIVER_IOCTL_DRIVER_VERSION"));
6017 6256
6018 6257 fill_up_drv_ver(&dv);
6019 6258
6020 6259 if (ddi_copyout(&dv, ubuf, xferlen, mode)) {
6021 6260 con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
6022 6261 "MRSAS_DRIVER_IOCTL_DRIVER_VERSION : "
6023 6262 "copy to user space failed"));
6024 6263 kdcmd->cmd_status = 1;
6025 6264 rval = 1;
6026 6265 } else {
6027 6266 kdcmd->cmd_status = 0;
6028 6267 }
6029 6268 break;
6030 6269 case MRSAS_DRIVER_IOCTL_PCI_INFORMATION:
6031 6270 con_log(CL_ANN1, (CE_NOTE, "handle_drv_ioctl: "
6032 6271 "MRSAS_DRIVER_IOCTL_PCI_INFORMAITON"));
6033 6272
6034 6273 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, instance->dip,
6035 6274 0, "reg", &props, &num_props)) {
6036 6275 con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
6037 6276 "MRSAS_DRIVER_IOCTL_PCI_INFORMATION : "
6038 6277 "ddi_prop_look_int_array failed"));
6039 6278 rval = DDI_FAILURE;
6040 6279 } else {
6041 6280
6042 6281 pi.busNumber = (props[0] >> 16) & 0xFF;
6043 6282 pi.deviceNumber = (props[0] >> 11) & 0x1f;
6044 6283 pi.functionNumber = (props[0] >> 8) & 0x7;
6045 6284 ddi_prop_free((void *)props);
6046 6285 }
6047 6286
6048 6287 pci_conf_buf = (uint8_t *)&pi.pciHeaderInfo;
6049 6288
6050 6289 for (i = 0; i < (sizeof (struct mrsas_pci_information) -
6051 6290 offsetof(struct mrsas_pci_information, pciHeaderInfo));
6052 6291 i++) {
6053 6292 pci_conf_buf[i] =
6054 6293 pci_config_get8(instance->pci_handle, i);
6055 6294 }
6056 6295
6057 6296 if (ddi_copyout(&pi, ubuf, xferlen, mode)) {
6058 6297 con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
6059 6298 "MRSAS_DRIVER_IOCTL_PCI_INFORMATION : "
6060 6299 "copy to user space failed"));
6061 6300 kdcmd->cmd_status = 1;
6062 6301 rval = 1;
6063 6302 } else {
6064 6303 kdcmd->cmd_status = 0;
6065 6304 }
6066 6305 break;
6067 6306 default:
6068 6307 con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
6069 6308 "invalid driver specific IOCTL opcode = 0x%x",
6070 6309 kdcmd->opcode));
6071 6310 kdcmd->cmd_status = 1;
6072 6311 rval = DDI_FAILURE;
6073 6312 break;
6074 6313 }
6075 6314
6076 6315 return (rval);
6077 6316 }
6078 6317
6079 6318 /*
6080 6319 * handle_mfi_ioctl
6081 6320 */
6082 6321 static int
6083 6322 handle_mfi_ioctl(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
6084 6323 int mode)
6085 6324 {
6086 6325 int rval = DDI_SUCCESS;
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6087 6326
6088 6327 struct mrsas_header *hdr;
6089 6328 struct mrsas_cmd *cmd;
6090 6329
6091 6330 if (instance->tbolt) {
6092 6331 cmd = get_raid_msg_mfi_pkt(instance);
6093 6332 } else {
6094 6333 cmd = get_mfi_pkt(instance);
6095 6334 }
6096 6335 if (!cmd) {
6097 - cmn_err(CE_WARN,
6098 - "Failed to get a cmd from free-pool in handle_mfi_ioctl(). "
6099 - "fw_outstanding=0x%X max_fw_cmds=0x%X",
6100 - instance->fw_outstanding, instance->max_fw_cmds);
6336 + con_log(CL_ANN, (CE_WARN, "mr_sas: "
6337 + "failed to get a cmd packet"));
6338 + DTRACE_PROBE2(mfi_ioctl_err, uint16_t,
6339 + instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
6101 6340 return (DDI_FAILURE);
6102 6341 }
6103 6342
6104 6343 /* Clear the frame buffer and assign back the context id */
6105 6344 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
6106 6345 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
6107 6346 cmd->index);
6108 6347
6109 6348 hdr = (struct mrsas_header *)&ioctl->frame[0];
6110 6349
6111 6350 switch (ddi_get8(cmd->frame_dma_obj.acc_handle, &hdr->cmd)) {
6112 6351 case MFI_CMD_OP_DCMD:
6113 6352 rval = issue_mfi_dcmd(instance, ioctl, cmd, mode);
6114 6353 break;
6115 6354 case MFI_CMD_OP_SMP:
6116 6355 rval = issue_mfi_smp(instance, ioctl, cmd, mode);
6117 6356 break;
6118 6357 case MFI_CMD_OP_STP:
6119 6358 rval = issue_mfi_stp(instance, ioctl, cmd, mode);
6120 6359 break;
6121 6360 case MFI_CMD_OP_LD_SCSI:
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↑ open up ↑ |
6122 6361 case MFI_CMD_OP_PD_SCSI:
6123 6362 rval = issue_mfi_pthru(instance, ioctl, cmd, mode);
6124 6363 break;
6125 6364 default:
6126 6365 con_log(CL_ANN, (CE_WARN, "handle_mfi_ioctl: "
6127 6366 "invalid mfi ioctl hdr->cmd = %d", hdr->cmd));
6128 6367 rval = DDI_FAILURE;
6129 6368 break;
6130 6369 }
6131 6370
6371 + if (mrsas_common_check(instance, cmd) != DDI_SUCCESS)
6372 + rval = DDI_FAILURE;
6373 +
6132 6374 if (instance->tbolt) {
6133 6375 return_raid_msg_mfi_pkt(instance, cmd);
6134 6376 } else {
6135 6377 return_mfi_pkt(instance, cmd);
6136 6378 }
6137 6379
6138 6380 return (rval);
6139 6381 }
6140 6382
6141 6383 /*
6142 6384 * AEN
6143 6385 */
6144 6386 static int
6145 6387 handle_mfi_aen(struct mrsas_instance *instance, struct mrsas_aen *aen)
6146 6388 {
6147 6389 int rval = 0;
6148 6390
6149 6391 rval = register_mfi_aen(instance, instance->aen_seq_num,
6150 6392 aen->class_locale_word);
6151 6393
6152 6394 aen->cmd_status = (uint8_t)rval;
6153 6395
6154 6396 return (rval);
6155 6397 }
6156 6398
6157 6399 static int
6158 6400 register_mfi_aen(struct mrsas_instance *instance, uint32_t seq_num,
6159 6401 uint32_t class_locale_word)
6160 6402 {
6161 6403 int ret_val;
6162 6404
6163 6405 struct mrsas_cmd *cmd, *aen_cmd;
6164 6406 struct mrsas_dcmd_frame *dcmd;
6165 6407 union mrsas_evt_class_locale curr_aen;
6166 6408 union mrsas_evt_class_locale prev_aen;
6167 6409
6168 6410 con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
6169 6411 /*
6170 6412 * If there an AEN pending already (aen_cmd), check if the
6171 6413 * class_locale of that pending AEN is inclusive of the new
6172 6414 * AEN request we currently have. If it is, then we don't have
6173 6415 * to do anything. In other words, whichever events the current
6174 6416 * AEN request is subscribing to, have already been subscribed
6175 6417 * to.
6176 6418 *
6177 6419 * If the old_cmd is _not_ inclusive, then we have to abort
6178 6420 * that command, form a class_locale that is superset of both
6179 6421 * old and current and re-issue to the FW
6180 6422 */
6181 6423
6182 6424 curr_aen.word = LE_32(class_locale_word);
6183 6425 curr_aen.members.locale = LE_16(curr_aen.members.locale);
6184 6426 aen_cmd = instance->aen_cmd;
6185 6427 if (aen_cmd) {
6186 6428 prev_aen.word = ddi_get32(aen_cmd->frame_dma_obj.acc_handle,
6187 6429 &aen_cmd->frame->dcmd.mbox.w[1]);
6188 6430 prev_aen.word = LE_32(prev_aen.word);
6189 6431 prev_aen.members.locale = LE_16(prev_aen.members.locale);
6190 6432 /*
6191 6433 * A class whose enum value is smaller is inclusive of all
6192 6434 * higher values. If a PROGRESS (= -1) was previously
6193 6435 * registered, then a new registration requests for higher
6194 6436 * classes need not be sent to FW. They are automatically
6195 6437 * included.
6196 6438 *
6197 6439 * Locale numbers don't have such hierarchy. They are bitmap
6198 6440 * values
6199 6441 */
6200 6442 if ((prev_aen.members.class <= curr_aen.members.class) &&
6201 6443 !((prev_aen.members.locale & curr_aen.members.locale) ^
6202 6444 curr_aen.members.locale)) {
6203 6445 /*
6204 6446 * Previously issued event registration includes
6205 6447 * current request. Nothing to do.
6206 6448 */
6207 6449
6208 6450 return (0);
6209 6451 } else {
6210 6452 curr_aen.members.locale |= prev_aen.members.locale;
6211 6453
6212 6454 if (prev_aen.members.class < curr_aen.members.class)
6213 6455 curr_aen.members.class = prev_aen.members.class;
6214 6456
6215 6457 ret_val = abort_aen_cmd(instance, aen_cmd);
6216 6458
6217 6459 if (ret_val) {
6218 6460 con_log(CL_ANN, (CE_WARN, "register_mfi_aen: "
6219 6461 "failed to abort prevous AEN command"));
6220 6462
6221 6463 return (ret_val);
6222 6464 }
6223 6465 }
6224 6466 } else {
6225 6467 curr_aen.word = LE_32(class_locale_word);
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↑ open up ↑ |
6226 6468 curr_aen.members.locale = LE_16(curr_aen.members.locale);
6227 6469 }
6228 6470
6229 6471 if (instance->tbolt) {
6230 6472 cmd = get_raid_msg_mfi_pkt(instance);
6231 6473 } else {
6232 6474 cmd = get_mfi_pkt(instance);
6233 6475 }
6234 6476
6235 6477 if (!cmd) {
6236 - cmn_err(CE_WARN,
6237 - "Failed to get a cmd from free-pool in register_mfi_aen(). "
6238 - "fw_outstanding=0x%X max_fw_cmds=0x%X",
6239 - instance->fw_outstanding, instance->max_fw_cmds);
6478 + DTRACE_PROBE2(mfi_aen_err, uint16_t, instance->fw_outstanding,
6479 + uint16_t, instance->max_fw_cmds);
6240 6480 return (ENOMEM);
6241 6481 }
6242 6482
6243 -
6244 6483 /* Clear the frame buffer and assign back the context id */
6245 6484 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
6246 6485 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
6247 6486 cmd->index);
6248 6487
6249 6488 dcmd = &cmd->frame->dcmd;
6250 6489
6251 6490 /* for(i = 0; i < DCMD_MBOX_SZ; i++) dcmd->mbox.b[i] = 0; */
6252 6491 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
6253 6492
6254 6493 (void) memset(instance->mfi_evt_detail_obj.buffer, 0,
6255 6494 sizeof (struct mrsas_evt_detail));
6256 6495
6257 6496 /* Prepare DCMD for aen registration */
6258 6497 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
6259 6498 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0x0);
6260 6499 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 1);
6261 6500 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
6262 6501 MFI_FRAME_DIR_READ);
6263 6502 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
6264 6503 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len,
6265 6504 sizeof (struct mrsas_evt_detail));
6266 6505 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
6267 6506 MR_DCMD_CTRL_EVENT_WAIT);
6268 6507 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->mbox.w[0], seq_num);
6269 6508 curr_aen.members.locale = LE_16(curr_aen.members.locale);
6270 6509 curr_aen.word = LE_32(curr_aen.word);
6271 6510 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->mbox.w[1],
6272 6511 curr_aen.word);
6273 6512 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].phys_addr,
6274 6513 instance->mfi_evt_detail_obj.dma_cookie[0].dmac_address);
6275 6514 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].length,
6276 6515 sizeof (struct mrsas_evt_detail));
6277 6516
6278 6517 instance->aen_seq_num = seq_num;
6279 6518
6280 6519
6281 6520 /*
6282 6521 * Store reference to the cmd used to register for AEN. When an
6283 6522 * application wants us to register for AEN, we have to abort this
6284 6523 * cmd and re-register with a new EVENT LOCALE supplied by that app
6285 6524 */
6286 6525 instance->aen_cmd = cmd;
6287 6526
6288 6527 cmd->frame_count = 1;
6289 6528
6290 6529 /* Issue the aen registration frame */
6291 6530 /* atomic_add_16 (&instance->fw_outstanding, 1); */
6292 6531 if (instance->tbolt) {
6293 6532 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
6294 6533 }
6295 6534 instance->func_ptr->issue_cmd(cmd, instance);
6296 6535
6297 6536 return (0);
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↑ open up ↑ |
6298 6537 }
6299 6538
6300 6539 void
6301 6540 display_scsi_inquiry(caddr_t scsi_inq)
6302 6541 {
6303 6542 #define MAX_SCSI_DEVICE_CODE 14
6304 6543 int i;
6305 6544 char inquiry_buf[256] = {0};
6306 6545 int len;
6307 6546 const char *const scsi_device_types[] = {
6308 - "Direct-Access ",
6547 + "Direct-Access ",
6309 6548 "Sequential-Access",
6310 - "Printer ",
6311 - "Processor ",
6312 - "WORM ",
6313 - "CD-ROM ",
6314 - "Scanner ",
6315 - "Optical Device ",
6316 - "Medium Changer ",
6317 - "Communications ",
6318 - "Unknown ",
6319 - "Unknown ",
6320 - "Unknown ",
6321 - "Enclosure ",
6549 + "Printer ",
6550 + "Processor ",
6551 + "WORM ",
6552 + "CD-ROM ",
6553 + "Scanner ",
6554 + "Optical Device ",
6555 + "Medium Changer ",
6556 + "Communications ",
6557 + "Unknown ",
6558 + "Unknown ",
6559 + "Unknown ",
6560 + "Enclosure ",
6322 6561 };
6323 6562
6324 6563 len = 0;
6325 6564
6326 - len += snprintf(inquiry_buf + len, 265 - len, " Vendor: ");
6565 + len += snprintf(inquiry_buf + len, 265 - len, " Vendor: ");
6327 6566 for (i = 8; i < 16; i++) {
6328 6567 len += snprintf(inquiry_buf + len, 265 - len, "%c",
6329 6568 scsi_inq[i]);
6330 6569 }
6331 6570
6332 - len += snprintf(inquiry_buf + len, 265 - len, " Model: ");
6571 + len += snprintf(inquiry_buf + len, 265 - len, " Model: ");
6333 6572
6334 6573 for (i = 16; i < 32; i++) {
6335 6574 len += snprintf(inquiry_buf + len, 265 - len, "%c",
6336 6575 scsi_inq[i]);
6337 6576 }
6338 6577
6339 - len += snprintf(inquiry_buf + len, 265 - len, " Rev: ");
6578 + len += snprintf(inquiry_buf + len, 265 - len, " Rev: ");
6340 6579
6341 6580 for (i = 32; i < 36; i++) {
6342 6581 len += snprintf(inquiry_buf + len, 265 - len, "%c",
6343 6582 scsi_inq[i]);
6344 6583 }
6345 6584
6346 6585 len += snprintf(inquiry_buf + len, 265 - len, "\n");
6347 6586
6348 6587
6349 6588 i = scsi_inq[0] & 0x1f;
6350 6589
6351 6590
6352 - len += snprintf(inquiry_buf + len, 265 - len, " Type: %s ",
6591 + len += snprintf(inquiry_buf + len, 265 - len, " Type: %s ",
6353 6592 i < MAX_SCSI_DEVICE_CODE ? scsi_device_types[i] :
6354 - "Unknown ");
6593 + "Unknown ");
6355 6594
6356 6595
6357 6596 len += snprintf(inquiry_buf + len, 265 - len,
6358 - " ANSI SCSI revision: %02x", scsi_inq[2] & 0x07);
6597 + " ANSI SCSI revision: %02x", scsi_inq[2] & 0x07);
6359 6598
6360 6599 if ((scsi_inq[2] & 0x07) == 1 && (scsi_inq[3] & 0x0f) == 1) {
6361 6600 len += snprintf(inquiry_buf + len, 265 - len, " CCS\n");
6362 6601 } else {
6363 6602 len += snprintf(inquiry_buf + len, 265 - len, "\n");
6364 6603 }
6365 6604
6366 6605 con_log(CL_DLEVEL2, (CE_CONT, inquiry_buf));
6367 6606 }
6368 6607
6369 -void
6608 +static void
6370 6609 io_timeout_checker(void *arg)
6371 6610 {
6372 6611 struct scsi_pkt *pkt;
6373 6612 struct mrsas_instance *instance = arg;
6374 6613 struct mrsas_cmd *cmd = NULL;
6375 6614 struct mrsas_header *hdr;
6376 6615 int time = 0;
6377 6616 int counter = 0;
6378 6617 struct mlist_head *pos, *next;
6379 6618 mlist_t process_list;
6380 6619
6381 6620 if (instance->adapterresetinprogress == 1) {
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2 lines elided |
↑ open up ↑ |
6382 6621 con_log(CL_ANN, (CE_NOTE, "io_timeout_checker:"
6383 6622 " reset in progress"));
6384 6623
6385 6624 instance->timeout_id = timeout(io_timeout_checker,
6386 6625 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
6387 6626 return;
6388 6627 }
6389 6628
6390 6629 /* See if this check needs to be in the beginning or last in ISR */
6391 6630 if (mrsas_initiate_ocr_if_fw_is_faulty(instance) == 1) {
6392 - cmn_err(CE_WARN, "io_timeout_checker:"
6631 + cmn_err(CE_WARN, "io_timeout_checker: "
6393 6632 "FW Fault, calling reset adapter");
6394 - cmn_err(CE_CONT, "io_timeout_checker: fw_outstanding 0x%X max_fw_cmds 0x%X",
6395 - instance->fw_outstanding, instance->max_fw_cmds );
6633 + cmn_err(CE_CONT, "io_timeout_checker: "
6634 + "fw_outstanding 0x%X max_fw_cmds 0x%X",
6635 + instance->fw_outstanding, instance->max_fw_cmds);
6396 6636 if (instance->adapterresetinprogress == 0) {
6397 - instance->adapterresetinprogress = 1;
6637 + instance->adapterresetinprogress = 1;
6398 6638 if (instance->tbolt)
6399 - mrsas_tbolt_reset_ppc(instance);
6639 + (void) mrsas_tbolt_reset_ppc(instance);
6400 6640 else
6401 - mrsas_reset_ppc(instance);
6402 - instance->adapterresetinprogress = 0;
6641 + (void) mrsas_reset_ppc(instance);
6642 + instance->adapterresetinprogress = 0;
6403 6643 }
6404 6644 instance->timeout_id = timeout(io_timeout_checker,
6405 6645 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
6406 6646 return;
6407 6647 }
6408 6648
6409 6649 INIT_LIST_HEAD(&process_list);
6410 6650
6411 6651 mutex_enter(&instance->cmd_pend_mtx);
6412 6652 mlist_for_each_safe(pos, next, &instance->cmd_pend_list) {
6413 6653 cmd = mlist_entry(pos, struct mrsas_cmd, list);
6414 6654
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↑ open up ↑ |
6415 6655 if (cmd == NULL) {
6416 6656 continue;
6417 6657 }
6418 6658
6419 6659 if (cmd->sync_cmd == MRSAS_TRUE) {
6420 6660 hdr = (struct mrsas_header *)&cmd->frame->hdr;
6421 6661 if (hdr == NULL) {
6422 6662 continue;
6423 6663 }
6424 6664 time = --cmd->drv_pkt_time;
6425 - } else {
6665 + } else {
6426 6666 pkt = cmd->pkt;
6427 6667 if (pkt == NULL) {
6428 6668 continue;
6429 6669 }
6430 6670 time = --cmd->drv_pkt_time;
6431 6671 }
6432 6672 if (time <= 0) {
6433 6673 cmn_err(CE_WARN, "%llx: "
6434 - "io_timeout_checker: TIMING OUT: pkt "
6435 - ": %p, cmd %p fw_outstanding 0x%X max_fw_cmds 0x%X\n",
6436 - gethrtime(), (void *)pkt, (void *)cmd, instance->fw_outstanding, instance->max_fw_cmds);
6674 + "io_timeout_checker: TIMING OUT: pkt: %p, "
6675 + "cmd %p fw_outstanding 0x%X max_fw_cmds 0x%X\n",
6676 + gethrtime(), (void *)pkt, (void *)cmd,
6677 + instance->fw_outstanding, instance->max_fw_cmds);
6437 6678
6438 6679 counter++;
6439 6680 break;
6440 6681 }
6441 6682 }
6442 6683 mutex_exit(&instance->cmd_pend_mtx);
6443 6684
6444 6685 if (counter) {
6445 6686 if (instance->disable_online_ctrl_reset == 1) {
6446 - cmn_err(CE_WARN, "mr_sas %d: %s(): OCR is NOT supported by Firmware, KILL adapter!!!",
6447 - instance->instance, __func__);
6687 + cmn_err(CE_WARN, "mr_sas %d: %s(): OCR is NOT "
6688 + "supported by Firmware, KILL adapter!!!",
6689 + instance->instance, __func__);
6448 6690
6449 6691 if (instance->tbolt)
6450 - (void) mrsas_tbolt_kill_adapter(instance);
6692 + mrsas_tbolt_kill_adapter(instance);
6451 6693 else
6452 6694 (void) mrsas_kill_adapter(instance);
6453 6695
6454 6696 return;
6455 6697 } else {
6456 - if (cmd->retry_count_for_ocr <= IO_RETRY_COUNT) {
6698 + if (cmd->retry_count_for_ocr <= IO_RETRY_COUNT) {
6457 6699 if (instance->adapterresetinprogress == 0) {
6458 - if (instance->tbolt)
6459 - mrsas_tbolt_reset_ppc(instance);
6460 - else
6461 - mrsas_reset_ppc(instance);
6700 + if (instance->tbolt) {
6701 + (void) mrsas_tbolt_reset_ppc(
6702 + instance);
6703 + } else {
6704 + (void) mrsas_reset_ppc(
6705 + instance);
6706 + }
6462 6707 }
6463 6708 } else {
6464 6709 cmn_err(CE_WARN,
6465 6710 "io_timeout_checker: "
6466 - "cmd %p cmd->index %d "
6711 + "cmd %p cmd->index %d "
6467 6712 "timed out even after 3 resets: "
6468 6713 "so KILL adapter", (void *)cmd, cmd->index);
6469 6714
6470 6715 mrsas_print_cmd_details(instance, cmd, 0xDD);
6471 6716
6472 6717 if (instance->tbolt)
6473 - (void) mrsas_tbolt_kill_adapter(instance);
6718 + mrsas_tbolt_kill_adapter(instance);
6474 6719 else
6475 6720 (void) mrsas_kill_adapter(instance);
6476 6721 return;
6477 6722 }
6478 6723 }
6479 6724 }
6480 6725 con_log(CL_ANN, (CE_NOTE, "mrsas: "
6481 6726 "schedule next timeout check: "
6482 6727 "do timeout \n"));
6483 6728 instance->timeout_id =
6484 6729 timeout(io_timeout_checker, (void *)instance,
6485 6730 drv_usectohz(MRSAS_1_SECOND));
6486 6731 }
6487 6732
6488 6733 static uint32_t
6489 6734 read_fw_status_reg_ppc(struct mrsas_instance *instance)
6490 6735 {
6491 6736 return ((uint32_t)RD_OB_SCRATCH_PAD_0(instance));
6492 6737 }
6493 6738
6494 6739 static void
6495 6740 issue_cmd_ppc(struct mrsas_cmd *cmd, struct mrsas_instance *instance)
6496 6741 {
6497 6742 struct scsi_pkt *pkt;
6498 6743 atomic_add_16(&instance->fw_outstanding, 1);
6499 6744
6500 6745 pkt = cmd->pkt;
6501 6746 if (pkt) {
6502 6747 con_log(CL_DLEVEL1, (CE_NOTE, "%llx : issue_cmd_ppc:"
6503 6748 "ISSUED CMD TO FW : called : cmd:"
6504 6749 ": %p instance : %p pkt : %p pkt_time : %x\n",
6505 6750 gethrtime(), (void *)cmd, (void *)instance,
6506 6751 (void *)pkt, cmd->drv_pkt_time));
6507 6752 if (instance->adapterresetinprogress) {
6508 6753 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
6509 6754 con_log(CL_ANN1, (CE_NOTE, "Reset the scsi_pkt timer"));
6510 6755 } else {
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6511 6756 push_pending_mfi_pkt(instance, cmd);
6512 6757 }
6513 6758
6514 6759 } else {
6515 6760 con_log(CL_DLEVEL1, (CE_NOTE, "%llx : issue_cmd_ppc:"
6516 6761 "ISSUED CMD TO FW : called : cmd : %p, instance: %p"
6517 6762 "(NO PKT)\n", gethrtime(), (void *)cmd, (void *)instance));
6518 6763 }
6519 6764
6520 6765 mutex_enter(&instance->reg_write_mtx);
6521 - ASSERT(mutex_owned(&instance->reg_write_mtx));
6522 6766 /* Issue the command to the FW */
6523 6767 WR_IB_QPORT((cmd->frame_phys_addr) |
6524 6768 (((cmd->frame_count - 1) << 1) | 1), instance);
6525 6769 mutex_exit(&instance->reg_write_mtx);
6526 6770
6527 6771 }
6528 6772
6529 6773 /*
6530 6774 * issue_cmd_in_sync_mode
6531 6775 */
6532 6776 static int
6533 6777 issue_cmd_in_sync_mode_ppc(struct mrsas_instance *instance,
6534 6778 struct mrsas_cmd *cmd)
6535 6779 {
6536 6780 int i;
6537 6781 uint32_t msecs = MFI_POLL_TIMEOUT_SECS * (10 * MILLISEC);
6538 6782 struct mrsas_header *hdr = &cmd->frame->hdr;
6539 6783
6540 6784 con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_sync_mode_ppc: called"));
6541 6785
6542 6786 if (instance->adapterresetinprogress) {
6543 6787 cmd->drv_pkt_time = ddi_get16(
6544 6788 cmd->frame_dma_obj.acc_handle, &hdr->timeout);
6545 6789 if (cmd->drv_pkt_time < debug_timeout_g)
6546 6790 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
6547 6791
6548 6792 con_log(CL_ANN1, (CE_NOTE, "sync_mode_ppc: "
6549 6793 "issue and return in reset case\n"));
6550 6794 WR_IB_QPORT((cmd->frame_phys_addr) |
6551 6795 (((cmd->frame_count - 1) << 1) | 1), instance);
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6552 6796
6553 6797 return (DDI_SUCCESS);
6554 6798 } else {
6555 6799 con_log(CL_ANN1, (CE_NOTE, "sync_mode_ppc: pushing the pkt\n"));
6556 6800 push_pending_mfi_pkt(instance, cmd);
6557 6801 }
6558 6802
6559 6803 cmd->cmd_status = ENODATA;
6560 6804
6561 6805 mutex_enter(&instance->reg_write_mtx);
6562 - ASSERT(mutex_owned(&instance->reg_write_mtx));
6563 6806 /* Issue the command to the FW */
6564 6807 WR_IB_QPORT((cmd->frame_phys_addr) |
6565 6808 (((cmd->frame_count - 1) << 1) | 1), instance);
6566 6809 mutex_exit(&instance->reg_write_mtx);
6567 6810
6568 6811 mutex_enter(&instance->int_cmd_mtx);
6569 6812 for (i = 0; i < msecs && (cmd->cmd_status == ENODATA); i++) {
6570 6813 cv_wait(&instance->int_cmd_cv, &instance->int_cmd_mtx);
6571 6814 }
6572 6815 mutex_exit(&instance->int_cmd_mtx);
6573 6816
6574 6817 con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_sync_mode_ppc: done"));
6575 6818
6576 6819 if (i < (msecs -1)) {
6577 6820 return (DDI_SUCCESS);
6578 6821 } else {
6579 6822 return (DDI_FAILURE);
6580 6823 }
6581 6824 }
6582 6825
6583 6826 /*
6584 6827 * issue_cmd_in_poll_mode
6585 6828 */
6586 6829 static int
6587 6830 issue_cmd_in_poll_mode_ppc(struct mrsas_instance *instance,
6588 6831 struct mrsas_cmd *cmd)
6589 6832 {
6590 6833 int i;
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6591 6834 uint16_t flags;
6592 6835 uint32_t msecs = MFI_POLL_TIMEOUT_SECS * MILLISEC;
6593 6836 struct mrsas_header *frame_hdr;
6594 6837
6595 6838 con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_poll_mode_ppc: called"));
6596 6839
6597 6840 frame_hdr = (struct mrsas_header *)cmd->frame;
6598 6841 ddi_put8(cmd->frame_dma_obj.acc_handle, &frame_hdr->cmd_status,
6599 6842 MFI_CMD_STATUS_POLL_MODE);
6600 6843 flags = ddi_get16(cmd->frame_dma_obj.acc_handle, &frame_hdr->flags);
6601 - flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE;
6844 + flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE;
6602 6845
6603 6846 ddi_put16(cmd->frame_dma_obj.acc_handle, &frame_hdr->flags, flags);
6604 6847
6605 6848 /* issue the frame using inbound queue port */
6606 6849 WR_IB_QPORT((cmd->frame_phys_addr) |
6607 6850 (((cmd->frame_count - 1) << 1) | 1), instance);
6608 6851
6609 6852 /* wait for cmd_status to change from 0xFF */
6610 6853 for (i = 0; i < msecs && (
6611 6854 ddi_get8(cmd->frame_dma_obj.acc_handle, &frame_hdr->cmd_status)
6612 6855 == MFI_CMD_STATUS_POLL_MODE); i++) {
6613 6856 drv_usecwait(MILLISEC); /* wait for 1000 usecs */
6614 6857 }
6615 6858
6616 6859 if (ddi_get8(cmd->frame_dma_obj.acc_handle, &frame_hdr->cmd_status)
6617 6860 == MFI_CMD_STATUS_POLL_MODE) {
6618 6861 con_log(CL_ANN, (CE_NOTE, "issue_cmd_in_poll_mode: "
6619 6862 "cmd polling timed out"));
6620 6863 return (DDI_FAILURE);
6621 6864 }
6622 6865
6623 6866 return (DDI_SUCCESS);
6624 6867 }
6625 6868
6626 6869 static void
6627 6870 enable_intr_ppc(struct mrsas_instance *instance)
6628 6871 {
6629 6872 uint32_t mask;
6630 6873
6631 6874 con_log(CL_ANN1, (CE_NOTE, "enable_intr_ppc: called"));
6632 6875
6633 6876 /* WR_OB_DOORBELL_CLEAR(0xFFFFFFFF, instance); */
6634 6877 WR_OB_DOORBELL_CLEAR(OB_DOORBELL_CLEAR_MASK, instance);
6635 6878
6636 6879 /* WR_OB_INTR_MASK(~0x80000000, instance); */
6637 6880 WR_OB_INTR_MASK(~(MFI_REPLY_2108_MESSAGE_INTR_MASK), instance);
6638 6881
6639 6882 /* dummy read to force PCI flush */
6640 6883 mask = RD_OB_INTR_MASK(instance);
6641 6884
6642 6885 con_log(CL_ANN1, (CE_NOTE, "enable_intr_ppc: "
6643 6886 "outbound_intr_mask = 0x%x", mask));
6644 6887 }
6645 6888
6646 6889 static void
6647 6890 disable_intr_ppc(struct mrsas_instance *instance)
6648 6891 {
6649 6892 uint32_t mask;
6650 6893
6651 6894 con_log(CL_ANN1, (CE_NOTE, "disable_intr_ppc: called"));
6652 6895
6653 6896 con_log(CL_ANN1, (CE_NOTE, "disable_intr_ppc: before : "
6654 6897 "outbound_intr_mask = 0x%x", RD_OB_INTR_MASK(instance)));
6655 6898
6656 6899 /* WR_OB_INTR_MASK(0xFFFFFFFF, instance); */
6657 6900 WR_OB_INTR_MASK(OB_INTR_MASK, instance);
6658 6901
6659 6902 con_log(CL_ANN1, (CE_NOTE, "disable_intr_ppc: after : "
6660 6903 "outbound_intr_mask = 0x%x", RD_OB_INTR_MASK(instance)));
6661 6904
6662 6905 /* dummy read to force PCI flush */
6663 6906 mask = RD_OB_INTR_MASK(instance);
6664 6907 #ifdef lint
6665 6908 mask = mask;
6666 6909 #endif
6667 6910 }
6668 6911
6669 6912 static int
6670 6913 intr_ack_ppc(struct mrsas_instance *instance)
6671 6914 {
6672 6915 uint32_t status;
6673 6916 int ret = DDI_INTR_CLAIMED;
6674 6917
6675 6918 con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: called"));
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6676 6919
6677 6920 /* check if it is our interrupt */
6678 6921 status = RD_OB_INTR_STATUS(instance);
6679 6922
6680 6923 con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: status = 0x%x", status));
6681 6924
6682 6925 if (!(status & MFI_REPLY_2108_MESSAGE_INTR)) {
6683 6926 ret = DDI_INTR_UNCLAIMED;
6684 6927 }
6685 6928
6929 + if (mrsas_check_acc_handle(instance->regmap_handle) != DDI_SUCCESS) {
6930 + ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
6931 + ret = DDI_INTR_UNCLAIMED;
6932 + }
6933 +
6686 6934 if (ret == DDI_INTR_UNCLAIMED) {
6687 6935 return (ret);
6688 6936 }
6689 6937 /* clear the interrupt by writing back the same value */
6690 6938 WR_OB_DOORBELL_CLEAR(status, instance);
6691 6939
6692 6940 /* dummy READ */
6693 6941 status = RD_OB_INTR_STATUS(instance);
6694 6942
6695 6943 con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: interrupt cleared"));
6696 6944
6697 6945 return (ret);
6698 6946 }
6699 6947
6700 6948 /*
6701 6949 * Marks HBA as bad. This will be called either when an
6702 6950 * IO packet times out even after 3 FW resets
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6703 6951 * or FW is found to be fault even after 3 continuous resets.
6704 6952 */
6705 6953
6706 6954 static int
6707 6955 mrsas_kill_adapter(struct mrsas_instance *instance)
6708 6956 {
6709 6957 if (instance->deadadapter == 1)
6710 6958 return (DDI_FAILURE);
6711 6959
6712 6960 con_log(CL_ANN1, (CE_NOTE, "mrsas_kill_adapter: "
6713 - "Writing to doorbell with MFI_STOP_ADP "));
6961 + "Writing to doorbell with MFI_STOP_ADP "));
6714 6962 mutex_enter(&instance->ocr_flags_mtx);
6715 6963 instance->deadadapter = 1;
6716 6964 mutex_exit(&instance->ocr_flags_mtx);
6717 6965 instance->func_ptr->disable_intr(instance);
6718 6966 WR_IB_DOORBELL(MFI_STOP_ADP, instance);
6719 6967 (void) mrsas_complete_pending_cmds(instance);
6720 6968 return (DDI_SUCCESS);
6721 6969 }
6722 6970
6723 6971
6724 6972 static int
6725 6973 mrsas_reset_ppc(struct mrsas_instance *instance)
6726 6974 {
6727 6975 uint32_t status;
6728 6976 uint32_t retry = 0;
6729 6977 uint32_t cur_abs_reg_val;
6730 6978 uint32_t fw_state;
6731 6979
6732 6980 con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
6733 6981
6734 6982 if (instance->deadadapter == 1) {
6735 6983 cmn_err(CE_WARN, "mrsas_reset_ppc: "
6736 6984 "no more resets as HBA has been marked dead ");
6737 6985 return (DDI_FAILURE);
6738 6986 }
6739 6987 mutex_enter(&instance->ocr_flags_mtx);
6740 6988 instance->adapterresetinprogress = 1;
6741 6989 mutex_exit(&instance->ocr_flags_mtx);
6742 6990 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: adpterresetinprogress "
6743 6991 "flag set, time %llx", gethrtime()));
6744 6992
6745 6993 instance->func_ptr->disable_intr(instance);
6746 6994 retry_reset:
6747 6995 WR_IB_WRITE_SEQ(0, instance);
6748 6996 WR_IB_WRITE_SEQ(4, instance);
6749 6997 WR_IB_WRITE_SEQ(0xb, instance);
6750 6998 WR_IB_WRITE_SEQ(2, instance);
6751 6999 WR_IB_WRITE_SEQ(7, instance);
6752 7000 WR_IB_WRITE_SEQ(0xd, instance);
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6753 7001 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: magic number written "
6754 7002 "to write sequence register\n"));
6755 7003 delay(100 * drv_usectohz(MILLISEC));
6756 7004 status = RD_OB_DRWE(instance);
6757 7005
6758 7006 while (!(status & DIAG_WRITE_ENABLE)) {
6759 7007 delay(100 * drv_usectohz(MILLISEC));
6760 7008 status = RD_OB_DRWE(instance);
6761 7009 if (retry++ == 100) {
6762 7010 cmn_err(CE_WARN, "mrsas_reset_ppc: DRWE bit "
6763 - "check retry count %d\n", retry);
7011 + "check retry count %d", retry);
6764 7012 return (DDI_FAILURE);
6765 7013 }
6766 7014 }
6767 7015 WR_IB_DRWE(status | DIAG_RESET_ADAPTER, instance);
6768 7016 delay(100 * drv_usectohz(MILLISEC));
6769 7017 status = RD_OB_DRWE(instance);
6770 7018 while (status & DIAG_RESET_ADAPTER) {
6771 7019 delay(100 * drv_usectohz(MILLISEC));
6772 7020 status = RD_OB_DRWE(instance);
6773 7021 if (retry++ == 100) {
6774 - cmn_err(CE_WARN,
6775 - "mrsas_reset_ppc: RESET FAILED. KILL adapter called\n.");
7022 + cmn_err(CE_WARN, "mrsas_reset_ppc: "
7023 + "RESET FAILED. KILL adapter called.");
6776 7024
6777 7025 (void) mrsas_kill_adapter(instance);
6778 7026 return (DDI_FAILURE);
6779 7027 }
6780 7028 }
6781 7029 con_log(CL_ANN, (CE_NOTE, "mrsas_reset_ppc: Adapter reset complete"));
6782 7030 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
6783 7031 "Calling mfi_state_transition_to_ready"));
6784 7032
6785 7033 /* Mark HBA as bad, if FW is fault after 3 continuous resets */
6786 7034 if (mfi_state_transition_to_ready(instance) ||
6787 7035 debug_fw_faults_after_ocr_g == 1) {
6788 7036 cur_abs_reg_val =
6789 7037 instance->func_ptr->read_fw_status_reg(instance);
6790 7038 fw_state = cur_abs_reg_val & MFI_STATE_MASK;
6791 7039
6792 7040 #ifdef OCRDEBUG
6793 7041 con_log(CL_ANN1, (CE_NOTE,
6794 7042 "mrsas_reset_ppc :before fake: FW is not ready "
6795 7043 "FW state = 0x%x", fw_state));
6796 7044 if (debug_fw_faults_after_ocr_g == 1)
6797 7045 fw_state = MFI_STATE_FAULT;
6798 7046 #endif
6799 7047
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6800 7048 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc : FW is not ready "
6801 7049 "FW state = 0x%x", fw_state));
6802 7050
6803 7051 if (fw_state == MFI_STATE_FAULT) {
6804 7052 /* increment the count */
6805 7053 instance->fw_fault_count_after_ocr++;
6806 7054 if (instance->fw_fault_count_after_ocr
6807 7055 < MAX_FW_RESET_COUNT) {
6808 7056 cmn_err(CE_WARN, "mrsas_reset_ppc: "
6809 7057 "FW is in fault after OCR count %d "
6810 - "Retry Reset",
7058 + "Retry Reset",
6811 7059 instance->fw_fault_count_after_ocr);
6812 7060 goto retry_reset;
6813 7061
6814 7062 } else {
6815 7063 cmn_err(CE_WARN, "mrsas_reset_ppc: "
6816 - "Max Reset Count exceeded >%d"
6817 - "Mark HBA as bad, KILL adapter", MAX_FW_RESET_COUNT);
7064 + "Max Reset Count exceeded >%d"
7065 + "Mark HBA as bad, KILL adapter",
7066 + MAX_FW_RESET_COUNT);
6818 7067
6819 7068 (void) mrsas_kill_adapter(instance);
6820 7069 return (DDI_FAILURE);
6821 7070 }
6822 7071 }
6823 7072 }
6824 7073 /* reset the counter as FW is up after OCR */
6825 7074 instance->fw_fault_count_after_ocr = 0;
6826 7075
6827 7076
6828 7077 ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
6829 7078 instance->producer, 0);
6830 7079
6831 7080 ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
6832 7081 instance->consumer, 0);
6833 7082
6834 7083 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
6835 7084 " after resetting produconsumer chck indexs:"
6836 7085 "producer %x consumer %x", *instance->producer,
6837 7086 *instance->consumer));
6838 7087
6839 7088 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
6840 7089 "Calling mrsas_issue_init_mfi"));
6841 7090 (void) mrsas_issue_init_mfi(instance);
6842 7091 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
6843 7092 "mrsas_issue_init_mfi Done"));
6844 7093
6845 7094 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
6846 7095 "Calling mrsas_print_pending_cmd\n"));
6847 7096 (void) mrsas_print_pending_cmds(instance);
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6848 7097 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
6849 7098 "mrsas_print_pending_cmd done\n"));
6850 7099
6851 7100 instance->func_ptr->enable_intr(instance);
6852 7101 instance->fw_outstanding = 0;
6853 7102
6854 7103 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
6855 7104 "Calling mrsas_issue_pending_cmds"));
6856 7105 (void) mrsas_issue_pending_cmds(instance);
6857 7106 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
6858 - "issue_pending_cmds done.\n"));
7107 + "issue_pending_cmds done.\n"));
6859 7108
6860 7109 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
6861 7110 "Calling aen registration"));
6862 7111
6863 7112
6864 7113 instance->aen_cmd->retry_count_for_ocr = 0;
6865 7114 instance->aen_cmd->drv_pkt_time = 0;
6866 7115
6867 7116 instance->func_ptr->issue_cmd(instance->aen_cmd, instance);
6868 7117 con_log(CL_ANN1, (CE_NOTE, "Unsetting adpresetinprogress flag.\n"));
6869 7118
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6870 7119 mutex_enter(&instance->ocr_flags_mtx);
6871 7120 instance->adapterresetinprogress = 0;
6872 7121 mutex_exit(&instance->ocr_flags_mtx);
6873 7122 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
6874 7123 "adpterresetinprogress flag unset"));
6875 7124
6876 7125 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc done\n"));
6877 7126 return (DDI_SUCCESS);
6878 7127 }
6879 7128
7129 +/*
7130 + * FMA functions.
7131 + */
7132 +int
7133 +mrsas_common_check(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
7134 +{
7135 + int ret = DDI_SUCCESS;
6880 7136
7137 + if (cmd != NULL &&
7138 + mrsas_check_dma_handle(cmd->frame_dma_obj.dma_handle) !=
7139 + DDI_SUCCESS) {
7140 + ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7141 + if (cmd->pkt != NULL) {
7142 + cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7143 + cmd->pkt->pkt_statistics = 0;
7144 + }
7145 + ret = DDI_FAILURE;
7146 + }
7147 + if (mrsas_check_dma_handle(instance->mfi_internal_dma_obj.dma_handle)
7148 + != DDI_SUCCESS) {
7149 + ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7150 + if (cmd != NULL && cmd->pkt != NULL) {
7151 + cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7152 + cmd->pkt->pkt_statistics = 0;
7153 + }
7154 + ret = DDI_FAILURE;
7155 + }
7156 + if (mrsas_check_dma_handle(instance->mfi_evt_detail_obj.dma_handle) !=
7157 + DDI_SUCCESS) {
7158 + ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7159 + if (cmd != NULL && cmd->pkt != NULL) {
7160 + cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7161 + cmd->pkt->pkt_statistics = 0;
7162 + }
7163 + ret = DDI_FAILURE;
7164 + }
7165 + if (mrsas_check_acc_handle(instance->regmap_handle) != DDI_SUCCESS) {
7166 + ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7167 +
7168 + ddi_fm_acc_err_clear(instance->regmap_handle, DDI_FME_VER0);
7169 +
7170 + if (cmd != NULL && cmd->pkt != NULL) {
7171 + cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7172 + cmd->pkt->pkt_statistics = 0;
7173 + }
7174 + ret = DDI_FAILURE;
7175 + }
7176 +
7177 + return (ret);
7178 +}
7179 +
7180 +/*ARGSUSED*/
6881 7181 static int
7182 +mrsas_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data)
7183 +{
7184 + /*
7185 + * as the driver can always deal with an error in any dma or
7186 + * access handle, we can just return the fme_status value.
7187 + */
7188 + pci_ereport_post(dip, err, NULL);
7189 + return (err->fme_status);
7190 +}
7191 +
7192 +static void
7193 +mrsas_fm_init(struct mrsas_instance *instance)
7194 +{
7195 + /* Need to change iblock to priority for new MSI intr */
7196 + ddi_iblock_cookie_t fm_ibc;
7197 +
7198 + /* Only register with IO Fault Services if we have some capability */
7199 + if (instance->fm_capabilities) {
7200 + /* Adjust access and dma attributes for FMA */
7201 + endian_attr.devacc_attr_access = DDI_FLAGERR_ACC;
7202 + mrsas_generic_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;
7203 +
7204 + /*
7205 + * Register capabilities with IO Fault Services.
7206 + * fm_capabilities will be updated to indicate
7207 + * capabilities actually supported (not requested.)
7208 + */
7209 +
7210 + ddi_fm_init(instance->dip, &instance->fm_capabilities, &fm_ibc);
7211 +
7212 + /*
7213 + * Initialize pci ereport capabilities if ereport
7214 + * capable (should always be.)
7215 + */
7216 +
7217 + if (DDI_FM_EREPORT_CAP(instance->fm_capabilities) ||
7218 + DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7219 + pci_ereport_setup(instance->dip);
7220 + }
7221 +
7222 + /*
7223 + * Register error callback if error callback capable.
7224 + */
7225 + if (DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7226 + ddi_fm_handler_register(instance->dip,
7227 + mrsas_fm_error_cb, (void*) instance);
7228 + }
7229 + } else {
7230 + endian_attr.devacc_attr_access = DDI_DEFAULT_ACC;
7231 + mrsas_generic_dma_attr.dma_attr_flags = 0;
7232 + }
7233 +}
7234 +
7235 +static void
7236 +mrsas_fm_fini(struct mrsas_instance *instance)
7237 +{
7238 + /* Only unregister FMA capabilities if registered */
7239 + if (instance->fm_capabilities) {
7240 + /*
7241 + * Un-register error callback if error callback capable.
7242 + */
7243 + if (DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7244 + ddi_fm_handler_unregister(instance->dip);
7245 + }
7246 +
7247 + /*
7248 + * Release any resources allocated by pci_ereport_setup()
7249 + */
7250 + if (DDI_FM_EREPORT_CAP(instance->fm_capabilities) ||
7251 + DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7252 + pci_ereport_teardown(instance->dip);
7253 + }
7254 +
7255 + /* Unregister from IO Fault Services */
7256 + ddi_fm_fini(instance->dip);
7257 +
7258 + /* Adjust access and dma attributes for FMA */
7259 + endian_attr.devacc_attr_access = DDI_DEFAULT_ACC;
7260 + mrsas_generic_dma_attr.dma_attr_flags = 0;
7261 + }
7262 +}
7263 +
7264 +int
7265 +mrsas_check_acc_handle(ddi_acc_handle_t handle)
7266 +{
7267 + ddi_fm_error_t de;
7268 +
7269 + if (handle == NULL) {
7270 + return (DDI_FAILURE);
7271 + }
7272 +
7273 + ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION);
7274 +
7275 + return (de.fme_status);
7276 +}
7277 +
7278 +int
7279 +mrsas_check_dma_handle(ddi_dma_handle_t handle)
7280 +{
7281 + ddi_fm_error_t de;
7282 +
7283 + if (handle == NULL) {
7284 + return (DDI_FAILURE);
7285 + }
7286 +
7287 + ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION);
7288 +
7289 + return (de.fme_status);
7290 +}
7291 +
7292 +void
7293 +mrsas_fm_ereport(struct mrsas_instance *instance, char *detail)
7294 +{
7295 + uint64_t ena;
7296 + char buf[FM_MAX_CLASS];
7297 +
7298 + (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", DDI_FM_DEVICE, detail);
7299 + ena = fm_ena_generate(0, FM_ENA_FMT1);
7300 + if (DDI_FM_EREPORT_CAP(instance->fm_capabilities)) {
7301 + ddi_fm_ereport_post(instance->dip, buf, ena, DDI_NOSLEEP,
7302 + FM_VERSION, DATA_TYPE_UINT8, FM_EREPORT_VERSION, NULL);
7303 + }
7304 +}
7305 +
7306 +static int
6882 7307 mrsas_add_intrs(struct mrsas_instance *instance, int intr_type)
6883 7308 {
6884 7309
6885 7310 dev_info_t *dip = instance->dip;
6886 7311 int avail, actual, count;
6887 7312 int i, flag, ret;
6888 7313
6889 7314 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: intr_type = %x",
6890 7315 intr_type));
6891 7316
6892 7317 /* Get number of interrupts */
6893 7318 ret = ddi_intr_get_nintrs(dip, intr_type, &count);
6894 7319 if ((ret != DDI_SUCCESS) || (count == 0)) {
6895 7320 con_log(CL_ANN, (CE_WARN, "ddi_intr_get_nintrs() failed:"
6896 7321 "ret %d count %d", ret, count));
6897 7322
6898 7323 return (DDI_FAILURE);
6899 7324 }
6900 7325
6901 7326 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: count = %d ", count));
6902 7327
6903 7328 /* Get number of available interrupts */
6904 7329 ret = ddi_intr_get_navail(dip, intr_type, &avail);
6905 7330 if ((ret != DDI_SUCCESS) || (avail == 0)) {
6906 7331 con_log(CL_ANN, (CE_WARN, "ddi_intr_get_navail() failed:"
6907 7332 "ret %d avail %d", ret, avail));
6908 7333
6909 7334 return (DDI_FAILURE);
6910 7335 }
6911 7336 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: avail = %d ", avail));
6912 7337
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21 lines elided |
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6913 7338 /* Only one interrupt routine. So limit the count to 1 */
6914 7339 if (count > 1) {
6915 7340 count = 1;
6916 7341 }
6917 7342
6918 7343 /*
6919 7344 * Allocate an array of interrupt handlers. Currently we support
6920 7345 * only one interrupt. The framework can be extended later.
6921 7346 */
6922 7347 instance->intr_htable_size = count * sizeof (ddi_intr_handle_t);
6923 - instance->intr_htable = kmem_zalloc(instance->intr_htable_size, KM_SLEEP);
6924 - if (instance->intr_htable == NULL) {
6925 - con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
6926 - "failed to allocate memory for intr-handle table"));
6927 - instance->intr_htable_size = 0;
6928 - return (DDI_FAILURE);
6929 - }
7348 + instance->intr_htable = kmem_zalloc(instance->intr_htable_size,
7349 + KM_SLEEP);
7350 + ASSERT(instance->intr_htable);
6930 7351
6931 - flag = ((intr_type == DDI_INTR_TYPE_MSI) || (intr_type ==
6932 - DDI_INTR_TYPE_MSIX)) ? DDI_INTR_ALLOC_STRICT:DDI_INTR_ALLOC_NORMAL;
7352 + flag = ((intr_type == DDI_INTR_TYPE_MSI) ||
7353 + (intr_type == DDI_INTR_TYPE_MSIX)) ?
7354 + DDI_INTR_ALLOC_STRICT : DDI_INTR_ALLOC_NORMAL;
6933 7355
6934 7356 /* Allocate interrupt */
6935 7357 ret = ddi_intr_alloc(dip, instance->intr_htable, intr_type, 0,
6936 - count, &actual, flag);
7358 + count, &actual, flag);
6937 7359
6938 7360 if ((ret != DDI_SUCCESS) || (actual == 0)) {
6939 7361 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
6940 7362 "avail = %d", avail));
6941 7363 goto mrsas_free_htable;
6942 7364 }
6943 7365
6944 7366 if (actual < count) {
6945 7367 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
6946 7368 "Requested = %d Received = %d", count, actual));
6947 7369 }
6948 7370 instance->intr_cnt = actual;
6949 7371
6950 7372 /*
6951 7373 * Get the priority of the interrupt allocated.
6952 7374 */
6953 7375 if ((ret = ddi_intr_get_pri(instance->intr_htable[0],
6954 7376 &instance->intr_pri)) != DDI_SUCCESS) {
6955 7377 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
6956 7378 "get priority call failed"));
6957 7379 goto mrsas_free_handles;
6958 7380 }
6959 7381
6960 7382 /*
6961 7383 * Test for high level mutex. we don't support them.
6962 7384 */
6963 7385 if (instance->intr_pri >= ddi_intr_get_hilevel_pri()) {
6964 7386 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
6965 7387 "High level interrupts not supported."));
6966 7388 goto mrsas_free_handles;
6967 7389 }
6968 7390
6969 7391 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: intr_pri = 0x%x ",
6970 7392 instance->intr_pri));
6971 7393
6972 7394 /* Call ddi_intr_add_handler() */
6973 7395 for (i = 0; i < actual; i++) {
6974 7396 ret = ddi_intr_add_handler(instance->intr_htable[i],
6975 7397 (ddi_intr_handler_t *)mrsas_isr, (caddr_t)instance,
6976 7398 (caddr_t)(uintptr_t)i);
6977 7399
6978 7400 if (ret != DDI_SUCCESS) {
6979 7401 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs:"
6980 7402 "failed %d", ret));
6981 7403 goto mrsas_free_handles;
6982 7404 }
6983 7405
6984 7406 }
6985 7407
6986 7408 con_log(CL_DLEVEL1, (CE_NOTE, " ddi_intr_add_handler done"));
6987 7409
6988 7410 if ((ret = ddi_intr_get_cap(instance->intr_htable[0],
6989 7411 &instance->intr_cap)) != DDI_SUCCESS) {
6990 7412 con_log(CL_ANN, (CE_WARN, "ddi_intr_get_cap() failed %d",
6991 7413 ret));
6992 7414 goto mrsas_free_handlers;
6993 7415 }
6994 7416
6995 7417 if (instance->intr_cap & DDI_INTR_FLAG_BLOCK) {
6996 7418 con_log(CL_ANN, (CE_WARN, "Calling ddi_intr_block _enable"));
6997 7419
6998 7420 (void) ddi_intr_block_enable(instance->intr_htable,
6999 7421 instance->intr_cnt);
7000 7422 } else {
7001 7423 con_log(CL_ANN, (CE_NOTE, " calling ddi_intr_enable"));
7002 7424
7003 7425 for (i = 0; i < instance->intr_cnt; i++) {
|
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↑ open up ↑ |
7004 7426 (void) ddi_intr_enable(instance->intr_htable[i]);
7005 7427 con_log(CL_ANN, (CE_NOTE, "ddi intr enable returns "
7006 7428 "%d", i));
7007 7429 }
7008 7430 }
7009 7431
7010 7432 return (DDI_SUCCESS);
7011 7433
7012 7434 mrsas_free_handlers:
7013 7435 for (i = 0; i < actual; i++)
7014 - {
7015 7436 (void) ddi_intr_remove_handler(instance->intr_htable[i]);
7016 - }
7017 7437
7018 7438 mrsas_free_handles:
7019 7439 for (i = 0; i < actual; i++)
7020 - {
7021 7440 (void) ddi_intr_free(instance->intr_htable[i]);
7022 - }
7023 7441
7024 7442 mrsas_free_htable:
7025 7443 if (instance->intr_htable != NULL)
7026 7444 kmem_free(instance->intr_htable, instance->intr_htable_size);
7027 7445
7028 - instance->intr_htable =NULL;
7446 + instance->intr_htable = NULL;
7029 7447 instance->intr_htable_size = 0;
7030 7448
7031 7449 return (DDI_FAILURE);
7032 7450
7033 7451 }
7034 7452
7035 7453
7036 7454 static void
7037 7455 mrsas_rem_intrs(struct mrsas_instance *instance)
7038 7456 {
7039 7457 int i;
7040 7458
7041 7459 con_log(CL_ANN, (CE_NOTE, "mrsas_rem_intrs called"));
7042 7460
7043 7461 /* Disable all interrupts first */
7044 7462 if (instance->intr_cap & DDI_INTR_FLAG_BLOCK) {
7045 7463 (void) ddi_intr_block_disable(instance->intr_htable,
7046 - instance->intr_cnt);
7464 + instance->intr_cnt);
7047 7465 } else {
7048 7466 for (i = 0; i < instance->intr_cnt; i++) {
7049 7467 (void) ddi_intr_disable(instance->intr_htable[i]);
7050 7468 }
7051 7469 }
7052 7470
7053 7471 /* Remove all the handlers */
7054 7472
7055 7473 for (i = 0; i < instance->intr_cnt; i++) {
7056 7474 (void) ddi_intr_remove_handler(instance->intr_htable[i]);
7057 7475 (void) ddi_intr_free(instance->intr_htable[i]);
7058 7476 }
7059 7477
7060 7478 if (instance->intr_htable != NULL)
7061 7479 kmem_free(instance->intr_htable, instance->intr_htable_size);
7062 7480
7063 - instance->intr_htable =NULL;
7481 + instance->intr_htable = NULL;
7064 7482 instance->intr_htable_size = 0;
7065 7483
7066 7484 }
7067 7485
7068 7486 static int
7069 7487 mrsas_tran_bus_config(dev_info_t *parent, uint_t flags,
7070 7488 ddi_bus_config_op_t op, void *arg, dev_info_t **childp)
7071 7489 {
7072 7490 struct mrsas_instance *instance;
7073 7491 int config;
7074 7492 int rval = NDI_SUCCESS;
7075 7493
7076 7494 char *ptr = NULL;
7077 7495 int tgt, lun;
7078 7496
7079 7497 con_log(CL_ANN1, (CE_NOTE, "Bus config called for op = %x", op));
7080 7498
7081 7499 if ((instance = ddi_get_soft_state(mrsas_state,
7082 7500 ddi_get_instance(parent))) == NULL) {
7083 7501 return (NDI_FAILURE);
7084 7502 }
7085 7503
7086 7504 /* Hold nexus during bus_config */
7087 7505 ndi_devi_enter(parent, &config);
7088 7506 switch (op) {
7089 7507 case BUS_CONFIG_ONE: {
7090 7508
7091 7509 /* parse wwid/target name out of name given */
7092 7510 if ((ptr = strchr((char *)arg, '@')) == NULL) {
7093 7511 rval = NDI_FAILURE;
7094 7512 break;
|
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21 lines elided |
↑ open up ↑ |
7095 7513 }
7096 7514 ptr++;
7097 7515
7098 7516 if (mrsas_parse_devname(arg, &tgt, &lun) != 0) {
7099 7517 rval = NDI_FAILURE;
7100 7518 break;
7101 7519 }
7102 7520
7103 7521 if (lun == 0) {
7104 7522 rval = mrsas_config_ld(instance, tgt, lun, childp);
7105 - }
7106 7523 #ifdef PDSUPPORT
7107 - else if ( instance->tbolt == 1 && lun != 0) {
7108 - rval = mrsas_tbolt_config_pd(instance,
7524 + } else if (instance->tbolt == 1 && lun != 0) {
7525 + rval = mrsas_tbolt_config_pd(instance,
7109 7526 tgt, lun, childp);
7110 - }
7111 7527 #endif
7112 - else {
7528 + } else {
7113 7529 rval = NDI_FAILURE;
7114 7530 }
7115 7531
7116 7532 break;
7117 7533 }
7118 7534 case BUS_CONFIG_DRIVER:
7119 7535 case BUS_CONFIG_ALL: {
7120 7536
7121 7537 rval = mrsas_config_all_devices(instance);
7122 7538
7123 7539 rval = NDI_SUCCESS;
7124 7540 break;
7125 7541 }
7126 7542 }
7127 7543
7128 7544 if (rval == NDI_SUCCESS) {
7129 7545 rval = ndi_busop_bus_config(parent, flags, op, arg, childp, 0);
7130 7546
7131 7547 }
7132 7548 ndi_devi_exit(parent, config);
7133 7549
7134 7550 con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_bus_config: rval = %x",
7135 7551 rval));
7136 7552 return (rval);
7137 7553 }
7138 7554
7139 7555 static int
7140 7556 mrsas_config_all_devices(struct mrsas_instance *instance)
|
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18 lines elided |
↑ open up ↑ |
7141 7557 {
7142 7558 int rval, tgt;
7143 7559
7144 7560 for (tgt = 0; tgt < MRDRV_MAX_LD; tgt++) {
7145 7561 (void) mrsas_config_ld(instance, tgt, 0, NULL);
7146 7562
7147 7563 }
7148 7564
7149 7565 #ifdef PDSUPPORT
7150 7566 /* Config PD devices connected to the card */
7151 - if(instance->tbolt) {
7567 + if (instance->tbolt) {
7152 7568 for (tgt = 0; tgt < instance->mr_tbolt_pd_max; tgt++) {
7153 7569 (void) mrsas_tbolt_config_pd(instance, tgt, 1, NULL);
7154 7570 }
7155 7571 }
7156 7572 #endif
7157 7573
7158 7574 rval = NDI_SUCCESS;
7159 7575 return (rval);
7160 7576 }
7161 7577
7162 7578 static int
7163 7579 mrsas_parse_devname(char *devnm, int *tgt, int *lun)
7164 7580 {
7165 7581 char devbuf[SCSI_MAXNAMELEN];
7166 7582 char *addr;
7167 7583 char *p, *tp, *lp;
7168 7584 long num;
7169 7585
7170 7586 /* Parse dev name and address */
7171 7587 (void) strcpy(devbuf, devnm);
7172 7588 addr = "";
7173 7589 for (p = devbuf; *p != '\0'; p++) {
7174 7590 if (*p == '@') {
7175 7591 addr = p + 1;
7176 7592 *p = '\0';
7177 7593 } else if (*p == ':') {
7178 7594 *p = '\0';
7179 7595 break;
7180 7596 }
7181 7597 }
7182 7598
7183 7599 /* Parse target and lun */
7184 7600 for (p = tp = addr, lp = NULL; *p != '\0'; p++) {
7185 7601 if (*p == ',') {
7186 7602 lp = p + 1;
7187 7603 *p = '\0';
7188 7604 break;
7189 7605 }
7190 7606 }
7191 7607 if (tgt && tp) {
7192 7608 if (ddi_strtol(tp, NULL, 0x10, &num)) {
7193 7609 return (DDI_FAILURE); /* Can declare this as constant */
7194 7610 }
7195 7611 *tgt = (int)num;
7196 7612 }
7197 7613 if (lun && lp) {
7198 7614 if (ddi_strtol(lp, NULL, 0x10, &num)) {
7199 7615 return (DDI_FAILURE);
7200 7616 }
7201 7617 *lun = (int)num;
7202 7618 }
7203 7619 return (DDI_SUCCESS); /* Success case */
7204 7620 }
7205 7621
7206 7622 static int
7207 7623 mrsas_config_ld(struct mrsas_instance *instance, uint16_t tgt,
7208 7624 uint8_t lun, dev_info_t **ldip)
7209 7625 {
7210 7626 struct scsi_device *sd;
7211 7627 dev_info_t *child;
7212 7628 int rval;
7213 7629
7214 7630 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_config_ld: t = %d l = %d",
7215 7631 tgt, lun));
7216 7632
7217 7633 if ((child = mrsas_find_child(instance, tgt, lun)) != NULL) {
7218 7634 if (ldip) {
7219 7635 *ldip = child;
7220 7636 }
7221 7637 if (instance->mr_ld_list[tgt].flag != MRDRV_TGT_VALID) {
7222 7638 rval = mrsas_service_evt(instance, tgt, 0,
|
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61 lines elided |
↑ open up ↑ |
7223 7639 MRSAS_EVT_UNCONFIG_TGT, NULL);
7224 7640 con_log(CL_ANN1, (CE_WARN,
7225 7641 "mr_sas: DELETING STALE ENTRY rval = %d "
7226 7642 "tgt id = %d ", rval, tgt));
7227 7643 return (NDI_FAILURE);
7228 7644 }
7229 7645 return (NDI_SUCCESS);
7230 7646 }
7231 7647
7232 7648 sd = kmem_zalloc(sizeof (struct scsi_device), KM_SLEEP);
7233 - if (sd == NULL) {
7234 - con_log(CL_ANN1, (CE_WARN,
7235 - "mrsas_config_ld: failed to allocate mem for scsi_device"));
7236 - return (NDI_FAILURE);
7237 - }
7238 7649 sd->sd_address.a_hba_tran = instance->tran;
7239 7650 sd->sd_address.a_target = (uint16_t)tgt;
7240 7651 sd->sd_address.a_lun = (uint8_t)lun;
7241 7652
7242 7653 if (scsi_hba_probe(sd, NULL) == SCSIPROBE_EXISTS)
7243 7654 rval = mrsas_config_scsi_device(instance, sd, ldip);
7244 7655 else
7245 7656 rval = NDI_FAILURE;
7246 7657
7247 7658 /* sd_unprobe is blank now. Free buffer manually */
7248 7659 if (sd->sd_inq) {
7249 7660 kmem_free(sd->sd_inq, SUN_INQSIZE);
7250 7661 sd->sd_inq = (struct scsi_inquiry *)NULL;
7251 7662 }
7252 7663
7253 7664 kmem_free(sd, sizeof (struct scsi_device));
7254 7665 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_config_ld: return rval = %d",
7255 7666 rval));
7256 7667 return (rval);
7257 7668 }
7258 7669
7259 7670 int
7260 7671 mrsas_config_scsi_device(struct mrsas_instance *instance,
7261 7672 struct scsi_device *sd, dev_info_t **dipp)
7262 7673 {
7263 7674 char *nodename = NULL;
7264 7675 char **compatible = NULL;
7265 7676 int ncompatible = 0;
7266 7677 char *childname;
7267 7678 dev_info_t *ldip = NULL;
7268 7679 int tgt = sd->sd_address.a_target;
7269 7680 int lun = sd->sd_address.a_lun;
7270 7681 int dtype = sd->sd_inq->inq_dtype & DTYPE_MASK;
7271 7682 int rval;
7272 7683
7273 7684 con_log(CL_DLEVEL1, (CE_NOTE, "mr_sas: scsi_device t%dL%d", tgt, lun));
7274 7685 scsi_hba_nodename_compatible_get(sd->sd_inq, NULL, dtype,
7275 7686 NULL, &nodename, &compatible, &ncompatible);
7276 7687
7277 7688 if (nodename == NULL) {
7278 7689 con_log(CL_ANN1, (CE_WARN, "mr_sas: Found no compatible driver "
7279 7690 "for t%dL%d", tgt, lun));
7280 7691 rval = NDI_FAILURE;
7281 7692 goto finish;
7282 7693 }
7283 7694
7284 7695 childname = (dtype == DTYPE_DIRECT) ? "sd" : nodename;
7285 7696 con_log(CL_DLEVEL1, (CE_NOTE,
7286 7697 "mr_sas: Childname = %2s nodename = %s", childname, nodename));
7287 7698
7288 7699 /* Create a dev node */
7289 7700 rval = ndi_devi_alloc(instance->dip, childname, DEVI_SID_NODEID, &ldip);
7290 7701 con_log(CL_DLEVEL1, (CE_NOTE,
7291 7702 "mr_sas_config_scsi_device: ndi_devi_alloc rval = %x", rval));
7292 7703 if (rval == NDI_SUCCESS) {
7293 7704 if (ndi_prop_update_int(DDI_DEV_T_NONE, ldip, "target", tgt) !=
7294 7705 DDI_PROP_SUCCESS) {
7295 7706 con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to create "
7296 7707 "property for t%dl%d target", tgt, lun));
7297 7708 rval = NDI_FAILURE;
7298 7709 goto finish;
7299 7710 }
7300 7711 if (ndi_prop_update_int(DDI_DEV_T_NONE, ldip, "lun", lun) !=
7301 7712 DDI_PROP_SUCCESS) {
7302 7713 con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to create "
7303 7714 "property for t%dl%d lun", tgt, lun));
7304 7715 rval = NDI_FAILURE;
7305 7716 goto finish;
7306 7717 }
7307 7718
7308 7719 if (ndi_prop_update_string_array(DDI_DEV_T_NONE, ldip,
7309 7720 "compatible", compatible, ncompatible) !=
7310 7721 DDI_PROP_SUCCESS) {
7311 7722 con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to create "
7312 7723 "property for t%dl%d compatible", tgt, lun));
7313 7724 rval = NDI_FAILURE;
7314 7725 goto finish;
7315 7726 }
7316 7727
7317 7728 rval = ndi_devi_online(ldip, NDI_ONLINE_ATTACH);
7318 7729 if (rval != NDI_SUCCESS) {
7319 7730 con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to online "
7320 7731 "t%dl%d", tgt, lun));
7321 7732 ndi_prop_remove_all(ldip);
7322 7733 (void) ndi_devi_free(ldip);
7323 7734 } else {
7324 7735 con_log(CL_ANN1, (CE_CONT, "mr_sas: online Done :"
7325 7736 "0 t%dl%d", tgt, lun));
7326 7737 }
7327 7738
7328 7739 }
7329 7740 finish:
7330 7741 if (dipp) {
7331 7742 *dipp = ldip;
7332 7743 }
7333 7744
7334 7745 con_log(CL_DLEVEL1, (CE_NOTE,
7335 7746 "mr_sas: config_scsi_device rval = %d t%dL%d",
7336 7747 rval, tgt, lun));
7337 7748 scsi_hba_nodename_compatible_free(nodename, compatible);
7338 7749 return (rval);
7339 7750 }
7340 7751
7341 7752 /*ARGSUSED*/
7342 7753 int
7343 7754 mrsas_service_evt(struct mrsas_instance *instance, int tgt, int lun, int event,
7344 7755 uint64_t wwn)
7345 7756 {
7346 7757 struct mrsas_eventinfo *mrevt = NULL;
7347 7758
7348 7759 con_log(CL_ANN1, (CE_NOTE,
7349 7760 "mrsas_service_evt called for t%dl%d event = %d",
7350 7761 tgt, lun, event));
7351 7762
7352 7763 if ((instance->taskq == NULL) || (mrevt =
7353 7764 kmem_zalloc(sizeof (struct mrsas_eventinfo), KM_NOSLEEP)) == NULL) {
7354 7765 return (ENOMEM);
7355 7766 }
7356 7767
7357 7768 mrevt->instance = instance;
7358 7769 mrevt->tgt = tgt;
7359 7770 mrevt->lun = lun;
7360 7771 mrevt->event = event;
7361 7772 mrevt->wwn = wwn;
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7362 7773
7363 7774 if ((ddi_taskq_dispatch(instance->taskq,
7364 7775 (void (*)(void *))mrsas_issue_evt_taskq, mrevt, DDI_NOSLEEP)) !=
7365 7776 DDI_SUCCESS) {
7366 7777 con_log(CL_ANN1, (CE_NOTE,
7367 7778 "mr_sas: Event task failed for t%dl%d event = %d",
7368 7779 tgt, lun, event));
7369 7780 kmem_free(mrevt, sizeof (struct mrsas_eventinfo));
7370 7781 return (DDI_FAILURE);
7371 7782 }
7372 -
7783 + DTRACE_PROBE3(service_evt, int, tgt, int, lun, int, event);
7373 7784 return (DDI_SUCCESS);
7374 7785 }
7375 7786
7376 7787 static void
7377 7788 mrsas_issue_evt_taskq(struct mrsas_eventinfo *mrevt)
7378 7789 {
7379 7790 struct mrsas_instance *instance = mrevt->instance;
7380 7791 dev_info_t *dip, *pdip;
7381 7792 int circ1 = 0;
7382 7793 char *devname;
7383 7794
7384 7795 con_log(CL_ANN1, (CE_NOTE, "mrsas_issue_evt_taskq: called for"
7385 7796 " tgt %d lun %d event %d",
7386 7797 mrevt->tgt, mrevt->lun, mrevt->event));
7387 7798
7388 7799 if (mrevt->tgt < MRDRV_MAX_LD && mrevt->lun == 0) {
7389 7800 mutex_enter(&instance->config_dev_mtx);
7390 7801 dip = instance->mr_ld_list[mrevt->tgt].dip;
7391 7802 mutex_exit(&instance->config_dev_mtx);
7392 - }
7393 -
7394 7803 #ifdef PDSUPPORT
7395 - else {
7804 + } else {
7396 7805 mutex_enter(&instance->config_dev_mtx);
7397 7806 dip = instance->mr_tbolt_pd_list[mrevt->tgt].dip;
7398 7807 mutex_exit(&instance->config_dev_mtx);
7399 - }
7400 7808 #endif
7809 + }
7401 7810
7811 +
7402 7812 ndi_devi_enter(instance->dip, &circ1);
7403 7813 switch (mrevt->event) {
7404 7814 case MRSAS_EVT_CONFIG_TGT:
7405 7815 if (dip == NULL) {
7406 7816
7407 7817 if (mrevt->lun == 0) {
7408 7818 (void) mrsas_config_ld(instance, mrevt->tgt,
7409 7819 0, NULL);
7410 - }
7411 7820 #ifdef PDSUPPORT
7412 - else if (instance->tbolt) {
7821 + } else if (instance->tbolt) {
7413 7822 (void) mrsas_tbolt_config_pd(instance,
7414 7823 mrevt->tgt,
7415 7824 1, NULL);
7416 - }
7417 7825 #endif
7826 + }
7418 7827 con_log(CL_ANN1, (CE_NOTE,
7419 7828 "mr_sas: EVT_CONFIG_TGT called:"
7420 7829 " for tgt %d lun %d event %d",
7421 7830 mrevt->tgt, mrevt->lun, mrevt->event));
7422 7831
7423 7832 } else {
7424 7833 con_log(CL_ANN1, (CE_NOTE,
7425 7834 "mr_sas: EVT_CONFIG_TGT dip != NULL:"
7426 7835 " for tgt %d lun %d event %d",
7427 7836 mrevt->tgt, mrevt->lun, mrevt->event));
7428 7837 }
7429 7838 break;
7430 7839 case MRSAS_EVT_UNCONFIG_TGT:
7431 7840 if (dip) {
7432 7841 if (i_ddi_devi_attached(dip)) {
7433 7842
7434 7843 pdip = ddi_get_parent(dip);
7435 7844
7436 7845 devname = kmem_zalloc(MAXNAMELEN + 1, KM_SLEEP);
7437 7846 (void) ddi_deviname(dip, devname);
7438 7847
7439 7848 (void) devfs_clean(pdip, devname + 1,
7440 7849 DV_CLEAN_FORCE);
7441 7850 kmem_free(devname, MAXNAMELEN + 1);
7442 7851 }
7443 7852 (void) ndi_devi_offline(dip, NDI_DEVI_REMOVE);
7444 7853 con_log(CL_ANN1, (CE_NOTE,
7445 7854 "mr_sas: EVT_UNCONFIG_TGT called:"
7446 7855 " for tgt %d lun %d event %d",
7447 7856 mrevt->tgt, mrevt->lun, mrevt->event));
7448 7857 } else {
7449 7858 con_log(CL_ANN1, (CE_NOTE,
7450 7859 "mr_sas: EVT_UNCONFIG_TGT dip == NULL:"
7451 7860 " for tgt %d lun %d event %d",
7452 7861 mrevt->tgt, mrevt->lun, mrevt->event));
7453 7862 }
7454 7863 break;
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7455 7864 }
7456 7865 kmem_free(mrevt, sizeof (struct mrsas_eventinfo));
7457 7866 ndi_devi_exit(instance->dip, circ1);
7458 7867 }
7459 7868
7460 7869
7461 7870 int
7462 7871 mrsas_mode_sense_build(struct scsi_pkt *pkt)
7463 7872 {
7464 7873 union scsi_cdb *cdbp;
7465 - uint16_t page_code;
7874 + uint16_t page_code;
7466 7875 struct scsa_cmd *acmd;
7467 7876 struct buf *bp;
7468 7877 struct mode_header *modehdrp;
7469 7878
7470 7879 cdbp = (void *)pkt->pkt_cdbp;
7471 7880 page_code = cdbp->cdb_un.sg.scsi[0];
7472 7881 acmd = PKT2CMD(pkt);
7473 7882 bp = acmd->cmd_buf;
7474 7883 if ((!bp) && bp->b_un.b_addr && bp->b_bcount && acmd->cmd_dmacount) {
7475 7884 con_log(CL_ANN1, (CE_WARN, "Failing MODESENSE Command"));
7476 7885 /* ADD pkt statistics as Command failed. */
7477 7886 return (NULL);
7478 7887 }
7479 7888
7480 7889 bp_mapin(bp);
7481 7890 bzero(bp->b_un.b_addr, bp->b_bcount);
7482 7891
7483 7892 switch (page_code) {
7484 7893 case 0x3: {
7485 7894 struct mode_format *page3p = NULL;
7486 7895 modehdrp = (struct mode_header *)(bp->b_un.b_addr);
7487 7896 modehdrp->bdesc_length = MODE_BLK_DESC_LENGTH;
7488 7897
7489 7898 page3p = (void *)((caddr_t)modehdrp +
7490 7899 MODE_HEADER_LENGTH + MODE_BLK_DESC_LENGTH);
7491 7900 page3p->mode_page.code = 0x3;
7492 7901 page3p->mode_page.length =
7493 7902 (uchar_t)(sizeof (struct mode_format));
7494 7903 page3p->data_bytes_sect = 512;
7495 7904 page3p->sect_track = 63;
7496 7905 break;
7497 7906 }
7498 7907 case 0x4: {
7499 7908 struct mode_geometry *page4p = NULL;
7500 7909 modehdrp = (struct mode_header *)(bp->b_un.b_addr);
7501 7910 modehdrp->bdesc_length = MODE_BLK_DESC_LENGTH;
7502 7911
7503 7912 page4p = (void *)((caddr_t)modehdrp +
7504 7913 MODE_HEADER_LENGTH + MODE_BLK_DESC_LENGTH);
7505 7914 page4p->mode_page.code = 0x4;
7506 7915 page4p->mode_page.length =
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7507 7916 (uchar_t)(sizeof (struct mode_geometry));
7508 7917 page4p->heads = 255;
7509 7918 page4p->rpm = 10000;
7510 7919 break;
7511 7920 }
7512 7921 default:
7513 7922 break;
7514 7923 }
7515 7924 return (NULL);
7516 7925 }
7517 -
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