1 /*
2 * mr_sas.c: source for mr_sas driver
3 *
4 * Solaris MegaRAID device driver for SAS2.0 controllers
5 * Copyright (c) 2008-2012, LSI Logic Corporation.
6 * All rights reserved.
7 *
8 * Version:
9 * Author:
10 * Swaminathan K S
11 * Arun Chandrashekhar
12 * Manju R
13 * Rasheed
14 * Shakeel Bukhari
15 */
16
17 #include <sys/types.h>
18 #include <sys/param.h>
19 #include <sys/file.h>
20 #include <sys/errno.h>
21 #include <sys/open.h>
22 #include <sys/cred.h>
23 #include <sys/modctl.h>
24 #include <sys/conf.h>
25 #include <sys/devops.h>
26 #include <sys/cmn_err.h>
27 #include <sys/kmem.h>
28 #include <sys/stat.h>
29 #include <sys/mkdev.h>
30 #include <sys/pci.h>
31 #include <sys/scsi/scsi.h>
32 #include <sys/ddi.h>
33 #include <sys/sunddi.h>
34 #include <sys/atomic.h>
35 #include <sys/signal.h>
36 #include <sys/byteorder.h>
37 #include <sys/sdt.h>
38 #include <sys/fs/dv_node.h> /* devfs_clean */
39
40 #include "mr_sas.h"
41
42 /*
43 * Local static data
44 */
45 static void *mrsas_state = NULL;
46 static volatile boolean_t mrsas_relaxed_ordering = 0;
47 volatile int debug_level_g = CL_NONE;
48
49 static volatile int msi_enable = 1;
50
51 /* Default Timeout value to issue online controller reset */
52 volatile int debug_timeout_g = 0xF0; //0xB4;
53 /* Simulate consecutive firmware fault */
54 static volatile int debug_fw_faults_after_ocr_g = 0;
55 #ifdef OCRDEBUG
56 /* Simulate three consecutive timeout for an IO */
57 static volatile int debug_consecutive_timeout_after_ocr_g = 0;
58 #endif
59
60 /* Enable OCR on firmware fault */
61 static volatile int debug_support_ocr_isr_g = 0;
62 #pragma weak scsi_hba_open
63 #pragma weak scsi_hba_close
64 #pragma weak scsi_hba_ioctl
65
66
67
68 static struct mrsas_function_template mrsas_function_template_ppc = {
69 .read_fw_status_reg = read_fw_status_reg_ppc,
70 .issue_cmd = issue_cmd_ppc,
71 .issue_cmd_in_sync_mode = issue_cmd_in_sync_mode_ppc,
72 .issue_cmd_in_poll_mode = issue_cmd_in_poll_mode_ppc,
73 .enable_intr = enable_intr_ppc,
74 .disable_intr = disable_intr_ppc,
75 .intr_ack = intr_ack_ppc,
76 .init_adapter = mrsas_init_adapter_ppc
77 // .reset_adapter = mrsas_reset_adapter_ppc
78 };
79
80
81 static struct mrsas_function_template mrsas_function_template_fusion = {
82 .read_fw_status_reg = tbolt_read_fw_status_reg,
83 .issue_cmd = tbolt_issue_cmd,
84 .issue_cmd_in_sync_mode = tbolt_issue_cmd_in_sync_mode,
85 .issue_cmd_in_poll_mode = tbolt_issue_cmd_in_poll_mode,
86 .enable_intr = tbolt_enable_intr,
87 .disable_intr = tbolt_disable_intr,
88 .intr_ack = tbolt_intr_ack,
89 .init_adapter = mrsas_init_adapter_tbolt
90 // .reset_adapter = mrsas_reset_adapter_tbolt
91 };
92
93
94 ddi_dma_attr_t mrsas_generic_dma_attr = {
95 DMA_ATTR_V0, /* dma_attr_version */
96 0, /* low DMA address range */
97 0xFFFFFFFFU, /* high DMA address range */
98 0xFFFFFFFFU, /* DMA counter register */
99 8, /* DMA address alignment */
100 0x07, /* DMA burstsizes */
101 1, /* min DMA size */
102 0xFFFFFFFFU, /* max DMA size */
103 0xFFFFFFFFU, /* segment boundary */
104 MRSAS_MAX_SGE_CNT, /* dma_attr_sglen */
105 512, /* granularity of device */
106 0 /* bus specific DMA flags */
107 };
108
109 int32_t mrsas_max_cap_maxxfer = 0x1000000;
110
111 //Fix for: Thunderbolt controller IO timeout when IO write size is 1MEG, Limit size to 256K
112 uint32_t mrsas_tbolt_max_cap_maxxfer = (512 * 512);
113
114 /*
115 * cb_ops contains base level routines
116 */
117 static struct cb_ops mrsas_cb_ops = {
118 mrsas_open, /* open */
119 mrsas_close, /* close */
120 nodev, /* strategy */
121 nodev, /* print */
122 nodev, /* dump */
123 nodev, /* read */
124 nodev, /* write */
125 mrsas_ioctl, /* ioctl */
126 nodev, /* devmap */
127 nodev, /* mmap */
128 nodev, /* segmap */
129 nochpoll, /* poll */
130 nodev, /* cb_prop_op */
131 0, /* streamtab */
132 D_NEW | D_HOTPLUG, /* cb_flag */
133 CB_REV, /* cb_rev */
134 nodev, /* cb_aread */
135 nodev /* cb_awrite */
136 };
137
138 /*
139 * dev_ops contains configuration routines
140 */
141 static struct dev_ops mrsas_ops = {
142 DEVO_REV, /* rev, */
143 0, /* refcnt */
144 mrsas_getinfo, /* getinfo */
145 nulldev, /* identify */
146 nulldev, /* probe */
147 mrsas_attach, /* attach */
148 mrsas_detach, /* detach */
149 #if defined(__SunOS_5_11)
150 nodev,
151 #else
152 mrsas_reset, /* reset */
153 #endif /* defined(__SunOS_5_11) */
154 &mrsas_cb_ops, /* char/block ops */
155 NULL, /* bus ops */
156 NULL, /* power */
157 #ifdef __SunOS_5_11
158 mrsas_quiesce /* quiesce */
159 #endif /*__SunOS_5_11 */
160
161 };
162
163 char _depends_on[] = "misc/scsi";
164
165 static struct modldrv modldrv = {
166 &mod_driverops, /* module type - driver */
167 MRSAS_VERSION,
168 &mrsas_ops, /* driver ops */
169 };
170
171 static struct modlinkage modlinkage = {
172 MODREV_1, /* ml_rev - must be MODREV_1 */
173 &modldrv, /* ml_linkage */
174 NULL /* end of driver linkage */
175 };
176
177 static struct ddi_device_acc_attr endian_attr = {
178 DDI_DEVICE_ATTR_V1,
179 DDI_STRUCTURE_LE_ACC,
180 DDI_STRICTORDER_ACC,
181 DDI_DEFAULT_ACC
182 };
183
184
185 unsigned int enable_fp = 1;
186
187
188 /*
189 * ************************************************************************** *
190 * *
191 * common entry points - for loadable kernel modules *
192 * *
193 * ************************************************************************** *
194 */
195
196 /*
197 * _init - initialize a loadable module
198 * @void
199 *
200 * The driver should perform any one-time resource allocation or data
201 * initialization during driver loading in _init(). For example, the driver
202 * should initialize any mutexes global to the driver in this routine.
203 * The driver should not, however, use _init() to allocate or initialize
204 * anything that has to do with a particular instance of the device.
248 {
249 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
250
251 return (mod_info(&modlinkage, modinfop));
252 }
253
254 /*
255 * _fini - prepare a loadable module for unloading
256 * @void
257 *
258 * In _fini(), the driver should release any resources that were allocated in
259 * _init(). The driver must remove itself from the system module list.
260 */
261 int
262 _fini(void)
263 {
264 int ret;
265
266 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
267
268 if ((ret = mod_remove(&modlinkage)) != DDI_SUCCESS)
269 {
270 con_log(CL_ANN1, (CE_WARN, "_fini: mod_remove() failed, error 0x%X", ret));
271 return (ret);
272 }
273
274 scsi_hba_fini(&modlinkage);
275 con_log(CL_DLEVEL1, (CE_NOTE, "_fini: scsi_hba_fini() done."));
276
277 ddi_soft_state_fini(&mrsas_state);
278 con_log(CL_DLEVEL1, (CE_NOTE, "_fini: ddi_soft_state_fini() done."));
279
280 return (ret);
281 }
282
283
284 /*
285 * ************************************************************************** *
286 * *
287 * common entry points - for autoconfiguration *
288 * *
289 * ************************************************************************** *
290 */
294 * @cmd:
295 *
296 * The kernel calls a driver's attach() entry point to attach an instance of
297 * a device (for MegaRAID, it is instance of a controller) or to resume
298 * operation for an instance of a device that has been suspended or has been
299 * shut down by the power management framework
300 * The attach() entry point typically includes the following types of
301 * processing:
302 * - allocate a soft-state structure for the device instance (for MegaRAID,
303 * controller instance)
304 * - initialize per-instance mutexes
305 * - initialize condition variables
306 * - register the device's interrupts (for MegaRAID, controller's interrupts)
307 * - map the registers and memory of the device instance (for MegaRAID,
308 * controller instance)
309 * - create minor device nodes for the device instance (for MegaRAID,
310 * controller instance)
311 * - report that the device instance (for MegaRAID, controller instance) has
312 * attached
313 */
314 #if __SunOS_5_11
315 #define DDI_PM_RESUME DDI_PM_RESUME_OBSOLETE
316 #define DDI_PM_SUSPEND DDI_PM_SUSPEND_OBSOLETE
317 #endif // __SunOS_5_11
318 static int
319 mrsas_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
320 {
321 int instance_no;
322 int nregs;
323 int i = 0;
324 uint8_t irq;
325 uint16_t vendor_id;
326 uint16_t device_id;
327 uint16_t subsysvid;
328 uint16_t subsysid;
329 uint16_t command;
330 off_t reglength = 0;
331 int intr_types = 0;
332 char *data;
333
334 scsi_hba_tran_t *tran;
335 ddi_dma_attr_t tran_dma_attr;
336 struct mrsas_instance *instance;
337
338 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
339
340 /* CONSTCOND */
341 ASSERT(NO_COMPETING_THREADS);
342
343 instance_no = ddi_get_instance(dip);
344
345 /*
346 * check to see whether this device is in a DMA-capable slot.
347 */
348 if (ddi_slaveonly(dip) == DDI_SUCCESS) {
349 cmn_err(CE_WARN,
350 "mr_sas%d: Device in slave-only slot, unused",
351 instance_no);
352 return (DDI_FAILURE);
353 }
354
355 switch (cmd) {
356 case DDI_ATTACH:
357
358 /* allocate the soft state for the instance */
359 if (ddi_soft_state_zalloc(mrsas_state, instance_no)
360 != DDI_SUCCESS) {
361 cmn_err(CE_WARN,
362 "mr_sas%d: Failed to allocate soft state",
363 instance_no);
364
365 return (DDI_FAILURE);
366 }
367
368 instance = (struct mrsas_instance *)ddi_get_soft_state
369 (mrsas_state, instance_no);
370
371 if (instance == NULL) {
372 cmn_err(CE_WARN,
373 "mr_sas%d: Bad soft state", instance_no);
374
375 ddi_soft_state_free(mrsas_state, instance_no);
376
377 return (DDI_FAILURE);
378 }
379
380 bzero((caddr_t)instance,
381 sizeof (struct mrsas_instance));
382
383 instance->unroll.softs = 1;
384
385 /* Setup the PCI configuration space handles */
386 if (pci_config_setup(dip, &instance->pci_handle) !=
387 DDI_SUCCESS) {
388 cmn_err(CE_WARN,
389 "mr_sas%d: pci config setup failed ",
390 instance_no);
391
392 ddi_soft_state_free(mrsas_state, instance_no);
393 return (DDI_FAILURE);
394 }
395 if (instance->pci_handle == NULL) {
396 cmn_err(CE_WARN,
397 "mr_sas%d: pci config setup failed ",
398 instance_no);
399 ddi_soft_state_free(mrsas_state, instance_no);
400 return (DDI_FAILURE);
401 }
402
403
404
405 if (ddi_dev_nregs(dip, &nregs) != DDI_SUCCESS) {
406 cmn_err(CE_WARN,
407 "mr_sas: failed to get registers.");
408
409 pci_config_teardown(&instance->pci_handle);
410 ddi_soft_state_free(mrsas_state, instance_no);
411 return (DDI_FAILURE);
412 }
413
414 vendor_id = pci_config_get16(instance->pci_handle,
415 PCI_CONF_VENID);
416 device_id = pci_config_get16(instance->pci_handle,
417 PCI_CONF_DEVID);
418
419 subsysvid = pci_config_get16(instance->pci_handle,
420 PCI_CONF_SUBVENID);
421 subsysid = pci_config_get16(instance->pci_handle,
422 PCI_CONF_SUBSYSID);
423
424 pci_config_put16(instance->pci_handle, PCI_CONF_COMM,
433 subsysid, irq, MRSAS_VERSION));
434
435 /* enable bus-mastering */
436 command = pci_config_get16(instance->pci_handle,
437 PCI_CONF_COMM);
438
439 if (!(command & PCI_COMM_ME)) {
440 command |= PCI_COMM_ME;
441
442 pci_config_put16(instance->pci_handle,
443 PCI_CONF_COMM, command);
444
445 con_log(CL_ANN, (CE_CONT, "mr_sas%d: "
446 "enable bus-mastering", instance_no));
447 } else {
448 con_log(CL_DLEVEL1, (CE_CONT, "mr_sas%d: "
449 "bus-mastering already set", instance_no));
450 }
451
452 /* initialize function pointers */
453 switch(device_id) {
454 case PCI_DEVICE_ID_LSI_TBOLT:
455 case PCI_DEVICE_ID_LSI_INVADER:
456 con_log(CL_ANN, (CE_NOTE,
457 "mr_sas: 2208 T.B. device detected"));
458
459 instance->func_ptr = &mrsas_function_template_fusion;
460 instance->tbolt = 1;
461 break;
462
463 case PCI_DEVICE_ID_LSI_2108VDE:
464 case PCI_DEVICE_ID_LSI_2108V:
465 con_log(CL_ANN, (CE_NOTE,
466 "mr_sas: 2108 Liberator device detected"));
467
468 instance->func_ptr = &mrsas_function_template_ppc;
469 break;
470
471 default:
472 cmn_err(CE_WARN,
473 "mr_sas: Invalid device detected");
474
475 pci_config_teardown(&instance->pci_handle);
476 ddi_soft_state_free(mrsas_state, instance_no);
477 return (DDI_FAILURE);
478
479 }
480
481 instance->baseaddress = pci_config_get32(
482 instance->pci_handle, PCI_CONF_BASE0);
483 instance->baseaddress &= 0x0fffc;
484
485 instance->dip = dip;
486 instance->vendor_id = vendor_id;
487 instance->device_id = device_id;
488 instance->subsysvid = subsysvid;
489 instance->subsysid = subsysid;
490 instance->instance = instance_no;
491
492
493 /* Setup register map */
494 if ((ddi_dev_regsize(instance->dip,
495 REGISTER_SET_IO_2108, ®length) != DDI_SUCCESS) ||
496 reglength < MINIMUM_MFI_MEM_SZ) {
497 goto fail_attach;
498 }
499 if (reglength > DEFAULT_MFI_MEM_SZ) {
500 reglength = DEFAULT_MFI_MEM_SZ;
501 con_log(CL_DLEVEL1, (CE_NOTE,
502 "mr_sas: register length to map is "
503 "0x%lx bytes", reglength));
504 }
505 if (ddi_regs_map_setup(instance->dip,
506 REGISTER_SET_IO_2108, &instance->regmap, 0,
507 reglength, &endian_attr, &instance->regmap_handle)
508 != DDI_SUCCESS) {
509 cmn_err(CE_WARN,
510 "mr_sas: couldn't map control registers");
511 goto fail_attach;
512 }
513 if (instance->regmap_handle == NULL) {
514 cmn_err(CE_WARN,
515 "mr_sas: couldn't map control registers");
516 goto fail_attach;
517 }
518
519 instance->unroll.regs = 1;
520
521 /*
522 * Disable Interrupt Now.
523 * Setup Software interrupt
524 */
525 instance->func_ptr->disable_intr(instance);
526
527 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
528 "mrsas-enable-msi", &data) == DDI_SUCCESS) {
529 if (strncmp(data, "no", 3) == 0) {
530 msi_enable = 0;
531 con_log(CL_ANN1, (CE_WARN,
532 "msi_enable = %d disabled",
533 msi_enable));
534 }
535 ddi_prop_free(data);
536 }
537
538 con_log(CL_DLEVEL1, (CE_NOTE, "msi_enable = %d", msi_enable));
539
540 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
541 "mrsas-enable-fp", &data) == DDI_SUCCESS) {
542 if (strncmp(data, "no", 3) == 0) {
543 enable_fp = 0;
544 cmn_err(CE_NOTE,
545 "enable_fp = %d, Fast-Path disabled.\n",
546 enable_fp);
547 }
548
549 ddi_prop_free(data);
550 }
551
552 cmn_err(CE_NOTE, "enable_fp = %d\n", enable_fp);
553
554 /* Check for all supported interrupt types */
555 if (ddi_intr_get_supported_types(
556 dip, &intr_types) != DDI_SUCCESS) {
557 cmn_err(CE_WARN,
558 "ddi_intr_get_supported_types() failed");
559 goto fail_attach;
560 }
561
562 con_log(CL_DLEVEL1, (CE_NOTE,
563 "ddi_intr_get_supported_types() ret: 0x%x",
564 intr_types));
565
566 /* Initialize and Setup Interrupt handler */
567 if (msi_enable && (intr_types & DDI_INTR_TYPE_MSIX)) {
568 if (mrsas_add_intrs(instance,
569 DDI_INTR_TYPE_MSIX) != DDI_SUCCESS) {
570 cmn_err(CE_WARN,
571 "MSIX interrupt query failed");
572 goto fail_attach;
573 }
574 instance->intr_type = DDI_INTR_TYPE_MSIX;
575 } else if (msi_enable && (intr_types &
576 DDI_INTR_TYPE_MSI)) {
577 if (mrsas_add_intrs(instance,
578 DDI_INTR_TYPE_MSI) != DDI_SUCCESS) {
579 cmn_err(CE_WARN,
580 "MSI interrupt query failed");
581 goto fail_attach;
582 }
583 instance->intr_type = DDI_INTR_TYPE_MSI;
584 } else if (intr_types & DDI_INTR_TYPE_FIXED) {
585 msi_enable = 0;
586 if (mrsas_add_intrs(instance,
587 DDI_INTR_TYPE_FIXED) != DDI_SUCCESS) {
588 cmn_err(CE_WARN,
589 "FIXED interrupt query failed");
590 goto fail_attach;
591 }
592 instance->intr_type = DDI_INTR_TYPE_FIXED;
593 } else {
594 cmn_err(CE_WARN, "Device cannot "
595 "suppport either FIXED or MSI/X "
596 "interrupts");
597 goto fail_attach;
598 }
599
600 instance->unroll.intr = 1;
601
602
603 /* setup the mfi based low level driver */
604 if (mrsas_init_adapter(instance) != DDI_SUCCESS) {
605 cmn_err(CE_WARN, "mr_sas: "
606 "could not initialize the low level driver");
607
608 goto fail_attach;
609 }
610
611 /* Initialize all Mutex */
612 INIT_LIST_HEAD(&instance->completed_pool_list);
613 mutex_init(&instance->completed_pool_mtx,
614 "completed_pool_mtx", MUTEX_DRIVER,
615 DDI_INTR_PRI(instance->intr_pri));
616
617 mutex_init(&instance->sync_map_mtx,
618 "sync_map_mtx", MUTEX_DRIVER,
619 DDI_INTR_PRI(instance->intr_pri));
620
621 mutex_init(&instance->app_cmd_pool_mtx,
622 "app_cmd_pool_mtx", MUTEX_DRIVER,
623 DDI_INTR_PRI(instance->intr_pri));
624
625 mutex_init(&instance->config_dev_mtx, "config_dev_mtx",
626 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
627
628 mutex_init(&instance->cmd_pend_mtx, "cmd_pend_mtx",
629 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
630
631 mutex_init(&instance->ocr_flags_mtx, "ocr_flags_mtx",
632 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
633
634 mutex_init(&instance->int_cmd_mtx, "int_cmd_mtx",
635 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
636 cv_init(&instance->int_cmd_cv, NULL, CV_DRIVER, NULL);
637
638 mutex_init(&instance->cmd_pool_mtx, "cmd_pool_mtx",
639 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
640
641 mutex_init(&instance->reg_write_mtx,"reg_write_mtx",
642 MUTEX_DRIVER,DDI_INTR_PRI(instance->intr_pri));
643
644 if (instance->tbolt) {
645 mutex_init(&instance->cmd_app_pool_mtx,
646 "cmd_app_pool_mtx", MUTEX_DRIVER,
647 DDI_INTR_PRI(instance->intr_pri));
648
649 mutex_init(&instance->chip_mtx,
650 "chip_mtx", MUTEX_DRIVER,
651 DDI_INTR_PRI(instance->intr_pri));
652
653 }
654
655 instance->unroll.mutexs = 1;
656
657 instance->timeout_id = (timeout_id_t)-1;
658
659 /* Register our soft-isr for highlevel interrupts. */
660 instance->isr_level = instance->intr_pri;
661 if (!(instance->tbolt)) {
662 if (instance->isr_level == HIGH_LEVEL_INTR) {
663 if (ddi_add_softintr(dip,
664 DDI_SOFTINT_HIGH,
665 &instance->soft_intr_id,
666 NULL, NULL, mrsas_softintr,
667 (caddr_t)instance) !=
668 DDI_SUCCESS) {
669 cmn_err(CE_WARN,
670 "Software ISR "
671 "did not register");
672
673 goto fail_attach;
674 }
675
676 instance->unroll.soft_isr = 1;
677
678 }
679 }
680
681 instance->softint_running = 0;
682
683 /* Allocate a transport structure */
684 tran = scsi_hba_tran_alloc(dip, SCSI_HBA_CANSLEEP);
685
686 if (tran == NULL) {
687 cmn_err(CE_WARN,
688 "scsi_hba_tran_alloc failed");
689 goto fail_attach;
690 }
691
716 tran->tran_unquiesce = mrsas_tran_unquiesce;
717 tran->tran_bus_config = mrsas_tran_bus_config;
718
719 if (mrsas_relaxed_ordering)
720 mrsas_generic_dma_attr.dma_attr_flags |=
721 DDI_DMA_RELAXED_ORDERING;
722
723
724 tran_dma_attr = mrsas_generic_dma_attr;
725 tran_dma_attr.dma_attr_sgllen = instance->max_num_sge;
726
727 /* Attach this instance of the hba */
728 if (scsi_hba_attach_setup(dip, &tran_dma_attr, tran, 0)
729 != DDI_SUCCESS) {
730 cmn_err(CE_WARN,
731 "scsi_hba_attach failed");
732
733 goto fail_attach;
734 }
735 instance->unroll.tranSetup = 1;
736 con_log(CL_ANN1, (CE_CONT,
737 "scsi_hba_attach_setup() done."));
738
739
740 /* create devctl node for cfgadm command */
741 if (ddi_create_minor_node(dip, "devctl",
742 S_IFCHR, INST2DEVCTL(instance_no),
743 DDI_NT_SCSI_NEXUS, 0) == DDI_FAILURE) {
744 cmn_err(CE_WARN,
745 "mr_sas: failed to create devctl node.");
746
747 goto fail_attach;
748 }
749
750 instance->unroll.devctl = 1;
751
752 /* create scsi node for cfgadm command */
753 if (ddi_create_minor_node(dip, "scsi", S_IFCHR,
754 INST2SCSI(instance_no),
755 DDI_NT_SCSI_ATTACHMENT_POINT, 0) ==
756 DDI_FAILURE) {
757 cmn_err(CE_WARN,
758 "mr_sas: failed to create scsi node.");
759
760 goto fail_attach;
761 }
762
763 instance->unroll.scsictl = 1;
764
765 (void) sprintf(instance->iocnode, "%d:lsirdctl",
766 instance_no);
767
768 /*
769 * Create a node for applications
770 * for issuing ioctl to the driver.
771 */
772 if (ddi_create_minor_node(dip, instance->iocnode,
773 S_IFCHR, INST2LSIRDCTL(instance_no),
774 DDI_PSEUDO, 0) == DDI_FAILURE) {
775 cmn_err(CE_WARN,
776 "mr_sas: failed to create ioctl node.");
777
778 goto fail_attach;
779 }
780
781 instance->unroll.ioctl = 1;
782
783 /* Create a taskq to handle dr events */
784 if ((instance->taskq = ddi_taskq_create(dip,
785 "mrsas_dr_taskq", 1,
786 TASKQ_DEFAULTPRI, 0)) == NULL) {
787 cmn_err(CE_WARN,
788 "mr_sas: failed to create taskq ");
789 instance->taskq = NULL;
790 goto fail_attach;
791 }
792 instance->unroll.taskq = 1;
793 con_log(CL_ANN1, (CE_CONT,
794 "ddi_taskq_create() done."));
795
796 /* enable interrupt */
797 instance->func_ptr->enable_intr(instance);
798
799 /* initiate AEN */
800 if (start_mfi_aen(instance)) {
801 cmn_err(CE_WARN,
802 "mr_sas: failed to initiate AEN.");
803 goto fail_attach;
804 }
805 instance->unroll.aenPend = 1;
806 con_log(CL_ANN1, (CE_CONT,
807 "AEN started for instance %d.", instance_no));
808
809 /* Finally! We are on the air. */
810 ddi_report_dev(dip);
811
812 instance->mr_ld_list =
813 kmem_zalloc(MRDRV_MAX_LD * sizeof (struct mrsas_ld),
814 KM_SLEEP);
815 if (instance->mr_ld_list == NULL) {
816 cmn_err(CE_WARN,
817 "mr_sas attach(): failed to allocate ld_list array");
818 goto fail_attach;
819 }
820 instance->unroll.ldlist_buff = 1;
821
822 #ifdef PDSUPPORT
823 if(instance->tbolt) {
824 instance->mr_tbolt_pd_max = MRSAS_TBOLT_PD_TGT_MAX;
825 instance->mr_tbolt_pd_list =
826 kmem_zalloc(MRSAS_TBOLT_GET_PD_MAX(instance)
827 * sizeof (struct mrsas_tbolt_pd), KM_SLEEP);
828 ASSERT(instance->mr_tbolt_pd_list);
829 for (i = 0; i < instance->mr_tbolt_pd_max; i++) {
830 instance->mr_tbolt_pd_list[i].lun_type =
831 MRSAS_TBOLT_PD_LUN;
832 instance->mr_tbolt_pd_list[i].dev_id =
833 (uint8_t)i;
834 }
835
836 instance->unroll.pdlist_buff = 1;
837 }
838 #endif
839 break;
840 case DDI_PM_RESUME:
841 con_log(CL_ANN, (CE_NOTE,
842 "mr_sas: DDI_PM_RESUME"));
843 break;
844 case DDI_RESUME:
845 con_log(CL_ANN, (CE_NOTE,
846 "mr_sas: DDI_RESUME"));
847 break;
848 default:
849 con_log(CL_ANN, (CE_WARN,
850 "mr_sas: invalid attach cmd=%x", cmd));
851 return (DDI_FAILURE);
852 }
853
854
855 cmn_err(CE_NOTE, "mrsas_attach() return SUCCESS instance_num %d", instance_no);
856 return (DDI_SUCCESS);
857
858 fail_attach:
859
860 mrsas_undo_resources(dip, instance);
861
862 pci_config_teardown(&instance->pci_handle);
863 ddi_soft_state_free(mrsas_state, instance_no);
864
865 con_log(CL_ANN, (CE_WARN,
866 "mr_sas: return failure from mrsas_attach"));
867
868 cmn_err(CE_WARN, "mrsas_attach() return FAILURE instance_num %d", instance_no);
869
870 return (DDI_FAILURE);
871 }
872
873 /*
874 * getinfo - gets device information
875 * @dip:
876 * @cmd:
877 * @arg:
878 * @resultp:
879 *
880 * The system calls getinfo() to obtain configuration information that only
881 * the driver knows. The mapping of minor numbers to device instance is
882 * entirely under the control of the driver. The system sometimes needs to ask
883 * the driver which device a particular dev_t represents.
884 * Given the device number return the devinfo pointer from the scsi_device
885 * structure.
886 */
887 /*ARGSUSED*/
888 static int
964 con_log(CL_ANN, (CE_NOTE,
965 "mr_sas%d: detaching device 0x%4x:0x%4x:0x%4x:0x%4x",
966 instance_no, instance->vendor_id, instance->device_id,
967 instance->subsysvid, instance->subsysid));
968
969 switch (cmd) {
970 case DDI_DETACH:
971 con_log(CL_ANN, (CE_NOTE,
972 "mrsas_detach: DDI_DETACH"));
973
974 mutex_enter(&instance->config_dev_mtx);
975 if (instance->timeout_id != (timeout_id_t)-1) {
976 mutex_exit(&instance->config_dev_mtx);
977 (void) untimeout(instance->timeout_id);
978 instance->timeout_id = (timeout_id_t)-1;
979 mutex_enter(&instance->config_dev_mtx);
980 instance->unroll.timer = 0;
981 }
982 mutex_exit(&instance->config_dev_mtx);
983
984 if(instance->unroll.tranSetup == 1) {
985 if (scsi_hba_detach(dip) != DDI_SUCCESS) {
986 cmn_err(CE_WARN,
987 "mr_sas2%d: failed to detach", instance_no);
988 return (DDI_FAILURE);
989 }
990 instance->unroll.tranSetup = 0;
991 con_log(CL_ANN1, (CE_CONT, "scsi_hba_dettach() done."));
992 }
993
994 flush_cache(instance);
995
996 mrsas_undo_resources(dip, instance);
997
998 pci_config_teardown(&instance->pci_handle);
999 ddi_soft_state_free(mrsas_state, instance_no);
1000 break;
1001
1002 case DDI_PM_SUSPEND:
1003 con_log(CL_ANN, (CE_NOTE,
1004 "mrsas_detach: DDI_PM_SUSPEND"));
1005
1006 break;
1007 case DDI_SUSPEND:
1008 con_log(CL_ANN, (CE_NOTE,
1009 "mrsas_detach: DDI_SUSPEND"));
1010
1011 break;
1012 default:
1013 con_log(CL_ANN, (CE_WARN,
1014 "invalid detach command:0x%x", cmd));
1015 return (DDI_FAILURE);
1016 }
1017
1018 return (DDI_SUCCESS);
1019 }
1020
1021
1022 static int
1023 mrsas_undo_resources (dev_info_t *dip, struct mrsas_instance *instance)
1024 {
1025 int instance_no;
1026
1027 con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1028
1029
1030 instance_no = ddi_get_instance(dip);
1031
1032
1033 if(instance->unroll.ioctl == 1) {
1034 ddi_remove_minor_node(dip, instance->iocnode);
1035 instance->unroll.ioctl = 0;
1036 }
1037
1038 if(instance->unroll.scsictl == 1) {
1039 ddi_remove_minor_node(dip, "scsi");
1040 instance->unroll.scsictl = 0;
1041 }
1042
1043 if(instance->unroll.devctl == 1) {
1044 ddi_remove_minor_node(dip, "devctl");
1045 instance->unroll.devctl = 0;
1046 }
1047
1048 if(instance->unroll.tranSetup == 1) {
1049 if (scsi_hba_detach(dip) != DDI_SUCCESS) {
1050 cmn_err(CE_WARN,
1051 "mr_sas2%d: failed to detach", instance_no);
1052 return (DDI_FAILURE);
1053 }
1054 instance->unroll.tranSetup = 0;
1055 con_log(CL_ANN1, (CE_CONT, "scsi_hba_dettach() done."));
1056 }
1057
1058 if(instance->unroll.tran == 1) {
1059 scsi_hba_tran_free(instance->tran);
1060 instance->unroll.tran = 0;
1061 con_log(CL_ANN1, (CE_CONT, "scsi_hba_tran_free() done."));
1062 }
1063
1064 if(instance->unroll.syncCmd == 1) {
1065 if(instance->tbolt) {
1066 if (abort_syncmap_cmd(instance, instance->map_update_cmd))
1067 cmn_err(CE_WARN, "mrsas_detach: "
1068 "failed to abort previous syncmap command");
1069
1070 instance->unroll.syncCmd = 0;
1071 con_log(CL_ANN1, (CE_CONT, "sync cmd aborted, done."));
1072 }
1073 }
1074
1075 if(instance->unroll.aenPend == 1) {
1076 if (abort_aen_cmd(instance, instance->aen_cmd))
1077 cmn_err(CE_WARN, "mrsas_detach: "
1078 "failed to abort prevous AEN command");
1079
1080 instance->unroll.aenPend = 0;
1081 con_log(CL_ANN1, (CE_CONT, "aen cmd aborted, done."));
1082 /*This means the controller is fully initialzed and running */
1083 // shutdown_controller();Shutdown should be a last command to controller.
1084 }
1085
1086
1087 if(instance->unroll.timer == 1) {
1088 if (instance->timeout_id != (timeout_id_t)-1) {
1089 (void) untimeout(instance->timeout_id);
1090 instance->timeout_id = (timeout_id_t)-1;
1091
1092 instance->unroll.timer = 0;
1093 }
1094 }
1095
1096 instance->func_ptr->disable_intr(instance);
1097
1098
1099 if(instance->unroll.mutexs == 1) {
1100 mutex_destroy(&instance->cmd_pool_mtx);
1101 mutex_destroy(&instance->app_cmd_pool_mtx);
1102 mutex_destroy(&instance->cmd_pend_mtx);
1103 mutex_destroy(&instance->completed_pool_mtx);
1104 mutex_destroy(&instance->sync_map_mtx);
1105 mutex_destroy(&instance->int_cmd_mtx);
1106 cv_destroy(&instance->int_cmd_cv);
1107 mutex_destroy(&instance->config_dev_mtx);
1108 mutex_destroy(&instance->ocr_flags_mtx);
1109 mutex_destroy(&instance->reg_write_mtx);
1110
1111 if (instance->tbolt) {
1112 mutex_destroy(&instance->cmd_app_pool_mtx);
1113 mutex_destroy(&instance->chip_mtx);
1114 }
1115
1116 instance->unroll.mutexs = 0;
1117 con_log(CL_ANN1, (CE_CONT, "Destroy mutex & cv, done."));
1118 }
1119
1120
1121 if (instance->unroll.soft_isr == 1) {
1122 ddi_remove_softintr(instance->soft_intr_id);
1123 instance->unroll.soft_isr = 0;
1124 }
1125
1126 if(instance->unroll.intr == 1) {
1127 mrsas_rem_intrs(instance);
1128 instance->unroll.intr = 0;
1129 }
1130
1131
1132 if(instance->unroll.taskq == 1) {
1133 if (instance->taskq) {
1134 ddi_taskq_destroy(instance->taskq);
1135 instance->unroll.taskq = 0;
1136 }
1137
1138 }
1139
1140 /*free dma memory allocated for
1141 cmds/frames/queues/driver version etc */
1142 if(instance->unroll.verBuff == 1) {
1143 mrsas_free_dma_obj(instance, instance->drv_ver_dma_obj);
1144 instance->unroll.verBuff = 0;
1145 }
1146
1147 if(instance->unroll.pdlist_buff == 1) {
1148 if (instance->mr_tbolt_pd_list != NULL)
1149 kmem_free(instance->mr_tbolt_pd_list,
1150 MRSAS_TBOLT_GET_PD_MAX(instance) * sizeof (struct mrsas_tbolt_pd));
1151
1152 instance->mr_tbolt_pd_list = NULL;
1153 instance->unroll.pdlist_buff = 0;
1154 }
1155
1156 if(instance->unroll.ldlist_buff == 1) {
1157 if (instance->mr_ld_list != NULL)
1158 kmem_free(instance->mr_ld_list, MRDRV_MAX_LD
1159 * sizeof (struct mrsas_ld));
1160
1161 instance->mr_ld_list = NULL;
1162 instance->unroll.ldlist_buff = 0;
1163 }
1164
1165 if (instance->tbolt) {
1166 if(instance->unroll.alloc_space_mpi2 == 1) {
1167 free_space_for_mpi2(instance);
1168 instance->unroll.alloc_space_mpi2 = 0;
1169 }
1170 } else {
1171 if(instance->unroll.alloc_space_mfi == 1) {
1172 free_space_for_mfi(instance);
1173 instance->unroll.alloc_space_mfi = 0;
1174 }
1175 }
1176
1177 if(instance->unroll.regs == 1) {
1178 ddi_regs_map_free(&instance->regmap_handle);
1179 instance->unroll.regs = 0;
1180 con_log(CL_ANN1, (CE_CONT, "ddi_regs_map_free() done."));
1181 }
1182
1183 return (DDI_SUCCESS);
1184 }
1185
1186
1187
1188 /*
1189 * ************************************************************************** *
1190 * *
1191 * common entry points - for character driver types *
1192 * *
1193 * ************************************************************************** *
1194 */
1195 /*
1196 * open - gets access to a device
1197 * @dev:
1198 * @openflags:
1199 * @otyp:
1200 * @credp:
1201 *
1202 * Access to a device by one or more application programs is controlled
1203 * through the open() and close() entry points. The primary function of
1283 mrsas_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp,
1284 int *rvalp)
1285 {
1286 int rval = 0;
1287
1288 struct mrsas_instance *instance;
1289 struct mrsas_ioctl *ioctl;
1290 struct mrsas_aen aen;
1291 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1292
1293 instance = ddi_get_soft_state(mrsas_state, MINOR2INST(getminor(dev)));
1294
1295 if (instance == NULL) {
1296 /* invalid minor number */
1297 con_log(CL_ANN, (CE_WARN, "mr_sas: adapter not found."));
1298 return (ENXIO);
1299 }
1300
1301 ioctl = (struct mrsas_ioctl *)kmem_zalloc(sizeof (struct mrsas_ioctl),
1302 KM_SLEEP);
1303 if (ioctl == NULL) {
1304 /* Failed to allocate memory for ioctl */
1305 con_log(CL_ANN, (CE_WARN, "mr_sas_ioctl: failed to allocate memory for ioctl"));
1306 return (ENXIO);
1307 }
1308
1309 switch ((uint_t)cmd) {
1310 case MRSAS_IOCTL_FIRMWARE:
1311 if (ddi_copyin((void *)arg, ioctl,
1312 sizeof (struct mrsas_ioctl), mode)) {
1313 con_log(CL_ANN, (CE_WARN, "mrsas_ioctl: "
1314 "ERROR IOCTL copyin"));
1315 kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1316 return (EFAULT);
1317 }
1318
1319 if (ioctl->control_code == MRSAS_DRIVER_IOCTL_COMMON) {
1320 rval = handle_drv_ioctl(instance, ioctl, mode);
1321 } else {
1322 rval = handle_mfi_ioctl(instance, ioctl, mode);
1323 }
1324
1325 if (ddi_copyout((void *)ioctl, (void *)arg,
1326 (sizeof (struct mrsas_ioctl) - 1), mode)) {
1327 con_log(CL_ANN, (CE_WARN,
1328 "mrsas_ioctl: copy_to_user failed"));
1329 rval = 1;
1330 }
1331
1332 break;
1333 case MRSAS_IOCTL_AEN:
1334 con_log(CL_ANN, (CE_NOTE,
1335 "mrsas_ioctl: IOCTL Register AEN.\n"));
1336
1337 if (ddi_copyin((void *) arg, &aen,
1338 sizeof (struct mrsas_aen), mode)) {
1339 con_log(CL_ANN, (CE_WARN,
1340 "mrsas_ioctl: ERROR AEN copyin"));
1341 kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1342 return (EFAULT);
1343 }
1344
1345 rval = handle_mfi_aen(instance, &aen);
1346
1347 if (ddi_copyout((void *) &aen, (void *)arg,
1348 sizeof (struct mrsas_aen), mode)) {
1349 con_log(CL_ANN, (CE_WARN,
1350 "mrsas_ioctl: copy_to_user failed"));
1351 rval = 1;
1352 }
1353
1354 break;
1355 default:
1356 rval = scsi_hba_ioctl(dev, cmd, arg,
1357 mode, credp, rvalp);
1358
1359 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_ioctl: "
1360 "scsi_hba_ioctl called, ret = %x.", rval));
1361 }
1362
1363 kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1364 return (rval);
1365 }
1366
1367 /*
1368 * ************************************************************************** *
1369 * *
1370 * common entry points - for block driver types *
1371 * *
1372 * ************************************************************************** *
1373 */
1374 /*
1375 * reset - TBD
1376 * @dip:
1377 * @cmd:
1378 *
1379 * TBD
1380 */
1381 /*ARGSUSED*/
1382 static int
1383 mrsas_reset(dev_info_t *dip, ddi_reset_cmd_t cmd)
1384 {
1385 int instance_no;
1386
1387 struct mrsas_instance *instance;
1388
1389 instance_no = ddi_get_instance(dip);
1390 instance = (struct mrsas_instance *)ddi_get_soft_state
1391 (mrsas_state, instance_no);
1392
1393 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1394
1395 if (!instance) {
1396 con_log(CL_ANN, (CE_WARN, "mr_sas:%d could not get adapter "
1397 "in reset", instance_no));
1398 return (DDI_FAILURE);
1399 }
1400
1401 instance->func_ptr->disable_intr(instance);
1402
1403 con_log(CL_ANN1, (CE_CONT, "flushing cache for instance %d",
1404 instance_no));
1405
1406 flush_cache(instance);
1407
1408 return (DDI_SUCCESS);
1409 }
1410
1411
1412 /*ARGSUSED*/
1413 int
1414 mrsas_quiesce(dev_info_t *dip)
1415 {
1416 int instance_no;
1417
1418 struct mrsas_instance *instance;
1419
1420 instance_no = ddi_get_instance(dip);
1421 instance = (struct mrsas_instance *)ddi_get_soft_state
1422 (mrsas_state, instance_no);
1423
1424 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1425
1426 if (!instance) {
1427 con_log(CL_ANN1, (CE_WARN, "mr_sas:%d could not get adapter "
1428 "in quiesce", instance_no));
1429 return (DDI_FAILURE);
1430 }
1431 if (instance->deadadapter || instance->adapterresetinprogress) {
1432 con_log(CL_ANN1, (CE_WARN, "mr_sas:%d adapter is not in "
1433 "healthy state", instance_no));
1440 }
1441
1442 if (instance->tbolt) {
1443 if (abort_syncmap_cmd(instance,
1444 instance->map_update_cmd)) {
1445 cmn_err(CE_WARN,
1446 "mrsas_detach: failed to abort "
1447 "previous syncmap command");
1448 return (DDI_FAILURE);
1449 }
1450 }
1451
1452 instance->func_ptr->disable_intr(instance);
1453
1454 con_log(CL_ANN1, (CE_CONT, "flushing cache for instance %d",
1455 instance_no));
1456
1457 flush_cache(instance);
1458
1459 if (wait_for_outstanding(instance)) {
1460 con_log(CL_ANN1, (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
1461 return (DDI_FAILURE);
1462 }
1463 return (DDI_SUCCESS);
1464 }
1465
1466 /*
1467 * ************************************************************************** *
1468 * *
1469 * entry points (SCSI HBA) *
1470 * *
1471 * ************************************************************************** *
1472 */
1473 /*
1474 * tran_tgt_init - initialize a target device instance
1475 * @hba_dip:
1476 * @tgt_dip:
1477 * @tran:
1478 * @sd:
1479 *
1480 * The tran_tgt_init() entry point enables the HBA to allocate and initialize
1481 * any per-target resources. tran_tgt_init() also enables the HBA to qualify
1482 * the device's address as valid and supportable for that particular HBA.
1483 * By returning DDI_FAILURE, the instance of the target driver for that device
1484 * is not probed or attached.
1487 static int
1488 mrsas_tran_tgt_init(dev_info_t *hba_dip, dev_info_t *tgt_dip,
1489 scsi_hba_tran_t *tran, struct scsi_device *sd)
1490 {
1491 struct mrsas_instance *instance;
1492 uint16_t tgt = sd->sd_address.a_target;
1493 uint8_t lun = sd->sd_address.a_lun;
1494 dev_info_t *child = NULL;
1495
1496 con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init target %d lun %d",
1497 tgt, lun));
1498
1499 instance = ADDR2MR(&sd->sd_address);
1500
1501 if (ndi_dev_is_persistent_node(tgt_dip) == 0) {
1502 /*
1503 * If no persistent node exists, we don't allow .conf node
1504 * to be created.
1505 */
1506 if ((child = mrsas_find_child(instance, tgt, lun)) != NULL) {
1507 con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init find child ="
1508 " %p t = %d l = %d", (void *)child, tgt, lun));
1509 if (ndi_merge_node(tgt_dip, mrsas_name_node) !=
1510 DDI_SUCCESS)
1511 /* Create this .conf node */
1512 return (DDI_SUCCESS);
1513 }
1514 con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init in ndi_per "
1515 "DDI_FAILURE t = %d l = %d", tgt, lun));
1516 return (DDI_FAILURE);
1517
1518 }
1519
1520 con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init dev_dip %p tgt_dip %p",
1521 (void *)instance->mr_ld_list[tgt].dip, (void *)tgt_dip));
1522
1523 if (tgt < MRDRV_MAX_LD && lun == 0) {
1524 if (instance->mr_ld_list[tgt].dip == NULL &&
1525 strcmp(ddi_driver_name(sd->sd_dev), "sd") == 0) {
1526 mutex_enter(&instance->config_dev_mtx);
1527 instance->mr_ld_list[tgt].dip = tgt_dip;
1528 instance->mr_ld_list[tgt].lun_type = MRSAS_LD_LUN;
1529 instance->mr_ld_list[tgt].flag = MRDRV_TGT_VALID;
1530 mutex_exit(&instance->config_dev_mtx);
1531 }
1532 }
1533
1534 #ifdef PDSUPPORT
1535 else if(instance->tbolt) {
1536 if (instance->mr_tbolt_pd_list[tgt].dip == NULL) {
1537 mutex_enter(&instance->config_dev_mtx);
1538 instance->mr_tbolt_pd_list[tgt].dip = tgt_dip;
1539 instance->mr_tbolt_pd_list[tgt].flag =
1540 MRDRV_TGT_VALID;
1541 mutex_exit(&instance->config_dev_mtx);
1542 con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_tgt_init:"
1543 "t%xl%x", tgt, lun));
1544 }
1545 }
1546 #endif
1547
1548 return (DDI_SUCCESS);
1549 }
1550
1551 /*ARGSUSED*/
1552 static void
1553 mrsas_tran_tgt_free(dev_info_t *hba_dip, dev_info_t *tgt_dip,
1554 scsi_hba_tran_t *hba_tran, struct scsi_device *sd)
1555 {
1556 struct mrsas_instance *instance;
1557 int tgt = sd->sd_address.a_target;
1558 int lun = sd->sd_address.a_lun;
1559
1560 instance = ADDR2MR(&sd->sd_address);
1561
1562 con_log(CL_DLEVEL2, (CE_NOTE, "tgt_free t = %d l = %d", tgt, lun));
1563
1564 if (tgt < MRDRV_MAX_LD && lun == 0) {
1565 if (instance->mr_ld_list[tgt].dip == tgt_dip) {
1566 mutex_enter(&instance->config_dev_mtx);
1567 instance->mr_ld_list[tgt].dip = NULL;
1568 mutex_exit(&instance->config_dev_mtx);
1569 }
1570 }
1571
1572 #ifdef PDSUPPORT
1573 else if(instance->tbolt) {
1574 mutex_enter(&instance->config_dev_mtx);
1575 instance->mr_tbolt_pd_list[tgt].dip = NULL;
1576 mutex_exit(&instance->config_dev_mtx);
1577 con_log(CL_ANN1, (CE_NOTE, "tgt_free: Setting dip = NULL"
1578 "for tgt:%x", tgt));
1579 }
1580 #endif
1581
1582 }
1583
1584 dev_info_t *
1585 mrsas_find_child(struct mrsas_instance *instance, uint16_t tgt, uint8_t lun)
1586 {
1587 dev_info_t *child = NULL;
1588 char addr[SCSI_MAXNAMELEN];
1589 char tmp[MAXNAMELEN];
1590
1591 (void) sprintf(addr, "%x,%x", tgt, lun);
1592 for (child = ddi_get_child(instance->dip); child;
1593 child = ddi_get_next_sibling(child)) {
1786 * NULL and appropriate reason provided in pkt_reason field
1787 */
1788 if (cmd_done) {
1789 pkt->pkt_reason = CMD_CMPLT;
1790 pkt->pkt_scbp[0] = STATUS_GOOD;
1791 pkt->pkt_state |= STATE_GOT_BUS | STATE_GOT_TARGET
1792 | STATE_SENT_CMD;
1793 if (((pkt->pkt_flags & FLAG_NOINTR) == 0) && pkt->pkt_comp) {
1794 (*pkt->pkt_comp)(pkt);
1795 }
1796
1797 return (TRAN_ACCEPT);
1798 }
1799
1800 if (cmd == NULL) {
1801 return (TRAN_BUSY);
1802 }
1803
1804 if ((pkt->pkt_flags & FLAG_NOINTR) == 0) {
1805 if (instance->fw_outstanding > instance->max_fw_cmds) {
1806 cmn_err(CE_WARN, "mr_sas:Firmware BUSY, fw_outstanding(0x%X) > max_fw_cmds(0x%X)",
1807 instance->fw_outstanding, instance->max_fw_cmds );
1808 return_mfi_pkt(instance, cmd);
1809 return (TRAN_BUSY);
1810 }
1811
1812 /* Synchronize the Cmd frame for the controller */
1813 (void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle, 0, 0,
1814 DDI_DMA_SYNC_FORDEV);
1815 con_log(CL_ANN, (CE_CONT, "issue_cmd_ppc: SCSI CDB[0]=0x%x"
1816 "cmd->index:%x\n", pkt->pkt_cdbp[0], cmd->index));
1817 instance->func_ptr->issue_cmd(cmd, instance);
1818
1819 } else {
1820 struct mrsas_header *hdr = &cmd->frame->hdr;
1821
1822
1823 instance->func_ptr-> issue_cmd_in_poll_mode(instance, cmd);
1824
1825 pkt->pkt_reason = CMD_CMPLT;
1826 pkt->pkt_statistics = 0;
1827 pkt->pkt_state |= STATE_XFERRED_DATA | STATE_GOT_STATUS;
1828
1829 switch (ddi_get8(cmd->frame_dma_obj.acc_handle,
1830 &hdr->cmd_status)) {
1831 case MFI_STAT_OK:
1832 pkt->pkt_scbp[0] = STATUS_GOOD;
1833 break;
1834
1835 case MFI_STAT_SCSI_DONE_WITH_ERROR:
1836 con_log(CL_ANN, (CE_CONT,
1837 "mrsas_tran_start: scsi done with error"));
1838 pkt->pkt_reason = CMD_CMPLT;
1839 pkt->pkt_statistics = 0;
1840
1841 ((struct scsi_status *)pkt->pkt_scbp)->sts_chk = 1;
1842 break;
1843
1844 case MFI_STAT_DEVICE_NOT_FOUND:
1845 con_log(CL_ANN, (CE_CONT,
1846 "mrsas_tran_start: device not found error"));
1847 pkt->pkt_reason = CMD_DEV_GONE;
1848 pkt->pkt_statistics = STAT_DISCON;
1849 break;
1850
1851 default:
1852 ((struct scsi_status *)pkt->pkt_scbp)->sts_busy = 1;
1853 }
1854
1855 return_mfi_pkt(instance, cmd);
1856
1857 if (pkt->pkt_comp) {
1858 (*pkt->pkt_comp)(pkt);
1859 }
1860
1861 }
1862
1863 return (TRAN_ACCEPT);
1864 }
1865
1866 /*
1867 * tran_abort - Abort any commands that are currently in transport
1868 * @ap:
1869 * @pkt:
1870 *
1871 * The tran_abort() entry point for a SCSI HBA driver is called to abort any
1872 * commands that are currently in transport for a particular target. This entry
1873 * point is called when a target driver calls scsi_abort(). The tran_abort()
1874 * entry point should attempt to abort the command denoted by the pkt
1890 /*
1891 * tran_reset - reset either the SCSI bus or target
1892 * @ap:
1893 * @level:
1894 *
1895 * The tran_reset() entry point for a SCSI HBA driver is called to reset either
1896 * the SCSI bus or a particular SCSI target device. This entry point is called
1897 * when a target driver calls scsi_reset(). The tran_reset() entry point must
1898 * reset the SCSI bus if level is RESET_ALL. If level is RESET_TARGET, just the
1899 * particular target or logical unit must be reset.
1900 */
1901 /*ARGSUSED*/
1902 static int
1903 mrsas_tran_reset(struct scsi_address *ap, int level)
1904 {
1905 struct mrsas_instance *instance = ADDR2MR(ap);
1906
1907 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1908
1909 if (wait_for_outstanding(instance)) {
1910 con_log(CL_ANN1, (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
1911 return (DDI_FAILURE);
1912 } else {
1913 return (DDI_SUCCESS);
1914 }
1915 }
1916
1917 /*
1918 * tran_bus_reset - reset the SCSI bus
1919 * @dip:
1920 * @level:
1921 *
1922 * The tran_bus_reset() vector in the scsi_hba_tran structure should be
1923 * initialized during the HBA driver's attach(). The vector should point to
1924 * an HBA entry point that is to be called when a user initiates a bus reset.
1925 * Implementation is hardware specific. If the HBA driver cannot reset the
1926 * SCSI bus without affecting the targets, the driver should fail RESET_BUS
1927 * or not initialize this vector.
1928 */
1929 /*ARGSUSED*/
1930 static int
1931 mrsas_tran_bus_reset(dev_info_t *dip, int level)
1932 {
1933 int instance_no = ddi_get_instance(dip);
1934
1935 struct mrsas_instance *instance = ddi_get_soft_state(mrsas_state,
1936 instance_no);
1937
1938 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1939
1940 if (wait_for_outstanding(instance)) {
1941 con_log(CL_ANN1, (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
1942 return (DDI_FAILURE);
1943 } else {
1944 return (DDI_SUCCESS);
1945 }
1946 }
1947
1948 /*
1949 * tran_getcap - get one of a set of SCSA-defined capabilities
1950 * @ap:
1951 * @cap:
1952 * @whom:
1953 *
1954 * The target driver can request the current setting of the capability for a
1955 * particular target by setting the whom parameter to nonzero. A whom value of
1956 * zero indicates a request for the current setting of the general capability
1957 * for the SCSI bus or for adapter hardware. The tran_getcap() should return -1
1958 * for undefined capabilities or the current value of the requested capability.
1959 */
1960 /*ARGSUSED*/
1961 static int
1962 mrsas_tran_getcap(struct scsi_address *ap, char *cap, int whom)
1963 {
1964 int rval = 0;
1965
1966 struct mrsas_instance *instance = ADDR2MR(ap);
2203
2204 return (1);
2205 }
2206
2207
2208 /*
2209 * mrsas_isr(caddr_t)
2210 *
2211 * The Interrupt Service Routine
2212 *
2213 * Collect status for all completed commands and do callback
2214 *
2215 */
2216 static uint_t
2217 mrsas_isr(struct mrsas_instance *instance)
2218 {
2219 int need_softintr;
2220 uint32_t producer;
2221 uint32_t consumer;
2222 uint32_t context;
2223 uint32_t status, value;
2224 int retval;
2225
2226 struct mrsas_cmd *cmd;
2227 struct mrsas_header *hdr;
2228 struct scsi_pkt *pkt;
2229
2230 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2231 ASSERT(instance);
2232 if (instance->tbolt) {
2233 mutex_enter(&instance->chip_mtx);
2234 if ((instance->intr_type == DDI_INTR_TYPE_FIXED) &&
2235 !(instance->func_ptr->intr_ack(instance))) {
2236 mutex_exit(&instance->chip_mtx);
2237 return (DDI_INTR_UNCLAIMED);
2238 }
2239 retval = mr_sas_tbolt_process_outstanding_cmd(instance);
2240 mutex_exit(&instance->chip_mtx);
2241 return (retval);
2242 } else {
2243 if ((instance->intr_type == DDI_INTR_TYPE_FIXED) &&
2244 !instance->func_ptr->intr_ack(instance)) {
2245 return (DDI_INTR_UNCLAIMED);
2246 }
2247 }
2248
2249 (void) ddi_dma_sync(instance->mfi_internal_dma_obj.dma_handle,
2250 0, 0, DDI_DMA_SYNC_FORCPU);
2251
2252 #ifdef OCRDEBUG
2253 if (debug_consecutive_timeout_after_ocr_g == 1) {
2254 con_log(CL_ANN1, (CE_NOTE,
2255 "simulating consecutive timeout after ocr"));
2256 return (DDI_INTR_CLAIMED);
2257 }
2258 #endif
2259
2260 mutex_enter(&instance->completed_pool_mtx);
2261 mutex_enter(&instance->cmd_pend_mtx);
2262
2263 producer = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
2264 instance->producer);
2265 consumer = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
2266 instance->consumer);
2267
2268 con_log(CL_ANN, (CE_CONT, " producer %x consumer %x ",
2269 producer, consumer));
2270 if (producer == consumer) {
2271 con_log(CL_ANN, (CE_WARN, "producer == consumer case"));
2272 mutex_exit(&instance->cmd_pend_mtx);
2273 mutex_exit(&instance->completed_pool_mtx);
2274 return (DDI_INTR_CLAIMED);
2275 }
2276
2277 while (consumer != producer) {
2278 context = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
2279 &instance->reply_queue[consumer]);
2280 cmd = instance->cmd_list[context];
2281
2282 if (cmd->sync_cmd == MRSAS_TRUE) {
2283 hdr = (struct mrsas_header *)&cmd->frame->hdr;
2284 if (hdr) {
2285 mlist_del_init(&cmd->list);
2286 }
2287 } else {
2288 pkt = cmd->pkt;
2289 if (pkt) {
2290 mlist_del_init(&cmd->list);
2291 }
2335 * *
2336 * ************************************************************************** *
2337 */
2338 /*
2339 * get_mfi_pkt : Get a command from the free pool
2340 * After successful allocation, the caller of this routine
2341 * must clear the frame buffer (memset to zero) before
2342 * using the packet further.
2343 *
2344 * ***** Note *****
2345 * After clearing the frame buffer the context id of the
2346 * frame buffer SHOULD be restored back.
2347 */
2348 static struct mrsas_cmd *
2349 get_mfi_pkt(struct mrsas_instance *instance)
2350 {
2351 mlist_t *head = &instance->cmd_pool_list;
2352 struct mrsas_cmd *cmd = NULL;
2353
2354 mutex_enter(&instance->cmd_pool_mtx);
2355 ASSERT(mutex_owned(&instance->cmd_pool_mtx));
2356
2357 if (!mlist_empty(head)) {
2358 cmd = mlist_entry(head->next, struct mrsas_cmd, list);
2359 mlist_del_init(head->next);
2360 }
2361 if (cmd != NULL) {
2362 cmd->pkt = NULL;
2363 cmd->retry_count_for_ocr = 0;
2364 cmd->drv_pkt_time = 0;
2365
2366 }
2367 mutex_exit(&instance->cmd_pool_mtx);
2368
2369 return (cmd);
2370 }
2371
2372 static struct mrsas_cmd *
2373 get_mfi_app_pkt(struct mrsas_instance *instance)
2374 {
2375 mlist_t *head = &instance->app_cmd_pool_list;
2376 struct mrsas_cmd *cmd = NULL;
2377
2378 mutex_enter(&instance->app_cmd_pool_mtx);
2379 ASSERT(mutex_owned(&instance->app_cmd_pool_mtx));
2380
2381 if (!mlist_empty(head)) {
2382 cmd = mlist_entry(head->next, struct mrsas_cmd, list);
2383 mlist_del_init(head->next);
2384 }
2385 if (cmd != NULL){
2386 cmd->pkt = NULL;
2387 cmd->retry_count_for_ocr = 0;
2388 cmd->drv_pkt_time = 0;
2389 }
2390
2391 mutex_exit(&instance->app_cmd_pool_mtx);
2392
2393 return (cmd);
2394 }
2395 /*
2396 * return_mfi_pkt : Return a cmd to free command pool
2397 */
2398 static void
2399 return_mfi_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
2400 {
2401 mutex_enter(&instance->cmd_pool_mtx);
2402 ASSERT(mutex_owned(&instance->cmd_pool_mtx));
2403
2404 mlist_add_tail(&cmd->list, &instance->cmd_pool_list);
2405
2406 mutex_exit(&instance->cmd_pool_mtx);
2407 }
2408
2409 static void
2410 return_mfi_app_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
2411 {
2412 mutex_enter(&instance->app_cmd_pool_mtx);
2413 ASSERT(mutex_owned(&instance->app_cmd_pool_mtx));
2414
2415 mlist_add(&cmd->list, &instance->app_cmd_pool_list);
2416
2417 mutex_exit(&instance->app_cmd_pool_mtx);
2418 }
2419 void
2420 push_pending_mfi_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
2421 {
2422 struct scsi_pkt *pkt;
2423 struct mrsas_header *hdr;
2424 con_log(CL_DLEVEL2, (CE_NOTE, "push_pending_pkt(): Called\n"));
2425 mutex_enter(&instance->cmd_pend_mtx);
2426 ASSERT(mutex_owned(&instance->cmd_pend_mtx));
2427 mlist_del_init(&cmd->list);
2428 mlist_add_tail(&cmd->list, &instance->cmd_pend_list);
2429 if (cmd->sync_cmd == MRSAS_TRUE) {
2430 hdr = (struct mrsas_header *)&cmd->frame->hdr;
2431 if (hdr) {
2432 con_log(CL_ANN1, (CE_CONT,
2433 "push_pending_mfi_pkt: "
2434 "cmd %p index %x "
2435 "time %llx",
2436 (void *)cmd, cmd->index,
2437 gethrtime()));
2438 /* Wait for specified interval */
2439 cmd->drv_pkt_time = ddi_get16(
2440 cmd->frame_dma_obj.acc_handle, &hdr->timeout);
2441 if (cmd->drv_pkt_time < debug_timeout_g)
2442 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
2443 con_log(CL_ANN1, (CE_CONT,
2444 "push_pending_pkt(): "
2445 "Called IO Timeout Value %x\n",
2446 cmd->drv_pkt_time));
2465 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
2466 }
2467 }
2468
2469 mutex_exit(&instance->cmd_pend_mtx);
2470
2471 }
2472
2473 int
2474 mrsas_print_pending_cmds(struct mrsas_instance *instance)
2475 {
2476 mlist_t *head = &instance->cmd_pend_list;
2477 mlist_t *tmp = head;
2478 struct mrsas_cmd *cmd = NULL;
2479 struct mrsas_header *hdr;
2480 unsigned int flag = 1;
2481 struct scsi_pkt *pkt;
2482 int saved_level;
2483 int cmd_count = 0;
2484
2485
2486 saved_level = debug_level_g;
2487 debug_level_g = CL_ANN1;
2488
2489 cmn_err(CE_NOTE, "mrsas_print_pending_cmds(): Called\n");
2490
2491 while (flag) {
2492 mutex_enter(&instance->cmd_pend_mtx);
2493 tmp = tmp->next;
2494 if (tmp == head) {
2495 mutex_exit(&instance->cmd_pend_mtx);
2496 flag = 0;
2497 con_log(CL_ANN1, (CE_CONT, "mrsas_print_pending_cmds(): NO MORE CMDS PENDING....\n"));
2498 break;
2499 } else {
2500 cmd = mlist_entry(tmp, struct mrsas_cmd, list);
2501 mutex_exit(&instance->cmd_pend_mtx);
2502 if (cmd) {
2503 if (cmd->sync_cmd == MRSAS_TRUE) {
2504 hdr = (struct mrsas_header *)&cmd->frame->hdr;
2505 if (hdr) {
2506 con_log(CL_ANN1, (CE_CONT,
2507 "print: cmd %p index 0x%x drv_pkt_time 0x%x (NO-PKT) hdr %p\n",
2508 (void *)cmd, cmd->index, cmd->drv_pkt_time, (void *)hdr));
2509 }
2510 } else {
2511 pkt = cmd->pkt;
2512 if (pkt) {
2513 con_log(CL_ANN1, (CE_CONT,
2514 "print: cmd %p index 0x%x drv_pkt_time 0x%x pkt %p \n",
2515 (void *)cmd, cmd->index, cmd->drv_pkt_time, (void *)pkt));
2516 }
2517 }
2518
2519 if (++cmd_count == 1)
2520 mrsas_print_cmd_details(instance, cmd, 0xDD);
2521 else
2522 mrsas_print_cmd_details(instance, cmd, 1);
2523
2524 }
2525 }
2526 }
2527 con_log(CL_ANN1, (CE_CONT, "mrsas_print_pending_cmds(): Done\n"));
2528
2529
2530 debug_level_g = saved_level;
2531
2532 return (DDI_SUCCESS);
2533 }
2534
2535
2536 int
2537 mrsas_complete_pending_cmds(struct mrsas_instance *instance)
2538 {
2539
2540 struct mrsas_cmd *cmd = NULL;
2541 struct scsi_pkt *pkt;
2542 struct mrsas_header *hdr;
2581 complete_cmd_in_sync_mode(instance, cmd);
2582 }
2583 }
2584 mlist_del_init(&cmd->list);
2585 } else {
2586 con_log(CL_ANN1, (CE_CONT,
2587 "mrsas_complete_pending_cmds:"
2588 "NULL command\n"));
2589 }
2590 con_log(CL_ANN1, (CE_CONT,
2591 "mrsas_complete_pending_cmds:"
2592 "looping for more commands\n"));
2593 }
2594 mutex_exit(&instance->cmd_pend_mtx);
2595
2596 con_log(CL_ANN1, (CE_CONT, "mrsas_complete_pending_cmds(): DONE\n"));
2597 return (DDI_SUCCESS);
2598 }
2599
2600 void
2601 mrsas_print_cmd_details(struct mrsas_instance *instance,
2602 struct mrsas_cmd *cmd, int detail )
2603 {
2604 struct scsi_pkt *pkt = cmd->pkt;
2605 Mpi2RaidSCSIIORequest_t *scsi_io = cmd->scsi_io_request;
2606 MPI2_SCSI_IO_VENDOR_UNIQUE *raidContext;
2607 uint8_t *cdb_p;
2608 char str[100], *strp;
2609 int i, j, len;
2610 int saved_level;
2611
2612
2613 if (detail == 0xDD) {
2614 saved_level = debug_level_g;
2615 debug_level_g = CL_ANN1;
2616 }
2617
2618
2619 if (instance->tbolt) {
2620 con_log(CL_ANN1, (CE_CONT, "print_cmd_details: cmd %p cmd->index 0x%x SMID 0x%x timer 0x%x sec\n",
2621 (void *)cmd, cmd->index, cmd->SMID, cmd->drv_pkt_time));
2622 }
2623 else {
2624 con_log(CL_ANN1, (CE_CONT, "print_cmd_details: cmd %p cmd->index 0x%x timer 0x%x sec\n",
2625 (void *)cmd, cmd->index, cmd->drv_pkt_time));
2626 }
2627
2628 if(pkt) {
2629 con_log(CL_ANN1, (CE_CONT, "scsi_pkt CDB[0]=0x%x",
2630 pkt->pkt_cdbp[0]));
2631 }else {
2632 con_log(CL_ANN1, (CE_CONT, "NO-PKT"));
2633 }
2634
2635 if((detail==0xDD) && instance->tbolt) {
2636 con_log(CL_ANN1, (CE_CONT, "RAID_SCSI_IO_REQUEST\n"));
2637 con_log(CL_ANN1, (CE_CONT, "DevHandle=0x%X Function=0x%X IoFlags=0x%X SGLFlags=0x%X DataLength=0x%X\n",
2638 ddi_get16(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->DevHandle),
2639 ddi_get8(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->Function),
2640 ddi_get16(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->IoFlags),
2641 ddi_get16(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->SGLFlags),
2642 ddi_get32(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->DataLength) ));
2643
2644 for(i=0; i < 32; i++)
2645 con_log(CL_ANN1, (CE_CONT, "CDB[%d]=0x%x ",i,
2646 ddi_get8(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->CDB.CDB32[i]) ));
2647
2648 con_log(CL_ANN1, (CE_CONT, "RAID-CONTEXT\n"));
2649 con_log(CL_ANN1, (CE_CONT, "status=0x%X extStatus=0x%X ldTargetId=0x%X timeoutValue=0x%X"
2650 "regLockFlags=0x%X RAIDFlags=0x%X regLockRowLBA=0x%lX regLockLength=0x%X spanArm=0x%X\n",
2651 ddi_get8(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.status),
2652 ddi_get8(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.extStatus),
2653 ddi_get16(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.ldTargetId),
2654 ddi_get16(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.timeoutValue),
2655 ddi_get8(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.regLockFlags),
2656 ddi_get8(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.RAIDFlags),
2657 ddi_get64(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.regLockRowLBA),
2658 ddi_get32(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.regLockLength),
2659 ddi_get8(instance->mpi2_frame_pool_dma_obj.acc_handle, &scsi_io->RaidContext.spanArm) ));
2660
2661
2662 }
2663
2664 if (detail == 0xDD) {
2665 debug_level_g = saved_level;
2666 }
2667
2668 return;
2669 }
2670
2671
2672 int
2673 mrsas_issue_pending_cmds(struct mrsas_instance *instance)
2674 {
2675 mlist_t *head = &instance->cmd_pend_list;
2676 mlist_t *tmp = head->next;
2677 struct mrsas_cmd *cmd = NULL;
2678 struct scsi_pkt *pkt;
2679
2680 con_log(CL_ANN1, (CE_NOTE, "mrsas_issue_pending_cmds(): Called"));
2681 while (tmp != head) {
2682 mutex_enter(&instance->cmd_pend_mtx);
2683 cmd = mlist_entry(tmp, struct mrsas_cmd, list);
2684 tmp = tmp->next;
2685 mutex_exit(&instance->cmd_pend_mtx);
2686 if (cmd) {
2687 con_log(CL_ANN1, (CE_CONT,
2688 "mrsas_issue_pending_cmds(): "
2689 "Got a cmd: cmd %p index 0x%x drv_pkt_time 0x%x ",
2690 (void *)cmd, cmd->index, cmd->drv_pkt_time));
2691
2692 if (cmd->drv_pkt_time < debug_timeout_g)
2693 cmd->drv_pkt_time = (uint16_t)debug_timeout_g; /* Reset command timeout value */
2694
2695 cmd->retry_count_for_ocr++;
2696
2697 cmn_err(CE_CONT, "cmd retry count = %d\n",
2698 cmd->retry_count_for_ocr);
2699
2700 if (cmd->retry_count_for_ocr > IO_RETRY_COUNT) {
2701 cmn_err(CE_WARN,
2702 "mrsas_issue_pending_cmds(): cmd->retry_count exceeded limit >%d\n",
2703 IO_RETRY_COUNT);
2704 mrsas_print_cmd_details(instance, cmd, 0xDD);
2705
2706 cmn_err(CE_WARN,
2707 "mrsas_issue_pending_cmds():"
2708 "Calling KILL Adapter\n");
2709 if (instance->tbolt)
2710 (void) mrsas_tbolt_kill_adapter(instance);
2711 else
2712 (void) mrsas_kill_adapter(instance);
2713 return (DDI_FAILURE);
2714 }
2715
2716 pkt = cmd->pkt;
2717 if (pkt) {
2718 con_log(CL_ANN1, (CE_CONT,
2719 "PENDING PKT-CMD ISSUE: cmd %p index %x "
2720 "pkt %p time %llx",
2721 (void *)cmd, cmd->index,
2722 (void *)pkt,
2723 gethrtime()));
2724
2725 } else {
2726 cmn_err(CE_CONT,
2727 "mrsas_issue_pending_cmds(): "
2728 "NO-PKT, cmd %p index 0x%x drv_pkt_time 0x%x ",
2729 (void *)cmd, cmd->index, cmd->drv_pkt_time);
2730 }
2731
2732
2733 if (cmd->sync_cmd == MRSAS_TRUE) {
2734 cmn_err(CE_CONT, "mrsas_issue_pending_cmds(): SYNC_CMD == TRUE \n");
2735
2736 instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd);
2737 } else {
2738 instance->func_ptr->issue_cmd(cmd, instance);
2739 }
2740 } else {
2741 con_log(CL_ANN1, (CE_CONT,
2742 "mrsas_issue_pending_cmds: NULL command\n"));
2743 }
2744 con_log(CL_ANN1, (CE_CONT,
2745 "mrsas_issue_pending_cmds:"
2746 "looping for more commands"));
2747 }
2748 con_log(CL_ANN1, (CE_CONT, "mrsas_issue_pending_cmds(): DONE\n"));
2749 return (DDI_SUCCESS);
2750 }
2751
2752
2753
2754 /*
2755 * destroy_mfi_frame_pool
2756 */
2956
2957 void
2958 mrsas_free_cmd_pool(struct mrsas_instance *instance)
2959 {
2960 int i;
2961 uint32_t max_cmd;
2962 size_t sz;
2963
2964 /* already freed */
2965 if (instance->cmd_list == NULL) {
2966 return;
2967 }
2968
2969 max_cmd = instance->max_fw_cmds;
2970
2971 /* size of cmd_list array */
2972 sz = sizeof (struct mrsas_cmd *) * max_cmd;
2973
2974 /* First free each cmd */
2975 for (i = 0; i < max_cmd; i++) {
2976 if (instance->cmd_list[i] != NULL)
2977 kmem_free(instance->cmd_list[i],sizeof (struct mrsas_cmd));
2978
2979 instance->cmd_list[i] = NULL;
2980 }
2981
2982 /* Now, free cmd_list array */
2983 if (instance->cmd_list != NULL)
2984 kmem_free(instance->cmd_list,sz);
2985
2986 instance->cmd_list = NULL;
2987
2988 INIT_LIST_HEAD(&instance->cmd_pool_list);
2989 INIT_LIST_HEAD(&instance->cmd_pend_list);
2990 if (instance->tbolt) {
2991 INIT_LIST_HEAD(&instance->cmd_app_pool_list);
2992 }
2993 else {
2994 INIT_LIST_HEAD(&instance->app_cmd_pool_list);
2995 }
2996
2997 }
2998
2999
3000 /*
3001 * mrsas_alloc_cmd_pool
3002 */
3003 int
3004 mrsas_alloc_cmd_pool(struct mrsas_instance *instance)
3005 {
3006 int i;
3007 int count;
3008 uint32_t max_cmd;
3009 uint32_t reserve_cmd;
3010 size_t sz;
3011
3012 struct mrsas_cmd *cmd;
3013
3014 max_cmd = instance->max_fw_cmds;
3015 con_log(CL_ANN1, (CE_NOTE, "mrsas_alloc_cmd_pool: "
3016 "max_cmd %x", max_cmd));
3017
3018
3019 sz = sizeof (struct mrsas_cmd *) * max_cmd;
3020
3021 /*
3022 * instance->cmd_list is an array of struct mrsas_cmd pointers.
3023 * Allocate the dynamic array first and then allocate individual
3024 * commands.
3025 */
3026 instance->cmd_list = kmem_zalloc(sz, KM_SLEEP);
3027 if (instance->cmd_list == NULL) {
3028 con_log(CL_NONE, (CE_WARN,
3029 "Failed to allocate memory for cmd_list"));
3030 return (DDI_FAILURE);
3031 }
3032
3033 /* create a frame pool and assign one frame to each cmd */
3034 for (count = 0; count < max_cmd; count++) {
3035 instance->cmd_list[count] = kmem_zalloc(sizeof (struct mrsas_cmd),
3036 KM_SLEEP);
3037 if (instance->cmd_list[count] == NULL) {
3038 con_log(CL_NONE, (CE_WARN,
3039 "Failed to allocate memory for mrsas_cmd"));
3040 goto mrsas_undo_cmds;
3041 }
3042 }
3043
3044 /* add all the commands to command pool */
3045
3046 INIT_LIST_HEAD(&instance->cmd_pool_list);
3047 INIT_LIST_HEAD(&instance->cmd_pend_list);
3048 INIT_LIST_HEAD(&instance->app_cmd_pool_list);
3049
3050 reserve_cmd = MRSAS_APP_RESERVED_CMDS;
3051
3052 for (i = 0; i < reserve_cmd; i++) {
3053 cmd = instance->cmd_list[i];
3054 cmd->index = i;
3055 mlist_add_tail(&cmd->list, &instance->app_cmd_pool_list);
3056 }
3057
3058
3059 for (i = reserve_cmd; i < max_cmd; i++) {
3060 cmd = instance->cmd_list[i];
3061 cmd->index = i;
3062 mlist_add_tail(&cmd->list, &instance->cmd_pool_list);
3063 }
3064
3065 return (DDI_SUCCESS);
3066
3067 mrsas_undo_cmds:
3068 if (count > 0) {
3069 /* free each cmd */
3070 for (i = 0; i < count; i++) {
3071 if (instance->cmd_list[i] != NULL)
3072 kmem_free(instance->cmd_list[i],sizeof (struct mrsas_cmd));
3073 instance->cmd_list[i] = NULL;
3074 }
3075 }
3076
3077 mrsas_undo_cmd_list:
3078 if (instance->cmd_list != NULL)
3079 kmem_free(instance->cmd_list,sz);
3080 instance->cmd_list = NULL;
3081
3082 return (DDI_FAILURE);
3083 }
3084
3085
3086 /*
3087 * free_space_for_mfi
3088 */
3089 static void
3090 free_space_for_mfi(struct mrsas_instance *instance)
3091 {
3092
3093 /* already freed */
3094 if (instance->cmd_list == NULL) {
3095 return;
3096 }
3097
3098 /* Free additional dma buffer */
3099 free_additional_dma_buffer(instance);
3100
3101 /* Free the MFI frame pool */
3102 destroy_mfi_frame_pool(instance);
3103
3104 /* Free all the commands in the cmd_list */
3105 /* Free the cmd_list buffer itself */
3106 mrsas_free_cmd_pool(instance);
3107 }
3108
3109 /*
3110 * alloc_space_for_mfi
3111 */
3112 static int
3113 alloc_space_for_mfi(struct mrsas_instance *instance)
3114 {
3115 /* Allocate command pool ( memory for cmd_list & individual commands )*/
3116 if (mrsas_alloc_cmd_pool(instance)) {
3117 cmn_err(CE_WARN, "error creating cmd pool");
3118 return (DDI_FAILURE);
3119 }
3120
3121 /* Allocate MFI Frame pool */
3122 if (create_mfi_frame_pool(instance)) {
3123 cmn_err(CE_WARN, "error creating frame DMA pool");
3124 goto mfi_undo_cmd_pool;
3125 }
3126
3127 /* Allocate additional DMA buffer */
3128 if (alloc_additional_dma_buffer(instance)) {
3129 cmn_err(CE_WARN, "error creating frame DMA pool");
3130 goto mfi_undo_frame_pool;
3131 }
3132
3133 return (DDI_SUCCESS);
3134
3135 mfi_undo_frame_pool:
3139 mrsas_free_cmd_pool(instance);
3140
3141 return (DDI_FAILURE);
3142 }
3143
3144
3145
3146 /*
3147 * get_ctrl_info
3148 */
3149 static int
3150 get_ctrl_info(struct mrsas_instance *instance,
3151 struct mrsas_ctrl_info *ctrl_info)
3152 {
3153 int ret = 0;
3154
3155 struct mrsas_cmd *cmd;
3156 struct mrsas_dcmd_frame *dcmd;
3157 struct mrsas_ctrl_info *ci;
3158
3159 if(instance->tbolt) {
3160 cmd = get_raid_msg_mfi_pkt(instance);
3161 }
3162 else {
3163 cmd = get_mfi_pkt(instance);
3164 }
3165
3166 if (!cmd) {
3167 cmn_err(CE_WARN,
3168 "Failed to get a cmd from free-pool in get_ctrl_info(). fw_outstanding=0x%X max_fw_cmds=0x%X",
3169 instance->fw_outstanding, instance->max_fw_cmds);
3170 return (DDI_FAILURE);
3171 }
3172
3173 /* Clear the frame buffer and assign back the context id */
3174 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3175 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3176 cmd->index);
3177
3178 dcmd = &cmd->frame->dcmd;
3179
3180 ci = (struct mrsas_ctrl_info *)instance->internal_buf;
3181
3182 if (!ci) {
3183 cmn_err(CE_WARN,
3184 "Failed to alloc mem for ctrl info");
3185 return_mfi_pkt(instance, cmd);
3186 return (DDI_FAILURE);
3187 }
3188
3189 (void) memset(ci, 0, sizeof (struct mrsas_ctrl_info));
3205 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].phys_addr,
3206 instance->internal_buf_dmac_add);
3207 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].length,
3208 sizeof (struct mrsas_ctrl_info));
3209
3210 cmd->frame_count = 1;
3211
3212 if (instance->tbolt) {
3213 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
3214 }
3215
3216 if (!instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3217 ret = 0;
3218
3219 ctrl_info->max_request_size = ddi_get32(
3220 cmd->frame_dma_obj.acc_handle, &ci->max_request_size);
3221
3222 ctrl_info->ld_present_count = ddi_get16(
3223 cmd->frame_dma_obj.acc_handle, &ci->ld_present_count);
3224
3225 ctrl_info->properties.on_off_properties =
3226 ddi_get32(cmd->frame_dma_obj.acc_handle,
3227 &ci->properties.on_off_properties);
3228 ddi_rep_get8(cmd->frame_dma_obj.acc_handle,
3229 (uint8_t *)(ctrl_info->product_name),
3230 (uint8_t *)(ci->product_name), 80 * sizeof (char),
3231 DDI_DEV_AUTOINCR);
3232 /* should get more members of ci with ddi_get when needed */
3233 } else {
3234 cmn_err(CE_WARN, "get_ctrl_info: Ctrl info failed");
3235 ret = -1;
3236 }
3237
3238 if(instance->tbolt) {
3239 return_raid_msg_mfi_pkt(instance, cmd);
3240 }
3241 else {
3242 return_mfi_pkt(instance, cmd);
3243 }
3244
3245 return (ret);
3246 }
3247
3248 /*
3249 * abort_aen_cmd
3250 */
3251 static int
3252 abort_aen_cmd(struct mrsas_instance *instance,
3253 struct mrsas_cmd *cmd_to_abort)
3254 {
3255 int ret = 0;
3256
3257 struct mrsas_cmd *cmd;
3258 struct mrsas_abort_frame *abort_fr;
3259
3260 con_log(CL_ANN1, (CE_NOTE, "chkpnt: abort_aen:%d", __LINE__));
3261
3262 if (instance->tbolt) {
3263 cmd = get_raid_msg_mfi_pkt(instance);
3264 } else {
3265 cmd = get_mfi_pkt(instance);
3266 }
3267
3268 if (!cmd) {
3269 cmn_err(CE_WARN,
3270 "Failed to get a cmd from free-pool in abort_aen_cmd(). fw_outstanding=0x%X max_fw_cmds=0x%X",
3271 instance->fw_outstanding, instance->max_fw_cmds);
3272 return (DDI_FAILURE);
3273 }
3274 /* Clear the frame buffer and assign back the context id */
3275 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3276 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3277 cmd->index);
3278
3279 abort_fr = &cmd->frame->abort;
3280
3281 /* prepare and issue the abort frame */
3282 ddi_put8(cmd->frame_dma_obj.acc_handle,
3283 &abort_fr->cmd, MFI_CMD_OP_ABORT);
3284 ddi_put8(cmd->frame_dma_obj.acc_handle, &abort_fr->cmd_status,
3285 MFI_CMD_STATUS_SYNC_MODE);
3286 ddi_put16(cmd->frame_dma_obj.acc_handle, &abort_fr->flags, 0);
3287 ddi_put32(cmd->frame_dma_obj.acc_handle, &abort_fr->abort_context,
3288 cmd_to_abort->index);
3289 ddi_put32(cmd->frame_dma_obj.acc_handle,
3290 &abort_fr->abort_mfi_phys_addr_lo, cmd_to_abort->frame_phys_addr);
3291 ddi_put32(cmd->frame_dma_obj.acc_handle,
3292 &abort_fr->abort_mfi_phys_addr_hi, 0);
3293
3306 } else {
3307 ret = 0;
3308 }
3309
3310 instance->aen_cmd->abort_aen = 1;
3311 instance->aen_cmd = 0;
3312
3313 if (instance->tbolt) {
3314 return_raid_msg_mfi_pkt(instance, cmd);
3315 } else {
3316 return_mfi_pkt(instance, cmd);
3317 }
3318
3319 atomic_add_16(&instance->fw_outstanding, (-1));
3320
3321 return (ret);
3322 }
3323
3324
3325 static int
3326 mrsas_build_init_cmd(struct mrsas_instance *instance, struct mrsas_cmd **cmd_ptr)
3327 {
3328 struct mrsas_cmd *cmd;
3329 struct mrsas_init_frame *init_frame;
3330 struct mrsas_init_queue_info *initq_info;
3331 struct mrsas_drv_ver drv_ver_info;
3332
3333
3334 /*
3335 * Prepare a init frame. Note the init frame points to queue info
3336 * structure. Each frame has SGL allocated after first 64 bytes. For
3337 * this frame - since we don't need any SGL - we use SGL's space as
3338 * queue info structure
3339 */
3340 cmd = *cmd_ptr;
3341
3342
3343 /* Clear the frame buffer and assign back the context id */
3344 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3345 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3346 cmd->index);
3370 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 4);
3371
3372 ddi_put32(cmd->frame_dma_obj.acc_handle,
3373 &initq_info->reply_queue_start_phys_addr_hi, 0);
3374 ddi_put32(cmd->frame_dma_obj.acc_handle,
3375 &initq_info->reply_queue_start_phys_addr_lo,
3376 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 8);
3377
3378 ddi_put8(cmd->frame_dma_obj.acc_handle,
3379 &init_frame->cmd, MFI_CMD_OP_INIT);
3380 ddi_put8(cmd->frame_dma_obj.acc_handle, &init_frame->cmd_status,
3381 MFI_CMD_STATUS_POLL_MODE);
3382 ddi_put16(cmd->frame_dma_obj.acc_handle, &init_frame->flags, 0);
3383 ddi_put32(cmd->frame_dma_obj.acc_handle,
3384 &init_frame->queue_info_new_phys_addr_lo,
3385 cmd->frame_phys_addr + 64);
3386 ddi_put32(cmd->frame_dma_obj.acc_handle,
3387 &init_frame->queue_info_new_phys_addr_hi, 0);
3388
3389
3390 /* fill driver version information*/
3391 fill_up_drv_ver(&drv_ver_info);
3392
3393 /* allocate the driver version data transfer buffer */
3394 instance->drv_ver_dma_obj.size = sizeof(drv_ver_info.drv_ver);
3395 instance->drv_ver_dma_obj.dma_attr = mrsas_generic_dma_attr;
3396 instance->drv_ver_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
3397 instance->drv_ver_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
3398 instance->drv_ver_dma_obj.dma_attr.dma_attr_sgllen = 1;
3399 instance->drv_ver_dma_obj.dma_attr.dma_attr_align = 1;
3400
3401 if (mrsas_alloc_dma_obj(instance, &instance->drv_ver_dma_obj,
3402 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
3403 con_log(CL_ANN, (CE_WARN,
3404 "init_mfi : Could not allocate driver version buffer."));
3405 return (DDI_FAILURE);
3406 }
3407 /* copy driver version to dma buffer*/
3408 (void) memset(instance->drv_ver_dma_obj.buffer, 0,sizeof(drv_ver_info.drv_ver));
3409 ddi_rep_put8(cmd->frame_dma_obj.acc_handle,
3410 (uint8_t *)drv_ver_info.drv_ver,
3411 (uint8_t *)instance->drv_ver_dma_obj.buffer,
3412 sizeof(drv_ver_info.drv_ver), DDI_DEV_AUTOINCR);
3413
3414
3415 /*copy driver version physical address to init frame*/
3416 ddi_put64(cmd->frame_dma_obj.acc_handle,
3417 &init_frame->driverversion, instance->drv_ver_dma_obj.dma_cookie[0].dmac_address);
3418
3419 ddi_put32(cmd->frame_dma_obj.acc_handle, &init_frame->data_xfer_len,
3420 sizeof (struct mrsas_init_queue_info));
3421
3422 cmd->frame_count = 1;
3423
3424 *cmd_ptr = cmd;
3425
3426 return (DDI_SUCCESS);
3427 }
3428
3429
3430 /*
3431 * mrsas_init_adapter_ppc - Initialize MFI interface adapter.
3432 */
3433 int
3434 mrsas_init_adapter_ppc (struct mrsas_instance *instance)
3435 {
3436 struct mrsas_cmd *cmd;
3437
3438 /* allocate memory for mfi adapter(cmd pool, individual commands, mfi frames etc */
3439 if (alloc_space_for_mfi(instance) != DDI_SUCCESS){
3440 con_log(CL_ANN, (CE_NOTE,
3441 "Error, failed to allocate memory for MFI adapter"));
3442 return (DDI_FAILURE);
3443 }
3444
3445 /* Build INIT command */
3446 cmd = get_mfi_pkt(instance);
3447
3448 if (mrsas_build_init_cmd(instance, &cmd) != DDI_SUCCESS){
3449 con_log(CL_ANN, (CE_NOTE,
3450 "Error, failed to build INIT command"));
3451
3452 goto fail_undo_alloc_mfi_space;
3453 }
3454
3455 //Disalbe interrupt before sending init frame ( see linux driver code)
3456 /* send INIT MFI frame in polled mode */
3457 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3458 con_log(CL_ANN, (CE_WARN, "failed to init firmware"));
3459 goto fail_fw_init;
3460 }
3461
3462 if (instance->func_ptr->read_fw_status_reg(instance) & 0x04000000) {
3463 con_log(CL_ANN, (CE_NOTE, "mr_sas: IEEE SGL's supported"));
3464 instance->flag_ieee = 1;
3465 }
3466
3467 instance->unroll.alloc_space_mfi = 1;
3468 instance->unroll.verBuff = 1;
3469
3470 return (DDI_SUCCESS);
3471
3472
3473 fail_fw_init:
3474 mrsas_free_dma_obj(instance, instance->drv_ver_dma_obj);
3475
3476 fail_undo_alloc_mfi_space:
3477 return_mfi_pkt(instance, cmd);
3478 free_space_for_mfi(instance);
3479
3480 return (DDI_FAILURE);
3481
3482 }
3483
3484 /*
3485 * mrsas_init_adapter - Initialize adapter.
3486 */
3487 int
3488 mrsas_init_adapter (struct mrsas_instance *instance)
3489 {
3490 struct mrsas_ctrl_info ctrl_info;
3491
3492
3493 /* we expect the FW state to be READY */
3494 if (mfi_state_transition_to_ready(instance)) {
3495 con_log(CL_ANN, (CE_WARN, "mr_sas: F/W is not ready"));
3496 return (DDI_FAILURE);
3497 }
3498
3499 /* get various operational parameters from status register */
3500 instance->max_num_sge =
3501 (instance->func_ptr->read_fw_status_reg(instance) &
3502 0xFF0000) >> 0x10;
3503 instance->max_num_sge =
3504 (instance->max_num_sge > MRSAS_MAX_SGE_CNT) ?
3505 MRSAS_MAX_SGE_CNT : instance->max_num_sge;
3506
3507 /*
3508 * Reduce the max supported cmds by 1. This is to ensure that the
3509 * reply_q_sz (1 more than the max cmd that driver may send)
3510 * does not exceed max cmds that the FW can support
3511 */
3512 instance->max_fw_cmds =
3513 instance->func_ptr->read_fw_status_reg(instance) & 0xFFFF;
3514 instance->max_fw_cmds = instance->max_fw_cmds - 1;
3515
3516
3517
3518 /* Initialize adapter */
3519 if (instance->func_ptr->init_adapter(instance) != DDI_SUCCESS) {
3520 con_log(CL_ANN, (CE_WARN, "mr_sas: "
3521 "could not initialize adapter"));
3522 return (DDI_FAILURE);
3523 }
3524
3525 /* gather misc FW related information */
3526 instance->disable_online_ctrl_reset = 0;
3527
3528 if (!get_ctrl_info(instance, &ctrl_info)) {
3529 instance->max_sectors_per_req = ctrl_info.max_request_size;
3530 con_log(CL_ANN1, (CE_NOTE,
3531 "product name %s ld present %d",
3532 ctrl_info.product_name, ctrl_info.ld_present_count));
3533 } else {
3534 instance->max_sectors_per_req = instance->max_num_sge *
3535 PAGESIZE / 512;
3536 }
3537
3538 if (ctrl_info.properties.on_off_properties & DISABLE_OCR_PROP_FLAG) {
3539 instance->disable_online_ctrl_reset = 1;
3540 con_log(CL_ANN1, (CE_NOTE,
3541 "Disable online control Flag is set\n"));
3542 }
3543 else {
3544 con_log(CL_ANN1, (CE_NOTE,
3545 "Disable online control Flag is not set\n"));
3546 }
3547
3548 return (DDI_SUCCESS);
3549
3550 }
3551
3552
3553
3554 static int
3555 mrsas_issue_init_mfi(struct mrsas_instance *instance)
3556 {
3557 struct mrsas_cmd *cmd;
3558 struct mrsas_init_frame *init_frame;
3559 struct mrsas_init_queue_info *initq_info;
3560
3561 /*
3562 * Prepare a init frame. Note the init frame points to queue info
3563 * structure. Each frame has SGL allocated after first 64 bytes. For
3564 * this frame - since we don't need any SGL - we use SGL's space as
3565 * queue info structure
3566 */
3615 ddi_put32(cmd->frame_dma_obj.acc_handle,
3616 &init_frame->queue_info_new_phys_addr_lo,
3617 cmd->frame_phys_addr + 64);
3618 ddi_put32(cmd->frame_dma_obj.acc_handle,
3619 &init_frame->queue_info_new_phys_addr_hi, 0);
3620
3621 ddi_put32(cmd->frame_dma_obj.acc_handle, &init_frame->data_xfer_len,
3622 sizeof (struct mrsas_init_queue_info));
3623
3624 cmd->frame_count = 1;
3625
3626 /* issue the init frame in polled mode */
3627 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3628 con_log(CL_ANN1, (CE_WARN,
3629 "mrsas_issue_init_mfi():failed to "
3630 "init firmware"));
3631 return_mfi_app_pkt(instance, cmd);
3632 return (DDI_FAILURE);
3633 }
3634
3635 return_mfi_app_pkt(instance, cmd);
3636 con_log(CL_ANN1, (CE_CONT, "mrsas_issue_init_mfi: Done"));
3637
3638 return (DDI_SUCCESS);
3639 }
3640 /*
3641 * mfi_state_transition_to_ready : Move the FW to READY state
3642 *
3643 * @reg_set : MFI register set
3644 */
3645 int
3646 mfi_state_transition_to_ready(struct mrsas_instance *instance)
3647 {
3648 int i;
3649 uint8_t max_wait;
3650 uint32_t fw_ctrl = 0;
3651 uint32_t fw_state;
3652 uint32_t cur_state;
3653 uint32_t cur_abs_reg_val;
3654 uint32_t prev_abs_reg_val;
3712 case MFI_STATE_OPERATIONAL:
3713 /* bring it to READY state; assuming max wait 2 secs */
3714 instance->func_ptr->disable_intr(instance);
3715 con_log(CL_ANN1, (CE_NOTE,
3716 "mr_sas: FW in OPERATIONAL state"));
3717 /*
3718 * PCI_Hot Plug: MFI F/W requires
3719 * (MFI_INIT_READY | MFI_INIT_MFIMODE | MFI_INIT_ABORT)
3720 * to be set
3721 */
3722 /* WR_IB_DOORBELL(MFI_INIT_READY, instance); */
3723 if (!instance->tbolt) {
3724 WR_IB_DOORBELL(MFI_RESET_FLAGS, instance);
3725 } else {
3726 WR_RESERVED0_REGISTER(MFI_RESET_FLAGS,
3727 instance);
3728
3729 for (i = 0; i < (10 * 1000); i++) {
3730 status =
3731 RD_RESERVED0_REGISTER(instance);
3732 if (status & 1)
3733 delay(1 *
3734 drv_usectohz(MILLISEC));
3735 else
3736 break;
3737 }
3738
3739 }
3740 max_wait = (instance->tbolt == 1) ? 180 : 10;
3741 cur_state = MFI_STATE_OPERATIONAL;
3742 break;
3743 case MFI_STATE_UNDEFINED:
3744 /* this state should not last for more than 2 seconds */
3745 con_log(CL_ANN1, (CE_NOTE, "FW state undefined"));
3746
3747 max_wait = (instance->tbolt == 1) ? 180 : 2;
3748 cur_state = MFI_STATE_UNDEFINED;
3749 break;
3750 case MFI_STATE_BB_INIT:
3751 max_wait = (instance->tbolt == 1) ? 180 : 2;
3752 cur_state = MFI_STATE_BB_INIT;
3753 break;
3754 case MFI_STATE_FW_INIT:
3755 max_wait = (instance->tbolt == 1) ? 180 : 2;
3756 cur_state = MFI_STATE_FW_INIT;
3757 break;
3790 }
3791 }
3792 if (fw_state == MFI_STATE_DEVICE_SCAN) {
3793 if (prev_abs_reg_val != cur_abs_reg_val) {
3794 continue;
3795 }
3796 }
3797
3798 /* return error if fw_state hasn't changed after max_wait */
3799 if (fw_state == cur_state) {
3800 con_log(CL_ANN1, (CE_WARN,
3801 "FW state hasn't changed in %d secs", max_wait));
3802 return (ENODEV);
3803 }
3804 };
3805
3806 if (!instance->tbolt) {
3807 fw_ctrl = RD_IB_DOORBELL(instance);
3808 con_log(CL_ANN1, (CE_CONT,
3809 "mfi_state_transition_to_ready:FW ctrl = 0x%x", fw_ctrl));
3810 }
3811
3812 #if 0
3813 /*
3814 * Write 0xF to the doorbell register to do the following.
3815 * - Abort all outstanding commands (bit 0).
3816 * - Transition from OPERATIONAL to READY state (bit 1).
3817 * - Discard (possible) low MFA posted in 64-bit mode (bit-2).
3818 * - Set to release FW to continue running (i.e. BIOS handshake
3819 * (bit 3).
3820 */
3821 if (!instance->tbolt) {
3822 WR_IB_DOORBELL(0xF, instance);
3823 }
3824 #endif
3825
3826 return (DDI_SUCCESS);
3827 }
3828
3829 /*
3830 * get_seq_num
3831 */
3832 static int
3833 get_seq_num(struct mrsas_instance *instance,
3834 struct mrsas_evt_log_info *eli)
3835 {
3836 int ret = DDI_SUCCESS;
3837
3838 dma_obj_t dcmd_dma_obj;
3839 struct mrsas_cmd *cmd;
3840 struct mrsas_dcmd_frame *dcmd;
3841 struct mrsas_evt_log_info *eli_tmp;
3842 if (instance->tbolt) {
3843 cmd = get_raid_msg_mfi_pkt(instance);
3844 } else {
3845 cmd = get_mfi_pkt(instance);
3846 }
3847
3848 if (!cmd) {
3849 cmn_err(CE_WARN,
3850 "Failed to get a cmd from free-pool in get_seq_num(). fw_outstanding=0x%X max_fw_cmds=0x%X",
3851 instance->fw_outstanding, instance->max_fw_cmds);
3852 return (ENOMEM);
3853 }
3854
3855 /* Clear the frame buffer and assign back the context id */
3856 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3857 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3858 cmd->index);
3859
3860 dcmd = &cmd->frame->dcmd;
3861
3862 /* allocate the data transfer buffer */
3863 dcmd_dma_obj.size = sizeof (struct mrsas_evt_log_info);
3864 dcmd_dma_obj.dma_attr = mrsas_generic_dma_attr;
3865 dcmd_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
3866 dcmd_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
3867 dcmd_dma_obj.dma_attr.dma_attr_sgllen = 1;
3868 dcmd_dma_obj.dma_attr.dma_attr_align = 1;
3869
3870 if (mrsas_alloc_dma_obj(instance, &dcmd_dma_obj,
3871 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
3951 ret = register_mfi_aen(instance, eli.newest_seq_num + 1,
3952 class_locale.word);
3953
3954 if (ret) {
3955 cmn_err(CE_WARN, "start_mfi_aen: aen registration failed");
3956 return (-1);
3957 }
3958
3959
3960 return (ret);
3961 }
3962
3963 /*
3964 * flush_cache
3965 */
3966 static void
3967 flush_cache(struct mrsas_instance *instance)
3968 {
3969 struct mrsas_cmd *cmd = NULL;
3970 struct mrsas_dcmd_frame *dcmd;
3971 uint32_t max_cmd = instance->max_fw_cmds;
3972 if (instance->tbolt) {
3973 cmd = get_raid_msg_mfi_pkt(instance);
3974 } else {
3975 cmd = get_mfi_pkt(instance);
3976 }
3977
3978 if (!cmd) {
3979 cmn_err(CE_WARN,
3980 "Failed to get a cmd from free-pool in flush_cache(). fw_outstanding=0x%X max_fw_cmds=0x%X",
3981 instance->fw_outstanding, instance->max_fw_cmds);
3982 return;
3983 }
3984
3985 /* Clear the frame buffer and assign back the context id */
3986 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3987 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3988 cmd->index);
3989
3990 dcmd = &cmd->frame->dcmd;
3991
3992 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
3993
3994 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
3995 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0x0);
3996 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 0);
3997 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
3998 MFI_FRAME_DIR_NONE);
3999 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
4000 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len, 0);
4001 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
4015 }
4016 con_log(CL_ANN1, (CE_CONT, "flush_cache done"));
4017 if (instance->tbolt) {
4018 return_raid_msg_mfi_pkt(instance, cmd);
4019 } else {
4020 return_mfi_pkt(instance, cmd);
4021 }
4022
4023 }
4024
4025 /*
4026 * service_mfi_aen- Completes an AEN command
4027 * @instance: Adapter soft state
4028 * @cmd: Command to be completed
4029 *
4030 */
4031 void
4032 service_mfi_aen(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
4033 {
4034 uint32_t seq_num;
4035 uint32_t i;
4036 struct mrsas_evt_detail *evt_detail =
4037 (struct mrsas_evt_detail *)instance->mfi_evt_detail_obj.buffer;
4038 int rval = 0;
4039 int tgt = 0;
4040 uint8_t dtype;
4041 #ifdef PDSUPPORT
4042 mrsas_pd_address_t *pd_addr;
4043 #endif
4044 ddi_acc_handle_t acc_handle;
4045
4046 con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
4047
4048 acc_handle = cmd->frame_dma_obj.acc_handle;
4049 cmd->cmd_status = ddi_get8(acc_handle, &cmd->frame->io.cmd_status);
4050 if (cmd->cmd_status == ENODATA) {
4051 cmd->cmd_status = 0;
4052 }
4053
4054 /*
4055 * log the MFI AEN event to the sysevent queue so that
4061 con_log(CL_ANN, (CE_WARN,
4062 "mr_sas%d: Failed to log AEN event", instance_no));
4063 }
4064 /*
4065 * Check for any ld devices that has changed state. i.e. online
4066 * or offline.
4067 */
4068 con_log(CL_ANN1, (CE_CONT,
4069 "AEN: code = %x class = %x locale = %x args = %x",
4070 ddi_get32(acc_handle, &evt_detail->code),
4071 evt_detail->cl.members.class,
4072 ddi_get16(acc_handle, &evt_detail->cl.members.locale),
4073 ddi_get8(acc_handle, &evt_detail->arg_type)));
4074
4075 switch (ddi_get32(acc_handle, &evt_detail->code)) {
4076 case MR_EVT_CFG_CLEARED: {
4077 for (tgt = 0; tgt < MRDRV_MAX_LD; tgt++) {
4078 if (instance->mr_ld_list[tgt].dip != NULL) {
4079 mutex_enter(&instance->config_dev_mtx);
4080 instance->mr_ld_list[tgt].flag =
4081 ~MRDRV_TGT_VALID;
4082 mutex_exit(&instance->config_dev_mtx);
4083 rval = mrsas_service_evt(instance, tgt, 0,
4084 MRSAS_EVT_UNCONFIG_TGT, NULL);
4085 con_log(CL_ANN1, (CE_WARN,
4086 "mr_sas: CFG CLEARED AEN rval = %d "
4087 "tgt id = %d", rval, tgt));
4088 }
4089 }
4090 break;
4091 }
4092
4093 case MR_EVT_LD_DELETED: {
4094 tgt = ddi_get16(acc_handle, &evt_detail->args.ld.target_id);
4095 mutex_enter(&instance->config_dev_mtx);
4096 instance->mr_ld_list[tgt].flag = ~MRDRV_TGT_VALID;
4097 mutex_exit(&instance->config_dev_mtx);
4098 rval = mrsas_service_evt(instance,
4099 ddi_get16(acc_handle, &evt_detail->args.ld.target_id), 0,
4100 MRSAS_EVT_UNCONFIG_TGT, NULL);
4101 con_log(CL_ANN1, (CE_WARN, "mr_sas: LD DELETED AEN rval = %d "
4102 "tgt id = %d index = %d", rval,
4103 ddi_get16(acc_handle, &evt_detail->args.ld.target_id),
4104 ddi_get8(acc_handle, &evt_detail->args.ld.ld_index)));
4105 break;
4106 } /* End of MR_EVT_LD_DELETED */
4107
4108 case MR_EVT_LD_CREATED: {
4109 rval = mrsas_service_evt(instance,
4110 ddi_get16(acc_handle, &evt_detail->args.ld.target_id), 0,
4111 MRSAS_EVT_CONFIG_TGT, NULL);
4112 con_log(CL_ANN1, (CE_WARN, "mr_sas: LD CREATED AEN rval = %d "
4113 "tgt id = %d index = %d", rval,
4114 ddi_get16(acc_handle, &evt_detail->args.ld.target_id),
4115 ddi_get8(acc_handle, &evt_detail->args.ld.ld_index)));
4116 break;
4117 } /* End of MR_EVT_LD_CREATED */
4118
4119 #ifdef PDSUPPORT
4120 case MR_EVT_PD_REMOVED_EXT: {
4121 if (instance->tbolt) {
4122 pd_addr = &evt_detail->args.pd_addr;
4123 dtype = pd_addr->scsi_dev_type;
4124 con_log(CL_DLEVEL1, (CE_NOTE,
4125 " MR_EVT_PD_REMOVED_EXT: dtype = %x,"
4126 " arg_type = %d ", dtype, evt_detail->arg_type));
4127 tgt = ddi_get16(acc_handle, &evt_detail->args.pd.device_id);
4128 mutex_enter(&instance->config_dev_mtx);
4129 instance->mr_tbolt_pd_list[tgt].flag = (uint8_t)~MRDRV_TGT_VALID;
4130 mutex_exit(&instance->config_dev_mtx);
4131 rval = mrsas_service_evt(instance,
4132 ddi_get16(acc_handle, &evt_detail->args.pd.device_id),
4133 1, MRSAS_EVT_UNCONFIG_TGT, NULL);
4134 con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_REMOVED:"
4135 "rval = %d tgt id = %d ", rval,
4136 ddi_get16(acc_handle, &evt_detail->args.pd.device_id)));
4137 break;
4138 }
4139 }/* End of MR_EVT_PD_REMOVED_EXT */
4140
4141 case MR_EVT_PD_INSERTED_EXT: {
4142 if (instance->tbolt) {
4143 rval = mrsas_service_evt(instance,
4144 ddi_get16(acc_handle, &evt_detail->args.pd.device_id),
4145 1, MRSAS_EVT_CONFIG_TGT, NULL);
4146 con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_INSERTEDi_EXT:"
4147 "rval = %d tgt id = %d ", rval,
4148 ddi_get16(acc_handle, &evt_detail->args.pd.device_id)));
4149 break;
4150 }
4151 }/* End of MR_EVT_PD_INSERTED_EXT */
4152
4153 case MR_EVT_PD_STATE_CHANGE: {
4154 if (instance->tbolt) {
4155 tgt = ddi_get16(acc_handle, &evt_detail->args.pd.device_id);
4156 if ((evt_detail->args.pd_state.prevState == PD_SYSTEM) &&
4157 (evt_detail->args.pd_state.newState != PD_SYSTEM)) {
4158 mutex_enter(&instance->config_dev_mtx);
4159 instance->mr_tbolt_pd_list[tgt].flag =
4160 (uint8_t)~MRDRV_TGT_VALID;
4161 mutex_exit(&instance->config_dev_mtx);
4162 rval = mrsas_service_evt(instance,
4163 ddi_get16(acc_handle,
4164 &evt_detail->args.pd.device_id),
4165 1, MRSAS_EVT_UNCONFIG_TGT, NULL);
4166 con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_REMOVED:"
4167 "rval = %d tgt id = %d ", rval,
4168 ddi_get16(acc_handle,
4169 &evt_detail->args.pd.device_id)));
4170 break;
4171 }
4172 if ((evt_detail->args.pd_state.prevState
4173 == UNCONFIGURED_GOOD) &&
4174 (evt_detail->args.pd_state.newState == PD_SYSTEM)) {
4175 rval = mrsas_service_evt(instance,
4176 ddi_get16(acc_handle,
4177 &evt_detail->args.pd.device_id),
4178 1, MRSAS_EVT_CONFIG_TGT, NULL);
4179 con_log(CL_ANN1, (CE_WARN,
4180 "mr_sas: PD_INSERTED: rval = %d "
4181 " tgt id = %d ", rval,
4182 ddi_get16(acc_handle,
4183 &evt_detail->args.pd.device_id)));
4184 break;
4185 }
4186 }
4187 }
4188 #endif
4189
4190 } /* End of Main Switch */
4191
4192 /* get copy of seq_num and class/locale for re-registration */
4193 seq_num = ddi_get32(acc_handle, &evt_detail->seq_num);
4194 seq_num++;
4195 (void) memset(instance->mfi_evt_detail_obj.buffer, 0,
4196 sizeof (struct mrsas_evt_detail));
4197
4198 ddi_put8(acc_handle, &cmd->frame->dcmd.cmd_status, 0x0);
4199 ddi_put32(acc_handle, &cmd->frame->dcmd.mbox.w[0], seq_num);
4200
4201 instance->aen_seq_num = seq_num;
4202
4203 cmd->frame_count = 1;
4204
4205 cmd->retry_count_for_ocr = 0;
4206 cmd->drv_pkt_time = 0;
4246 */
4247
4248 static uint32_t
4249 mrsas_initiate_ocr_if_fw_is_faulty(struct mrsas_instance *instance)
4250 {
4251 uint32_t cur_abs_reg_val;
4252 uint32_t fw_state;
4253
4254 cur_abs_reg_val = instance->func_ptr->read_fw_status_reg(instance);
4255 fw_state = cur_abs_reg_val & MFI_STATE_MASK;
4256 if (fw_state == MFI_STATE_FAULT) {
4257 if (instance->disable_online_ctrl_reset == 1) {
4258 cmn_err(CE_WARN,
4259 "mrsas_initiate_ocr_if_fw_is_faulty: "
4260 "FW in Fault state, detected in ISR: "
4261 "FW doesn't support ocr ");
4262
4263 return (ADAPTER_RESET_NOT_REQUIRED);
4264 } else {
4265 con_log(CL_ANN, (CE_NOTE,
4266 "mrsas_initiate_ocr_if_fw_is_faulty: "
4267 "FW in Fault state, detected in ISR: FW supports ocr "));
4268
4269 return (ADAPTER_RESET_REQUIRED);
4270 }
4271 }
4272
4273 return (ADAPTER_RESET_NOT_REQUIRED);
4274 }
4275
4276 /*
4277 * mrsas_softintr - The Software ISR
4278 * @param arg : HBA soft state
4279 *
4280 * called from high-level interrupt if hi-level interrupt are not there,
4281 * otherwise triggered as a soft interrupt
4282 */
4283 static uint_t
4284 mrsas_softintr(struct mrsas_instance *instance)
4285 {
4286 struct scsi_pkt *pkt;
4287 struct scsa_cmd *acmd;
4301 mutex_exit(&instance->completed_pool_mtx);
4302 return (DDI_INTR_CLAIMED);
4303 }
4304
4305 instance->softint_running = 1;
4306
4307 INIT_LIST_HEAD(&process_list);
4308 mlist_splice(&instance->completed_pool_list, &process_list);
4309 INIT_LIST_HEAD(&instance->completed_pool_list);
4310
4311 mutex_exit(&instance->completed_pool_mtx);
4312
4313 /* perform all callbacks first, before releasing the SCBs */
4314 mlist_for_each_safe(pos, next, &process_list) {
4315 cmd = mlist_entry(pos, struct mrsas_cmd, list);
4316
4317 /* syncronize the Cmd frame for the controller */
4318 (void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle,
4319 0, 0, DDI_DMA_SYNC_FORCPU);
4320
4321 hdr = &cmd->frame->hdr;
4322
4323 /* remove the internal command from the process list */
4324 mlist_del_init(&cmd->list);
4325
4326 switch (ddi_get8(cmd->frame_dma_obj.acc_handle, &hdr->cmd)) {
4327 case MFI_CMD_OP_PD_SCSI:
4328 case MFI_CMD_OP_LD_SCSI:
4329 case MFI_CMD_OP_LD_READ:
4330 case MFI_CMD_OP_LD_WRITE:
4331 /*
4332 * MFI_CMD_OP_PD_SCSI and MFI_CMD_OP_LD_SCSI
4333 * could have been issued either through an
4334 * IO path or an IOCTL path. If it was via IOCTL,
4335 * we will send it to internal completion.
4336 */
4337 if (cmd->sync_cmd == MRSAS_TRUE) {
4338 complete_cmd_in_sync_mode(instance, cmd);
4339 break;
4340 }
4345
4346 if (acmd->cmd_flags & CFLAG_DMAVALID) {
4347 if (acmd->cmd_flags & CFLAG_CONSISTENT) {
4348 (void) ddi_dma_sync(acmd->cmd_dmahandle,
4349 acmd->cmd_dma_offset,
4350 acmd->cmd_dma_len,
4351 DDI_DMA_SYNC_FORCPU);
4352 }
4353 }
4354
4355 pkt->pkt_reason = CMD_CMPLT;
4356 pkt->pkt_statistics = 0;
4357 pkt->pkt_state = STATE_GOT_BUS
4358 | STATE_GOT_TARGET | STATE_SENT_CMD
4359 | STATE_XFERRED_DATA | STATE_GOT_STATUS;
4360
4361 con_log(CL_ANN, (CE_CONT,
4362 "CDB[0] = %x completed for %s: size %lx context %x",
4363 pkt->pkt_cdbp[0], ((acmd->islogical) ? "LD" : "PD"),
4364 acmd->cmd_dmacount, hdr->context));
4365
4366 if (pkt->pkt_cdbp[0] == SCMD_INQUIRY) {
4367 struct scsi_inquiry *inq;
4368
4369 if (acmd->cmd_dmacount != 0) {
4370 bp_mapin(acmd->cmd_buf);
4371 inq = (struct scsi_inquiry *)
4372 acmd->cmd_buf->b_un.b_addr;
4373
4374 /* don't expose physical drives to OS */
4375 if (acmd->islogical &&
4376 (hdr->cmd_status == MFI_STAT_OK)) {
4377 display_scsi_inquiry(
4378 (caddr_t)inq);
4379 } else if ((hdr->cmd_status ==
4380 MFI_STAT_OK) && inq->inq_dtype ==
4381 DTYPE_DIRECT) {
4382
4383 display_scsi_inquiry(
4384 (caddr_t)inq);
4385
4386 /* for physical disk */
4387 hdr->cmd_status =
4388 MFI_STAT_DEVICE_NOT_FOUND;
4389 }
4390 }
4391 }
4392
4393 switch (hdr->cmd_status) {
4394 case MFI_STAT_OK:
4395 pkt->pkt_scbp[0] = STATUS_GOOD;
4396 break;
4397 case MFI_STAT_LD_CC_IN_PROGRESS:
4398 case MFI_STAT_LD_RECON_IN_PROGRESS:
4399 pkt->pkt_scbp[0] = STATUS_GOOD;
4400 break;
4401 case MFI_STAT_LD_INIT_IN_PROGRESS:
4402 con_log(CL_ANN, (CE_WARN, "Initialization in Progress"));
4403 pkt->pkt_reason = CMD_TRAN_ERR;
4404
4405 break;
4406 case MFI_STAT_SCSI_DONE_WITH_ERROR:
4407 con_log(CL_ANN, (CE_CONT, "scsi_done error"));
4408
4409 pkt->pkt_reason = CMD_CMPLT;
4410 ((struct scsi_status *)
4411 pkt->pkt_scbp)->sts_chk = 1;
4412
4413 if (pkt->pkt_cdbp[0] == SCMD_TEST_UNIT_READY) {
4414
4415 con_log(CL_ANN, (CE_WARN, "TEST_UNIT_READY fail"));
4416
4417 } else {
4418 pkt->pkt_state |= STATE_ARQ_DONE;
4419 arqstat = (void *)(pkt->pkt_scbp);
4420 arqstat->sts_rqpkt_reason = CMD_CMPLT;
4421 arqstat->sts_rqpkt_resid = 0;
4422 arqstat->sts_rqpkt_state |=
4423 STATE_GOT_BUS | STATE_GOT_TARGET
4424 | STATE_SENT_CMD
4425 | STATE_XFERRED_DATA;
4426 *(uint8_t *)&arqstat->sts_rqpkt_status =
4427 STATUS_GOOD;
4428 ddi_rep_get8(
4429 cmd->frame_dma_obj.acc_handle,
4430 (uint8_t *)
4431 &(arqstat->sts_sensedata),
4432 cmd->sense,
4433 sizeof (struct scsi_extended_sense),
4434 DDI_DEV_AUTOINCR);
4435 }
4436 break;
4463 CLASS_EXTENDED_SENSE;
4464
4465 /*
4466 * LOGICAL BLOCK ADDRESS OUT OF RANGE:
4467 * ASC: 0x21h; ASCQ: 0x00h;
4468 */
4469 arqstat->sts_sensedata.es_add_code = 0x21;
4470 arqstat->sts_sensedata.es_qual_code = 0x00;
4471
4472 break;
4473
4474 default:
4475 con_log(CL_ANN, (CE_CONT, "Unknown status!"));
4476 pkt->pkt_reason = CMD_TRAN_ERR;
4477
4478 break;
4479 }
4480
4481 atomic_add_16(&instance->fw_outstanding, (-1));
4482
4483 /* Call the callback routine */
4484 if (((pkt->pkt_flags & FLAG_NOINTR) == 0) &&
4485 pkt->pkt_comp) {
4486
4487 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_softintr: "
4488 "posting to scsa cmd %p index %x pkt %p "
4489 "time %llx", (void *)cmd, cmd->index,
4490 (void *)pkt, gethrtime()));
4491 (*pkt->pkt_comp)(pkt);
4492
4493 }
4494
4495 return_mfi_pkt(instance, cmd);
4496 break;
4497
4498 case MFI_CMD_OP_SMP:
4499 case MFI_CMD_OP_STP:
4500 complete_cmd_in_sync_mode(instance, cmd);
4501 break;
4502
4514 atomic_add_16(&instance->fw_outstanding,
4515 (-1));
4516 service_mfi_aen(instance, cmd);
4517 }
4518 } else {
4519 complete_cmd_in_sync_mode(instance, cmd);
4520 }
4521
4522 break;
4523
4524 case MFI_CMD_OP_ABORT:
4525 con_log(CL_ANN, (CE_NOTE, "MFI_CMD_OP_ABORT complete"));
4526 /*
4527 * MFI_CMD_OP_ABORT successfully completed
4528 * in the synchronous mode
4529 */
4530 complete_cmd_in_sync_mode(instance, cmd);
4531 break;
4532
4533 default:
4534 if (cmd->pkt != NULL) {
4535 pkt = cmd->pkt;
4536 if (((pkt->pkt_flags & FLAG_NOINTR) == 0) &&
4537 pkt->pkt_comp) {
4538
4539 con_log(CL_ANN1, (CE_CONT, "posting to "
4540 "scsa cmd %p index %x pkt %p"
4541 "time %llx, default ", (void *)cmd,
4542 cmd->index, (void *)pkt,
4543 gethrtime()));
4544
4545 (*pkt->pkt_comp)(pkt);
4546
4547 }
4548 }
4549 con_log(CL_ANN, (CE_WARN, "Cmd type unknown !"));
4550 break;
4551 }
4552 }
4553
4591 con_log(CL_ANN, (CE_WARN,
4592 "Failed ddi_dma_alloc_handle: "
4593 "unknown status %d", i));
4594 break;
4595 }
4596
4597 return (-1);
4598 }
4599
4600 if ((ddi_dma_mem_alloc(obj->dma_handle, obj->size, &tmp_endian_attr,
4601 DDI_DMA_RDWR | DDI_DMA_STREAMING, DDI_DMA_SLEEP, NULL,
4602 &obj->buffer, &alen, &obj->acc_handle) != DDI_SUCCESS) ||
4603 alen < obj->size) {
4604
4605 ddi_dma_free_handle(&obj->dma_handle);
4606
4607 con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_mem_alloc"));
4608
4609 return (-1);
4610 }
4611 if (obj->dma_handle == NULL) {
4612 con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_mem_alloc"));
4613 return (-1);
4614 }
4615
4616 if (ddi_dma_addr_bind_handle(obj->dma_handle, NULL, obj->buffer,
4617 obj->size, DDI_DMA_RDWR | DDI_DMA_STREAMING, DDI_DMA_SLEEP,
4618 NULL, &obj->dma_cookie[0], &cookie_cnt) != DDI_SUCCESS) {
4619
4620 ddi_dma_mem_free(&obj->acc_handle);
4621 ddi_dma_free_handle(&obj->dma_handle);
4622
4623 con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_addr_bind_handle"));
4624
4625 return (-1);
4626 }
4627 if (obj->acc_handle == NULL) {
4628 ddi_dma_mem_free(&obj->acc_handle);
4629 ddi_dma_free_handle(&obj->dma_handle);
4630
4631 con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_addr_bind_handle"));
4632 return (-1);
4633 }
4634
4635
4636 return (cookie_cnt);
4637 }
4638
4639 /*
4640 * mrsas_free_dma_obj(struct mrsas_instance *, dma_obj_t)
4641 *
4642 * De-allocate the memory and other resources for an dma object, which must
4643 * have been alloated by a previous call to mrsas_alloc_dma_obj()
4644 */
4645 int
4646 mrsas_free_dma_obj(struct mrsas_instance *instance, dma_obj_t obj)
4647 {
4648
4649 if ( (obj.dma_handle == NULL) || (obj.acc_handle == NULL) ) {
4650 return (DDI_SUCCESS);
4651 }
4652
4653 (void) ddi_dma_unbind_handle(obj.dma_handle);
4654 ddi_dma_mem_free(&obj.acc_handle);
4655 ddi_dma_free_handle(&obj.dma_handle);
4656 obj.acc_handle = NULL;
4657 return (DDI_SUCCESS);
4658 }
4659
4660 /*
4661 * mrsas_dma_alloc(instance_t *, struct scsi_pkt *, struct buf *,
4662 * int, int (*)())
4663 *
4664 * Allocate dma resources for a new scsi command
4665 */
4666 int
4667 mrsas_dma_alloc(struct mrsas_instance *instance, struct scsi_pkt *pkt,
4668 struct buf *bp, int flags, int (*callback)())
4669 {
4670 int dma_flags;
4671 int (*cb)(caddr_t);
4672 int i;
4683 acmd->cmd_flags |= CFLAG_DMASEND;
4684 dma_flags = DDI_DMA_WRITE;
4685 }
4686
4687 if (flags & PKT_CONSISTENT) {
4688 acmd->cmd_flags |= CFLAG_CONSISTENT;
4689 dma_flags |= DDI_DMA_CONSISTENT;
4690 }
4691
4692 if (flags & PKT_DMA_PARTIAL) {
4693 dma_flags |= DDI_DMA_PARTIAL;
4694 }
4695
4696 dma_flags |= DDI_DMA_REDZONE;
4697
4698 cb = (callback == NULL_FUNC) ? DDI_DMA_DONTWAIT : DDI_DMA_SLEEP;
4699
4700 tmp_dma_attr.dma_attr_sgllen = instance->max_num_sge;
4701 tmp_dma_attr.dma_attr_addr_hi = 0xffffffffffffffffull;
4702 if (instance->tbolt) {
4703 //OCR-RESET FIX
4704 tmp_dma_attr.dma_attr_count_max = (U64)mrsas_tbolt_max_cap_maxxfer; //limit to 256K
4705 tmp_dma_attr.dma_attr_maxxfer = (U64)mrsas_tbolt_max_cap_maxxfer; //limit to 256K
4706 }
4707
4708
4709 if ((i = ddi_dma_alloc_handle(instance->dip, &tmp_dma_attr,
4710 cb, 0, &acmd->cmd_dmahandle)) != DDI_SUCCESS) {
4711 switch (i) {
4712 case DDI_DMA_BADATTR:
4713 bioerror(bp, EFAULT);
4714 return (DDI_FAILURE);
4715
4716 case DDI_DMA_NORESOURCES:
4717 bioerror(bp, 0);
4718 return (DDI_FAILURE);
4719
4720 default:
4721 con_log(CL_ANN, (CE_PANIC, "ddi_dma_alloc_handle: "
4722 "impossible result (0x%x)", i));
4723 bioerror(bp, EFAULT);
4724 return (DDI_FAILURE);
4725 }
4726 }
4727
4728 i = ddi_dma_buf_bind_handle(acmd->cmd_dmahandle, bp, dma_flags,
4887 uint16_t flags = 0;
4888 uint32_t i;
4889 uint32_t context;
4890 uint32_t sge_bytes;
4891 uint32_t tmp_data_xfer_len;
4892 ddi_acc_handle_t acc_handle;
4893 struct mrsas_cmd *cmd;
4894 struct mrsas_sge64 *mfi_sgl;
4895 struct mrsas_sge_ieee *mfi_sgl_ieee;
4896 struct scsa_cmd *acmd = PKT2CMD(pkt);
4897 struct mrsas_pthru_frame *pthru;
4898 struct mrsas_io_frame *ldio;
4899
4900 /* find out if this is logical or physical drive command. */
4901 acmd->islogical = MRDRV_IS_LOGICAL(ap);
4902 acmd->device_id = MAP_DEVICE_ID(instance, ap);
4903 *cmd_done = 0;
4904
4905 /* get the command packet */
4906 if (!(cmd = get_mfi_pkt(instance))) {
4907 cmn_err(CE_WARN,
4908 "Failed to get a cmd from free-pool in build_cmd(). fw_outstanding=0x%X max_fw_cmds=0x%X",
4909 instance->fw_outstanding, instance->max_fw_cmds);
4910 return (NULL);
4911 }
4912
4913 acc_handle = cmd->frame_dma_obj.acc_handle;
4914
4915 /* Clear the frame buffer and assign back the context id */
4916 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
4917 ddi_put32(acc_handle, &cmd->frame->hdr.context, cmd->index);
4918
4919 cmd->pkt = pkt;
4920 cmd->cmd = acmd;
4921
4922 /* lets get the command directions */
4923 if (acmd->cmd_flags & CFLAG_DMASEND) {
4924 flags = MFI_FRAME_DIR_WRITE;
4925
4926 if (acmd->cmd_flags & CFLAG_CONSISTENT) {
4927 (void) ddi_dma_sync(acmd->cmd_dmahandle,
4928 acmd->cmd_dma_offset, acmd->cmd_dma_len,
4929 DDI_DMA_SYNC_FORDEV);
4930 }
4931 } else if (acmd->cmd_flags & ~CFLAG_DMASEND) {
4932 flags = MFI_FRAME_DIR_READ;
4933
4934 if (acmd->cmd_flags & CFLAG_CONSISTENT) {
4935 (void) ddi_dma_sync(acmd->cmd_dmahandle,
4936 acmd->cmd_dma_offset, acmd->cmd_dma_len,
4937 DDI_DMA_SYNC_FORCPU);
4938 }
4939 } else {
4940 flags = MFI_FRAME_DIR_NONE;
4985 /* Initialize sense Information */
4986 bzero(cmd->sense, SENSE_LENGTH);
4987 ddi_put8(acc_handle, &ldio->sense_len, SENSE_LENGTH);
4988 ddi_put32(acc_handle, &ldio->sense_buf_phys_addr_hi, 0);
4989 ddi_put32(acc_handle, &ldio->sense_buf_phys_addr_lo,
4990 cmd->sense_phys_addr);
4991 ddi_put32(acc_handle, &ldio->start_lba_hi, 0);
4992 ddi_put8(acc_handle, &ldio->access_byte,
4993 (acmd->cmd_cdblen != 6) ? pkt->pkt_cdbp[1] : 0);
4994 ddi_put8(acc_handle, &ldio->sge_count,
4995 acmd->cmd_cookiecnt);
4996 if (instance->flag_ieee) {
4997 mfi_sgl_ieee =
4998 (struct mrsas_sge_ieee *)&ldio->sgl;
4999 } else {
5000 mfi_sgl = (struct mrsas_sge64 *)&ldio->sgl;
5001 }
5002
5003 context = ddi_get32(acc_handle, &ldio->context);
5004
5005 if (acmd->cmd_cdblen == CDB_GROUP0) { /* 6-byte cdb */
5006 ddi_put32(acc_handle, &ldio->lba_count, (
5007 (uint16_t)(pkt->pkt_cdbp[4])));
5008
5009 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5010 ((uint32_t)(pkt->pkt_cdbp[3])) |
5011 ((uint32_t)(pkt->pkt_cdbp[2]) << 8) |
5012 ((uint32_t)((pkt->pkt_cdbp[1]) & 0x1F)
5013 << 16)));
5014 } else if (acmd->cmd_cdblen == CDB_GROUP1) { /* 10-byte cdb */
5015 ddi_put32(acc_handle, &ldio->lba_count, (
5016 ((uint16_t)(pkt->pkt_cdbp[8])) |
5017 ((uint16_t)(pkt->pkt_cdbp[7]) << 8)));
5018
5019 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5020 ((uint32_t)(pkt->pkt_cdbp[5])) |
5021 ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
5022 ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
5023 ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
5024 } else if (acmd->cmd_cdblen == CDB_GROUP5) { /* 12-byte cdb */
5025 ddi_put32(acc_handle, &ldio->lba_count, (
5026 ((uint32_t)(pkt->pkt_cdbp[9])) |
5027 ((uint32_t)(pkt->pkt_cdbp[8]) << 8) |
5028 ((uint32_t)(pkt->pkt_cdbp[7]) << 16) |
5029 ((uint32_t)(pkt->pkt_cdbp[6]) << 24)));
5030
5031 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5032 ((uint32_t)(pkt->pkt_cdbp[5])) |
5033 ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
5034 ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
5035 ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
5036 } else if (acmd->cmd_cdblen == CDB_GROUP4) { /* 16-byte cdb */
5037 ddi_put32(acc_handle, &ldio->lba_count, (
5038 ((uint32_t)(pkt->pkt_cdbp[13])) |
5039 ((uint32_t)(pkt->pkt_cdbp[12]) << 8) |
5040 ((uint32_t)(pkt->pkt_cdbp[11]) << 16) |
5041 ((uint32_t)(pkt->pkt_cdbp[10]) << 24)));
5042
5043 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5044 ((uint32_t)(pkt->pkt_cdbp[9])) |
5045 ((uint32_t)(pkt->pkt_cdbp[8]) << 8) |
5046 ((uint32_t)(pkt->pkt_cdbp[7]) << 16) |
5047 ((uint32_t)(pkt->pkt_cdbp[6]) << 24)));
5048
5049 ddi_put32(acc_handle, &ldio->start_lba_hi, (
5050 ((uint32_t)(pkt->pkt_cdbp[5])) |
5051 ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
5052 ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
5053 ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
5054 }
5055
5056 break;
5132 } else {
5133 for (i = 0; i < acmd->cmd_cookiecnt; i++, mfi_sgl++) {
5134 ddi_put64(acc_handle, &mfi_sgl->phys_addr,
5135 acmd->cmd_dmacookies[i].dmac_laddress);
5136 ddi_put32(acc_handle, &mfi_sgl->length,
5137 acmd->cmd_dmacookies[i].dmac_size);
5138 }
5139 sge_bytes = sizeof (struct mrsas_sge64)*acmd->cmd_cookiecnt;
5140 }
5141
5142 cmd->frame_count = (sge_bytes / MRMFI_FRAME_SIZE) +
5143 ((sge_bytes % MRMFI_FRAME_SIZE) ? 1 : 0) + 1;
5144
5145 if (cmd->frame_count >= 8) {
5146 cmd->frame_count = 8;
5147 }
5148
5149 return (cmd);
5150 }
5151
5152 /*
5153 * wait_for_outstanding - Wait for all outstanding cmds
5154 * @instance: Adapter soft state
5155 *
5156 * This function waits for upto MRDRV_RESET_WAIT_TIME seconds for FW to
5157 * complete all its outstanding commands. Returns error if one or more IOs
5158 * are pending after this time period.
5159 */
5160 static int
5161 wait_for_outstanding(struct mrsas_instance *instance)
5162 {
5163 int i;
5164 uint32_t wait_time = 90;
5165
5166 for (i = 0; i < wait_time; i++) {
5167 if (!instance->fw_outstanding) {
5168 break;
5169 }
5170
5171 drv_usecwait(MILLISEC); /* wait for 1000 usecs */;
5172 }
5173
5174 if (instance->fw_outstanding) {
5175 return (1);
5176 }
5177
5178 return (0);
5179 }
5180
5181
5182 /*
5183 * issue_mfi_pthru
5184 */
5185 static int
5186 issue_mfi_pthru(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5187 struct mrsas_cmd *cmd, int mode)
5188 {
5189 void *ubuf;
5190 uint32_t kphys_addr = 0;
5191 uint32_t xferlen = 0;
5192 uint32_t new_xfer_length =0;
5193 uint_t model;
5194 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
5195 dma_obj_t pthru_dma_obj;
5196 struct mrsas_pthru_frame *kpthru;
5197 struct mrsas_pthru_frame *pthru;
5198 int i;
5199 pthru = &cmd->frame->pthru;
5200 kpthru = (struct mrsas_pthru_frame *)&ioctl->frame[0];
5201
5202 if (instance->adapterresetinprogress) {
5203 con_log(CL_ANN1, (CE_WARN, "issue_mfi_pthru: Reset flag set, "
5204 "returning mfi_pkt and setting TRAN_BUSY\n"));
5205 return (DDI_FAILURE);
5206 }
5207 model = ddi_model_convert_from(mode & FMODELS);
5208 if (model == DDI_MODEL_ILP32) {
5209 con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP32"));
5210
5211 xferlen = kpthru->sgl.sge32[0].length;
5212
5213 ubuf = (void *)(ulong_t)kpthru->sgl.sge32[0].phys_addr;
5214 } else {
5215 #ifdef _ILP32
5216 con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP32"));
5217 xferlen = kpthru->sgl.sge32[0].length;
5218 ubuf = (void *)(ulong_t)kpthru->sgl.sge32[0].phys_addr;
5219 #else
5220 con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP64"));
5221 xferlen = kpthru->sgl.sge64[0].length;
5222 ubuf = (void *)(ulong_t)kpthru->sgl.sge64[0].phys_addr;
5223 #endif
5224 }
5225
5226 if (xferlen) {
5227 /* means IOCTL requires DMA */
5228 /* allocate the data transfer buffer */
5229 //pthru_dma_obj.size = xferlen;
5230 MRSAS_GET_BOUNDARY_ALIGNED_LEN(xferlen,new_xfer_length,PAGESIZE);
5231 pthru_dma_obj.size = new_xfer_length;
5232 pthru_dma_obj.dma_attr = mrsas_generic_dma_attr;
5233 pthru_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5234 pthru_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5235 pthru_dma_obj.dma_attr.dma_attr_sgllen = 1;
5236 pthru_dma_obj.dma_attr.dma_attr_align = 1;
5237
5238 /* allocate kernel buffer for DMA */
5239 if (mrsas_alloc_dma_obj(instance, &pthru_dma_obj,
5240 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5241 con_log(CL_ANN, (CE_WARN, "issue_mfi_pthru: "
5242 "could not allocate data transfer buffer."));
5243 return (DDI_FAILURE);
5244 }
5245 (void) memset(pthru_dma_obj.buffer, 0, xferlen);
5246
5247 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5248 if (kpthru->flags & MFI_FRAME_DIR_WRITE) {
5249 for (i = 0; i < xferlen; i++) {
5250 if (ddi_copyin((uint8_t *)ubuf+i,
5257 }
5258 }
5259 }
5260
5261 kphys_addr = pthru_dma_obj.dma_cookie[0].dmac_address;
5262 }
5263
5264 ddi_put8(acc_handle, &pthru->cmd, kpthru->cmd);
5265 ddi_put8(acc_handle, &pthru->sense_len, SENSE_LENGTH);
5266 ddi_put8(acc_handle, &pthru->cmd_status, 0);
5267 ddi_put8(acc_handle, &pthru->scsi_status, 0);
5268 ddi_put8(acc_handle, &pthru->target_id, kpthru->target_id);
5269 ddi_put8(acc_handle, &pthru->lun, kpthru->lun);
5270 ddi_put8(acc_handle, &pthru->cdb_len, kpthru->cdb_len);
5271 ddi_put8(acc_handle, &pthru->sge_count, kpthru->sge_count);
5272 ddi_put16(acc_handle, &pthru->timeout, kpthru->timeout);
5273 ddi_put32(acc_handle, &pthru->data_xfer_len, kpthru->data_xfer_len);
5274
5275 ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_hi, 0);
5276 pthru->sense_buf_phys_addr_lo = cmd->sense_phys_addr;
5277 /*ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_lo, 0); */
5278
5279 ddi_rep_put8(acc_handle, (uint8_t *)kpthru->cdb, (uint8_t *)pthru->cdb,
5280 pthru->cdb_len, DDI_DEV_AUTOINCR);
5281
5282 ddi_put16(acc_handle, &pthru->flags, kpthru->flags & ~MFI_FRAME_SGL64);
5283 ddi_put32(acc_handle, &pthru->sgl.sge32[0].length, xferlen);
5284 ddi_put32(acc_handle, &pthru->sgl.sge32[0].phys_addr, kphys_addr);
5285
5286 cmd->sync_cmd = MRSAS_TRUE;
5287 cmd->frame_count = 1;
5288
5289 if (instance->tbolt) {
5290 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
5291 }
5292
5293 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
5294 con_log(CL_ANN, (CE_WARN,
5295 "issue_mfi_pthru: fw_ioctl failed"));
5296 } else {
5297 if (xferlen && kpthru->flags & MFI_FRAME_DIR_READ) {
5298 for (i = 0; i < xferlen; i++) {
5299 if (ddi_copyout(
5300 (uint8_t *)pthru_dma_obj.buffer+i,
5301 (uint8_t *)ubuf+i, 1, mode)) {
5302 con_log(CL_ANN, (CE_WARN,
5303 "issue_mfi_pthru : "
5304 "copy to user space failed"));
5305 return (DDI_FAILURE);
5306 }
5307 }
5308 }
5309 }
5310
5311 kpthru->cmd_status = ddi_get8(acc_handle, &pthru->cmd_status);
5312 kpthru->scsi_status = ddi_get8(acc_handle, &pthru->scsi_status);
5313
5314 con_log(CL_ANN, (CE_CONT, "issue_mfi_pthru: cmd_status %x, "
5315 "scsi_status %x", kpthru->cmd_status, kpthru->scsi_status));
5316
5317 if (kpthru->sense_len) {
5318 uint sense_len = SENSE_LENGTH;
5319 void *sense_ubuf = (void *)(ulong_t)kpthru->sense_buf_phys_addr_lo;
5320 if (kpthru->sense_len <= SENSE_LENGTH) {
5321 sense_len = kpthru->sense_len;
5322 }
5323
5324 for (i = 0; i < sense_len; i++) {
5325 if (ddi_copyout(
5326 (uint8_t *)cmd->sense+i,
5327 (uint8_t *)sense_ubuf+i, 1, mode)) {
5328 con_log(CL_ANN, (CE_WARN,
5329 "issue_mfi_pthru : "
5330 "copy to user space failed"));
5331 }
5332 con_log(CL_DLEVEL1, (CE_WARN,
5333 "Copying Sense info sense_buff[%d] = 0x%X\n",i,*((uint8_t *)cmd->sense+i)));
5334 }
5335 }
5336 (void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle, 0, 0,
5337 DDI_DMA_SYNC_FORDEV);
5338
5339 if (xferlen) {
5340 /* free kernel buffer */
5341 if (mrsas_free_dma_obj(instance, pthru_dma_obj) != DDI_SUCCESS)
5342 return (DDI_FAILURE);
5343 }
5344
5345 return (DDI_SUCCESS);
5346 }
5347
5348 /*
5349 * issue_mfi_dcmd
5350 */
5351 static int
5352 issue_mfi_dcmd(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5353 struct mrsas_cmd *cmd, int mode)
5354 {
5355 void *ubuf;
5356 uint32_t kphys_addr = 0;
5357 uint32_t xferlen = 0;
5358 uint32_t new_xfer_length = 0;
5359 uint32_t model;
5360 dma_obj_t dcmd_dma_obj;
5361 struct mrsas_dcmd_frame *kdcmd;
5362 struct mrsas_dcmd_frame *dcmd;
5363 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
5364 int i;
5365 dcmd = &cmd->frame->dcmd;
5366 kdcmd = (struct mrsas_dcmd_frame *)&ioctl->frame[0];
5367
5368 if (instance->adapterresetinprogress) {
5369 con_log(CL_ANN1, (CE_WARN, "Reset flag set, "
5370 "returning mfi_pkt and setting TRAN_BUSY\n"));
5371 return (DDI_FAILURE);
5372 }
5373 model = ddi_model_convert_from(mode & FMODELS);
5374 if (model == DDI_MODEL_ILP32) {
5375 con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_ILP32"));
5376
5377 xferlen = kdcmd->sgl.sge32[0].length;
5378
5379 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
5380 } else {
5381 #ifdef _ILP32
5382 con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_ILP32"));
5383 xferlen = kdcmd->sgl.sge32[0].length;
5384 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
5385 #else
5386 con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_LP64"));
5387 xferlen = kdcmd->sgl.sge64[0].length;
5388 ubuf = (void *)(ulong_t)kdcmd->sgl.sge64[0].phys_addr;
5389 #endif
5390 }
5391 if (xferlen) {
5392 /* means IOCTL requires DMA */
5393 /* allocate the data transfer buffer */
5394 //dcmd_dma_obj.size = xferlen;
5395 MRSAS_GET_BOUNDARY_ALIGNED_LEN(xferlen,new_xfer_length,PAGESIZE);
5396 dcmd_dma_obj.size = new_xfer_length;
5397 dcmd_dma_obj.dma_attr = mrsas_generic_dma_attr;
5398 dcmd_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5399 dcmd_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5400 dcmd_dma_obj.dma_attr.dma_attr_sgllen = 1;
5401 dcmd_dma_obj.dma_attr.dma_attr_align = 1;
5402
5403 /* allocate kernel buffer for DMA */
5404 if (mrsas_alloc_dma_obj(instance, &dcmd_dma_obj,
5405 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5406 con_log(CL_ANN, (CE_WARN, "issue_mfi_dcmd: "
5407 "could not allocate data transfer buffer."));
5408 return (DDI_FAILURE);
5409 }
5410 (void) memset(dcmd_dma_obj.buffer, 0, xferlen);
5411
5412 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5413 if (kdcmd->flags & MFI_FRAME_DIR_WRITE) {
5414 for (i = 0; i < xferlen; i++) {
5415 if (ddi_copyin((uint8_t *)ubuf + i,
5416 (uint8_t *)dcmd_dma_obj.buffer + i,
5417 1, mode)) {
5418 con_log(CL_ANN, (CE_WARN,
5419 "issue_mfi_dcmd : "
5420 "copy from user space failed"));
5421 return (DDI_FAILURE);
5422 }
5423 }
5424 }
5425
5426 kphys_addr = dcmd_dma_obj.dma_cookie[0].dmac_address;
5427 }
5449
5450 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
5451 con_log(CL_ANN, (CE_WARN, "issue_mfi_dcmd: fw_ioctl failed"));
5452 } else {
5453 if (xferlen && (kdcmd->flags & MFI_FRAME_DIR_READ)) {
5454 for (i = 0; i < xferlen; i++) {
5455 if (ddi_copyout(
5456 (uint8_t *)dcmd_dma_obj.buffer + i,
5457 (uint8_t *)ubuf + i,
5458 1, mode)) {
5459 con_log(CL_ANN, (CE_WARN,
5460 "issue_mfi_dcmd : "
5461 "copy to user space failed"));
5462 return (DDI_FAILURE);
5463 }
5464 }
5465 }
5466 }
5467
5468 kdcmd->cmd_status = ddi_get8(acc_handle, &dcmd->cmd_status);
5469 con_log(CL_ANN, (CE_CONT, "issue_mfi_dcmd: cmd_status %x", kdcmd->cmd_status));
5470
5471 if (xferlen) {
5472 /* free kernel buffer */
5473 if (mrsas_free_dma_obj(instance, dcmd_dma_obj) != DDI_SUCCESS)
5474 return (DDI_FAILURE);
5475 }
5476
5477 return (DDI_SUCCESS);
5478 }
5479
5480 /*
5481 * issue_mfi_smp
5482 */
5483 static int
5484 issue_mfi_smp(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5485 struct mrsas_cmd *cmd, int mode)
5486 {
5487 void *request_ubuf;
5488 void *response_ubuf;
5489 uint32_t request_xferlen = 0;
5540
5541 response_ubuf = (void *)(ulong_t)sge32[0].phys_addr;
5542 request_ubuf = (void *)(ulong_t)sge32[1].phys_addr;
5543 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: "
5544 "response_ubuf = %p, request_ubuf = %p",
5545 response_ubuf, request_ubuf));
5546 #else
5547 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: DDI_MODEL_LP64"));
5548
5549 sge64 = &ksmp->sgl[0].sge64[0];
5550 response_xferlen = sge64[0].length;
5551 request_xferlen = sge64[1].length;
5552
5553 response_ubuf = (void *)(ulong_t)sge64[0].phys_addr;
5554 request_ubuf = (void *)(ulong_t)sge64[1].phys_addr;
5555 #endif
5556 }
5557 if (request_xferlen) {
5558 /* means IOCTL requires DMA */
5559 /* allocate the data transfer buffer */
5560 //request_dma_obj.size = request_xferlen;
5561 MRSAS_GET_BOUNDARY_ALIGNED_LEN(request_xferlen,new_xfer_length1,PAGESIZE);
5562 request_dma_obj.size = new_xfer_length1;
5563 request_dma_obj.dma_attr = mrsas_generic_dma_attr;
5564 request_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5565 request_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5566 request_dma_obj.dma_attr.dma_attr_sgllen = 1;
5567 request_dma_obj.dma_attr.dma_attr_align = 1;
5568
5569 /* allocate kernel buffer for DMA */
5570 if (mrsas_alloc_dma_obj(instance, &request_dma_obj,
5571 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5572 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5573 "could not allocate data transfer buffer."));
5574 return (DDI_FAILURE);
5575 }
5576 (void) memset(request_dma_obj.buffer, 0, request_xferlen);
5577
5578 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5579 for (i = 0; i < request_xferlen; i++) {
5580 if (ddi_copyin((uint8_t *)request_ubuf + i,
5581 (uint8_t *)request_dma_obj.buffer + i,
5582 1, mode)) {
5583 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5584 "copy from user space failed"));
5585 return (DDI_FAILURE);
5586 }
5587 }
5588 }
5589
5590 if (response_xferlen) {
5591 /* means IOCTL requires DMA */
5592 /* allocate the data transfer buffer */
5593 //response_dma_obj.size = response_xferlen;
5594 MRSAS_GET_BOUNDARY_ALIGNED_LEN(response_xferlen,new_xfer_length2,PAGESIZE);
5595 response_dma_obj.size = new_xfer_length2;
5596 response_dma_obj.dma_attr = mrsas_generic_dma_attr;
5597 response_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5598 response_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5599 response_dma_obj.dma_attr.dma_attr_sgllen = 1;
5600 response_dma_obj.dma_attr.dma_attr_align = 1;
5601
5602 /* allocate kernel buffer for DMA */
5603 if (mrsas_alloc_dma_obj(instance, &response_dma_obj,
5604 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5605 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5606 "could not allocate data transfer buffer."));
5607 return (DDI_FAILURE);
5608 }
5609 (void) memset(response_dma_obj.buffer, 0, response_xferlen);
5610
5611 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5612 for (i = 0; i < response_xferlen; i++) {
5613 if (ddi_copyin((uint8_t *)response_ubuf + i,
5614 (uint8_t *)response_dma_obj.buffer + i,
5704 }
5705
5706 if (response_xferlen) {
5707 for (i = 0; i < response_xferlen; i++) {
5708 if (ddi_copyout(
5709 (uint8_t *)response_dma_obj.buffer
5710 + i, (uint8_t *)response_ubuf
5711 + i, 1, mode)) {
5712 con_log(CL_ANN, (CE_WARN,
5713 "issue_mfi_smp : copy to "
5714 "user space failed"));
5715 return (DDI_FAILURE);
5716 }
5717 }
5718 }
5719 }
5720
5721 ksmp->cmd_status = ddi_get8(acc_handle, &smp->cmd_status);
5722 con_log(CL_ANN1, (CE_NOTE, "issue_mfi_smp: smp->cmd_status = %d",
5723 ksmp->cmd_status));
5724
5725 if (request_xferlen) {
5726 /* free kernel buffer */
5727 if (mrsas_free_dma_obj(instance, request_dma_obj) !=
5728 DDI_SUCCESS)
5729 return (DDI_FAILURE);
5730 }
5731
5732 if (response_xferlen) {
5733 /* free kernel buffer */
5734 if (mrsas_free_dma_obj(instance, response_dma_obj) !=
5735 DDI_SUCCESS)
5736 return (DDI_FAILURE);
5737 }
5738
5739 return (DDI_SUCCESS);
5740 }
5741
5742 /*
5743 * issue_mfi_stp
5760 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
5761 int i;
5762
5763 stp = &cmd->frame->stp;
5764 kstp = (struct mrsas_stp_frame *)&ioctl->frame[0];
5765
5766 if (instance->adapterresetinprogress) {
5767 con_log(CL_ANN1, (CE_WARN, "Reset flag set, "
5768 "returning mfi_pkt and setting TRAN_BUSY\n"));
5769 return (DDI_FAILURE);
5770 }
5771 model = ddi_model_convert_from(mode & FMODELS);
5772 if (model == DDI_MODEL_ILP32) {
5773 con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_ILP32"));
5774
5775 fis_xferlen = kstp->sgl.sge32[0].length;
5776 data_xferlen = kstp->sgl.sge32[1].length;
5777
5778 fis_ubuf = (void *)(ulong_t)kstp->sgl.sge32[0].phys_addr;
5779 data_ubuf = (void *)(ulong_t)kstp->sgl.sge32[1].phys_addr;
5780 }
5781 else
5782 {
5783 #ifdef _ILP32
5784 con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_ILP32"));
5785
5786 fis_xferlen = kstp->sgl.sge32[0].length;
5787 data_xferlen = kstp->sgl.sge32[1].length;
5788
5789 fis_ubuf = (void *)(ulong_t)kstp->sgl.sge32[0].phys_addr;
5790 data_ubuf = (void *)(ulong_t)kstp->sgl.sge32[1].phys_addr;
5791 #else
5792 con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_LP64"));
5793
5794 fis_xferlen = kstp->sgl.sge64[0].length;
5795 data_xferlen = kstp->sgl.sge64[1].length;
5796
5797 fis_ubuf = (void *)(ulong_t)kstp->sgl.sge64[0].phys_addr;
5798 data_ubuf = (void *)(ulong_t)kstp->sgl.sge64[1].phys_addr;
5799 #endif
5800 }
5801
5802
5803 if (fis_xferlen) {
5804 con_log(CL_ANN, (CE_CONT, "issue_mfi_stp: "
5805 "fis_ubuf = %p fis_xferlen = %x", fis_ubuf, fis_xferlen));
5806
5807 /* means IOCTL requires DMA */
5808 /* allocate the data transfer buffer */
5809 //fis_dma_obj.size = fis_xferlen;
5810 MRSAS_GET_BOUNDARY_ALIGNED_LEN(fis_xferlen,new_xfer_length1,PAGESIZE);
5811 fis_dma_obj.size = new_xfer_length1;
5812 fis_dma_obj.dma_attr = mrsas_generic_dma_attr;
5813 fis_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5814 fis_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5815 fis_dma_obj.dma_attr.dma_attr_sgllen = 1;
5816 fis_dma_obj.dma_attr.dma_attr_align = 1;
5817
5818 /* allocate kernel buffer for DMA */
5819 if (mrsas_alloc_dma_obj(instance, &fis_dma_obj,
5820 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5821 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp : "
5822 "could not allocate data transfer buffer."));
5823 return (DDI_FAILURE);
5824 }
5825 (void) memset(fis_dma_obj.buffer, 0, fis_xferlen);
5826
5827 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5828 for (i = 0; i < fis_xferlen; i++) {
5829 if (ddi_copyin((uint8_t *)fis_ubuf + i,
5830 (uint8_t *)fis_dma_obj.buffer + i, 1, mode)) {
5831 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
5832 "copy from user space failed"));
5833 return (DDI_FAILURE);
5834 }
5835 }
5836 }
5837
5838 if (data_xferlen) {
5839 con_log(CL_ANN, (CE_CONT, "issue_mfi_stp: data_ubuf = %p "
5840 "data_xferlen = %x", data_ubuf, data_xferlen));
5841
5842 /* means IOCTL requires DMA */
5843 /* allocate the data transfer buffer */
5844 //data_dma_obj.size = data_xferlen;
5845 MRSAS_GET_BOUNDARY_ALIGNED_LEN(data_xferlen,new_xfer_length2,PAGESIZE);
5846 data_dma_obj.size = new_xfer_length2;
5847 data_dma_obj.dma_attr = mrsas_generic_dma_attr;
5848 data_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5849 data_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5850 data_dma_obj.dma_attr.dma_attr_sgllen = 1;
5851 data_dma_obj.dma_attr.dma_attr_align = 1;
5852
5853 /* allocate kernel buffer for DMA */
5854 if (mrsas_alloc_dma_obj(instance, &data_dma_obj,
5855 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5856 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
5857 "could not allocate data transfer buffer."));
5858 return (DDI_FAILURE);
5859 }
5860 (void) memset(data_dma_obj.buffer, 0, data_xferlen);
5861
5862 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5863 for (i = 0; i < data_xferlen; i++) {
5864 if (ddi_copyin((uint8_t *)data_ubuf + i,
5865 (uint8_t *)data_dma_obj.buffer + i, 1, mode)) {
5866 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
5867 "copy from user space failed"));
5868 return (DDI_FAILURE);
5869 }
5870 }
5871 }
5872
5873 ddi_put8(acc_handle, &stp->cmd, kstp->cmd);
5914 }
5915 }
5916 }
5917 }
5918 if (data_xferlen) {
5919 for (i = 0; i < data_xferlen; i++) {
5920 if (ddi_copyout(
5921 (uint8_t *)data_dma_obj.buffer + i,
5922 (uint8_t *)data_ubuf + i, 1, mode)) {
5923 con_log(CL_ANN, (CE_WARN,
5924 "issue_mfi_stp : copy to"
5925 " user space failed"));
5926 return (DDI_FAILURE);
5927 }
5928 }
5929 }
5930
5931 kstp->cmd_status = ddi_get8(acc_handle, &stp->cmd_status);
5932 con_log(CL_ANN1, (CE_NOTE, "issue_mfi_stp: stp->cmd_status = %d",
5933 kstp->cmd_status));
5934
5935 if (fis_xferlen) {
5936 /* free kernel buffer */
5937 if (mrsas_free_dma_obj(instance, fis_dma_obj) != DDI_SUCCESS)
5938 return (DDI_FAILURE);
5939 }
5940
5941 if (data_xferlen) {
5942 /* free kernel buffer */
5943 if (mrsas_free_dma_obj(instance, data_dma_obj) != DDI_SUCCESS)
5944 return (DDI_FAILURE);
5945 }
5946
5947 return (DDI_SUCCESS);
5948 }
5949
5950 /*
5951 * fill_up_drv_ver
5952 */
5953 void
6077 }
6078
6079 /*
6080 * handle_mfi_ioctl
6081 */
6082 static int
6083 handle_mfi_ioctl(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
6084 int mode)
6085 {
6086 int rval = DDI_SUCCESS;
6087
6088 struct mrsas_header *hdr;
6089 struct mrsas_cmd *cmd;
6090
6091 if (instance->tbolt) {
6092 cmd = get_raid_msg_mfi_pkt(instance);
6093 } else {
6094 cmd = get_mfi_pkt(instance);
6095 }
6096 if (!cmd) {
6097 cmn_err(CE_WARN,
6098 "Failed to get a cmd from free-pool in handle_mfi_ioctl(). "
6099 "fw_outstanding=0x%X max_fw_cmds=0x%X",
6100 instance->fw_outstanding, instance->max_fw_cmds);
6101 return (DDI_FAILURE);
6102 }
6103
6104 /* Clear the frame buffer and assign back the context id */
6105 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
6106 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
6107 cmd->index);
6108
6109 hdr = (struct mrsas_header *)&ioctl->frame[0];
6110
6111 switch (ddi_get8(cmd->frame_dma_obj.acc_handle, &hdr->cmd)) {
6112 case MFI_CMD_OP_DCMD:
6113 rval = issue_mfi_dcmd(instance, ioctl, cmd, mode);
6114 break;
6115 case MFI_CMD_OP_SMP:
6116 rval = issue_mfi_smp(instance, ioctl, cmd, mode);
6117 break;
6118 case MFI_CMD_OP_STP:
6119 rval = issue_mfi_stp(instance, ioctl, cmd, mode);
6120 break;
6121 case MFI_CMD_OP_LD_SCSI:
6122 case MFI_CMD_OP_PD_SCSI:
6123 rval = issue_mfi_pthru(instance, ioctl, cmd, mode);
6124 break;
6125 default:
6126 con_log(CL_ANN, (CE_WARN, "handle_mfi_ioctl: "
6127 "invalid mfi ioctl hdr->cmd = %d", hdr->cmd));
6128 rval = DDI_FAILURE;
6129 break;
6130 }
6131
6132 if (instance->tbolt) {
6133 return_raid_msg_mfi_pkt(instance, cmd);
6134 } else {
6135 return_mfi_pkt(instance, cmd);
6136 }
6137
6138 return (rval);
6139 }
6140
6141 /*
6142 * AEN
6143 */
6144 static int
6145 handle_mfi_aen(struct mrsas_instance *instance, struct mrsas_aen *aen)
6146 {
6147 int rval = 0;
6148
6149 rval = register_mfi_aen(instance, instance->aen_seq_num,
6150 aen->class_locale_word);
6151
6216
6217 if (ret_val) {
6218 con_log(CL_ANN, (CE_WARN, "register_mfi_aen: "
6219 "failed to abort prevous AEN command"));
6220
6221 return (ret_val);
6222 }
6223 }
6224 } else {
6225 curr_aen.word = LE_32(class_locale_word);
6226 curr_aen.members.locale = LE_16(curr_aen.members.locale);
6227 }
6228
6229 if (instance->tbolt) {
6230 cmd = get_raid_msg_mfi_pkt(instance);
6231 } else {
6232 cmd = get_mfi_pkt(instance);
6233 }
6234
6235 if (!cmd) {
6236 cmn_err(CE_WARN,
6237 "Failed to get a cmd from free-pool in register_mfi_aen(). "
6238 "fw_outstanding=0x%X max_fw_cmds=0x%X",
6239 instance->fw_outstanding, instance->max_fw_cmds);
6240 return (ENOMEM);
6241 }
6242
6243
6244 /* Clear the frame buffer and assign back the context id */
6245 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
6246 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
6247 cmd->index);
6248
6249 dcmd = &cmd->frame->dcmd;
6250
6251 /* for(i = 0; i < DCMD_MBOX_SZ; i++) dcmd->mbox.b[i] = 0; */
6252 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
6253
6254 (void) memset(instance->mfi_evt_detail_obj.buffer, 0,
6255 sizeof (struct mrsas_evt_detail));
6256
6257 /* Prepare DCMD for aen registration */
6258 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
6259 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0x0);
6260 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 1);
6261 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
6262 MFI_FRAME_DIR_READ);
6263 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
6349 i = scsi_inq[0] & 0x1f;
6350
6351
6352 len += snprintf(inquiry_buf + len, 265 - len, " Type: %s ",
6353 i < MAX_SCSI_DEVICE_CODE ? scsi_device_types[i] :
6354 "Unknown ");
6355
6356
6357 len += snprintf(inquiry_buf + len, 265 - len,
6358 " ANSI SCSI revision: %02x", scsi_inq[2] & 0x07);
6359
6360 if ((scsi_inq[2] & 0x07) == 1 && (scsi_inq[3] & 0x0f) == 1) {
6361 len += snprintf(inquiry_buf + len, 265 - len, " CCS\n");
6362 } else {
6363 len += snprintf(inquiry_buf + len, 265 - len, "\n");
6364 }
6365
6366 con_log(CL_DLEVEL2, (CE_CONT, inquiry_buf));
6367 }
6368
6369 void
6370 io_timeout_checker(void *arg)
6371 {
6372 struct scsi_pkt *pkt;
6373 struct mrsas_instance *instance = arg;
6374 struct mrsas_cmd *cmd = NULL;
6375 struct mrsas_header *hdr;
6376 int time = 0;
6377 int counter = 0;
6378 struct mlist_head *pos, *next;
6379 mlist_t process_list;
6380
6381 if (instance->adapterresetinprogress == 1) {
6382 con_log(CL_ANN, (CE_NOTE, "io_timeout_checker:"
6383 " reset in progress"));
6384
6385 instance->timeout_id = timeout(io_timeout_checker,
6386 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
6387 return;
6388 }
6389
6390 /* See if this check needs to be in the beginning or last in ISR */
6391 if (mrsas_initiate_ocr_if_fw_is_faulty(instance) == 1) {
6392 cmn_err(CE_WARN, "io_timeout_checker:"
6393 "FW Fault, calling reset adapter");
6394 cmn_err(CE_CONT, "io_timeout_checker: fw_outstanding 0x%X max_fw_cmds 0x%X",
6395 instance->fw_outstanding, instance->max_fw_cmds );
6396 if (instance->adapterresetinprogress == 0) {
6397 instance->adapterresetinprogress = 1;
6398 if (instance->tbolt)
6399 mrsas_tbolt_reset_ppc(instance);
6400 else
6401 mrsas_reset_ppc(instance);
6402 instance->adapterresetinprogress = 0;
6403 }
6404 instance->timeout_id = timeout(io_timeout_checker,
6405 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
6406 return;
6407 }
6408
6409 INIT_LIST_HEAD(&process_list);
6410
6411 mutex_enter(&instance->cmd_pend_mtx);
6412 mlist_for_each_safe(pos, next, &instance->cmd_pend_list) {
6413 cmd = mlist_entry(pos, struct mrsas_cmd, list);
6414
6415 if (cmd == NULL) {
6416 continue;
6417 }
6418
6419 if (cmd->sync_cmd == MRSAS_TRUE) {
6420 hdr = (struct mrsas_header *)&cmd->frame->hdr;
6421 if (hdr == NULL) {
6422 continue;
6423 }
6424 time = --cmd->drv_pkt_time;
6425 } else {
6426 pkt = cmd->pkt;
6427 if (pkt == NULL) {
6428 continue;
6429 }
6430 time = --cmd->drv_pkt_time;
6431 }
6432 if (time <= 0) {
6433 cmn_err(CE_WARN, "%llx: "
6434 "io_timeout_checker: TIMING OUT: pkt "
6435 ": %p, cmd %p fw_outstanding 0x%X max_fw_cmds 0x%X\n",
6436 gethrtime(), (void *)pkt, (void *)cmd, instance->fw_outstanding, instance->max_fw_cmds);
6437
6438 counter++;
6439 break;
6440 }
6441 }
6442 mutex_exit(&instance->cmd_pend_mtx);
6443
6444 if (counter) {
6445 if (instance->disable_online_ctrl_reset == 1) {
6446 cmn_err(CE_WARN, "mr_sas %d: %s(): OCR is NOT supported by Firmware, KILL adapter!!!",
6447 instance->instance, __func__);
6448
6449 if (instance->tbolt)
6450 (void) mrsas_tbolt_kill_adapter(instance);
6451 else
6452 (void) mrsas_kill_adapter(instance);
6453
6454 return;
6455 } else {
6456 if (cmd->retry_count_for_ocr <= IO_RETRY_COUNT) {
6457 if (instance->adapterresetinprogress == 0) {
6458 if (instance->tbolt)
6459 mrsas_tbolt_reset_ppc(instance);
6460 else
6461 mrsas_reset_ppc(instance);
6462 }
6463 } else {
6464 cmn_err(CE_WARN,
6465 "io_timeout_checker: "
6466 "cmd %p cmd->index %d "
6467 "timed out even after 3 resets: "
6468 "so KILL adapter", (void *)cmd, cmd->index);
6469
6470 mrsas_print_cmd_details(instance, cmd, 0xDD);
6471
6472 if (instance->tbolt)
6473 (void) mrsas_tbolt_kill_adapter(instance);
6474 else
6475 (void) mrsas_kill_adapter(instance);
6476 return;
6477 }
6478 }
6479 }
6480 con_log(CL_ANN, (CE_NOTE, "mrsas: "
6481 "schedule next timeout check: "
6482 "do timeout \n"));
6483 instance->timeout_id =
6484 timeout(io_timeout_checker, (void *)instance,
6485 drv_usectohz(MRSAS_1_SECOND));
6486 }
6487
6488 static uint32_t
6489 read_fw_status_reg_ppc(struct mrsas_instance *instance)
6490 {
6491 return ((uint32_t)RD_OB_SCRATCH_PAD_0(instance));
6492 }
6493
6501 if (pkt) {
6502 con_log(CL_DLEVEL1, (CE_NOTE, "%llx : issue_cmd_ppc:"
6503 "ISSUED CMD TO FW : called : cmd:"
6504 ": %p instance : %p pkt : %p pkt_time : %x\n",
6505 gethrtime(), (void *)cmd, (void *)instance,
6506 (void *)pkt, cmd->drv_pkt_time));
6507 if (instance->adapterresetinprogress) {
6508 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
6509 con_log(CL_ANN1, (CE_NOTE, "Reset the scsi_pkt timer"));
6510 } else {
6511 push_pending_mfi_pkt(instance, cmd);
6512 }
6513
6514 } else {
6515 con_log(CL_DLEVEL1, (CE_NOTE, "%llx : issue_cmd_ppc:"
6516 "ISSUED CMD TO FW : called : cmd : %p, instance: %p"
6517 "(NO PKT)\n", gethrtime(), (void *)cmd, (void *)instance));
6518 }
6519
6520 mutex_enter(&instance->reg_write_mtx);
6521 ASSERT(mutex_owned(&instance->reg_write_mtx));
6522 /* Issue the command to the FW */
6523 WR_IB_QPORT((cmd->frame_phys_addr) |
6524 (((cmd->frame_count - 1) << 1) | 1), instance);
6525 mutex_exit(&instance->reg_write_mtx);
6526
6527 }
6528
6529 /*
6530 * issue_cmd_in_sync_mode
6531 */
6532 static int
6533 issue_cmd_in_sync_mode_ppc(struct mrsas_instance *instance,
6534 struct mrsas_cmd *cmd)
6535 {
6536 int i;
6537 uint32_t msecs = MFI_POLL_TIMEOUT_SECS * (10 * MILLISEC);
6538 struct mrsas_header *hdr = &cmd->frame->hdr;
6539
6540 con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_sync_mode_ppc: called"));
6541
6542 if (instance->adapterresetinprogress) {
6543 cmd->drv_pkt_time = ddi_get16(
6544 cmd->frame_dma_obj.acc_handle, &hdr->timeout);
6545 if (cmd->drv_pkt_time < debug_timeout_g)
6546 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
6547
6548 con_log(CL_ANN1, (CE_NOTE, "sync_mode_ppc: "
6549 "issue and return in reset case\n"));
6550 WR_IB_QPORT((cmd->frame_phys_addr) |
6551 (((cmd->frame_count - 1) << 1) | 1), instance);
6552
6553 return (DDI_SUCCESS);
6554 } else {
6555 con_log(CL_ANN1, (CE_NOTE, "sync_mode_ppc: pushing the pkt\n"));
6556 push_pending_mfi_pkt(instance, cmd);
6557 }
6558
6559 cmd->cmd_status = ENODATA;
6560
6561 mutex_enter(&instance->reg_write_mtx);
6562 ASSERT(mutex_owned(&instance->reg_write_mtx));
6563 /* Issue the command to the FW */
6564 WR_IB_QPORT((cmd->frame_phys_addr) |
6565 (((cmd->frame_count - 1) << 1) | 1), instance);
6566 mutex_exit(&instance->reg_write_mtx);
6567
6568 mutex_enter(&instance->int_cmd_mtx);
6569 for (i = 0; i < msecs && (cmd->cmd_status == ENODATA); i++) {
6570 cv_wait(&instance->int_cmd_cv, &instance->int_cmd_mtx);
6571 }
6572 mutex_exit(&instance->int_cmd_mtx);
6573
6574 con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_sync_mode_ppc: done"));
6575
6576 if (i < (msecs -1)) {
6577 return (DDI_SUCCESS);
6578 } else {
6579 return (DDI_FAILURE);
6580 }
6581 }
6582
6666 #endif
6667 }
6668
6669 static int
6670 intr_ack_ppc(struct mrsas_instance *instance)
6671 {
6672 uint32_t status;
6673 int ret = DDI_INTR_CLAIMED;
6674
6675 con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: called"));
6676
6677 /* check if it is our interrupt */
6678 status = RD_OB_INTR_STATUS(instance);
6679
6680 con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: status = 0x%x", status));
6681
6682 if (!(status & MFI_REPLY_2108_MESSAGE_INTR)) {
6683 ret = DDI_INTR_UNCLAIMED;
6684 }
6685
6686 if (ret == DDI_INTR_UNCLAIMED) {
6687 return (ret);
6688 }
6689 /* clear the interrupt by writing back the same value */
6690 WR_OB_DOORBELL_CLEAR(status, instance);
6691
6692 /* dummy READ */
6693 status = RD_OB_INTR_STATUS(instance);
6694
6695 con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: interrupt cleared"));
6696
6697 return (ret);
6698 }
6699
6700 /*
6701 * Marks HBA as bad. This will be called either when an
6702 * IO packet times out even after 3 FW resets
6703 * or FW is found to be fault even after 3 continuous resets.
6704 */
6705
6743 "flag set, time %llx", gethrtime()));
6744
6745 instance->func_ptr->disable_intr(instance);
6746 retry_reset:
6747 WR_IB_WRITE_SEQ(0, instance);
6748 WR_IB_WRITE_SEQ(4, instance);
6749 WR_IB_WRITE_SEQ(0xb, instance);
6750 WR_IB_WRITE_SEQ(2, instance);
6751 WR_IB_WRITE_SEQ(7, instance);
6752 WR_IB_WRITE_SEQ(0xd, instance);
6753 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: magic number written "
6754 "to write sequence register\n"));
6755 delay(100 * drv_usectohz(MILLISEC));
6756 status = RD_OB_DRWE(instance);
6757
6758 while (!(status & DIAG_WRITE_ENABLE)) {
6759 delay(100 * drv_usectohz(MILLISEC));
6760 status = RD_OB_DRWE(instance);
6761 if (retry++ == 100) {
6762 cmn_err(CE_WARN, "mrsas_reset_ppc: DRWE bit "
6763 "check retry count %d\n", retry);
6764 return (DDI_FAILURE);
6765 }
6766 }
6767 WR_IB_DRWE(status | DIAG_RESET_ADAPTER, instance);
6768 delay(100 * drv_usectohz(MILLISEC));
6769 status = RD_OB_DRWE(instance);
6770 while (status & DIAG_RESET_ADAPTER) {
6771 delay(100 * drv_usectohz(MILLISEC));
6772 status = RD_OB_DRWE(instance);
6773 if (retry++ == 100) {
6774 cmn_err(CE_WARN,
6775 "mrsas_reset_ppc: RESET FAILED. KILL adapter called\n.");
6776
6777 (void) mrsas_kill_adapter(instance);
6778 return (DDI_FAILURE);
6779 }
6780 }
6781 con_log(CL_ANN, (CE_NOTE, "mrsas_reset_ppc: Adapter reset complete"));
6782 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
6783 "Calling mfi_state_transition_to_ready"));
6784
6785 /* Mark HBA as bad, if FW is fault after 3 continuous resets */
6786 if (mfi_state_transition_to_ready(instance) ||
6787 debug_fw_faults_after_ocr_g == 1) {
6788 cur_abs_reg_val =
6789 instance->func_ptr->read_fw_status_reg(instance);
6790 fw_state = cur_abs_reg_val & MFI_STATE_MASK;
6791
6792 #ifdef OCRDEBUG
6793 con_log(CL_ANN1, (CE_NOTE,
6794 "mrsas_reset_ppc :before fake: FW is not ready "
6795 "FW state = 0x%x", fw_state));
6797 fw_state = MFI_STATE_FAULT;
6798 #endif
6799
6800 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc : FW is not ready "
6801 "FW state = 0x%x", fw_state));
6802
6803 if (fw_state == MFI_STATE_FAULT) {
6804 /* increment the count */
6805 instance->fw_fault_count_after_ocr++;
6806 if (instance->fw_fault_count_after_ocr
6807 < MAX_FW_RESET_COUNT) {
6808 cmn_err(CE_WARN, "mrsas_reset_ppc: "
6809 "FW is in fault after OCR count %d "
6810 "Retry Reset",
6811 instance->fw_fault_count_after_ocr);
6812 goto retry_reset;
6813
6814 } else {
6815 cmn_err(CE_WARN, "mrsas_reset_ppc: "
6816 "Max Reset Count exceeded >%d"
6817 "Mark HBA as bad, KILL adapter", MAX_FW_RESET_COUNT);
6818
6819 (void) mrsas_kill_adapter(instance);
6820 return (DDI_FAILURE);
6821 }
6822 }
6823 }
6824 /* reset the counter as FW is up after OCR */
6825 instance->fw_fault_count_after_ocr = 0;
6826
6827
6828 ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
6829 instance->producer, 0);
6830
6831 ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
6832 instance->consumer, 0);
6833
6834 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
6835 " after resetting produconsumer chck indexs:"
6836 "producer %x consumer %x", *instance->producer,
6837 *instance->consumer));
6860 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
6861 "Calling aen registration"));
6862
6863
6864 instance->aen_cmd->retry_count_for_ocr = 0;
6865 instance->aen_cmd->drv_pkt_time = 0;
6866
6867 instance->func_ptr->issue_cmd(instance->aen_cmd, instance);
6868 con_log(CL_ANN1, (CE_NOTE, "Unsetting adpresetinprogress flag.\n"));
6869
6870 mutex_enter(&instance->ocr_flags_mtx);
6871 instance->adapterresetinprogress = 0;
6872 mutex_exit(&instance->ocr_flags_mtx);
6873 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
6874 "adpterresetinprogress flag unset"));
6875
6876 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc done\n"));
6877 return (DDI_SUCCESS);
6878 }
6879
6880
6881 static int
6882 mrsas_add_intrs(struct mrsas_instance *instance, int intr_type)
6883 {
6884
6885 dev_info_t *dip = instance->dip;
6886 int avail, actual, count;
6887 int i, flag, ret;
6888
6889 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: intr_type = %x",
6890 intr_type));
6891
6892 /* Get number of interrupts */
6893 ret = ddi_intr_get_nintrs(dip, intr_type, &count);
6894 if ((ret != DDI_SUCCESS) || (count == 0)) {
6895 con_log(CL_ANN, (CE_WARN, "ddi_intr_get_nintrs() failed:"
6896 "ret %d count %d", ret, count));
6897
6898 return (DDI_FAILURE);
6899 }
6900
6901 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: count = %d ", count));
6903 /* Get number of available interrupts */
6904 ret = ddi_intr_get_navail(dip, intr_type, &avail);
6905 if ((ret != DDI_SUCCESS) || (avail == 0)) {
6906 con_log(CL_ANN, (CE_WARN, "ddi_intr_get_navail() failed:"
6907 "ret %d avail %d", ret, avail));
6908
6909 return (DDI_FAILURE);
6910 }
6911 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: avail = %d ", avail));
6912
6913 /* Only one interrupt routine. So limit the count to 1 */
6914 if (count > 1) {
6915 count = 1;
6916 }
6917
6918 /*
6919 * Allocate an array of interrupt handlers. Currently we support
6920 * only one interrupt. The framework can be extended later.
6921 */
6922 instance->intr_htable_size = count * sizeof (ddi_intr_handle_t);
6923 instance->intr_htable = kmem_zalloc(instance->intr_htable_size, KM_SLEEP);
6924 if (instance->intr_htable == NULL) {
6925 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
6926 "failed to allocate memory for intr-handle table"));
6927 instance->intr_htable_size = 0;
6928 return (DDI_FAILURE);
6929 }
6930
6931 flag = ((intr_type == DDI_INTR_TYPE_MSI) || (intr_type ==
6932 DDI_INTR_TYPE_MSIX)) ? DDI_INTR_ALLOC_STRICT:DDI_INTR_ALLOC_NORMAL;
6933
6934 /* Allocate interrupt */
6935 ret = ddi_intr_alloc(dip, instance->intr_htable, intr_type, 0,
6936 count, &actual, flag);
6937
6938 if ((ret != DDI_SUCCESS) || (actual == 0)) {
6939 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
6940 "avail = %d", avail));
6941 goto mrsas_free_htable;
6942 }
6943
6944 if (actual < count) {
6945 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
6946 "Requested = %d Received = %d", count, actual));
6947 }
6948 instance->intr_cnt = actual;
6949
6950 /*
6951 * Get the priority of the interrupt allocated.
6952 */
6994
6995 if (instance->intr_cap & DDI_INTR_FLAG_BLOCK) {
6996 con_log(CL_ANN, (CE_WARN, "Calling ddi_intr_block _enable"));
6997
6998 (void) ddi_intr_block_enable(instance->intr_htable,
6999 instance->intr_cnt);
7000 } else {
7001 con_log(CL_ANN, (CE_NOTE, " calling ddi_intr_enable"));
7002
7003 for (i = 0; i < instance->intr_cnt; i++) {
7004 (void) ddi_intr_enable(instance->intr_htable[i]);
7005 con_log(CL_ANN, (CE_NOTE, "ddi intr enable returns "
7006 "%d", i));
7007 }
7008 }
7009
7010 return (DDI_SUCCESS);
7011
7012 mrsas_free_handlers:
7013 for (i = 0; i < actual; i++)
7014 {
7015 (void) ddi_intr_remove_handler(instance->intr_htable[i]);
7016 }
7017
7018 mrsas_free_handles:
7019 for (i = 0; i < actual; i++)
7020 {
7021 (void) ddi_intr_free(instance->intr_htable[i]);
7022 }
7023
7024 mrsas_free_htable:
7025 if (instance->intr_htable != NULL)
7026 kmem_free(instance->intr_htable, instance->intr_htable_size);
7027
7028 instance->intr_htable =NULL;
7029 instance->intr_htable_size = 0;
7030
7031 return (DDI_FAILURE);
7032
7033 }
7034
7035
7036 static void
7037 mrsas_rem_intrs(struct mrsas_instance *instance)
7038 {
7039 int i;
7040
7041 con_log(CL_ANN, (CE_NOTE, "mrsas_rem_intrs called"));
7042
7043 /* Disable all interrupts first */
7044 if (instance->intr_cap & DDI_INTR_FLAG_BLOCK) {
7045 (void) ddi_intr_block_disable(instance->intr_htable,
7046 instance->intr_cnt);
7047 } else {
7048 for (i = 0; i < instance->intr_cnt; i++) {
7049 (void) ddi_intr_disable(instance->intr_htable[i]);
7050 }
7051 }
7052
7053 /* Remove all the handlers */
7054
7055 for (i = 0; i < instance->intr_cnt; i++) {
7056 (void) ddi_intr_remove_handler(instance->intr_htable[i]);
7057 (void) ddi_intr_free(instance->intr_htable[i]);
7058 }
7059
7060 if (instance->intr_htable != NULL)
7061 kmem_free(instance->intr_htable, instance->intr_htable_size);
7062
7063 instance->intr_htable =NULL;
7064 instance->intr_htable_size = 0;
7065
7066 }
7067
7068 static int
7069 mrsas_tran_bus_config(dev_info_t *parent, uint_t flags,
7070 ddi_bus_config_op_t op, void *arg, dev_info_t **childp)
7071 {
7072 struct mrsas_instance *instance;
7073 int config;
7074 int rval = NDI_SUCCESS;
7075
7076 char *ptr = NULL;
7077 int tgt, lun;
7078
7079 con_log(CL_ANN1, (CE_NOTE, "Bus config called for op = %x", op));
7080
7081 if ((instance = ddi_get_soft_state(mrsas_state,
7082 ddi_get_instance(parent))) == NULL) {
7083 return (NDI_FAILURE);
7085
7086 /* Hold nexus during bus_config */
7087 ndi_devi_enter(parent, &config);
7088 switch (op) {
7089 case BUS_CONFIG_ONE: {
7090
7091 /* parse wwid/target name out of name given */
7092 if ((ptr = strchr((char *)arg, '@')) == NULL) {
7093 rval = NDI_FAILURE;
7094 break;
7095 }
7096 ptr++;
7097
7098 if (mrsas_parse_devname(arg, &tgt, &lun) != 0) {
7099 rval = NDI_FAILURE;
7100 break;
7101 }
7102
7103 if (lun == 0) {
7104 rval = mrsas_config_ld(instance, tgt, lun, childp);
7105 }
7106 #ifdef PDSUPPORT
7107 else if ( instance->tbolt == 1 && lun != 0) {
7108 rval = mrsas_tbolt_config_pd(instance,
7109 tgt, lun, childp);
7110 }
7111 #endif
7112 else {
7113 rval = NDI_FAILURE;
7114 }
7115
7116 break;
7117 }
7118 case BUS_CONFIG_DRIVER:
7119 case BUS_CONFIG_ALL: {
7120
7121 rval = mrsas_config_all_devices(instance);
7122
7123 rval = NDI_SUCCESS;
7124 break;
7125 }
7126 }
7127
7128 if (rval == NDI_SUCCESS) {
7129 rval = ndi_busop_bus_config(parent, flags, op, arg, childp, 0);
7130
7131 }
7132 ndi_devi_exit(parent, config);
7133
7134 con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_bus_config: rval = %x",
7135 rval));
7136 return (rval);
7137 }
7138
7139 static int
7140 mrsas_config_all_devices(struct mrsas_instance *instance)
7141 {
7142 int rval, tgt;
7143
7144 for (tgt = 0; tgt < MRDRV_MAX_LD; tgt++) {
7145 (void) mrsas_config_ld(instance, tgt, 0, NULL);
7146
7147 }
7148
7149 #ifdef PDSUPPORT
7150 /* Config PD devices connected to the card */
7151 if(instance->tbolt) {
7152 for (tgt = 0; tgt < instance->mr_tbolt_pd_max; tgt++) {
7153 (void) mrsas_tbolt_config_pd(instance, tgt, 1, NULL);
7154 }
7155 }
7156 #endif
7157
7158 rval = NDI_SUCCESS;
7159 return (rval);
7160 }
7161
7162 static int
7163 mrsas_parse_devname(char *devnm, int *tgt, int *lun)
7164 {
7165 char devbuf[SCSI_MAXNAMELEN];
7166 char *addr;
7167 char *p, *tp, *lp;
7168 long num;
7169
7170 /* Parse dev name and address */
7171 (void) strcpy(devbuf, devnm);
7213
7214 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_config_ld: t = %d l = %d",
7215 tgt, lun));
7216
7217 if ((child = mrsas_find_child(instance, tgt, lun)) != NULL) {
7218 if (ldip) {
7219 *ldip = child;
7220 }
7221 if (instance->mr_ld_list[tgt].flag != MRDRV_TGT_VALID) {
7222 rval = mrsas_service_evt(instance, tgt, 0,
7223 MRSAS_EVT_UNCONFIG_TGT, NULL);
7224 con_log(CL_ANN1, (CE_WARN,
7225 "mr_sas: DELETING STALE ENTRY rval = %d "
7226 "tgt id = %d ", rval, tgt));
7227 return (NDI_FAILURE);
7228 }
7229 return (NDI_SUCCESS);
7230 }
7231
7232 sd = kmem_zalloc(sizeof (struct scsi_device), KM_SLEEP);
7233 if (sd == NULL) {
7234 con_log(CL_ANN1, (CE_WARN,
7235 "mrsas_config_ld: failed to allocate mem for scsi_device"));
7236 return (NDI_FAILURE);
7237 }
7238 sd->sd_address.a_hba_tran = instance->tran;
7239 sd->sd_address.a_target = (uint16_t)tgt;
7240 sd->sd_address.a_lun = (uint8_t)lun;
7241
7242 if (scsi_hba_probe(sd, NULL) == SCSIPROBE_EXISTS)
7243 rval = mrsas_config_scsi_device(instance, sd, ldip);
7244 else
7245 rval = NDI_FAILURE;
7246
7247 /* sd_unprobe is blank now. Free buffer manually */
7248 if (sd->sd_inq) {
7249 kmem_free(sd->sd_inq, SUN_INQSIZE);
7250 sd->sd_inq = (struct scsi_inquiry *)NULL;
7251 }
7252
7253 kmem_free(sd, sizeof (struct scsi_device));
7254 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_config_ld: return rval = %d",
7255 rval));
7256 return (rval);
7257 }
7352 if ((instance->taskq == NULL) || (mrevt =
7353 kmem_zalloc(sizeof (struct mrsas_eventinfo), KM_NOSLEEP)) == NULL) {
7354 return (ENOMEM);
7355 }
7356
7357 mrevt->instance = instance;
7358 mrevt->tgt = tgt;
7359 mrevt->lun = lun;
7360 mrevt->event = event;
7361 mrevt->wwn = wwn;
7362
7363 if ((ddi_taskq_dispatch(instance->taskq,
7364 (void (*)(void *))mrsas_issue_evt_taskq, mrevt, DDI_NOSLEEP)) !=
7365 DDI_SUCCESS) {
7366 con_log(CL_ANN1, (CE_NOTE,
7367 "mr_sas: Event task failed for t%dl%d event = %d",
7368 tgt, lun, event));
7369 kmem_free(mrevt, sizeof (struct mrsas_eventinfo));
7370 return (DDI_FAILURE);
7371 }
7372
7373 return (DDI_SUCCESS);
7374 }
7375
7376 static void
7377 mrsas_issue_evt_taskq(struct mrsas_eventinfo *mrevt)
7378 {
7379 struct mrsas_instance *instance = mrevt->instance;
7380 dev_info_t *dip, *pdip;
7381 int circ1 = 0;
7382 char *devname;
7383
7384 con_log(CL_ANN1, (CE_NOTE, "mrsas_issue_evt_taskq: called for"
7385 " tgt %d lun %d event %d",
7386 mrevt->tgt, mrevt->lun, mrevt->event));
7387
7388 if (mrevt->tgt < MRDRV_MAX_LD && mrevt->lun == 0) {
7389 mutex_enter(&instance->config_dev_mtx);
7390 dip = instance->mr_ld_list[mrevt->tgt].dip;
7391 mutex_exit(&instance->config_dev_mtx);
7392 }
7393
7394 #ifdef PDSUPPORT
7395 else {
7396 mutex_enter(&instance->config_dev_mtx);
7397 dip = instance->mr_tbolt_pd_list[mrevt->tgt].dip;
7398 mutex_exit(&instance->config_dev_mtx);
7399 }
7400 #endif
7401
7402 ndi_devi_enter(instance->dip, &circ1);
7403 switch (mrevt->event) {
7404 case MRSAS_EVT_CONFIG_TGT:
7405 if (dip == NULL) {
7406
7407 if (mrevt->lun == 0) {
7408 (void) mrsas_config_ld(instance, mrevt->tgt,
7409 0, NULL);
7410 }
7411 #ifdef PDSUPPORT
7412 else if (instance->tbolt) {
7413 (void) mrsas_tbolt_config_pd(instance,
7414 mrevt->tgt,
7415 1, NULL);
7416 }
7417 #endif
7418 con_log(CL_ANN1, (CE_NOTE,
7419 "mr_sas: EVT_CONFIG_TGT called:"
7420 " for tgt %d lun %d event %d",
7421 mrevt->tgt, mrevt->lun, mrevt->event));
7422
7423 } else {
7424 con_log(CL_ANN1, (CE_NOTE,
7425 "mr_sas: EVT_CONFIG_TGT dip != NULL:"
7426 " for tgt %d lun %d event %d",
7427 mrevt->tgt, mrevt->lun, mrevt->event));
7428 }
7429 break;
7430 case MRSAS_EVT_UNCONFIG_TGT:
7431 if (dip) {
7432 if (i_ddi_devi_attached(dip)) {
7433
7434 pdip = ddi_get_parent(dip);
7435
7436 devname = kmem_zalloc(MAXNAMELEN + 1, KM_SLEEP);
7437 (void) ddi_deviname(dip, devname);
7497 }
7498 case 0x4: {
7499 struct mode_geometry *page4p = NULL;
7500 modehdrp = (struct mode_header *)(bp->b_un.b_addr);
7501 modehdrp->bdesc_length = MODE_BLK_DESC_LENGTH;
7502
7503 page4p = (void *)((caddr_t)modehdrp +
7504 MODE_HEADER_LENGTH + MODE_BLK_DESC_LENGTH);
7505 page4p->mode_page.code = 0x4;
7506 page4p->mode_page.length =
7507 (uchar_t)(sizeof (struct mode_geometry));
7508 page4p->heads = 255;
7509 page4p->rpm = 10000;
7510 break;
7511 }
7512 default:
7513 break;
7514 }
7515 return (NULL);
7516 }
7517
|
1 /*
2 * mr_sas.c: source for mr_sas driver
3 *
4 * Solaris MegaRAID device driver for SAS2.0 controllers
5 * Copyright (c) 2008-2012, LSI Logic Corporation.
6 * All rights reserved.
7 *
8 * Version:
9 * Author:
10 * Swaminathan K S
11 * Arun Chandrashekhar
12 * Manju R
13 * Rasheed
14 * Shakeel Bukhari
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions are met:
18 *
19 * 1. Redistributions of source code must retain the above copyright notice,
20 * this list of conditions and the following disclaimer.
21 *
22 * 2. Redistributions in binary form must reproduce the above copyright notice,
23 * this list of conditions and the following disclaimer in the documentation
24 * and/or other materials provided with the distribution.
25 *
26 * 3. Neither the name of the author nor the names of its contributors may be
27 * used to endorse or promote products derived from this software without
28 * specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
31 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
32 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
33 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
34 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
35 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
36 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
37 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
38 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
40 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
41 * DAMAGE.
42 */
43
44 /*
45 * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
46 * Copyright (c) 2011 Bayard G. Bell. All rights reserved.
47 * Copyright 2012 Nexenta System, Inc. All rights reserved.
48 */
49
50 #include <sys/types.h>
51 #include <sys/param.h>
52 #include <sys/file.h>
53 #include <sys/errno.h>
54 #include <sys/open.h>
55 #include <sys/cred.h>
56 #include <sys/modctl.h>
57 #include <sys/conf.h>
58 #include <sys/devops.h>
59 #include <sys/cmn_err.h>
60 #include <sys/kmem.h>
61 #include <sys/stat.h>
62 #include <sys/mkdev.h>
63 #include <sys/pci.h>
64 #include <sys/scsi/scsi.h>
65 #include <sys/ddi.h>
66 #include <sys/sunddi.h>
67 #include <sys/atomic.h>
68 #include <sys/signal.h>
69 #include <sys/byteorder.h>
70 #include <sys/sdt.h>
71 #include <sys/fs/dv_node.h> /* devfs_clean */
72
73 #include "mr_sas.h"
74
75 /*
76 * FMA header files
77 */
78 #include <sys/ddifm.h>
79 #include <sys/fm/protocol.h>
80 #include <sys/fm/util.h>
81 #include <sys/fm/io/ddi.h>
82
83 /*
84 * Local static data
85 */
86 static void *mrsas_state = NULL;
87 static volatile boolean_t mrsas_relaxed_ordering = B_TRUE;
88 volatile int debug_level_g = CL_NONE;
89 static volatile int msi_enable = 1;
90 static volatile int ctio_enable = 1;
91
92 /* Default Timeout value to issue online controller reset */
93 volatile int debug_timeout_g = 0xF0; /* 0xB4; */
94 /* Simulate consecutive firmware fault */
95 static volatile int debug_fw_faults_after_ocr_g = 0;
96 #ifdef OCRDEBUG
97 /* Simulate three consecutive timeout for an IO */
98 static volatile int debug_consecutive_timeout_after_ocr_g = 0;
99 #endif
100
101 #pragma weak scsi_hba_open
102 #pragma weak scsi_hba_close
103 #pragma weak scsi_hba_ioctl
104
105 /* Local static prototypes. */
106 static int mrsas_getinfo(dev_info_t *, ddi_info_cmd_t, void *, void **);
107 static int mrsas_attach(dev_info_t *, ddi_attach_cmd_t);
108 #ifdef __sparc
109 static int mrsas_reset(dev_info_t *, ddi_reset_cmd_t);
110 #else
111 static int mrsas_quiesce(dev_info_t *);
112 #endif
113 static int mrsas_detach(dev_info_t *, ddi_detach_cmd_t);
114 static int mrsas_open(dev_t *, int, int, cred_t *);
115 static int mrsas_close(dev_t, int, int, cred_t *);
116 static int mrsas_ioctl(dev_t, int, intptr_t, int, cred_t *, int *);
117
118 static int mrsas_tran_tgt_init(dev_info_t *, dev_info_t *,
119 scsi_hba_tran_t *, struct scsi_device *);
120 static struct scsi_pkt *mrsas_tran_init_pkt(struct scsi_address *, register
121 struct scsi_pkt *, struct buf *, int, int, int, int,
122 int (*)(), caddr_t);
123 static int mrsas_tran_start(struct scsi_address *,
124 register struct scsi_pkt *);
125 static int mrsas_tran_abort(struct scsi_address *, struct scsi_pkt *);
126 static int mrsas_tran_reset(struct scsi_address *, int);
127 static int mrsas_tran_getcap(struct scsi_address *, char *, int);
128 static int mrsas_tran_setcap(struct scsi_address *, char *, int, int);
129 static void mrsas_tran_destroy_pkt(struct scsi_address *,
130 struct scsi_pkt *);
131 static void mrsas_tran_dmafree(struct scsi_address *, struct scsi_pkt *);
132 static void mrsas_tran_sync_pkt(struct scsi_address *, struct scsi_pkt *);
133 static int mrsas_tran_quiesce(dev_info_t *dip);
134 static int mrsas_tran_unquiesce(dev_info_t *dip);
135 static uint_t mrsas_isr();
136 static uint_t mrsas_softintr();
137 static void mrsas_undo_resources(dev_info_t *, struct mrsas_instance *);
138 static struct mrsas_cmd *get_mfi_pkt(struct mrsas_instance *);
139 static void return_mfi_pkt(struct mrsas_instance *,
140 struct mrsas_cmd *);
141
142 static void free_space_for_mfi(struct mrsas_instance *);
143 static uint32_t read_fw_status_reg_ppc(struct mrsas_instance *);
144 static void issue_cmd_ppc(struct mrsas_cmd *, struct mrsas_instance *);
145 static int issue_cmd_in_poll_mode_ppc(struct mrsas_instance *,
146 struct mrsas_cmd *);
147 static int issue_cmd_in_sync_mode_ppc(struct mrsas_instance *,
148 struct mrsas_cmd *);
149 static void enable_intr_ppc(struct mrsas_instance *);
150 static void disable_intr_ppc(struct mrsas_instance *);
151 static int intr_ack_ppc(struct mrsas_instance *);
152 static void flush_cache(struct mrsas_instance *instance);
153 void display_scsi_inquiry(caddr_t);
154 static int start_mfi_aen(struct mrsas_instance *instance);
155 static int handle_drv_ioctl(struct mrsas_instance *instance,
156 struct mrsas_ioctl *ioctl, int mode);
157 static int handle_mfi_ioctl(struct mrsas_instance *instance,
158 struct mrsas_ioctl *ioctl, int mode);
159 static int handle_mfi_aen(struct mrsas_instance *instance,
160 struct mrsas_aen *aen);
161 static struct mrsas_cmd *build_cmd(struct mrsas_instance *,
162 struct scsi_address *, struct scsi_pkt *, uchar_t *);
163 static int alloc_additional_dma_buffer(struct mrsas_instance *);
164 static void complete_cmd_in_sync_mode(struct mrsas_instance *,
165 struct mrsas_cmd *);
166 static int mrsas_kill_adapter(struct mrsas_instance *);
167 static int mrsas_issue_init_mfi(struct mrsas_instance *);
168 static int mrsas_reset_ppc(struct mrsas_instance *);
169 static uint32_t mrsas_initiate_ocr_if_fw_is_faulty(struct mrsas_instance *);
170 static int wait_for_outstanding(struct mrsas_instance *instance);
171 static int register_mfi_aen(struct mrsas_instance *instance,
172 uint32_t seq_num, uint32_t class_locale_word);
173 static int issue_mfi_pthru(struct mrsas_instance *instance, struct
174 mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
175 static int issue_mfi_dcmd(struct mrsas_instance *instance, struct
176 mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
177 static int issue_mfi_smp(struct mrsas_instance *instance, struct
178 mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
179 static int issue_mfi_stp(struct mrsas_instance *instance, struct
180 mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
181 static int abort_aen_cmd(struct mrsas_instance *instance,
182 struct mrsas_cmd *cmd_to_abort);
183
184 static void mrsas_rem_intrs(struct mrsas_instance *instance);
185 static int mrsas_add_intrs(struct mrsas_instance *instance, int intr_type);
186
187 static void mrsas_tran_tgt_free(dev_info_t *, dev_info_t *,
188 scsi_hba_tran_t *, struct scsi_device *);
189 static int mrsas_tran_bus_config(dev_info_t *, uint_t,
190 ddi_bus_config_op_t, void *, dev_info_t **);
191 static int mrsas_parse_devname(char *, int *, int *);
192 static int mrsas_config_all_devices(struct mrsas_instance *);
193 static int mrsas_config_ld(struct mrsas_instance *, uint16_t,
194 uint8_t, dev_info_t **);
195 static int mrsas_name_node(dev_info_t *, char *, int);
196 static void mrsas_issue_evt_taskq(struct mrsas_eventinfo *);
197 static void free_additional_dma_buffer(struct mrsas_instance *);
198 static void io_timeout_checker(void *);
199 static void mrsas_fm_init(struct mrsas_instance *);
200 static void mrsas_fm_fini(struct mrsas_instance *);
201
202 static struct mrsas_function_template mrsas_function_template_ppc = {
203 .read_fw_status_reg = read_fw_status_reg_ppc,
204 .issue_cmd = issue_cmd_ppc,
205 .issue_cmd_in_sync_mode = issue_cmd_in_sync_mode_ppc,
206 .issue_cmd_in_poll_mode = issue_cmd_in_poll_mode_ppc,
207 .enable_intr = enable_intr_ppc,
208 .disable_intr = disable_intr_ppc,
209 .intr_ack = intr_ack_ppc,
210 .init_adapter = mrsas_init_adapter_ppc
211 };
212
213
214 static struct mrsas_function_template mrsas_function_template_fusion = {
215 .read_fw_status_reg = tbolt_read_fw_status_reg,
216 .issue_cmd = tbolt_issue_cmd,
217 .issue_cmd_in_sync_mode = tbolt_issue_cmd_in_sync_mode,
218 .issue_cmd_in_poll_mode = tbolt_issue_cmd_in_poll_mode,
219 .enable_intr = tbolt_enable_intr,
220 .disable_intr = tbolt_disable_intr,
221 .intr_ack = tbolt_intr_ack,
222 .init_adapter = mrsas_init_adapter_tbolt
223 };
224
225
226 ddi_dma_attr_t mrsas_generic_dma_attr = {
227 DMA_ATTR_V0, /* dma_attr_version */
228 0, /* low DMA address range */
229 0xFFFFFFFFU, /* high DMA address range */
230 0xFFFFFFFFU, /* DMA counter register */
231 8, /* DMA address alignment */
232 0x07, /* DMA burstsizes */
233 1, /* min DMA size */
234 0xFFFFFFFFU, /* max DMA size */
235 0xFFFFFFFFU, /* segment boundary */
236 MRSAS_MAX_SGE_CNT, /* dma_attr_sglen */
237 512, /* granularity of device */
238 0 /* bus specific DMA flags */
239 };
240
241 int32_t mrsas_max_cap_maxxfer = 0x1000000;
242
243 /*
244 * Fix for: Thunderbolt controller IO timeout when IO write size is 1MEG,
245 * Limit size to 256K
246 */
247 uint32_t mrsas_tbolt_max_cap_maxxfer = (512 * 512);
248
249 /*
250 * cb_ops contains base level routines
251 */
252 static struct cb_ops mrsas_cb_ops = {
253 mrsas_open, /* open */
254 mrsas_close, /* close */
255 nodev, /* strategy */
256 nodev, /* print */
257 nodev, /* dump */
258 nodev, /* read */
259 nodev, /* write */
260 mrsas_ioctl, /* ioctl */
261 nodev, /* devmap */
262 nodev, /* mmap */
263 nodev, /* segmap */
264 nochpoll, /* poll */
265 nodev, /* cb_prop_op */
266 0, /* streamtab */
267 D_NEW | D_HOTPLUG, /* cb_flag */
268 CB_REV, /* cb_rev */
269 nodev, /* cb_aread */
270 nodev /* cb_awrite */
271 };
272
273 /*
274 * dev_ops contains configuration routines
275 */
276 static struct dev_ops mrsas_ops = {
277 DEVO_REV, /* rev, */
278 0, /* refcnt */
279 mrsas_getinfo, /* getinfo */
280 nulldev, /* identify */
281 nulldev, /* probe */
282 mrsas_attach, /* attach */
283 mrsas_detach, /* detach */
284 #ifdef __sparc
285 mrsas_reset, /* reset */
286 #else /* __sparc */
287 nodev,
288 #endif /* __sparc */
289 &mrsas_cb_ops, /* char/block ops */
290 NULL, /* bus ops */
291 NULL, /* power */
292 #ifdef __sparc
293 ddi_quiesce_not_needed
294 #else /* __sparc */
295 mrsas_quiesce /* quiesce */
296 #endif /* __sparc */
297 };
298
299 static struct modldrv modldrv = {
300 &mod_driverops, /* module type - driver */
301 MRSAS_VERSION,
302 &mrsas_ops, /* driver ops */
303 };
304
305 static struct modlinkage modlinkage = {
306 MODREV_1, /* ml_rev - must be MODREV_1 */
307 &modldrv, /* ml_linkage */
308 NULL /* end of driver linkage */
309 };
310
311 static struct ddi_device_acc_attr endian_attr = {
312 DDI_DEVICE_ATTR_V1,
313 DDI_STRUCTURE_LE_ACC,
314 DDI_STRICTORDER_ACC,
315 DDI_DEFAULT_ACC
316 };
317
318 /* Use the LSI Fast Path for the 2208 (tbolt) commands. */
319 unsigned int enable_fp = 1;
320
321
322 /*
323 * ************************************************************************** *
324 * *
325 * common entry points - for loadable kernel modules *
326 * *
327 * ************************************************************************** *
328 */
329
330 /*
331 * _init - initialize a loadable module
332 * @void
333 *
334 * The driver should perform any one-time resource allocation or data
335 * initialization during driver loading in _init(). For example, the driver
336 * should initialize any mutexes global to the driver in this routine.
337 * The driver should not, however, use _init() to allocate or initialize
338 * anything that has to do with a particular instance of the device.
382 {
383 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
384
385 return (mod_info(&modlinkage, modinfop));
386 }
387
388 /*
389 * _fini - prepare a loadable module for unloading
390 * @void
391 *
392 * In _fini(), the driver should release any resources that were allocated in
393 * _init(). The driver must remove itself from the system module list.
394 */
395 int
396 _fini(void)
397 {
398 int ret;
399
400 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
401
402 if ((ret = mod_remove(&modlinkage)) != DDI_SUCCESS) {
403 con_log(CL_ANN1,
404 (CE_WARN, "_fini: mod_remove() failed, error 0x%X", ret));
405 return (ret);
406 }
407
408 scsi_hba_fini(&modlinkage);
409 con_log(CL_DLEVEL1, (CE_NOTE, "_fini: scsi_hba_fini() done."));
410
411 ddi_soft_state_fini(&mrsas_state);
412 con_log(CL_DLEVEL1, (CE_NOTE, "_fini: ddi_soft_state_fini() done."));
413
414 return (ret);
415 }
416
417
418 /*
419 * ************************************************************************** *
420 * *
421 * common entry points - for autoconfiguration *
422 * *
423 * ************************************************************************** *
424 */
428 * @cmd:
429 *
430 * The kernel calls a driver's attach() entry point to attach an instance of
431 * a device (for MegaRAID, it is instance of a controller) or to resume
432 * operation for an instance of a device that has been suspended or has been
433 * shut down by the power management framework
434 * The attach() entry point typically includes the following types of
435 * processing:
436 * - allocate a soft-state structure for the device instance (for MegaRAID,
437 * controller instance)
438 * - initialize per-instance mutexes
439 * - initialize condition variables
440 * - register the device's interrupts (for MegaRAID, controller's interrupts)
441 * - map the registers and memory of the device instance (for MegaRAID,
442 * controller instance)
443 * - create minor device nodes for the device instance (for MegaRAID,
444 * controller instance)
445 * - report that the device instance (for MegaRAID, controller instance) has
446 * attached
447 */
448 static int
449 mrsas_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
450 {
451 int instance_no;
452 int nregs;
453 int i = 0;
454 uint8_t irq;
455 uint16_t vendor_id;
456 uint16_t device_id;
457 uint16_t subsysvid;
458 uint16_t subsysid;
459 uint16_t command;
460 off_t reglength = 0;
461 int intr_types = 0;
462 char *data;
463
464 scsi_hba_tran_t *tran;
465 ddi_dma_attr_t tran_dma_attr;
466 struct mrsas_instance *instance;
467
468 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
469
470 /* CONSTCOND */
471 ASSERT(NO_COMPETING_THREADS);
472
473 instance_no = ddi_get_instance(dip);
474
475 /*
476 * check to see whether this device is in a DMA-capable slot.
477 */
478 if (ddi_slaveonly(dip) == DDI_SUCCESS) {
479 cmn_err(CE_WARN,
480 "mr_sas%d: Device in slave-only slot, unused",
481 instance_no);
482 return (DDI_FAILURE);
483 }
484
485 switch (cmd) {
486 case DDI_ATTACH:
487 /* allocate the soft state for the instance */
488 if (ddi_soft_state_zalloc(mrsas_state, instance_no)
489 != DDI_SUCCESS) {
490 cmn_err(CE_WARN,
491 "mr_sas%d: Failed to allocate soft state",
492 instance_no);
493 return (DDI_FAILURE);
494 }
495
496 instance = (struct mrsas_instance *)ddi_get_soft_state
497 (mrsas_state, instance_no);
498
499 if (instance == NULL) {
500 cmn_err(CE_WARN,
501 "mr_sas%d: Bad soft state", instance_no);
502 ddi_soft_state_free(mrsas_state, instance_no);
503 return (DDI_FAILURE);
504 }
505
506 instance->unroll.softs = 1;
507
508 /* Setup the PCI configuration space handles */
509 if (pci_config_setup(dip, &instance->pci_handle) !=
510 DDI_SUCCESS) {
511 cmn_err(CE_WARN,
512 "mr_sas%d: pci config setup failed ",
513 instance_no);
514
515 ddi_soft_state_free(mrsas_state, instance_no);
516 return (DDI_FAILURE);
517 }
518
519 if (ddi_dev_nregs(dip, &nregs) != DDI_SUCCESS) {
520 cmn_err(CE_WARN,
521 "mr_sas: failed to get registers.");
522
523 pci_config_teardown(&instance->pci_handle);
524 ddi_soft_state_free(mrsas_state, instance_no);
525 return (DDI_FAILURE);
526 }
527
528 vendor_id = pci_config_get16(instance->pci_handle,
529 PCI_CONF_VENID);
530 device_id = pci_config_get16(instance->pci_handle,
531 PCI_CONF_DEVID);
532
533 subsysvid = pci_config_get16(instance->pci_handle,
534 PCI_CONF_SUBVENID);
535 subsysid = pci_config_get16(instance->pci_handle,
536 PCI_CONF_SUBSYSID);
537
538 pci_config_put16(instance->pci_handle, PCI_CONF_COMM,
547 subsysid, irq, MRSAS_VERSION));
548
549 /* enable bus-mastering */
550 command = pci_config_get16(instance->pci_handle,
551 PCI_CONF_COMM);
552
553 if (!(command & PCI_COMM_ME)) {
554 command |= PCI_COMM_ME;
555
556 pci_config_put16(instance->pci_handle,
557 PCI_CONF_COMM, command);
558
559 con_log(CL_ANN, (CE_CONT, "mr_sas%d: "
560 "enable bus-mastering", instance_no));
561 } else {
562 con_log(CL_DLEVEL1, (CE_CONT, "mr_sas%d: "
563 "bus-mastering already set", instance_no));
564 }
565
566 /* initialize function pointers */
567 switch (device_id) {
568 case PCI_DEVICE_ID_LSI_TBOLT:
569 case PCI_DEVICE_ID_LSI_INVADER:
570 con_log(CL_ANN, (CE_NOTE,
571 "mr_sas: 2208 T.B. device detected"));
572
573 instance->func_ptr =
574 &mrsas_function_template_fusion;
575 instance->tbolt = 1;
576 break;
577
578 case PCI_DEVICE_ID_LSI_2108VDE:
579 case PCI_DEVICE_ID_LSI_2108V:
580 con_log(CL_ANN, (CE_NOTE,
581 "mr_sas: 2108 Liberator device detected"));
582
583 instance->func_ptr =
584 &mrsas_function_template_ppc;
585 break;
586
587 default:
588 cmn_err(CE_WARN,
589 "mr_sas: Invalid device detected");
590
591 pci_config_teardown(&instance->pci_handle);
592 ddi_soft_state_free(mrsas_state, instance_no);
593 return (DDI_FAILURE);
594 }
595
596 instance->baseaddress = pci_config_get32(
597 instance->pci_handle, PCI_CONF_BASE0);
598 instance->baseaddress &= 0x0fffc;
599
600 instance->dip = dip;
601 instance->vendor_id = vendor_id;
602 instance->device_id = device_id;
603 instance->subsysvid = subsysvid;
604 instance->subsysid = subsysid;
605 instance->instance = instance_no;
606
607 /* Initialize FMA */
608 instance->fm_capabilities = ddi_prop_get_int(
609 DDI_DEV_T_ANY, instance->dip, DDI_PROP_DONTPASS,
610 "fm-capable", DDI_FM_EREPORT_CAPABLE |
611 DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE
612 | DDI_FM_ERRCB_CAPABLE);
613
614 mrsas_fm_init(instance);
615
616 /* Setup register map */
617 if ((ddi_dev_regsize(instance->dip,
618 REGISTER_SET_IO_2108, ®length) != DDI_SUCCESS) ||
619 reglength < MINIMUM_MFI_MEM_SZ) {
620 goto fail_attach;
621 }
622 if (reglength > DEFAULT_MFI_MEM_SZ) {
623 reglength = DEFAULT_MFI_MEM_SZ;
624 con_log(CL_DLEVEL1, (CE_NOTE,
625 "mr_sas: register length to map is 0x%lx bytes",
626 reglength));
627 }
628 if (ddi_regs_map_setup(instance->dip,
629 REGISTER_SET_IO_2108, &instance->regmap, 0,
630 reglength, &endian_attr, &instance->regmap_handle)
631 != DDI_SUCCESS) {
632 cmn_err(CE_WARN,
633 "mr_sas: couldn't map control registers");
634 goto fail_attach;
635 }
636
637 instance->unroll.regs = 1;
638
639 /*
640 * Disable Interrupt Now.
641 * Setup Software interrupt
642 */
643 instance->func_ptr->disable_intr(instance);
644
645 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
646 "mrsas-enable-msi", &data) == DDI_SUCCESS) {
647 if (strncmp(data, "no", 3) == 0) {
648 msi_enable = 0;
649 con_log(CL_ANN1, (CE_WARN,
650 "msi_enable = %d disabled", msi_enable));
651 }
652 ddi_prop_free(data);
653 }
654
655 con_log(CL_DLEVEL1, (CE_NOTE, "msi_enable = %d", msi_enable));
656
657 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
658 "mrsas-enable-fp", &data) == DDI_SUCCESS) {
659 if (strncmp(data, "no", 3) == 0) {
660 enable_fp = 0;
661 cmn_err(CE_NOTE,
662 "enable_fp = %d, Fast-Path disabled.\n",
663 enable_fp);
664 }
665
666 ddi_prop_free(data);
667 }
668
669 con_log(CL_DLEVEL1, (CE_NOTE, "enable_fp = %d\n", enable_fp));
670
671 /* Check for all supported interrupt types */
672 if (ddi_intr_get_supported_types(
673 dip, &intr_types) != DDI_SUCCESS) {
674 cmn_err(CE_WARN,
675 "ddi_intr_get_supported_types() failed");
676 goto fail_attach;
677 }
678
679 con_log(CL_DLEVEL1, (CE_NOTE,
680 "ddi_intr_get_supported_types() ret: 0x%x", intr_types));
681
682 /* Initialize and Setup Interrupt handler */
683 if (msi_enable && (intr_types & DDI_INTR_TYPE_MSIX)) {
684 if (mrsas_add_intrs(instance, DDI_INTR_TYPE_MSIX) !=
685 DDI_SUCCESS) {
686 cmn_err(CE_WARN,
687 "MSIX interrupt query failed");
688 goto fail_attach;
689 }
690 instance->intr_type = DDI_INTR_TYPE_MSIX;
691 } else if (msi_enable && (intr_types & DDI_INTR_TYPE_MSI)) {
692 if (mrsas_add_intrs(instance, DDI_INTR_TYPE_MSI) !=
693 DDI_SUCCESS) {
694 cmn_err(CE_WARN,
695 "MSI interrupt query failed");
696 goto fail_attach;
697 }
698 instance->intr_type = DDI_INTR_TYPE_MSI;
699 } else if (intr_types & DDI_INTR_TYPE_FIXED) {
700 msi_enable = 0;
701 if (mrsas_add_intrs(instance, DDI_INTR_TYPE_FIXED) !=
702 DDI_SUCCESS) {
703 cmn_err(CE_WARN,
704 "FIXED interrupt query failed");
705 goto fail_attach;
706 }
707 instance->intr_type = DDI_INTR_TYPE_FIXED;
708 } else {
709 cmn_err(CE_WARN, "Device cannot "
710 "suppport either FIXED or MSI/X "
711 "interrupts");
712 goto fail_attach;
713 }
714
715 instance->unroll.intr = 1;
716
717 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
718 "mrsas-enable-ctio", &data) == DDI_SUCCESS) {
719 if (strncmp(data, "no", 3) == 0) {
720 ctio_enable = 0;
721 con_log(CL_ANN1, (CE_WARN,
722 "ctio_enable = %d disabled", ctio_enable));
723 }
724 ddi_prop_free(data);
725 }
726
727 con_log(CL_DLEVEL1, (CE_WARN, "ctio_enable = %d", ctio_enable));
728
729 /* setup the mfi based low level driver */
730 if (mrsas_init_adapter(instance) != DDI_SUCCESS) {
731 cmn_err(CE_WARN, "mr_sas: "
732 "could not initialize the low level driver");
733
734 goto fail_attach;
735 }
736
737 /* Initialize all Mutex */
738 INIT_LIST_HEAD(&instance->completed_pool_list);
739 mutex_init(&instance->completed_pool_mtx, NULL,
740 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
741
742 mutex_init(&instance->sync_map_mtx, NULL,
743 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
744
745 mutex_init(&instance->app_cmd_pool_mtx, NULL,
746 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
747
748 mutex_init(&instance->config_dev_mtx, NULL,
749 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
750
751 mutex_init(&instance->cmd_pend_mtx, NULL,
752 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
753
754 mutex_init(&instance->ocr_flags_mtx, NULL,
755 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
756
757 mutex_init(&instance->int_cmd_mtx, NULL,
758 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
759 cv_init(&instance->int_cmd_cv, NULL, CV_DRIVER, NULL);
760
761 mutex_init(&instance->cmd_pool_mtx, NULL,
762 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
763
764 mutex_init(&instance->reg_write_mtx, NULL,
765 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
766
767 if (instance->tbolt) {
768 mutex_init(&instance->cmd_app_pool_mtx, NULL,
769 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
770
771 mutex_init(&instance->chip_mtx, NULL,
772 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
773
774 }
775
776 instance->unroll.mutexs = 1;
777
778 instance->timeout_id = (timeout_id_t)-1;
779
780 /* Register our soft-isr for highlevel interrupts. */
781 instance->isr_level = instance->intr_pri;
782 if (!(instance->tbolt)) {
783 if (instance->isr_level == HIGH_LEVEL_INTR) {
784 if (ddi_add_softintr(dip,
785 DDI_SOFTINT_HIGH,
786 &instance->soft_intr_id, NULL, NULL,
787 mrsas_softintr, (caddr_t)instance) !=
788 DDI_SUCCESS) {
789 cmn_err(CE_WARN,
790 "Software ISR did not register");
791
792 goto fail_attach;
793 }
794
795 instance->unroll.soft_isr = 1;
796
797 }
798 }
799
800 instance->softint_running = 0;
801
802 /* Allocate a transport structure */
803 tran = scsi_hba_tran_alloc(dip, SCSI_HBA_CANSLEEP);
804
805 if (tran == NULL) {
806 cmn_err(CE_WARN,
807 "scsi_hba_tran_alloc failed");
808 goto fail_attach;
809 }
810
835 tran->tran_unquiesce = mrsas_tran_unquiesce;
836 tran->tran_bus_config = mrsas_tran_bus_config;
837
838 if (mrsas_relaxed_ordering)
839 mrsas_generic_dma_attr.dma_attr_flags |=
840 DDI_DMA_RELAXED_ORDERING;
841
842
843 tran_dma_attr = mrsas_generic_dma_attr;
844 tran_dma_attr.dma_attr_sgllen = instance->max_num_sge;
845
846 /* Attach this instance of the hba */
847 if (scsi_hba_attach_setup(dip, &tran_dma_attr, tran, 0)
848 != DDI_SUCCESS) {
849 cmn_err(CE_WARN,
850 "scsi_hba_attach failed");
851
852 goto fail_attach;
853 }
854 instance->unroll.tranSetup = 1;
855 con_log(CL_ANN1,
856 (CE_CONT, "scsi_hba_attach_setup() done."));
857
858 /* create devctl node for cfgadm command */
859 if (ddi_create_minor_node(dip, "devctl",
860 S_IFCHR, INST2DEVCTL(instance_no),
861 DDI_NT_SCSI_NEXUS, 0) == DDI_FAILURE) {
862 cmn_err(CE_WARN,
863 "mr_sas: failed to create devctl node.");
864
865 goto fail_attach;
866 }
867
868 instance->unroll.devctl = 1;
869
870 /* create scsi node for cfgadm command */
871 if (ddi_create_minor_node(dip, "scsi", S_IFCHR,
872 INST2SCSI(instance_no), DDI_NT_SCSI_ATTACHMENT_POINT, 0) ==
873 DDI_FAILURE) {
874 cmn_err(CE_WARN,
875 "mr_sas: failed to create scsi node.");
876
877 goto fail_attach;
878 }
879
880 instance->unroll.scsictl = 1;
881
882 (void) sprintf(instance->iocnode, "%d:lsirdctl",
883 instance_no);
884
885 /*
886 * Create a node for applications
887 * for issuing ioctl to the driver.
888 */
889 if (ddi_create_minor_node(dip, instance->iocnode,
890 S_IFCHR, INST2LSIRDCTL(instance_no), DDI_PSEUDO, 0) ==
891 DDI_FAILURE) {
892 cmn_err(CE_WARN,
893 "mr_sas: failed to create ioctl node.");
894
895 goto fail_attach;
896 }
897
898 instance->unroll.ioctl = 1;
899
900 /* Create a taskq to handle dr events */
901 if ((instance->taskq = ddi_taskq_create(dip,
902 "mrsas_dr_taskq", 1, TASKQ_DEFAULTPRI, 0)) == NULL) {
903 cmn_err(CE_WARN,
904 "mr_sas: failed to create taskq ");
905 instance->taskq = NULL;
906 goto fail_attach;
907 }
908 instance->unroll.taskq = 1;
909 con_log(CL_ANN1, (CE_CONT, "ddi_taskq_create() done."));
910
911 /* enable interrupt */
912 instance->func_ptr->enable_intr(instance);
913
914 /* initiate AEN */
915 if (start_mfi_aen(instance)) {
916 cmn_err(CE_WARN,
917 "mr_sas: failed to initiate AEN.");
918 goto fail_attach;
919 }
920 instance->unroll.aenPend = 1;
921 con_log(CL_ANN1,
922 (CE_CONT, "AEN started for instance %d.", instance_no));
923
924 /* Finally! We are on the air. */
925 ddi_report_dev(dip);
926
927 /* FMA handle checking. */
928 if (mrsas_check_acc_handle(instance->regmap_handle) !=
929 DDI_SUCCESS) {
930 goto fail_attach;
931 }
932 if (mrsas_check_acc_handle(instance->pci_handle) !=
933 DDI_SUCCESS) {
934 goto fail_attach;
935 }
936
937 instance->mr_ld_list =
938 kmem_zalloc(MRDRV_MAX_LD * sizeof (struct mrsas_ld),
939 KM_SLEEP);
940 instance->unroll.ldlist_buff = 1;
941
942 #ifdef PDSUPPORT
943 if (instance->tbolt) {
944 instance->mr_tbolt_pd_max = MRSAS_TBOLT_PD_TGT_MAX;
945 instance->mr_tbolt_pd_list =
946 kmem_zalloc(MRSAS_TBOLT_GET_PD_MAX(instance) *
947 sizeof (struct mrsas_tbolt_pd), KM_SLEEP);
948 ASSERT(instance->mr_tbolt_pd_list);
949 for (i = 0; i < instance->mr_tbolt_pd_max; i++) {
950 instance->mr_tbolt_pd_list[i].lun_type =
951 MRSAS_TBOLT_PD_LUN;
952 instance->mr_tbolt_pd_list[i].dev_id =
953 (uint8_t)i;
954 }
955
956 instance->unroll.pdlist_buff = 1;
957 }
958 #endif
959 break;
960 case DDI_PM_RESUME:
961 con_log(CL_ANN, (CE_NOTE, "mr_sas: DDI_PM_RESUME"));
962 break;
963 case DDI_RESUME:
964 con_log(CL_ANN, (CE_NOTE, "mr_sas: DDI_RESUME"));
965 break;
966 default:
967 con_log(CL_ANN,
968 (CE_WARN, "mr_sas: invalid attach cmd=%x", cmd));
969 return (DDI_FAILURE);
970 }
971
972
973 con_log(CL_DLEVEL1,
974 (CE_NOTE, "mrsas_attach() return SUCCESS instance_num %d",
975 instance_no));
976 return (DDI_SUCCESS);
977
978 fail_attach:
979
980 mrsas_undo_resources(dip, instance);
981
982 mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
983 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
984
985 mrsas_fm_fini(instance);
986
987 pci_config_teardown(&instance->pci_handle);
988 ddi_soft_state_free(mrsas_state, instance_no);
989
990 con_log(CL_ANN, (CE_WARN, "mr_sas: return failure from mrsas_attach"));
991
992 cmn_err(CE_WARN, "mrsas_attach() return FAILURE instance_num %d",
993 instance_no);
994
995 return (DDI_FAILURE);
996 }
997
998 /*
999 * getinfo - gets device information
1000 * @dip:
1001 * @cmd:
1002 * @arg:
1003 * @resultp:
1004 *
1005 * The system calls getinfo() to obtain configuration information that only
1006 * the driver knows. The mapping of minor numbers to device instance is
1007 * entirely under the control of the driver. The system sometimes needs to ask
1008 * the driver which device a particular dev_t represents.
1009 * Given the device number return the devinfo pointer from the scsi_device
1010 * structure.
1011 */
1012 /*ARGSUSED*/
1013 static int
1089 con_log(CL_ANN, (CE_NOTE,
1090 "mr_sas%d: detaching device 0x%4x:0x%4x:0x%4x:0x%4x",
1091 instance_no, instance->vendor_id, instance->device_id,
1092 instance->subsysvid, instance->subsysid));
1093
1094 switch (cmd) {
1095 case DDI_DETACH:
1096 con_log(CL_ANN, (CE_NOTE,
1097 "mrsas_detach: DDI_DETACH"));
1098
1099 mutex_enter(&instance->config_dev_mtx);
1100 if (instance->timeout_id != (timeout_id_t)-1) {
1101 mutex_exit(&instance->config_dev_mtx);
1102 (void) untimeout(instance->timeout_id);
1103 instance->timeout_id = (timeout_id_t)-1;
1104 mutex_enter(&instance->config_dev_mtx);
1105 instance->unroll.timer = 0;
1106 }
1107 mutex_exit(&instance->config_dev_mtx);
1108
1109 if (instance->unroll.tranSetup == 1) {
1110 if (scsi_hba_detach(dip) != DDI_SUCCESS) {
1111 cmn_err(CE_WARN,
1112 "mr_sas2%d: failed to detach",
1113 instance_no);
1114 return (DDI_FAILURE);
1115 }
1116 instance->unroll.tranSetup = 0;
1117 con_log(CL_ANN1,
1118 (CE_CONT, "scsi_hba_dettach() done."));
1119 }
1120
1121 flush_cache(instance);
1122
1123 mrsas_undo_resources(dip, instance);
1124
1125 mrsas_fm_fini(instance);
1126
1127 pci_config_teardown(&instance->pci_handle);
1128 ddi_soft_state_free(mrsas_state, instance_no);
1129 break;
1130
1131 case DDI_PM_SUSPEND:
1132 con_log(CL_ANN, (CE_NOTE,
1133 "mrsas_detach: DDI_PM_SUSPEND"));
1134
1135 break;
1136 case DDI_SUSPEND:
1137 con_log(CL_ANN, (CE_NOTE,
1138 "mrsas_detach: DDI_SUSPEND"));
1139
1140 break;
1141 default:
1142 con_log(CL_ANN, (CE_WARN,
1143 "invalid detach command:0x%x", cmd));
1144 return (DDI_FAILURE);
1145 }
1146
1147 return (DDI_SUCCESS);
1148 }
1149
1150
1151 static void
1152 mrsas_undo_resources(dev_info_t *dip, struct mrsas_instance *instance)
1153 {
1154 int instance_no;
1155
1156 con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1157
1158
1159 instance_no = ddi_get_instance(dip);
1160
1161
1162 if (instance->unroll.ioctl == 1) {
1163 ddi_remove_minor_node(dip, instance->iocnode);
1164 instance->unroll.ioctl = 0;
1165 }
1166
1167 if (instance->unroll.scsictl == 1) {
1168 ddi_remove_minor_node(dip, "scsi");
1169 instance->unroll.scsictl = 0;
1170 }
1171
1172 if (instance->unroll.devctl == 1) {
1173 ddi_remove_minor_node(dip, "devctl");
1174 instance->unroll.devctl = 0;
1175 }
1176
1177 if (instance->unroll.tranSetup == 1) {
1178 if (scsi_hba_detach(dip) != DDI_SUCCESS) {
1179 cmn_err(CE_WARN,
1180 "mr_sas2%d: failed to detach", instance_no);
1181 return; /* DDI_FAILURE */
1182 }
1183 instance->unroll.tranSetup = 0;
1184 con_log(CL_ANN1, (CE_CONT, "scsi_hba_dettach() done."));
1185 }
1186
1187 if (instance->unroll.tran == 1) {
1188 scsi_hba_tran_free(instance->tran);
1189 instance->unroll.tran = 0;
1190 con_log(CL_ANN1, (CE_CONT, "scsi_hba_tran_free() done."));
1191 }
1192
1193 if (instance->unroll.syncCmd == 1) {
1194 if (instance->tbolt) {
1195 if (abort_syncmap_cmd(instance,
1196 instance->map_update_cmd)) {
1197 cmn_err(CE_WARN, "mrsas_detach: "
1198 "failed to abort previous syncmap command");
1199 }
1200
1201 instance->unroll.syncCmd = 0;
1202 con_log(CL_ANN1, (CE_CONT, "sync cmd aborted, done."));
1203 }
1204 }
1205
1206 if (instance->unroll.aenPend == 1) {
1207 if (abort_aen_cmd(instance, instance->aen_cmd))
1208 cmn_err(CE_WARN, "mrsas_detach: "
1209 "failed to abort prevous AEN command");
1210
1211 instance->unroll.aenPend = 0;
1212 con_log(CL_ANN1, (CE_CONT, "aen cmd aborted, done."));
1213 /* This means the controller is fully initialized and running */
1214 /* Shutdown should be a last command to controller. */
1215 /* shutdown_controller(); */
1216 }
1217
1218
1219 if (instance->unroll.timer == 1) {
1220 if (instance->timeout_id != (timeout_id_t)-1) {
1221 (void) untimeout(instance->timeout_id);
1222 instance->timeout_id = (timeout_id_t)-1;
1223
1224 instance->unroll.timer = 0;
1225 }
1226 }
1227
1228 instance->func_ptr->disable_intr(instance);
1229
1230
1231 if (instance->unroll.mutexs == 1) {
1232 mutex_destroy(&instance->cmd_pool_mtx);
1233 mutex_destroy(&instance->app_cmd_pool_mtx);
1234 mutex_destroy(&instance->cmd_pend_mtx);
1235 mutex_destroy(&instance->completed_pool_mtx);
1236 mutex_destroy(&instance->sync_map_mtx);
1237 mutex_destroy(&instance->int_cmd_mtx);
1238 cv_destroy(&instance->int_cmd_cv);
1239 mutex_destroy(&instance->config_dev_mtx);
1240 mutex_destroy(&instance->ocr_flags_mtx);
1241 mutex_destroy(&instance->reg_write_mtx);
1242
1243 if (instance->tbolt) {
1244 mutex_destroy(&instance->cmd_app_pool_mtx);
1245 mutex_destroy(&instance->chip_mtx);
1246 }
1247
1248 instance->unroll.mutexs = 0;
1249 con_log(CL_ANN1, (CE_CONT, "Destroy mutex & cv, done."));
1250 }
1251
1252
1253 if (instance->unroll.soft_isr == 1) {
1254 ddi_remove_softintr(instance->soft_intr_id);
1255 instance->unroll.soft_isr = 0;
1256 }
1257
1258 if (instance->unroll.intr == 1) {
1259 mrsas_rem_intrs(instance);
1260 instance->unroll.intr = 0;
1261 }
1262
1263
1264 if (instance->unroll.taskq == 1) {
1265 if (instance->taskq) {
1266 ddi_taskq_destroy(instance->taskq);
1267 instance->unroll.taskq = 0;
1268 }
1269
1270 }
1271
1272 /*
1273 * free dma memory allocated for
1274 * cmds/frames/queues/driver version etc
1275 */
1276 if (instance->unroll.verBuff == 1) {
1277 (void) mrsas_free_dma_obj(instance, instance->drv_ver_dma_obj);
1278 instance->unroll.verBuff = 0;
1279 }
1280
1281 if (instance->unroll.pdlist_buff == 1) {
1282 if (instance->mr_tbolt_pd_list != NULL) {
1283 kmem_free(instance->mr_tbolt_pd_list,
1284 MRSAS_TBOLT_GET_PD_MAX(instance) *
1285 sizeof (struct mrsas_tbolt_pd));
1286 }
1287
1288 instance->mr_tbolt_pd_list = NULL;
1289 instance->unroll.pdlist_buff = 0;
1290 }
1291
1292 if (instance->unroll.ldlist_buff == 1) {
1293 if (instance->mr_ld_list != NULL) {
1294 kmem_free(instance->mr_ld_list, MRDRV_MAX_LD
1295 * sizeof (struct mrsas_ld));
1296 }
1297
1298 instance->mr_ld_list = NULL;
1299 instance->unroll.ldlist_buff = 0;
1300 }
1301
1302 if (instance->tbolt) {
1303 if (instance->unroll.alloc_space_mpi2 == 1) {
1304 free_space_for_mpi2(instance);
1305 instance->unroll.alloc_space_mpi2 = 0;
1306 }
1307 } else {
1308 if (instance->unroll.alloc_space_mfi == 1) {
1309 free_space_for_mfi(instance);
1310 instance->unroll.alloc_space_mfi = 0;
1311 }
1312 }
1313
1314 if (instance->unroll.regs == 1) {
1315 ddi_regs_map_free(&instance->regmap_handle);
1316 instance->unroll.regs = 0;
1317 con_log(CL_ANN1, (CE_CONT, "ddi_regs_map_free() done."));
1318 }
1319 }
1320
1321
1322
1323 /*
1324 * ************************************************************************** *
1325 * *
1326 * common entry points - for character driver types *
1327 * *
1328 * ************************************************************************** *
1329 */
1330 /*
1331 * open - gets access to a device
1332 * @dev:
1333 * @openflags:
1334 * @otyp:
1335 * @credp:
1336 *
1337 * Access to a device by one or more application programs is controlled
1338 * through the open() and close() entry points. The primary function of
1418 mrsas_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp,
1419 int *rvalp)
1420 {
1421 int rval = 0;
1422
1423 struct mrsas_instance *instance;
1424 struct mrsas_ioctl *ioctl;
1425 struct mrsas_aen aen;
1426 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1427
1428 instance = ddi_get_soft_state(mrsas_state, MINOR2INST(getminor(dev)));
1429
1430 if (instance == NULL) {
1431 /* invalid minor number */
1432 con_log(CL_ANN, (CE_WARN, "mr_sas: adapter not found."));
1433 return (ENXIO);
1434 }
1435
1436 ioctl = (struct mrsas_ioctl *)kmem_zalloc(sizeof (struct mrsas_ioctl),
1437 KM_SLEEP);
1438 ASSERT(ioctl);
1439
1440 switch ((uint_t)cmd) {
1441 case MRSAS_IOCTL_FIRMWARE:
1442 if (ddi_copyin((void *)arg, ioctl,
1443 sizeof (struct mrsas_ioctl), mode)) {
1444 con_log(CL_ANN, (CE_WARN, "mrsas_ioctl: "
1445 "ERROR IOCTL copyin"));
1446 kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1447 return (EFAULT);
1448 }
1449
1450 if (ioctl->control_code == MRSAS_DRIVER_IOCTL_COMMON) {
1451 rval = handle_drv_ioctl(instance, ioctl, mode);
1452 } else {
1453 rval = handle_mfi_ioctl(instance, ioctl, mode);
1454 }
1455
1456 if (ddi_copyout((void *)ioctl, (void *)arg,
1457 (sizeof (struct mrsas_ioctl) - 1), mode)) {
1458 con_log(CL_ANN, (CE_WARN,
1459 "mrsas_ioctl: copy_to_user failed"));
1460 rval = 1;
1461 }
1462
1463 break;
1464 case MRSAS_IOCTL_AEN:
1465 if (ddi_copyin((void *) arg, &aen,
1466 sizeof (struct mrsas_aen), mode)) {
1467 con_log(CL_ANN, (CE_WARN,
1468 "mrsas_ioctl: ERROR AEN copyin"));
1469 kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1470 return (EFAULT);
1471 }
1472
1473 rval = handle_mfi_aen(instance, &aen);
1474
1475 if (ddi_copyout((void *) &aen, (void *)arg,
1476 sizeof (struct mrsas_aen), mode)) {
1477 con_log(CL_ANN, (CE_WARN,
1478 "mrsas_ioctl: copy_to_user failed"));
1479 rval = 1;
1480 }
1481
1482 break;
1483 default:
1484 rval = scsi_hba_ioctl(dev, cmd, arg,
1485 mode, credp, rvalp);
1486
1487 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_ioctl: "
1488 "scsi_hba_ioctl called, ret = %x.", rval));
1489 }
1490
1491 kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1492 return (rval);
1493 }
1494
1495 /*
1496 * ************************************************************************** *
1497 * *
1498 * common entry points - for block driver types *
1499 * *
1500 * ************************************************************************** *
1501 */
1502 #ifdef __sparc
1503 /*
1504 * reset - TBD
1505 * @dip:
1506 * @cmd:
1507 *
1508 * TBD
1509 */
1510 /*ARGSUSED*/
1511 static int
1512 mrsas_reset(dev_info_t *dip, ddi_reset_cmd_t cmd)
1513 {
1514 int instance_no;
1515
1516 struct mrsas_instance *instance;
1517
1518 instance_no = ddi_get_instance(dip);
1519 instance = (struct mrsas_instance *)ddi_get_soft_state
1520 (mrsas_state, instance_no);
1521
1522 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1523
1524 if (!instance) {
1525 con_log(CL_ANN, (CE_WARN, "mr_sas:%d could not get adapter "
1526 "in reset", instance_no));
1527 return (DDI_FAILURE);
1528 }
1529
1530 instance->func_ptr->disable_intr(instance);
1531
1532 con_log(CL_ANN1, (CE_CONT, "flushing cache for instance %d",
1533 instance_no));
1534
1535 flush_cache(instance);
1536
1537 return (DDI_SUCCESS);
1538 }
1539 #else /* __sparc */
1540 /*ARGSUSED*/
1541 static int
1542 mrsas_quiesce(dev_info_t *dip)
1543 {
1544 int instance_no;
1545
1546 struct mrsas_instance *instance;
1547
1548 instance_no = ddi_get_instance(dip);
1549 instance = (struct mrsas_instance *)ddi_get_soft_state
1550 (mrsas_state, instance_no);
1551
1552 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1553
1554 if (!instance) {
1555 con_log(CL_ANN1, (CE_WARN, "mr_sas:%d could not get adapter "
1556 "in quiesce", instance_no));
1557 return (DDI_FAILURE);
1558 }
1559 if (instance->deadadapter || instance->adapterresetinprogress) {
1560 con_log(CL_ANN1, (CE_WARN, "mr_sas:%d adapter is not in "
1561 "healthy state", instance_no));
1568 }
1569
1570 if (instance->tbolt) {
1571 if (abort_syncmap_cmd(instance,
1572 instance->map_update_cmd)) {
1573 cmn_err(CE_WARN,
1574 "mrsas_detach: failed to abort "
1575 "previous syncmap command");
1576 return (DDI_FAILURE);
1577 }
1578 }
1579
1580 instance->func_ptr->disable_intr(instance);
1581
1582 con_log(CL_ANN1, (CE_CONT, "flushing cache for instance %d",
1583 instance_no));
1584
1585 flush_cache(instance);
1586
1587 if (wait_for_outstanding(instance)) {
1588 con_log(CL_ANN1,
1589 (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
1590 return (DDI_FAILURE);
1591 }
1592 return (DDI_SUCCESS);
1593 }
1594 #endif /* __sparc */
1595
1596 /*
1597 * ************************************************************************** *
1598 * *
1599 * entry points (SCSI HBA) *
1600 * *
1601 * ************************************************************************** *
1602 */
1603 /*
1604 * tran_tgt_init - initialize a target device instance
1605 * @hba_dip:
1606 * @tgt_dip:
1607 * @tran:
1608 * @sd:
1609 *
1610 * The tran_tgt_init() entry point enables the HBA to allocate and initialize
1611 * any per-target resources. tran_tgt_init() also enables the HBA to qualify
1612 * the device's address as valid and supportable for that particular HBA.
1613 * By returning DDI_FAILURE, the instance of the target driver for that device
1614 * is not probed or attached.
1617 static int
1618 mrsas_tran_tgt_init(dev_info_t *hba_dip, dev_info_t *tgt_dip,
1619 scsi_hba_tran_t *tran, struct scsi_device *sd)
1620 {
1621 struct mrsas_instance *instance;
1622 uint16_t tgt = sd->sd_address.a_target;
1623 uint8_t lun = sd->sd_address.a_lun;
1624 dev_info_t *child = NULL;
1625
1626 con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init target %d lun %d",
1627 tgt, lun));
1628
1629 instance = ADDR2MR(&sd->sd_address);
1630
1631 if (ndi_dev_is_persistent_node(tgt_dip) == 0) {
1632 /*
1633 * If no persistent node exists, we don't allow .conf node
1634 * to be created.
1635 */
1636 if ((child = mrsas_find_child(instance, tgt, lun)) != NULL) {
1637 con_log(CL_DLEVEL2,
1638 (CE_NOTE, "mrsas_tgt_init find child ="
1639 " %p t = %d l = %d", (void *)child, tgt, lun));
1640 if (ndi_merge_node(tgt_dip, mrsas_name_node) !=
1641 DDI_SUCCESS)
1642 /* Create this .conf node */
1643 return (DDI_SUCCESS);
1644 }
1645 con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init in ndi_per "
1646 "DDI_FAILURE t = %d l = %d", tgt, lun));
1647 return (DDI_FAILURE);
1648
1649 }
1650
1651 con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init dev_dip %p tgt_dip %p",
1652 (void *)instance->mr_ld_list[tgt].dip, (void *)tgt_dip));
1653
1654 if (tgt < MRDRV_MAX_LD && lun == 0) {
1655 if (instance->mr_ld_list[tgt].dip == NULL &&
1656 strcmp(ddi_driver_name(sd->sd_dev), "sd") == 0) {
1657 mutex_enter(&instance->config_dev_mtx);
1658 instance->mr_ld_list[tgt].dip = tgt_dip;
1659 instance->mr_ld_list[tgt].lun_type = MRSAS_LD_LUN;
1660 instance->mr_ld_list[tgt].flag = MRDRV_TGT_VALID;
1661 mutex_exit(&instance->config_dev_mtx);
1662 }
1663 }
1664
1665 #ifdef PDSUPPORT
1666 else if (instance->tbolt) {
1667 if (instance->mr_tbolt_pd_list[tgt].dip == NULL) {
1668 mutex_enter(&instance->config_dev_mtx);
1669 instance->mr_tbolt_pd_list[tgt].dip = tgt_dip;
1670 instance->mr_tbolt_pd_list[tgt].flag =
1671 MRDRV_TGT_VALID;
1672 mutex_exit(&instance->config_dev_mtx);
1673 con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_tgt_init:"
1674 "t%xl%x", tgt, lun));
1675 }
1676 }
1677 #endif
1678
1679 return (DDI_SUCCESS);
1680 }
1681
1682 /*ARGSUSED*/
1683 static void
1684 mrsas_tran_tgt_free(dev_info_t *hba_dip, dev_info_t *tgt_dip,
1685 scsi_hba_tran_t *hba_tran, struct scsi_device *sd)
1686 {
1687 struct mrsas_instance *instance;
1688 int tgt = sd->sd_address.a_target;
1689 int lun = sd->sd_address.a_lun;
1690
1691 instance = ADDR2MR(&sd->sd_address);
1692
1693 con_log(CL_DLEVEL2, (CE_NOTE, "tgt_free t = %d l = %d", tgt, lun));
1694
1695 if (tgt < MRDRV_MAX_LD && lun == 0) {
1696 if (instance->mr_ld_list[tgt].dip == tgt_dip) {
1697 mutex_enter(&instance->config_dev_mtx);
1698 instance->mr_ld_list[tgt].dip = NULL;
1699 mutex_exit(&instance->config_dev_mtx);
1700 }
1701 }
1702
1703 #ifdef PDSUPPORT
1704 else if (instance->tbolt) {
1705 mutex_enter(&instance->config_dev_mtx);
1706 instance->mr_tbolt_pd_list[tgt].dip = NULL;
1707 mutex_exit(&instance->config_dev_mtx);
1708 con_log(CL_ANN1, (CE_NOTE, "tgt_free: Setting dip = NULL"
1709 "for tgt:%x", tgt));
1710 }
1711 #endif
1712
1713 }
1714
1715 dev_info_t *
1716 mrsas_find_child(struct mrsas_instance *instance, uint16_t tgt, uint8_t lun)
1717 {
1718 dev_info_t *child = NULL;
1719 char addr[SCSI_MAXNAMELEN];
1720 char tmp[MAXNAMELEN];
1721
1722 (void) sprintf(addr, "%x,%x", tgt, lun);
1723 for (child = ddi_get_child(instance->dip); child;
1724 child = ddi_get_next_sibling(child)) {
1917 * NULL and appropriate reason provided in pkt_reason field
1918 */
1919 if (cmd_done) {
1920 pkt->pkt_reason = CMD_CMPLT;
1921 pkt->pkt_scbp[0] = STATUS_GOOD;
1922 pkt->pkt_state |= STATE_GOT_BUS | STATE_GOT_TARGET
1923 | STATE_SENT_CMD;
1924 if (((pkt->pkt_flags & FLAG_NOINTR) == 0) && pkt->pkt_comp) {
1925 (*pkt->pkt_comp)(pkt);
1926 }
1927
1928 return (TRAN_ACCEPT);
1929 }
1930
1931 if (cmd == NULL) {
1932 return (TRAN_BUSY);
1933 }
1934
1935 if ((pkt->pkt_flags & FLAG_NOINTR) == 0) {
1936 if (instance->fw_outstanding > instance->max_fw_cmds) {
1937 con_log(CL_ANN, (CE_CONT, "mr_sas:Firmware busy"));
1938 DTRACE_PROBE2(start_tran_err,
1939 uint16_t, instance->fw_outstanding,
1940 uint16_t, instance->max_fw_cmds);
1941 return_mfi_pkt(instance, cmd);
1942 return (TRAN_BUSY);
1943 }
1944
1945 /* Synchronize the Cmd frame for the controller */
1946 (void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle, 0, 0,
1947 DDI_DMA_SYNC_FORDEV);
1948 con_log(CL_ANN, (CE_CONT, "issue_cmd_ppc: SCSI CDB[0]=0x%x"
1949 "cmd->index:%x\n", pkt->pkt_cdbp[0], cmd->index));
1950 instance->func_ptr->issue_cmd(cmd, instance);
1951
1952 } else {
1953 struct mrsas_header *hdr = &cmd->frame->hdr;
1954
1955 instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd);
1956
1957 pkt->pkt_reason = CMD_CMPLT;
1958 pkt->pkt_statistics = 0;
1959 pkt->pkt_state |= STATE_XFERRED_DATA | STATE_GOT_STATUS;
1960
1961 switch (ddi_get8(cmd->frame_dma_obj.acc_handle,
1962 &hdr->cmd_status)) {
1963 case MFI_STAT_OK:
1964 pkt->pkt_scbp[0] = STATUS_GOOD;
1965 break;
1966
1967 case MFI_STAT_SCSI_DONE_WITH_ERROR:
1968 con_log(CL_ANN, (CE_CONT,
1969 "mrsas_tran_start: scsi done with error"));
1970 pkt->pkt_reason = CMD_CMPLT;
1971 pkt->pkt_statistics = 0;
1972
1973 ((struct scsi_status *)pkt->pkt_scbp)->sts_chk = 1;
1974 break;
1975
1976 case MFI_STAT_DEVICE_NOT_FOUND:
1977 con_log(CL_ANN, (CE_CONT,
1978 "mrsas_tran_start: device not found error"));
1979 pkt->pkt_reason = CMD_DEV_GONE;
1980 pkt->pkt_statistics = STAT_DISCON;
1981 break;
1982
1983 default:
1984 ((struct scsi_status *)pkt->pkt_scbp)->sts_busy = 1;
1985 }
1986
1987 (void) mrsas_common_check(instance, cmd);
1988 DTRACE_PROBE2(start_nointr_done, uint8_t, hdr->cmd,
1989 uint8_t, hdr->cmd_status);
1990 return_mfi_pkt(instance, cmd);
1991
1992 if (pkt->pkt_comp) {
1993 (*pkt->pkt_comp)(pkt);
1994 }
1995
1996 }
1997
1998 return (TRAN_ACCEPT);
1999 }
2000
2001 /*
2002 * tran_abort - Abort any commands that are currently in transport
2003 * @ap:
2004 * @pkt:
2005 *
2006 * The tran_abort() entry point for a SCSI HBA driver is called to abort any
2007 * commands that are currently in transport for a particular target. This entry
2008 * point is called when a target driver calls scsi_abort(). The tran_abort()
2009 * entry point should attempt to abort the command denoted by the pkt
2025 /*
2026 * tran_reset - reset either the SCSI bus or target
2027 * @ap:
2028 * @level:
2029 *
2030 * The tran_reset() entry point for a SCSI HBA driver is called to reset either
2031 * the SCSI bus or a particular SCSI target device. This entry point is called
2032 * when a target driver calls scsi_reset(). The tran_reset() entry point must
2033 * reset the SCSI bus if level is RESET_ALL. If level is RESET_TARGET, just the
2034 * particular target or logical unit must be reset.
2035 */
2036 /*ARGSUSED*/
2037 static int
2038 mrsas_tran_reset(struct scsi_address *ap, int level)
2039 {
2040 struct mrsas_instance *instance = ADDR2MR(ap);
2041
2042 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2043
2044 if (wait_for_outstanding(instance)) {
2045 con_log(CL_ANN1,
2046 (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
2047 return (DDI_FAILURE);
2048 } else {
2049 return (DDI_SUCCESS);
2050 }
2051 }
2052
2053 #if 0
2054 /*
2055 * tran_bus_reset - reset the SCSI bus
2056 * @dip:
2057 * @level:
2058 *
2059 * The tran_bus_reset() vector in the scsi_hba_tran structure should be
2060 * initialized during the HBA driver's attach(). The vector should point to
2061 * an HBA entry point that is to be called when a user initiates a bus reset.
2062 * Implementation is hardware specific. If the HBA driver cannot reset the
2063 * SCSI bus without affecting the targets, the driver should fail RESET_BUS
2064 * or not initialize this vector.
2065 */
2066 /*ARGSUSED*/
2067 static int
2068 mrsas_tran_bus_reset(dev_info_t *dip, int level)
2069 {
2070 int instance_no = ddi_get_instance(dip);
2071
2072 struct mrsas_instance *instance = ddi_get_soft_state(mrsas_state,
2073 instance_no);
2074
2075 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2076
2077 if (wait_for_outstanding(instance)) {
2078 con_log(CL_ANN1,
2079 (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
2080 return (DDI_FAILURE);
2081 } else {
2082 return (DDI_SUCCESS);
2083 }
2084 }
2085 #endif
2086
2087 /*
2088 * tran_getcap - get one of a set of SCSA-defined capabilities
2089 * @ap:
2090 * @cap:
2091 * @whom:
2092 *
2093 * The target driver can request the current setting of the capability for a
2094 * particular target by setting the whom parameter to nonzero. A whom value of
2095 * zero indicates a request for the current setting of the general capability
2096 * for the SCSI bus or for adapter hardware. The tran_getcap() should return -1
2097 * for undefined capabilities or the current value of the requested capability.
2098 */
2099 /*ARGSUSED*/
2100 static int
2101 mrsas_tran_getcap(struct scsi_address *ap, char *cap, int whom)
2102 {
2103 int rval = 0;
2104
2105 struct mrsas_instance *instance = ADDR2MR(ap);
2342
2343 return (1);
2344 }
2345
2346
2347 /*
2348 * mrsas_isr(caddr_t)
2349 *
2350 * The Interrupt Service Routine
2351 *
2352 * Collect status for all completed commands and do callback
2353 *
2354 */
2355 static uint_t
2356 mrsas_isr(struct mrsas_instance *instance)
2357 {
2358 int need_softintr;
2359 uint32_t producer;
2360 uint32_t consumer;
2361 uint32_t context;
2362 int retval;
2363
2364 struct mrsas_cmd *cmd;
2365 struct mrsas_header *hdr;
2366 struct scsi_pkt *pkt;
2367
2368 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2369 ASSERT(instance);
2370 if (instance->tbolt) {
2371 mutex_enter(&instance->chip_mtx);
2372 if ((instance->intr_type == DDI_INTR_TYPE_FIXED) &&
2373 !(instance->func_ptr->intr_ack(instance))) {
2374 mutex_exit(&instance->chip_mtx);
2375 return (DDI_INTR_UNCLAIMED);
2376 }
2377 retval = mr_sas_tbolt_process_outstanding_cmd(instance);
2378 mutex_exit(&instance->chip_mtx);
2379 return (retval);
2380 } else {
2381 if ((instance->intr_type == DDI_INTR_TYPE_FIXED) &&
2382 !instance->func_ptr->intr_ack(instance)) {
2383 return (DDI_INTR_UNCLAIMED);
2384 }
2385 }
2386
2387 (void) ddi_dma_sync(instance->mfi_internal_dma_obj.dma_handle,
2388 0, 0, DDI_DMA_SYNC_FORCPU);
2389
2390 if (mrsas_check_dma_handle(instance->mfi_internal_dma_obj.dma_handle)
2391 != DDI_SUCCESS) {
2392 mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
2393 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
2394 con_log(CL_ANN1, (CE_WARN,
2395 "mr_sas_isr(): FMA check, returning DDI_INTR_UNCLAIMED"));
2396 return (DDI_INTR_CLAIMED);
2397 }
2398 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2399
2400 #ifdef OCRDEBUG
2401 if (debug_consecutive_timeout_after_ocr_g == 1) {
2402 con_log(CL_ANN1, (CE_NOTE,
2403 "simulating consecutive timeout after ocr"));
2404 return (DDI_INTR_CLAIMED);
2405 }
2406 #endif
2407
2408 mutex_enter(&instance->completed_pool_mtx);
2409 mutex_enter(&instance->cmd_pend_mtx);
2410
2411 producer = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
2412 instance->producer);
2413 consumer = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
2414 instance->consumer);
2415
2416 con_log(CL_ANN, (CE_CONT, " producer %x consumer %x ",
2417 producer, consumer));
2418 if (producer == consumer) {
2419 con_log(CL_ANN, (CE_WARN, "producer == consumer case"));
2420 DTRACE_PROBE2(isr_pc_err, uint32_t, producer,
2421 uint32_t, consumer);
2422 mutex_exit(&instance->cmd_pend_mtx);
2423 mutex_exit(&instance->completed_pool_mtx);
2424 return (DDI_INTR_CLAIMED);
2425 }
2426
2427 while (consumer != producer) {
2428 context = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
2429 &instance->reply_queue[consumer]);
2430 cmd = instance->cmd_list[context];
2431
2432 if (cmd->sync_cmd == MRSAS_TRUE) {
2433 hdr = (struct mrsas_header *)&cmd->frame->hdr;
2434 if (hdr) {
2435 mlist_del_init(&cmd->list);
2436 }
2437 } else {
2438 pkt = cmd->pkt;
2439 if (pkt) {
2440 mlist_del_init(&cmd->list);
2441 }
2485 * *
2486 * ************************************************************************** *
2487 */
2488 /*
2489 * get_mfi_pkt : Get a command from the free pool
2490 * After successful allocation, the caller of this routine
2491 * must clear the frame buffer (memset to zero) before
2492 * using the packet further.
2493 *
2494 * ***** Note *****
2495 * After clearing the frame buffer the context id of the
2496 * frame buffer SHOULD be restored back.
2497 */
2498 static struct mrsas_cmd *
2499 get_mfi_pkt(struct mrsas_instance *instance)
2500 {
2501 mlist_t *head = &instance->cmd_pool_list;
2502 struct mrsas_cmd *cmd = NULL;
2503
2504 mutex_enter(&instance->cmd_pool_mtx);
2505
2506 if (!mlist_empty(head)) {
2507 cmd = mlist_entry(head->next, struct mrsas_cmd, list);
2508 mlist_del_init(head->next);
2509 }
2510 if (cmd != NULL) {
2511 cmd->pkt = NULL;
2512 cmd->retry_count_for_ocr = 0;
2513 cmd->drv_pkt_time = 0;
2514
2515 }
2516 mutex_exit(&instance->cmd_pool_mtx);
2517
2518 return (cmd);
2519 }
2520
2521 static struct mrsas_cmd *
2522 get_mfi_app_pkt(struct mrsas_instance *instance)
2523 {
2524 mlist_t *head = &instance->app_cmd_pool_list;
2525 struct mrsas_cmd *cmd = NULL;
2526
2527 mutex_enter(&instance->app_cmd_pool_mtx);
2528
2529 if (!mlist_empty(head)) {
2530 cmd = mlist_entry(head->next, struct mrsas_cmd, list);
2531 mlist_del_init(head->next);
2532 }
2533 if (cmd != NULL) {
2534 cmd->pkt = NULL;
2535 cmd->retry_count_for_ocr = 0;
2536 cmd->drv_pkt_time = 0;
2537 }
2538
2539 mutex_exit(&instance->app_cmd_pool_mtx);
2540
2541 return (cmd);
2542 }
2543 /*
2544 * return_mfi_pkt : Return a cmd to free command pool
2545 */
2546 static void
2547 return_mfi_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
2548 {
2549 mutex_enter(&instance->cmd_pool_mtx);
2550 /* use mlist_add_tail for debug assistance */
2551 mlist_add_tail(&cmd->list, &instance->cmd_pool_list);
2552
2553 mutex_exit(&instance->cmd_pool_mtx);
2554 }
2555
2556 static void
2557 return_mfi_app_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
2558 {
2559 mutex_enter(&instance->app_cmd_pool_mtx);
2560
2561 mlist_add(&cmd->list, &instance->app_cmd_pool_list);
2562
2563 mutex_exit(&instance->app_cmd_pool_mtx);
2564 }
2565 void
2566 push_pending_mfi_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
2567 {
2568 struct scsi_pkt *pkt;
2569 struct mrsas_header *hdr;
2570 con_log(CL_DLEVEL2, (CE_NOTE, "push_pending_pkt(): Called\n"));
2571 mutex_enter(&instance->cmd_pend_mtx);
2572 mlist_del_init(&cmd->list);
2573 mlist_add_tail(&cmd->list, &instance->cmd_pend_list);
2574 if (cmd->sync_cmd == MRSAS_TRUE) {
2575 hdr = (struct mrsas_header *)&cmd->frame->hdr;
2576 if (hdr) {
2577 con_log(CL_ANN1, (CE_CONT,
2578 "push_pending_mfi_pkt: "
2579 "cmd %p index %x "
2580 "time %llx",
2581 (void *)cmd, cmd->index,
2582 gethrtime()));
2583 /* Wait for specified interval */
2584 cmd->drv_pkt_time = ddi_get16(
2585 cmd->frame_dma_obj.acc_handle, &hdr->timeout);
2586 if (cmd->drv_pkt_time < debug_timeout_g)
2587 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
2588 con_log(CL_ANN1, (CE_CONT,
2589 "push_pending_pkt(): "
2590 "Called IO Timeout Value %x\n",
2591 cmd->drv_pkt_time));
2610 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
2611 }
2612 }
2613
2614 mutex_exit(&instance->cmd_pend_mtx);
2615
2616 }
2617
2618 int
2619 mrsas_print_pending_cmds(struct mrsas_instance *instance)
2620 {
2621 mlist_t *head = &instance->cmd_pend_list;
2622 mlist_t *tmp = head;
2623 struct mrsas_cmd *cmd = NULL;
2624 struct mrsas_header *hdr;
2625 unsigned int flag = 1;
2626 struct scsi_pkt *pkt;
2627 int saved_level;
2628 int cmd_count = 0;
2629
2630 saved_level = debug_level_g;
2631 debug_level_g = CL_ANN1;
2632
2633 cmn_err(CE_NOTE, "mrsas_print_pending_cmds(): Called\n");
2634
2635 while (flag) {
2636 mutex_enter(&instance->cmd_pend_mtx);
2637 tmp = tmp->next;
2638 if (tmp == head) {
2639 mutex_exit(&instance->cmd_pend_mtx);
2640 flag = 0;
2641 con_log(CL_ANN1, (CE_CONT, "mrsas_print_pending_cmds():"
2642 " NO MORE CMDS PENDING....\n"));
2643 break;
2644 } else {
2645 cmd = mlist_entry(tmp, struct mrsas_cmd, list);
2646 mutex_exit(&instance->cmd_pend_mtx);
2647 if (cmd) {
2648 if (cmd->sync_cmd == MRSAS_TRUE) {
2649 hdr = (struct mrsas_header *)
2650 &cmd->frame->hdr;
2651 if (hdr) {
2652 con_log(CL_ANN1, (CE_CONT,
2653 "print: cmd %p index 0x%x "
2654 "drv_pkt_time 0x%x (NO-PKT)"
2655 " hdr %p\n", (void *)cmd,
2656 cmd->index,
2657 cmd->drv_pkt_time,
2658 (void *)hdr));
2659 }
2660 } else {
2661 pkt = cmd->pkt;
2662 if (pkt) {
2663 con_log(CL_ANN1, (CE_CONT,
2664 "print: cmd %p index 0x%x "
2665 "drv_pkt_time 0x%x pkt %p \n",
2666 (void *)cmd, cmd->index,
2667 cmd->drv_pkt_time, (void *)pkt));
2668 }
2669 }
2670
2671 if (++cmd_count == 1) {
2672 mrsas_print_cmd_details(instance, cmd,
2673 0xDD);
2674 } else {
2675 mrsas_print_cmd_details(instance, cmd,
2676 1);
2677 }
2678
2679 }
2680 }
2681 }
2682 con_log(CL_ANN1, (CE_CONT, "mrsas_print_pending_cmds(): Done\n"));
2683
2684
2685 debug_level_g = saved_level;
2686
2687 return (DDI_SUCCESS);
2688 }
2689
2690
2691 int
2692 mrsas_complete_pending_cmds(struct mrsas_instance *instance)
2693 {
2694
2695 struct mrsas_cmd *cmd = NULL;
2696 struct scsi_pkt *pkt;
2697 struct mrsas_header *hdr;
2736 complete_cmd_in_sync_mode(instance, cmd);
2737 }
2738 }
2739 mlist_del_init(&cmd->list);
2740 } else {
2741 con_log(CL_ANN1, (CE_CONT,
2742 "mrsas_complete_pending_cmds:"
2743 "NULL command\n"));
2744 }
2745 con_log(CL_ANN1, (CE_CONT,
2746 "mrsas_complete_pending_cmds:"
2747 "looping for more commands\n"));
2748 }
2749 mutex_exit(&instance->cmd_pend_mtx);
2750
2751 con_log(CL_ANN1, (CE_CONT, "mrsas_complete_pending_cmds(): DONE\n"));
2752 return (DDI_SUCCESS);
2753 }
2754
2755 void
2756 mrsas_print_cmd_details(struct mrsas_instance *instance, struct mrsas_cmd *cmd,
2757 int detail)
2758 {
2759 struct scsi_pkt *pkt = cmd->pkt;
2760 Mpi2RaidSCSIIORequest_t *scsi_io = cmd->scsi_io_request;
2761 int i;
2762 int saved_level;
2763 ddi_acc_handle_t acc_handle =
2764 instance->mpi2_frame_pool_dma_obj.acc_handle;
2765
2766 if (detail == 0xDD) {
2767 saved_level = debug_level_g;
2768 debug_level_g = CL_ANN1;
2769 }
2770
2771
2772 if (instance->tbolt) {
2773 con_log(CL_ANN1, (CE_CONT, "print_cmd_details: cmd %p "
2774 "cmd->index 0x%x SMID 0x%x timer 0x%x sec\n",
2775 (void *)cmd, cmd->index, cmd->SMID, cmd->drv_pkt_time));
2776 } else {
2777 con_log(CL_ANN1, (CE_CONT, "print_cmd_details: cmd %p "
2778 "cmd->index 0x%x timer 0x%x sec\n",
2779 (void *)cmd, cmd->index, cmd->drv_pkt_time));
2780 }
2781
2782 if (pkt) {
2783 con_log(CL_ANN1, (CE_CONT, "scsi_pkt CDB[0]=0x%x",
2784 pkt->pkt_cdbp[0]));
2785 } else {
2786 con_log(CL_ANN1, (CE_CONT, "NO-PKT"));
2787 }
2788
2789 if ((detail == 0xDD) && instance->tbolt) {
2790 con_log(CL_ANN1, (CE_CONT, "RAID_SCSI_IO_REQUEST\n"));
2791 con_log(CL_ANN1, (CE_CONT, "DevHandle=0x%X Function=0x%X "
2792 "IoFlags=0x%X SGLFlags=0x%X DataLength=0x%X\n",
2793 ddi_get16(acc_handle, &scsi_io->DevHandle),
2794 ddi_get8(acc_handle, &scsi_io->Function),
2795 ddi_get16(acc_handle, &scsi_io->IoFlags),
2796 ddi_get16(acc_handle, &scsi_io->SGLFlags),
2797 ddi_get32(acc_handle, &scsi_io->DataLength)));
2798
2799 for (i = 0; i < 32; i++) {
2800 con_log(CL_ANN1, (CE_CONT, "CDB[%d]=0x%x ", i,
2801 ddi_get8(acc_handle, &scsi_io->CDB.CDB32[i])));
2802 }
2803
2804 con_log(CL_ANN1, (CE_CONT, "RAID-CONTEXT\n"));
2805 con_log(CL_ANN1, (CE_CONT, "status=0x%X extStatus=0x%X "
2806 "ldTargetId=0x%X timeoutValue=0x%X regLockFlags=0x%X "
2807 "RAIDFlags=0x%X regLockRowLBA=0x%" PRIu64
2808 " regLockLength=0x%X spanArm=0x%X\n",
2809 ddi_get8(acc_handle, &scsi_io->RaidContext.status),
2810 ddi_get8(acc_handle, &scsi_io->RaidContext.extStatus),
2811 ddi_get16(acc_handle, &scsi_io->RaidContext.ldTargetId),
2812 ddi_get16(acc_handle, &scsi_io->RaidContext.timeoutValue),
2813 ddi_get8(acc_handle, &scsi_io->RaidContext.regLockFlags),
2814 ddi_get8(acc_handle, &scsi_io->RaidContext.RAIDFlags),
2815 ddi_get64(acc_handle, &scsi_io->RaidContext.regLockRowLBA),
2816 ddi_get32(acc_handle, &scsi_io->RaidContext.regLockLength),
2817 ddi_get8(acc_handle, &scsi_io->RaidContext.spanArm)));
2818 }
2819
2820 if (detail == 0xDD) {
2821 debug_level_g = saved_level;
2822 }
2823 }
2824
2825
2826 int
2827 mrsas_issue_pending_cmds(struct mrsas_instance *instance)
2828 {
2829 mlist_t *head = &instance->cmd_pend_list;
2830 mlist_t *tmp = head->next;
2831 struct mrsas_cmd *cmd = NULL;
2832 struct scsi_pkt *pkt;
2833
2834 con_log(CL_ANN1, (CE_NOTE, "mrsas_issue_pending_cmds(): Called"));
2835 while (tmp != head) {
2836 mutex_enter(&instance->cmd_pend_mtx);
2837 cmd = mlist_entry(tmp, struct mrsas_cmd, list);
2838 tmp = tmp->next;
2839 mutex_exit(&instance->cmd_pend_mtx);
2840 if (cmd) {
2841 con_log(CL_ANN1, (CE_CONT,
2842 "mrsas_issue_pending_cmds(): "
2843 "Got a cmd: cmd %p index 0x%x drv_pkt_time 0x%x ",
2844 (void *)cmd, cmd->index, cmd->drv_pkt_time));
2845
2846 /* Reset command timeout value */
2847 if (cmd->drv_pkt_time < debug_timeout_g)
2848 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
2849
2850 cmd->retry_count_for_ocr++;
2851
2852 cmn_err(CE_CONT, "cmd retry count = %d\n",
2853 cmd->retry_count_for_ocr);
2854
2855 if (cmd->retry_count_for_ocr > IO_RETRY_COUNT) {
2856 cmn_err(CE_WARN, "mrsas_issue_pending_cmds(): "
2857 "cmd->retry_count exceeded limit >%d\n",
2858 IO_RETRY_COUNT);
2859 mrsas_print_cmd_details(instance, cmd, 0xDD);
2860
2861 cmn_err(CE_WARN,
2862 "mrsas_issue_pending_cmds():"
2863 "Calling KILL Adapter\n");
2864 if (instance->tbolt)
2865 mrsas_tbolt_kill_adapter(instance);
2866 else
2867 (void) mrsas_kill_adapter(instance);
2868 return (DDI_FAILURE);
2869 }
2870
2871 pkt = cmd->pkt;
2872 if (pkt) {
2873 con_log(CL_ANN1, (CE_CONT,
2874 "PENDING PKT-CMD ISSUE: cmd %p index %x "
2875 "pkt %p time %llx",
2876 (void *)cmd, cmd->index,
2877 (void *)pkt,
2878 gethrtime()));
2879
2880 } else {
2881 cmn_err(CE_CONT,
2882 "mrsas_issue_pending_cmds(): NO-PKT, "
2883 "cmd %p index 0x%x drv_pkt_time 0x%x ",
2884 (void *)cmd, cmd->index, cmd->drv_pkt_time);
2885 }
2886
2887
2888 if (cmd->sync_cmd == MRSAS_TRUE) {
2889 cmn_err(CE_CONT, "mrsas_issue_pending_cmds(): "
2890 "SYNC_CMD == TRUE \n");
2891 instance->func_ptr->issue_cmd_in_sync_mode(
2892 instance, cmd);
2893 } else {
2894 instance->func_ptr->issue_cmd(cmd, instance);
2895 }
2896 } else {
2897 con_log(CL_ANN1, (CE_CONT,
2898 "mrsas_issue_pending_cmds: NULL command\n"));
2899 }
2900 con_log(CL_ANN1, (CE_CONT,
2901 "mrsas_issue_pending_cmds:"
2902 "looping for more commands"));
2903 }
2904 con_log(CL_ANN1, (CE_CONT, "mrsas_issue_pending_cmds(): DONE\n"));
2905 return (DDI_SUCCESS);
2906 }
2907
2908
2909
2910 /*
2911 * destroy_mfi_frame_pool
2912 */
3112
3113 void
3114 mrsas_free_cmd_pool(struct mrsas_instance *instance)
3115 {
3116 int i;
3117 uint32_t max_cmd;
3118 size_t sz;
3119
3120 /* already freed */
3121 if (instance->cmd_list == NULL) {
3122 return;
3123 }
3124
3125 max_cmd = instance->max_fw_cmds;
3126
3127 /* size of cmd_list array */
3128 sz = sizeof (struct mrsas_cmd *) * max_cmd;
3129
3130 /* First free each cmd */
3131 for (i = 0; i < max_cmd; i++) {
3132 if (instance->cmd_list[i] != NULL) {
3133 kmem_free(instance->cmd_list[i],
3134 sizeof (struct mrsas_cmd));
3135 }
3136
3137 instance->cmd_list[i] = NULL;
3138 }
3139
3140 /* Now, free cmd_list array */
3141 if (instance->cmd_list != NULL)
3142 kmem_free(instance->cmd_list, sz);
3143
3144 instance->cmd_list = NULL;
3145
3146 INIT_LIST_HEAD(&instance->cmd_pool_list);
3147 INIT_LIST_HEAD(&instance->cmd_pend_list);
3148 if (instance->tbolt) {
3149 INIT_LIST_HEAD(&instance->cmd_app_pool_list);
3150 } else {
3151 INIT_LIST_HEAD(&instance->app_cmd_pool_list);
3152 }
3153
3154 }
3155
3156
3157 /*
3158 * mrsas_alloc_cmd_pool
3159 */
3160 int
3161 mrsas_alloc_cmd_pool(struct mrsas_instance *instance)
3162 {
3163 int i;
3164 int count;
3165 uint32_t max_cmd;
3166 uint32_t reserve_cmd;
3167 size_t sz;
3168
3169 struct mrsas_cmd *cmd;
3170
3171 max_cmd = instance->max_fw_cmds;
3172 con_log(CL_ANN1, (CE_NOTE, "mrsas_alloc_cmd_pool: "
3173 "max_cmd %x", max_cmd));
3174
3175
3176 sz = sizeof (struct mrsas_cmd *) * max_cmd;
3177
3178 /*
3179 * instance->cmd_list is an array of struct mrsas_cmd pointers.
3180 * Allocate the dynamic array first and then allocate individual
3181 * commands.
3182 */
3183 instance->cmd_list = kmem_zalloc(sz, KM_SLEEP);
3184 ASSERT(instance->cmd_list);
3185
3186 /* create a frame pool and assign one frame to each cmd */
3187 for (count = 0; count < max_cmd; count++) {
3188 instance->cmd_list[count] =
3189 kmem_zalloc(sizeof (struct mrsas_cmd), KM_SLEEP);
3190 ASSERT(instance->cmd_list[count]);
3191 }
3192
3193 /* add all the commands to command pool */
3194
3195 INIT_LIST_HEAD(&instance->cmd_pool_list);
3196 INIT_LIST_HEAD(&instance->cmd_pend_list);
3197 INIT_LIST_HEAD(&instance->app_cmd_pool_list);
3198
3199 reserve_cmd = MRSAS_APP_RESERVED_CMDS;
3200
3201 for (i = 0; i < reserve_cmd; i++) {
3202 cmd = instance->cmd_list[i];
3203 cmd->index = i;
3204 mlist_add_tail(&cmd->list, &instance->app_cmd_pool_list);
3205 }
3206
3207
3208 for (i = reserve_cmd; i < max_cmd; i++) {
3209 cmd = instance->cmd_list[i];
3210 cmd->index = i;
3211 mlist_add_tail(&cmd->list, &instance->cmd_pool_list);
3212 }
3213
3214 return (DDI_SUCCESS);
3215
3216 mrsas_undo_cmds:
3217 if (count > 0) {
3218 /* free each cmd */
3219 for (i = 0; i < count; i++) {
3220 if (instance->cmd_list[i] != NULL) {
3221 kmem_free(instance->cmd_list[i],
3222 sizeof (struct mrsas_cmd));
3223 }
3224 instance->cmd_list[i] = NULL;
3225 }
3226 }
3227
3228 mrsas_undo_cmd_list:
3229 if (instance->cmd_list != NULL)
3230 kmem_free(instance->cmd_list, sz);
3231 instance->cmd_list = NULL;
3232
3233 return (DDI_FAILURE);
3234 }
3235
3236
3237 /*
3238 * free_space_for_mfi
3239 */
3240 static void
3241 free_space_for_mfi(struct mrsas_instance *instance)
3242 {
3243
3244 /* already freed */
3245 if (instance->cmd_list == NULL) {
3246 return;
3247 }
3248
3249 /* Free additional dma buffer */
3250 free_additional_dma_buffer(instance);
3251
3252 /* Free the MFI frame pool */
3253 destroy_mfi_frame_pool(instance);
3254
3255 /* Free all the commands in the cmd_list */
3256 /* Free the cmd_list buffer itself */
3257 mrsas_free_cmd_pool(instance);
3258 }
3259
3260 /*
3261 * alloc_space_for_mfi
3262 */
3263 static int
3264 alloc_space_for_mfi(struct mrsas_instance *instance)
3265 {
3266 /* Allocate command pool (memory for cmd_list & individual commands) */
3267 if (mrsas_alloc_cmd_pool(instance)) {
3268 cmn_err(CE_WARN, "error creating cmd pool");
3269 return (DDI_FAILURE);
3270 }
3271
3272 /* Allocate MFI Frame pool */
3273 if (create_mfi_frame_pool(instance)) {
3274 cmn_err(CE_WARN, "error creating frame DMA pool");
3275 goto mfi_undo_cmd_pool;
3276 }
3277
3278 /* Allocate additional DMA buffer */
3279 if (alloc_additional_dma_buffer(instance)) {
3280 cmn_err(CE_WARN, "error creating frame DMA pool");
3281 goto mfi_undo_frame_pool;
3282 }
3283
3284 return (DDI_SUCCESS);
3285
3286 mfi_undo_frame_pool:
3290 mrsas_free_cmd_pool(instance);
3291
3292 return (DDI_FAILURE);
3293 }
3294
3295
3296
3297 /*
3298 * get_ctrl_info
3299 */
3300 static int
3301 get_ctrl_info(struct mrsas_instance *instance,
3302 struct mrsas_ctrl_info *ctrl_info)
3303 {
3304 int ret = 0;
3305
3306 struct mrsas_cmd *cmd;
3307 struct mrsas_dcmd_frame *dcmd;
3308 struct mrsas_ctrl_info *ci;
3309
3310 if (instance->tbolt) {
3311 cmd = get_raid_msg_mfi_pkt(instance);
3312 } else {
3313 cmd = get_mfi_pkt(instance);
3314 }
3315
3316 if (!cmd) {
3317 con_log(CL_ANN, (CE_WARN,
3318 "Failed to get a cmd for ctrl info"));
3319 DTRACE_PROBE2(info_mfi_err, uint16_t, instance->fw_outstanding,
3320 uint16_t, instance->max_fw_cmds);
3321 return (DDI_FAILURE);
3322 }
3323
3324 /* Clear the frame buffer and assign back the context id */
3325 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3326 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3327 cmd->index);
3328
3329 dcmd = &cmd->frame->dcmd;
3330
3331 ci = (struct mrsas_ctrl_info *)instance->internal_buf;
3332
3333 if (!ci) {
3334 cmn_err(CE_WARN,
3335 "Failed to alloc mem for ctrl info");
3336 return_mfi_pkt(instance, cmd);
3337 return (DDI_FAILURE);
3338 }
3339
3340 (void) memset(ci, 0, sizeof (struct mrsas_ctrl_info));
3356 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].phys_addr,
3357 instance->internal_buf_dmac_add);
3358 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].length,
3359 sizeof (struct mrsas_ctrl_info));
3360
3361 cmd->frame_count = 1;
3362
3363 if (instance->tbolt) {
3364 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
3365 }
3366
3367 if (!instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3368 ret = 0;
3369
3370 ctrl_info->max_request_size = ddi_get32(
3371 cmd->frame_dma_obj.acc_handle, &ci->max_request_size);
3372
3373 ctrl_info->ld_present_count = ddi_get16(
3374 cmd->frame_dma_obj.acc_handle, &ci->ld_present_count);
3375
3376 ctrl_info->properties.on_off_properties = ddi_get32(
3377 cmd->frame_dma_obj.acc_handle,
3378 &ci->properties.on_off_properties);
3379 ddi_rep_get8(cmd->frame_dma_obj.acc_handle,
3380 (uint8_t *)(ctrl_info->product_name),
3381 (uint8_t *)(ci->product_name), 80 * sizeof (char),
3382 DDI_DEV_AUTOINCR);
3383 /* should get more members of ci with ddi_get when needed */
3384 } else {
3385 cmn_err(CE_WARN, "get_ctrl_info: Ctrl info failed");
3386 ret = -1;
3387 }
3388
3389 if (mrsas_common_check(instance, cmd) != DDI_SUCCESS) {
3390 ret = -1;
3391 }
3392 if (instance->tbolt) {
3393 return_raid_msg_mfi_pkt(instance, cmd);
3394 } else {
3395 return_mfi_pkt(instance, cmd);
3396 }
3397
3398 return (ret);
3399 }
3400
3401 /*
3402 * abort_aen_cmd
3403 */
3404 static int
3405 abort_aen_cmd(struct mrsas_instance *instance,
3406 struct mrsas_cmd *cmd_to_abort)
3407 {
3408 int ret = 0;
3409
3410 struct mrsas_cmd *cmd;
3411 struct mrsas_abort_frame *abort_fr;
3412
3413 con_log(CL_ANN1, (CE_NOTE, "chkpnt: abort_aen:%d", __LINE__));
3414
3415 if (instance->tbolt) {
3416 cmd = get_raid_msg_mfi_pkt(instance);
3417 } else {
3418 cmd = get_mfi_pkt(instance);
3419 }
3420
3421 if (!cmd) {
3422 con_log(CL_ANN1, (CE_WARN,
3423 "abort_aen_cmd():Failed to get a cmd for abort_aen_cmd"));
3424 DTRACE_PROBE2(abort_mfi_err, uint16_t, instance->fw_outstanding,
3425 uint16_t, instance->max_fw_cmds);
3426 return (DDI_FAILURE);
3427 }
3428
3429 /* Clear the frame buffer and assign back the context id */
3430 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3431 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3432 cmd->index);
3433
3434 abort_fr = &cmd->frame->abort;
3435
3436 /* prepare and issue the abort frame */
3437 ddi_put8(cmd->frame_dma_obj.acc_handle,
3438 &abort_fr->cmd, MFI_CMD_OP_ABORT);
3439 ddi_put8(cmd->frame_dma_obj.acc_handle, &abort_fr->cmd_status,
3440 MFI_CMD_STATUS_SYNC_MODE);
3441 ddi_put16(cmd->frame_dma_obj.acc_handle, &abort_fr->flags, 0);
3442 ddi_put32(cmd->frame_dma_obj.acc_handle, &abort_fr->abort_context,
3443 cmd_to_abort->index);
3444 ddi_put32(cmd->frame_dma_obj.acc_handle,
3445 &abort_fr->abort_mfi_phys_addr_lo, cmd_to_abort->frame_phys_addr);
3446 ddi_put32(cmd->frame_dma_obj.acc_handle,
3447 &abort_fr->abort_mfi_phys_addr_hi, 0);
3448
3461 } else {
3462 ret = 0;
3463 }
3464
3465 instance->aen_cmd->abort_aen = 1;
3466 instance->aen_cmd = 0;
3467
3468 if (instance->tbolt) {
3469 return_raid_msg_mfi_pkt(instance, cmd);
3470 } else {
3471 return_mfi_pkt(instance, cmd);
3472 }
3473
3474 atomic_add_16(&instance->fw_outstanding, (-1));
3475
3476 return (ret);
3477 }
3478
3479
3480 static int
3481 mrsas_build_init_cmd(struct mrsas_instance *instance,
3482 struct mrsas_cmd **cmd_ptr)
3483 {
3484 struct mrsas_cmd *cmd;
3485 struct mrsas_init_frame *init_frame;
3486 struct mrsas_init_queue_info *initq_info;
3487 struct mrsas_drv_ver drv_ver_info;
3488
3489
3490 /*
3491 * Prepare a init frame. Note the init frame points to queue info
3492 * structure. Each frame has SGL allocated after first 64 bytes. For
3493 * this frame - since we don't need any SGL - we use SGL's space as
3494 * queue info structure
3495 */
3496 cmd = *cmd_ptr;
3497
3498
3499 /* Clear the frame buffer and assign back the context id */
3500 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3501 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3502 cmd->index);
3526 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 4);
3527
3528 ddi_put32(cmd->frame_dma_obj.acc_handle,
3529 &initq_info->reply_queue_start_phys_addr_hi, 0);
3530 ddi_put32(cmd->frame_dma_obj.acc_handle,
3531 &initq_info->reply_queue_start_phys_addr_lo,
3532 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 8);
3533
3534 ddi_put8(cmd->frame_dma_obj.acc_handle,
3535 &init_frame->cmd, MFI_CMD_OP_INIT);
3536 ddi_put8(cmd->frame_dma_obj.acc_handle, &init_frame->cmd_status,
3537 MFI_CMD_STATUS_POLL_MODE);
3538 ddi_put16(cmd->frame_dma_obj.acc_handle, &init_frame->flags, 0);
3539 ddi_put32(cmd->frame_dma_obj.acc_handle,
3540 &init_frame->queue_info_new_phys_addr_lo,
3541 cmd->frame_phys_addr + 64);
3542 ddi_put32(cmd->frame_dma_obj.acc_handle,
3543 &init_frame->queue_info_new_phys_addr_hi, 0);
3544
3545
3546 /* fill driver version information */
3547 fill_up_drv_ver(&drv_ver_info);
3548
3549 /* allocate the driver version data transfer buffer */
3550 instance->drv_ver_dma_obj.size = sizeof (drv_ver_info.drv_ver);
3551 instance->drv_ver_dma_obj.dma_attr = mrsas_generic_dma_attr;
3552 instance->drv_ver_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
3553 instance->drv_ver_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
3554 instance->drv_ver_dma_obj.dma_attr.dma_attr_sgllen = 1;
3555 instance->drv_ver_dma_obj.dma_attr.dma_attr_align = 1;
3556
3557 if (mrsas_alloc_dma_obj(instance, &instance->drv_ver_dma_obj,
3558 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
3559 con_log(CL_ANN, (CE_WARN,
3560 "init_mfi : Could not allocate driver version buffer."));
3561 return (DDI_FAILURE);
3562 }
3563 /* copy driver version to dma buffer */
3564 (void) memset(instance->drv_ver_dma_obj.buffer, 0,
3565 sizeof (drv_ver_info.drv_ver));
3566 ddi_rep_put8(cmd->frame_dma_obj.acc_handle,
3567 (uint8_t *)drv_ver_info.drv_ver,
3568 (uint8_t *)instance->drv_ver_dma_obj.buffer,
3569 sizeof (drv_ver_info.drv_ver), DDI_DEV_AUTOINCR);
3570
3571
3572 /* copy driver version physical address to init frame */
3573 ddi_put64(cmd->frame_dma_obj.acc_handle, &init_frame->driverversion,
3574 instance->drv_ver_dma_obj.dma_cookie[0].dmac_address);
3575
3576 ddi_put32(cmd->frame_dma_obj.acc_handle, &init_frame->data_xfer_len,
3577 sizeof (struct mrsas_init_queue_info));
3578
3579 cmd->frame_count = 1;
3580
3581 *cmd_ptr = cmd;
3582
3583 return (DDI_SUCCESS);
3584 }
3585
3586
3587 /*
3588 * mrsas_init_adapter_ppc - Initialize MFI interface adapter.
3589 */
3590 int
3591 mrsas_init_adapter_ppc(struct mrsas_instance *instance)
3592 {
3593 struct mrsas_cmd *cmd;
3594
3595 /*
3596 * allocate memory for mfi adapter(cmd pool, individual commands, mfi
3597 * frames etc
3598 */
3599 if (alloc_space_for_mfi(instance) != DDI_SUCCESS) {
3600 con_log(CL_ANN, (CE_NOTE,
3601 "Error, failed to allocate memory for MFI adapter"));
3602 return (DDI_FAILURE);
3603 }
3604
3605 /* Build INIT command */
3606 cmd = get_mfi_pkt(instance);
3607
3608 if (mrsas_build_init_cmd(instance, &cmd) != DDI_SUCCESS) {
3609 con_log(CL_ANN,
3610 (CE_NOTE, "Error, failed to build INIT command"));
3611
3612 goto fail_undo_alloc_mfi_space;
3613 }
3614
3615 /*
3616 * Disable interrupt before sending init frame ( see linux driver code)
3617 * send INIT MFI frame in polled mode
3618 */
3619 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3620 con_log(CL_ANN, (CE_WARN, "failed to init firmware"));
3621 goto fail_fw_init;
3622 }
3623
3624 if (mrsas_common_check(instance, cmd) != DDI_SUCCESS)
3625 goto fail_fw_init;
3626 return_mfi_pkt(instance, cmd);
3627
3628 if (ctio_enable &&
3629 (instance->func_ptr->read_fw_status_reg(instance) & 0x04000000)) {
3630 con_log(CL_ANN, (CE_NOTE, "mr_sas: IEEE SGL's supported"));
3631 instance->flag_ieee = 1;
3632 } else {
3633 instance->flag_ieee = 0;
3634 }
3635
3636 instance->unroll.alloc_space_mfi = 1;
3637 instance->unroll.verBuff = 1;
3638
3639 return (DDI_SUCCESS);
3640
3641
3642 fail_fw_init:
3643 (void) mrsas_free_dma_obj(instance, instance->drv_ver_dma_obj);
3644
3645 fail_undo_alloc_mfi_space:
3646 return_mfi_pkt(instance, cmd);
3647 free_space_for_mfi(instance);
3648
3649 return (DDI_FAILURE);
3650
3651 }
3652
3653 /*
3654 * mrsas_init_adapter - Initialize adapter.
3655 */
3656 int
3657 mrsas_init_adapter(struct mrsas_instance *instance)
3658 {
3659 struct mrsas_ctrl_info ctrl_info;
3660
3661
3662 /* we expect the FW state to be READY */
3663 if (mfi_state_transition_to_ready(instance)) {
3664 con_log(CL_ANN, (CE_WARN, "mr_sas: F/W is not ready"));
3665 return (DDI_FAILURE);
3666 }
3667
3668 /* get various operational parameters from status register */
3669 instance->max_num_sge =
3670 (instance->func_ptr->read_fw_status_reg(instance) &
3671 0xFF0000) >> 0x10;
3672 instance->max_num_sge =
3673 (instance->max_num_sge > MRSAS_MAX_SGE_CNT) ?
3674 MRSAS_MAX_SGE_CNT : instance->max_num_sge;
3675
3676 /*
3677 * Reduce the max supported cmds by 1. This is to ensure that the
3678 * reply_q_sz (1 more than the max cmd that driver may send)
3679 * does not exceed max cmds that the FW can support
3680 */
3681 instance->max_fw_cmds =
3682 instance->func_ptr->read_fw_status_reg(instance) & 0xFFFF;
3683 instance->max_fw_cmds = instance->max_fw_cmds - 1;
3684
3685
3686
3687 /* Initialize adapter */
3688 if (instance->func_ptr->init_adapter(instance) != DDI_SUCCESS) {
3689 con_log(CL_ANN,
3690 (CE_WARN, "mr_sas: could not initialize adapter"));
3691 return (DDI_FAILURE);
3692 }
3693
3694 /* gather misc FW related information */
3695 instance->disable_online_ctrl_reset = 0;
3696
3697 if (!get_ctrl_info(instance, &ctrl_info)) {
3698 instance->max_sectors_per_req = ctrl_info.max_request_size;
3699 con_log(CL_ANN1, (CE_NOTE,
3700 "product name %s ld present %d",
3701 ctrl_info.product_name, ctrl_info.ld_present_count));
3702 } else {
3703 instance->max_sectors_per_req = instance->max_num_sge *
3704 PAGESIZE / 512;
3705 }
3706
3707 if (ctrl_info.properties.on_off_properties & DISABLE_OCR_PROP_FLAG)
3708 instance->disable_online_ctrl_reset = 1;
3709
3710 return (DDI_SUCCESS);
3711
3712 }
3713
3714
3715
3716 static int
3717 mrsas_issue_init_mfi(struct mrsas_instance *instance)
3718 {
3719 struct mrsas_cmd *cmd;
3720 struct mrsas_init_frame *init_frame;
3721 struct mrsas_init_queue_info *initq_info;
3722
3723 /*
3724 * Prepare a init frame. Note the init frame points to queue info
3725 * structure. Each frame has SGL allocated after first 64 bytes. For
3726 * this frame - since we don't need any SGL - we use SGL's space as
3727 * queue info structure
3728 */
3777 ddi_put32(cmd->frame_dma_obj.acc_handle,
3778 &init_frame->queue_info_new_phys_addr_lo,
3779 cmd->frame_phys_addr + 64);
3780 ddi_put32(cmd->frame_dma_obj.acc_handle,
3781 &init_frame->queue_info_new_phys_addr_hi, 0);
3782
3783 ddi_put32(cmd->frame_dma_obj.acc_handle, &init_frame->data_xfer_len,
3784 sizeof (struct mrsas_init_queue_info));
3785
3786 cmd->frame_count = 1;
3787
3788 /* issue the init frame in polled mode */
3789 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3790 con_log(CL_ANN1, (CE_WARN,
3791 "mrsas_issue_init_mfi():failed to "
3792 "init firmware"));
3793 return_mfi_app_pkt(instance, cmd);
3794 return (DDI_FAILURE);
3795 }
3796
3797 if (mrsas_common_check(instance, cmd) != DDI_SUCCESS) {
3798 return_mfi_pkt(instance, cmd);
3799 return (DDI_FAILURE);
3800 }
3801
3802 return_mfi_app_pkt(instance, cmd);
3803 con_log(CL_ANN1, (CE_CONT, "mrsas_issue_init_mfi: Done"));
3804
3805 return (DDI_SUCCESS);
3806 }
3807 /*
3808 * mfi_state_transition_to_ready : Move the FW to READY state
3809 *
3810 * @reg_set : MFI register set
3811 */
3812 int
3813 mfi_state_transition_to_ready(struct mrsas_instance *instance)
3814 {
3815 int i;
3816 uint8_t max_wait;
3817 uint32_t fw_ctrl = 0;
3818 uint32_t fw_state;
3819 uint32_t cur_state;
3820 uint32_t cur_abs_reg_val;
3821 uint32_t prev_abs_reg_val;
3879 case MFI_STATE_OPERATIONAL:
3880 /* bring it to READY state; assuming max wait 2 secs */
3881 instance->func_ptr->disable_intr(instance);
3882 con_log(CL_ANN1, (CE_NOTE,
3883 "mr_sas: FW in OPERATIONAL state"));
3884 /*
3885 * PCI_Hot Plug: MFI F/W requires
3886 * (MFI_INIT_READY | MFI_INIT_MFIMODE | MFI_INIT_ABORT)
3887 * to be set
3888 */
3889 /* WR_IB_DOORBELL(MFI_INIT_READY, instance); */
3890 if (!instance->tbolt) {
3891 WR_IB_DOORBELL(MFI_RESET_FLAGS, instance);
3892 } else {
3893 WR_RESERVED0_REGISTER(MFI_RESET_FLAGS,
3894 instance);
3895
3896 for (i = 0; i < (10 * 1000); i++) {
3897 status =
3898 RD_RESERVED0_REGISTER(instance);
3899 if (status & 1) {
3900 delay(1 *
3901 drv_usectohz(MILLISEC));
3902 } else {
3903 break;
3904 }
3905 }
3906
3907 }
3908 max_wait = (instance->tbolt == 1) ? 180 : 10;
3909 cur_state = MFI_STATE_OPERATIONAL;
3910 break;
3911 case MFI_STATE_UNDEFINED:
3912 /* this state should not last for more than 2 seconds */
3913 con_log(CL_ANN1, (CE_NOTE, "FW state undefined"));
3914
3915 max_wait = (instance->tbolt == 1) ? 180 : 2;
3916 cur_state = MFI_STATE_UNDEFINED;
3917 break;
3918 case MFI_STATE_BB_INIT:
3919 max_wait = (instance->tbolt == 1) ? 180 : 2;
3920 cur_state = MFI_STATE_BB_INIT;
3921 break;
3922 case MFI_STATE_FW_INIT:
3923 max_wait = (instance->tbolt == 1) ? 180 : 2;
3924 cur_state = MFI_STATE_FW_INIT;
3925 break;
3958 }
3959 }
3960 if (fw_state == MFI_STATE_DEVICE_SCAN) {
3961 if (prev_abs_reg_val != cur_abs_reg_val) {
3962 continue;
3963 }
3964 }
3965
3966 /* return error if fw_state hasn't changed after max_wait */
3967 if (fw_state == cur_state) {
3968 con_log(CL_ANN1, (CE_WARN,
3969 "FW state hasn't changed in %d secs", max_wait));
3970 return (ENODEV);
3971 }
3972 };
3973
3974 if (!instance->tbolt) {
3975 fw_ctrl = RD_IB_DOORBELL(instance);
3976 con_log(CL_ANN1, (CE_CONT,
3977 "mfi_state_transition_to_ready:FW ctrl = 0x%x", fw_ctrl));
3978
3979 /*
3980 * Write 0xF to the doorbell register to do the following.
3981 * - Abort all outstanding commands (bit 0).
3982 * - Transition from OPERATIONAL to READY state (bit 1).
3983 * - Discard (possible) low MFA posted in 64-bit mode (bit-2).
3984 * - Set to release FW to continue running (i.e. BIOS handshake
3985 * (bit 3).
3986 */
3987 WR_IB_DOORBELL(0xF, instance);
3988 }
3989
3990 if (mrsas_check_acc_handle(instance->regmap_handle) != DDI_SUCCESS) {
3991 return (EIO);
3992 }
3993
3994 return (DDI_SUCCESS);
3995 }
3996
3997 /*
3998 * get_seq_num
3999 */
4000 static int
4001 get_seq_num(struct mrsas_instance *instance,
4002 struct mrsas_evt_log_info *eli)
4003 {
4004 int ret = DDI_SUCCESS;
4005
4006 dma_obj_t dcmd_dma_obj;
4007 struct mrsas_cmd *cmd;
4008 struct mrsas_dcmd_frame *dcmd;
4009 struct mrsas_evt_log_info *eli_tmp;
4010 if (instance->tbolt) {
4011 cmd = get_raid_msg_mfi_pkt(instance);
4012 } else {
4013 cmd = get_mfi_pkt(instance);
4014 }
4015
4016 if (!cmd) {
4017 cmn_err(CE_WARN, "mr_sas: failed to get a cmd");
4018 DTRACE_PROBE2(seq_num_mfi_err, uint16_t,
4019 instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
4020 return (ENOMEM);
4021 }
4022
4023 /* Clear the frame buffer and assign back the context id */
4024 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
4025 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
4026 cmd->index);
4027
4028 dcmd = &cmd->frame->dcmd;
4029
4030 /* allocate the data transfer buffer */
4031 dcmd_dma_obj.size = sizeof (struct mrsas_evt_log_info);
4032 dcmd_dma_obj.dma_attr = mrsas_generic_dma_attr;
4033 dcmd_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
4034 dcmd_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
4035 dcmd_dma_obj.dma_attr.dma_attr_sgllen = 1;
4036 dcmd_dma_obj.dma_attr.dma_attr_align = 1;
4037
4038 if (mrsas_alloc_dma_obj(instance, &dcmd_dma_obj,
4039 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
4119 ret = register_mfi_aen(instance, eli.newest_seq_num + 1,
4120 class_locale.word);
4121
4122 if (ret) {
4123 cmn_err(CE_WARN, "start_mfi_aen: aen registration failed");
4124 return (-1);
4125 }
4126
4127
4128 return (ret);
4129 }
4130
4131 /*
4132 * flush_cache
4133 */
4134 static void
4135 flush_cache(struct mrsas_instance *instance)
4136 {
4137 struct mrsas_cmd *cmd = NULL;
4138 struct mrsas_dcmd_frame *dcmd;
4139 if (instance->tbolt) {
4140 cmd = get_raid_msg_mfi_pkt(instance);
4141 } else {
4142 cmd = get_mfi_pkt(instance);
4143 }
4144
4145 if (!cmd) {
4146 con_log(CL_ANN1, (CE_WARN,
4147 "flush_cache():Failed to get a cmd for flush_cache"));
4148 DTRACE_PROBE2(flush_cache_err, uint16_t,
4149 instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
4150 return;
4151 }
4152
4153 /* Clear the frame buffer and assign back the context id */
4154 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
4155 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
4156 cmd->index);
4157
4158 dcmd = &cmd->frame->dcmd;
4159
4160 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
4161
4162 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
4163 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0x0);
4164 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 0);
4165 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
4166 MFI_FRAME_DIR_NONE);
4167 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
4168 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len, 0);
4169 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
4183 }
4184 con_log(CL_ANN1, (CE_CONT, "flush_cache done"));
4185 if (instance->tbolt) {
4186 return_raid_msg_mfi_pkt(instance, cmd);
4187 } else {
4188 return_mfi_pkt(instance, cmd);
4189 }
4190
4191 }
4192
4193 /*
4194 * service_mfi_aen- Completes an AEN command
4195 * @instance: Adapter soft state
4196 * @cmd: Command to be completed
4197 *
4198 */
4199 void
4200 service_mfi_aen(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
4201 {
4202 uint32_t seq_num;
4203 struct mrsas_evt_detail *evt_detail =
4204 (struct mrsas_evt_detail *)instance->mfi_evt_detail_obj.buffer;
4205 int rval = 0;
4206 int tgt = 0;
4207 uint8_t dtype;
4208 #ifdef PDSUPPORT
4209 mrsas_pd_address_t *pd_addr;
4210 #endif
4211 ddi_acc_handle_t acc_handle;
4212
4213 con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
4214
4215 acc_handle = cmd->frame_dma_obj.acc_handle;
4216 cmd->cmd_status = ddi_get8(acc_handle, &cmd->frame->io.cmd_status);
4217 if (cmd->cmd_status == ENODATA) {
4218 cmd->cmd_status = 0;
4219 }
4220
4221 /*
4222 * log the MFI AEN event to the sysevent queue so that
4228 con_log(CL_ANN, (CE_WARN,
4229 "mr_sas%d: Failed to log AEN event", instance_no));
4230 }
4231 /*
4232 * Check for any ld devices that has changed state. i.e. online
4233 * or offline.
4234 */
4235 con_log(CL_ANN1, (CE_CONT,
4236 "AEN: code = %x class = %x locale = %x args = %x",
4237 ddi_get32(acc_handle, &evt_detail->code),
4238 evt_detail->cl.members.class,
4239 ddi_get16(acc_handle, &evt_detail->cl.members.locale),
4240 ddi_get8(acc_handle, &evt_detail->arg_type)));
4241
4242 switch (ddi_get32(acc_handle, &evt_detail->code)) {
4243 case MR_EVT_CFG_CLEARED: {
4244 for (tgt = 0; tgt < MRDRV_MAX_LD; tgt++) {
4245 if (instance->mr_ld_list[tgt].dip != NULL) {
4246 mutex_enter(&instance->config_dev_mtx);
4247 instance->mr_ld_list[tgt].flag =
4248 (uint8_t)~MRDRV_TGT_VALID;
4249 mutex_exit(&instance->config_dev_mtx);
4250 rval = mrsas_service_evt(instance, tgt, 0,
4251 MRSAS_EVT_UNCONFIG_TGT, NULL);
4252 con_log(CL_ANN1, (CE_WARN,
4253 "mr_sas: CFG CLEARED AEN rval = %d "
4254 "tgt id = %d", rval, tgt));
4255 }
4256 }
4257 break;
4258 }
4259
4260 case MR_EVT_LD_DELETED: {
4261 tgt = ddi_get16(acc_handle, &evt_detail->args.ld.target_id);
4262 mutex_enter(&instance->config_dev_mtx);
4263 instance->mr_ld_list[tgt].flag = (uint8_t)~MRDRV_TGT_VALID;
4264 mutex_exit(&instance->config_dev_mtx);
4265 rval = mrsas_service_evt(instance,
4266 ddi_get16(acc_handle, &evt_detail->args.ld.target_id), 0,
4267 MRSAS_EVT_UNCONFIG_TGT, NULL);
4268 con_log(CL_ANN1, (CE_WARN, "mr_sas: LD DELETED AEN rval = %d "
4269 "tgt id = %d index = %d", rval,
4270 ddi_get16(acc_handle, &evt_detail->args.ld.target_id),
4271 ddi_get8(acc_handle, &evt_detail->args.ld.ld_index)));
4272 break;
4273 } /* End of MR_EVT_LD_DELETED */
4274
4275 case MR_EVT_LD_CREATED: {
4276 rval = mrsas_service_evt(instance,
4277 ddi_get16(acc_handle, &evt_detail->args.ld.target_id), 0,
4278 MRSAS_EVT_CONFIG_TGT, NULL);
4279 con_log(CL_ANN1, (CE_WARN, "mr_sas: LD CREATED AEN rval = %d "
4280 "tgt id = %d index = %d", rval,
4281 ddi_get16(acc_handle, &evt_detail->args.ld.target_id),
4282 ddi_get8(acc_handle, &evt_detail->args.ld.ld_index)));
4283 break;
4284 } /* End of MR_EVT_LD_CREATED */
4285
4286 #ifdef PDSUPPORT
4287 case MR_EVT_PD_REMOVED_EXT: {
4288 if (instance->tbolt) {
4289 pd_addr = &evt_detail->args.pd_addr;
4290 dtype = pd_addr->scsi_dev_type;
4291 con_log(CL_DLEVEL1, (CE_NOTE,
4292 " MR_EVT_PD_REMOVED_EXT: dtype = %x,"
4293 " arg_type = %d ", dtype, evt_detail->arg_type));
4294 tgt = ddi_get16(acc_handle,
4295 &evt_detail->args.pd.device_id);
4296 mutex_enter(&instance->config_dev_mtx);
4297 instance->mr_tbolt_pd_list[tgt].flag =
4298 (uint8_t)~MRDRV_TGT_VALID;
4299 mutex_exit(&instance->config_dev_mtx);
4300 rval = mrsas_service_evt(instance, ddi_get16(
4301 acc_handle, &evt_detail->args.pd.device_id),
4302 1, MRSAS_EVT_UNCONFIG_TGT, NULL);
4303 con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_REMOVED:"
4304 "rval = %d tgt id = %d ", rval,
4305 ddi_get16(acc_handle,
4306 &evt_detail->args.pd.device_id)));
4307 }
4308 break;
4309 } /* End of MR_EVT_PD_REMOVED_EXT */
4310
4311 case MR_EVT_PD_INSERTED_EXT: {
4312 if (instance->tbolt) {
4313 rval = mrsas_service_evt(instance,
4314 ddi_get16(acc_handle,
4315 &evt_detail->args.pd.device_id),
4316 1, MRSAS_EVT_CONFIG_TGT, NULL);
4317 con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_INSERTEDi_EXT:"
4318 "rval = %d tgt id = %d ", rval,
4319 ddi_get16(acc_handle,
4320 &evt_detail->args.pd.device_id)));
4321 }
4322 break;
4323 } /* End of MR_EVT_PD_INSERTED_EXT */
4324
4325 case MR_EVT_PD_STATE_CHANGE: {
4326 if (instance->tbolt) {
4327 tgt = ddi_get16(acc_handle,
4328 &evt_detail->args.pd.device_id);
4329 if ((evt_detail->args.pd_state.prevState ==
4330 PD_SYSTEM) &&
4331 (evt_detail->args.pd_state.newState != PD_SYSTEM)) {
4332 mutex_enter(&instance->config_dev_mtx);
4333 instance->mr_tbolt_pd_list[tgt].flag =
4334 (uint8_t)~MRDRV_TGT_VALID;
4335 mutex_exit(&instance->config_dev_mtx);
4336 rval = mrsas_service_evt(instance,
4337 ddi_get16(acc_handle,
4338 &evt_detail->args.pd.device_id),
4339 1, MRSAS_EVT_UNCONFIG_TGT, NULL);
4340 con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_REMOVED:"
4341 "rval = %d tgt id = %d ", rval,
4342 ddi_get16(acc_handle,
4343 &evt_detail->args.pd.device_id)));
4344 break;
4345 }
4346 if ((evt_detail->args.pd_state.prevState
4347 == UNCONFIGURED_GOOD) &&
4348 (evt_detail->args.pd_state.newState == PD_SYSTEM)) {
4349 rval = mrsas_service_evt(instance,
4350 ddi_get16(acc_handle,
4351 &evt_detail->args.pd.device_id),
4352 1, MRSAS_EVT_CONFIG_TGT, NULL);
4353 con_log(CL_ANN1, (CE_WARN,
4354 "mr_sas: PD_INSERTED: rval = %d "
4355 " tgt id = %d ", rval,
4356 ddi_get16(acc_handle,
4357 &evt_detail->args.pd.device_id)));
4358 break;
4359 }
4360 }
4361 break;
4362 }
4363 #endif
4364
4365 } /* End of Main Switch */
4366
4367 /* get copy of seq_num and class/locale for re-registration */
4368 seq_num = ddi_get32(acc_handle, &evt_detail->seq_num);
4369 seq_num++;
4370 (void) memset(instance->mfi_evt_detail_obj.buffer, 0,
4371 sizeof (struct mrsas_evt_detail));
4372
4373 ddi_put8(acc_handle, &cmd->frame->dcmd.cmd_status, 0x0);
4374 ddi_put32(acc_handle, &cmd->frame->dcmd.mbox.w[0], seq_num);
4375
4376 instance->aen_seq_num = seq_num;
4377
4378 cmd->frame_count = 1;
4379
4380 cmd->retry_count_for_ocr = 0;
4381 cmd->drv_pkt_time = 0;
4421 */
4422
4423 static uint32_t
4424 mrsas_initiate_ocr_if_fw_is_faulty(struct mrsas_instance *instance)
4425 {
4426 uint32_t cur_abs_reg_val;
4427 uint32_t fw_state;
4428
4429 cur_abs_reg_val = instance->func_ptr->read_fw_status_reg(instance);
4430 fw_state = cur_abs_reg_val & MFI_STATE_MASK;
4431 if (fw_state == MFI_STATE_FAULT) {
4432 if (instance->disable_online_ctrl_reset == 1) {
4433 cmn_err(CE_WARN,
4434 "mrsas_initiate_ocr_if_fw_is_faulty: "
4435 "FW in Fault state, detected in ISR: "
4436 "FW doesn't support ocr ");
4437
4438 return (ADAPTER_RESET_NOT_REQUIRED);
4439 } else {
4440 con_log(CL_ANN, (CE_NOTE,
4441 "mrsas_initiate_ocr_if_fw_is_faulty: FW in Fault "
4442 "state, detected in ISR: FW supports ocr "));
4443
4444 return (ADAPTER_RESET_REQUIRED);
4445 }
4446 }
4447
4448 return (ADAPTER_RESET_NOT_REQUIRED);
4449 }
4450
4451 /*
4452 * mrsas_softintr - The Software ISR
4453 * @param arg : HBA soft state
4454 *
4455 * called from high-level interrupt if hi-level interrupt are not there,
4456 * otherwise triggered as a soft interrupt
4457 */
4458 static uint_t
4459 mrsas_softintr(struct mrsas_instance *instance)
4460 {
4461 struct scsi_pkt *pkt;
4462 struct scsa_cmd *acmd;
4476 mutex_exit(&instance->completed_pool_mtx);
4477 return (DDI_INTR_CLAIMED);
4478 }
4479
4480 instance->softint_running = 1;
4481
4482 INIT_LIST_HEAD(&process_list);
4483 mlist_splice(&instance->completed_pool_list, &process_list);
4484 INIT_LIST_HEAD(&instance->completed_pool_list);
4485
4486 mutex_exit(&instance->completed_pool_mtx);
4487
4488 /* perform all callbacks first, before releasing the SCBs */
4489 mlist_for_each_safe(pos, next, &process_list) {
4490 cmd = mlist_entry(pos, struct mrsas_cmd, list);
4491
4492 /* syncronize the Cmd frame for the controller */
4493 (void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle,
4494 0, 0, DDI_DMA_SYNC_FORCPU);
4495
4496 if (mrsas_check_dma_handle(cmd->frame_dma_obj.dma_handle) !=
4497 DDI_SUCCESS) {
4498 mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
4499 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4500 con_log(CL_ANN1, (CE_WARN,
4501 "mrsas_softintr: "
4502 "FMA check reports DMA handle failure"));
4503 return (DDI_INTR_CLAIMED);
4504 }
4505
4506 hdr = &cmd->frame->hdr;
4507
4508 /* remove the internal command from the process list */
4509 mlist_del_init(&cmd->list);
4510
4511 switch (ddi_get8(cmd->frame_dma_obj.acc_handle, &hdr->cmd)) {
4512 case MFI_CMD_OP_PD_SCSI:
4513 case MFI_CMD_OP_LD_SCSI:
4514 case MFI_CMD_OP_LD_READ:
4515 case MFI_CMD_OP_LD_WRITE:
4516 /*
4517 * MFI_CMD_OP_PD_SCSI and MFI_CMD_OP_LD_SCSI
4518 * could have been issued either through an
4519 * IO path or an IOCTL path. If it was via IOCTL,
4520 * we will send it to internal completion.
4521 */
4522 if (cmd->sync_cmd == MRSAS_TRUE) {
4523 complete_cmd_in_sync_mode(instance, cmd);
4524 break;
4525 }
4530
4531 if (acmd->cmd_flags & CFLAG_DMAVALID) {
4532 if (acmd->cmd_flags & CFLAG_CONSISTENT) {
4533 (void) ddi_dma_sync(acmd->cmd_dmahandle,
4534 acmd->cmd_dma_offset,
4535 acmd->cmd_dma_len,
4536 DDI_DMA_SYNC_FORCPU);
4537 }
4538 }
4539
4540 pkt->pkt_reason = CMD_CMPLT;
4541 pkt->pkt_statistics = 0;
4542 pkt->pkt_state = STATE_GOT_BUS
4543 | STATE_GOT_TARGET | STATE_SENT_CMD
4544 | STATE_XFERRED_DATA | STATE_GOT_STATUS;
4545
4546 con_log(CL_ANN, (CE_CONT,
4547 "CDB[0] = %x completed for %s: size %lx context %x",
4548 pkt->pkt_cdbp[0], ((acmd->islogical) ? "LD" : "PD"),
4549 acmd->cmd_dmacount, hdr->context));
4550 DTRACE_PROBE3(softintr_cdb, uint8_t, pkt->pkt_cdbp[0],
4551 uint_t, acmd->cmd_cdblen, ulong_t,
4552 acmd->cmd_dmacount);
4553
4554 if (pkt->pkt_cdbp[0] == SCMD_INQUIRY) {
4555 struct scsi_inquiry *inq;
4556
4557 if (acmd->cmd_dmacount != 0) {
4558 bp_mapin(acmd->cmd_buf);
4559 inq = (struct scsi_inquiry *)
4560 acmd->cmd_buf->b_un.b_addr;
4561
4562 /* don't expose physical drives to OS */
4563 if (acmd->islogical &&
4564 (hdr->cmd_status == MFI_STAT_OK)) {
4565 display_scsi_inquiry(
4566 (caddr_t)inq);
4567 } else if ((hdr->cmd_status ==
4568 MFI_STAT_OK) && inq->inq_dtype ==
4569 DTYPE_DIRECT) {
4570
4571 display_scsi_inquiry(
4572 (caddr_t)inq);
4573
4574 /* for physical disk */
4575 hdr->cmd_status =
4576 MFI_STAT_DEVICE_NOT_FOUND;
4577 }
4578 }
4579 }
4580
4581 DTRACE_PROBE2(softintr_done, uint8_t, hdr->cmd,
4582 uint8_t, hdr->cmd_status);
4583
4584 switch (hdr->cmd_status) {
4585 case MFI_STAT_OK:
4586 pkt->pkt_scbp[0] = STATUS_GOOD;
4587 break;
4588 case MFI_STAT_LD_CC_IN_PROGRESS:
4589 case MFI_STAT_LD_RECON_IN_PROGRESS:
4590 pkt->pkt_scbp[0] = STATUS_GOOD;
4591 break;
4592 case MFI_STAT_LD_INIT_IN_PROGRESS:
4593 con_log(CL_ANN,
4594 (CE_WARN, "Initialization in Progress"));
4595 pkt->pkt_reason = CMD_TRAN_ERR;
4596
4597 break;
4598 case MFI_STAT_SCSI_DONE_WITH_ERROR:
4599 con_log(CL_ANN, (CE_CONT, "scsi_done error"));
4600
4601 pkt->pkt_reason = CMD_CMPLT;
4602 ((struct scsi_status *)
4603 pkt->pkt_scbp)->sts_chk = 1;
4604
4605 if (pkt->pkt_cdbp[0] == SCMD_TEST_UNIT_READY) {
4606 con_log(CL_ANN,
4607 (CE_WARN, "TEST_UNIT_READY fail"));
4608 } else {
4609 pkt->pkt_state |= STATE_ARQ_DONE;
4610 arqstat = (void *)(pkt->pkt_scbp);
4611 arqstat->sts_rqpkt_reason = CMD_CMPLT;
4612 arqstat->sts_rqpkt_resid = 0;
4613 arqstat->sts_rqpkt_state |=
4614 STATE_GOT_BUS | STATE_GOT_TARGET
4615 | STATE_SENT_CMD
4616 | STATE_XFERRED_DATA;
4617 *(uint8_t *)&arqstat->sts_rqpkt_status =
4618 STATUS_GOOD;
4619 ddi_rep_get8(
4620 cmd->frame_dma_obj.acc_handle,
4621 (uint8_t *)
4622 &(arqstat->sts_sensedata),
4623 cmd->sense,
4624 sizeof (struct scsi_extended_sense),
4625 DDI_DEV_AUTOINCR);
4626 }
4627 break;
4654 CLASS_EXTENDED_SENSE;
4655
4656 /*
4657 * LOGICAL BLOCK ADDRESS OUT OF RANGE:
4658 * ASC: 0x21h; ASCQ: 0x00h;
4659 */
4660 arqstat->sts_sensedata.es_add_code = 0x21;
4661 arqstat->sts_sensedata.es_qual_code = 0x00;
4662
4663 break;
4664
4665 default:
4666 con_log(CL_ANN, (CE_CONT, "Unknown status!"));
4667 pkt->pkt_reason = CMD_TRAN_ERR;
4668
4669 break;
4670 }
4671
4672 atomic_add_16(&instance->fw_outstanding, (-1));
4673
4674 (void) mrsas_common_check(instance, cmd);
4675
4676 if (acmd->cmd_dmahandle) {
4677 if (mrsas_check_dma_handle(
4678 acmd->cmd_dmahandle) != DDI_SUCCESS) {
4679 ddi_fm_service_impact(instance->dip,
4680 DDI_SERVICE_UNAFFECTED);
4681 pkt->pkt_reason = CMD_TRAN_ERR;
4682 pkt->pkt_statistics = 0;
4683 }
4684 }
4685
4686 /* Call the callback routine */
4687 if (((pkt->pkt_flags & FLAG_NOINTR) == 0) &&
4688 pkt->pkt_comp) {
4689
4690 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_softintr: "
4691 "posting to scsa cmd %p index %x pkt %p "
4692 "time %llx", (void *)cmd, cmd->index,
4693 (void *)pkt, gethrtime()));
4694 (*pkt->pkt_comp)(pkt);
4695
4696 }
4697
4698 return_mfi_pkt(instance, cmd);
4699 break;
4700
4701 case MFI_CMD_OP_SMP:
4702 case MFI_CMD_OP_STP:
4703 complete_cmd_in_sync_mode(instance, cmd);
4704 break;
4705
4717 atomic_add_16(&instance->fw_outstanding,
4718 (-1));
4719 service_mfi_aen(instance, cmd);
4720 }
4721 } else {
4722 complete_cmd_in_sync_mode(instance, cmd);
4723 }
4724
4725 break;
4726
4727 case MFI_CMD_OP_ABORT:
4728 con_log(CL_ANN, (CE_NOTE, "MFI_CMD_OP_ABORT complete"));
4729 /*
4730 * MFI_CMD_OP_ABORT successfully completed
4731 * in the synchronous mode
4732 */
4733 complete_cmd_in_sync_mode(instance, cmd);
4734 break;
4735
4736 default:
4737 mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
4738 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4739
4740 if (cmd->pkt != NULL) {
4741 pkt = cmd->pkt;
4742 if (((pkt->pkt_flags & FLAG_NOINTR) == 0) &&
4743 pkt->pkt_comp) {
4744
4745 con_log(CL_ANN1, (CE_CONT, "posting to "
4746 "scsa cmd %p index %x pkt %p"
4747 "time %llx, default ", (void *)cmd,
4748 cmd->index, (void *)pkt,
4749 gethrtime()));
4750
4751 (*pkt->pkt_comp)(pkt);
4752
4753 }
4754 }
4755 con_log(CL_ANN, (CE_WARN, "Cmd type unknown !"));
4756 break;
4757 }
4758 }
4759
4797 con_log(CL_ANN, (CE_WARN,
4798 "Failed ddi_dma_alloc_handle: "
4799 "unknown status %d", i));
4800 break;
4801 }
4802
4803 return (-1);
4804 }
4805
4806 if ((ddi_dma_mem_alloc(obj->dma_handle, obj->size, &tmp_endian_attr,
4807 DDI_DMA_RDWR | DDI_DMA_STREAMING, DDI_DMA_SLEEP, NULL,
4808 &obj->buffer, &alen, &obj->acc_handle) != DDI_SUCCESS) ||
4809 alen < obj->size) {
4810
4811 ddi_dma_free_handle(&obj->dma_handle);
4812
4813 con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_mem_alloc"));
4814
4815 return (-1);
4816 }
4817
4818 if (ddi_dma_addr_bind_handle(obj->dma_handle, NULL, obj->buffer,
4819 obj->size, DDI_DMA_RDWR | DDI_DMA_STREAMING, DDI_DMA_SLEEP,
4820 NULL, &obj->dma_cookie[0], &cookie_cnt) != DDI_SUCCESS) {
4821
4822 ddi_dma_mem_free(&obj->acc_handle);
4823 ddi_dma_free_handle(&obj->dma_handle);
4824
4825 con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_addr_bind_handle"));
4826
4827 return (-1);
4828 }
4829
4830 if (mrsas_check_dma_handle(obj->dma_handle) != DDI_SUCCESS) {
4831 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4832 return (-1);
4833 }
4834
4835 if (mrsas_check_acc_handle(obj->acc_handle) != DDI_SUCCESS) {
4836 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4837 return (-1);
4838 }
4839
4840 return (cookie_cnt);
4841 }
4842
4843 /*
4844 * mrsas_free_dma_obj(struct mrsas_instance *, dma_obj_t)
4845 *
4846 * De-allocate the memory and other resources for an dma object, which must
4847 * have been alloated by a previous call to mrsas_alloc_dma_obj()
4848 */
4849 int
4850 mrsas_free_dma_obj(struct mrsas_instance *instance, dma_obj_t obj)
4851 {
4852
4853 if ((obj.dma_handle == NULL) || (obj.acc_handle == NULL)) {
4854 return (DDI_SUCCESS);
4855 }
4856
4857 /*
4858 * NOTE: These check-handle functions fail if *_handle == NULL, but
4859 * this function succeeds because of the previous check.
4860 */
4861 if (mrsas_check_dma_handle(obj.dma_handle) != DDI_SUCCESS) {
4862 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
4863 return (DDI_FAILURE);
4864 }
4865
4866 if (mrsas_check_acc_handle(obj.acc_handle) != DDI_SUCCESS) {
4867 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
4868 return (DDI_FAILURE);
4869 }
4870
4871 (void) ddi_dma_unbind_handle(obj.dma_handle);
4872 ddi_dma_mem_free(&obj.acc_handle);
4873 ddi_dma_free_handle(&obj.dma_handle);
4874 obj.acc_handle = NULL;
4875 return (DDI_SUCCESS);
4876 }
4877
4878 /*
4879 * mrsas_dma_alloc(instance_t *, struct scsi_pkt *, struct buf *,
4880 * int, int (*)())
4881 *
4882 * Allocate dma resources for a new scsi command
4883 */
4884 int
4885 mrsas_dma_alloc(struct mrsas_instance *instance, struct scsi_pkt *pkt,
4886 struct buf *bp, int flags, int (*callback)())
4887 {
4888 int dma_flags;
4889 int (*cb)(caddr_t);
4890 int i;
4901 acmd->cmd_flags |= CFLAG_DMASEND;
4902 dma_flags = DDI_DMA_WRITE;
4903 }
4904
4905 if (flags & PKT_CONSISTENT) {
4906 acmd->cmd_flags |= CFLAG_CONSISTENT;
4907 dma_flags |= DDI_DMA_CONSISTENT;
4908 }
4909
4910 if (flags & PKT_DMA_PARTIAL) {
4911 dma_flags |= DDI_DMA_PARTIAL;
4912 }
4913
4914 dma_flags |= DDI_DMA_REDZONE;
4915
4916 cb = (callback == NULL_FUNC) ? DDI_DMA_DONTWAIT : DDI_DMA_SLEEP;
4917
4918 tmp_dma_attr.dma_attr_sgllen = instance->max_num_sge;
4919 tmp_dma_attr.dma_attr_addr_hi = 0xffffffffffffffffull;
4920 if (instance->tbolt) {
4921 /* OCR-RESET FIX */
4922 tmp_dma_attr.dma_attr_count_max =
4923 (U64)mrsas_tbolt_max_cap_maxxfer; /* limit to 256K */
4924 tmp_dma_attr.dma_attr_maxxfer =
4925 (U64)mrsas_tbolt_max_cap_maxxfer; /* limit to 256K */
4926 }
4927
4928 if ((i = ddi_dma_alloc_handle(instance->dip, &tmp_dma_attr,
4929 cb, 0, &acmd->cmd_dmahandle)) != DDI_SUCCESS) {
4930 switch (i) {
4931 case DDI_DMA_BADATTR:
4932 bioerror(bp, EFAULT);
4933 return (DDI_FAILURE);
4934
4935 case DDI_DMA_NORESOURCES:
4936 bioerror(bp, 0);
4937 return (DDI_FAILURE);
4938
4939 default:
4940 con_log(CL_ANN, (CE_PANIC, "ddi_dma_alloc_handle: "
4941 "impossible result (0x%x)", i));
4942 bioerror(bp, EFAULT);
4943 return (DDI_FAILURE);
4944 }
4945 }
4946
4947 i = ddi_dma_buf_bind_handle(acmd->cmd_dmahandle, bp, dma_flags,
5106 uint16_t flags = 0;
5107 uint32_t i;
5108 uint32_t context;
5109 uint32_t sge_bytes;
5110 uint32_t tmp_data_xfer_len;
5111 ddi_acc_handle_t acc_handle;
5112 struct mrsas_cmd *cmd;
5113 struct mrsas_sge64 *mfi_sgl;
5114 struct mrsas_sge_ieee *mfi_sgl_ieee;
5115 struct scsa_cmd *acmd = PKT2CMD(pkt);
5116 struct mrsas_pthru_frame *pthru;
5117 struct mrsas_io_frame *ldio;
5118
5119 /* find out if this is logical or physical drive command. */
5120 acmd->islogical = MRDRV_IS_LOGICAL(ap);
5121 acmd->device_id = MAP_DEVICE_ID(instance, ap);
5122 *cmd_done = 0;
5123
5124 /* get the command packet */
5125 if (!(cmd = get_mfi_pkt(instance))) {
5126 DTRACE_PROBE2(build_cmd_mfi_err, uint16_t,
5127 instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
5128 return (NULL);
5129 }
5130
5131 acc_handle = cmd->frame_dma_obj.acc_handle;
5132
5133 /* Clear the frame buffer and assign back the context id */
5134 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
5135 ddi_put32(acc_handle, &cmd->frame->hdr.context, cmd->index);
5136
5137 cmd->pkt = pkt;
5138 cmd->cmd = acmd;
5139 DTRACE_PROBE3(build_cmds, uint8_t, pkt->pkt_cdbp[0],
5140 ulong_t, acmd->cmd_dmacount, ulong_t, acmd->cmd_dma_len);
5141
5142 /* lets get the command directions */
5143 if (acmd->cmd_flags & CFLAG_DMASEND) {
5144 flags = MFI_FRAME_DIR_WRITE;
5145
5146 if (acmd->cmd_flags & CFLAG_CONSISTENT) {
5147 (void) ddi_dma_sync(acmd->cmd_dmahandle,
5148 acmd->cmd_dma_offset, acmd->cmd_dma_len,
5149 DDI_DMA_SYNC_FORDEV);
5150 }
5151 } else if (acmd->cmd_flags & ~CFLAG_DMASEND) {
5152 flags = MFI_FRAME_DIR_READ;
5153
5154 if (acmd->cmd_flags & CFLAG_CONSISTENT) {
5155 (void) ddi_dma_sync(acmd->cmd_dmahandle,
5156 acmd->cmd_dma_offset, acmd->cmd_dma_len,
5157 DDI_DMA_SYNC_FORCPU);
5158 }
5159 } else {
5160 flags = MFI_FRAME_DIR_NONE;
5205 /* Initialize sense Information */
5206 bzero(cmd->sense, SENSE_LENGTH);
5207 ddi_put8(acc_handle, &ldio->sense_len, SENSE_LENGTH);
5208 ddi_put32(acc_handle, &ldio->sense_buf_phys_addr_hi, 0);
5209 ddi_put32(acc_handle, &ldio->sense_buf_phys_addr_lo,
5210 cmd->sense_phys_addr);
5211 ddi_put32(acc_handle, &ldio->start_lba_hi, 0);
5212 ddi_put8(acc_handle, &ldio->access_byte,
5213 (acmd->cmd_cdblen != 6) ? pkt->pkt_cdbp[1] : 0);
5214 ddi_put8(acc_handle, &ldio->sge_count,
5215 acmd->cmd_cookiecnt);
5216 if (instance->flag_ieee) {
5217 mfi_sgl_ieee =
5218 (struct mrsas_sge_ieee *)&ldio->sgl;
5219 } else {
5220 mfi_sgl = (struct mrsas_sge64 *)&ldio->sgl;
5221 }
5222
5223 context = ddi_get32(acc_handle, &ldio->context);
5224
5225 if (acmd->cmd_cdblen == CDB_GROUP0) {
5226 /* 6-byte cdb */
5227 ddi_put32(acc_handle, &ldio->lba_count, (
5228 (uint16_t)(pkt->pkt_cdbp[4])));
5229
5230 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5231 ((uint32_t)(pkt->pkt_cdbp[3])) |
5232 ((uint32_t)(pkt->pkt_cdbp[2]) << 8) |
5233 ((uint32_t)((pkt->pkt_cdbp[1]) & 0x1F)
5234 << 16)));
5235 } else if (acmd->cmd_cdblen == CDB_GROUP1) {
5236 /* 10-byte cdb */
5237 ddi_put32(acc_handle, &ldio->lba_count, (
5238 ((uint16_t)(pkt->pkt_cdbp[8])) |
5239 ((uint16_t)(pkt->pkt_cdbp[7]) << 8)));
5240
5241 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5242 ((uint32_t)(pkt->pkt_cdbp[5])) |
5243 ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
5244 ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
5245 ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
5246 } else if (acmd->cmd_cdblen == CDB_GROUP5) {
5247 /* 12-byte cdb */
5248 ddi_put32(acc_handle, &ldio->lba_count, (
5249 ((uint32_t)(pkt->pkt_cdbp[9])) |
5250 ((uint32_t)(pkt->pkt_cdbp[8]) << 8) |
5251 ((uint32_t)(pkt->pkt_cdbp[7]) << 16) |
5252 ((uint32_t)(pkt->pkt_cdbp[6]) << 24)));
5253
5254 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5255 ((uint32_t)(pkt->pkt_cdbp[5])) |
5256 ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
5257 ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
5258 ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
5259 } else if (acmd->cmd_cdblen == CDB_GROUP4) {
5260 /* 16-byte cdb */
5261 ddi_put32(acc_handle, &ldio->lba_count, (
5262 ((uint32_t)(pkt->pkt_cdbp[13])) |
5263 ((uint32_t)(pkt->pkt_cdbp[12]) << 8) |
5264 ((uint32_t)(pkt->pkt_cdbp[11]) << 16) |
5265 ((uint32_t)(pkt->pkt_cdbp[10]) << 24)));
5266
5267 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5268 ((uint32_t)(pkt->pkt_cdbp[9])) |
5269 ((uint32_t)(pkt->pkt_cdbp[8]) << 8) |
5270 ((uint32_t)(pkt->pkt_cdbp[7]) << 16) |
5271 ((uint32_t)(pkt->pkt_cdbp[6]) << 24)));
5272
5273 ddi_put32(acc_handle, &ldio->start_lba_hi, (
5274 ((uint32_t)(pkt->pkt_cdbp[5])) |
5275 ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
5276 ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
5277 ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
5278 }
5279
5280 break;
5356 } else {
5357 for (i = 0; i < acmd->cmd_cookiecnt; i++, mfi_sgl++) {
5358 ddi_put64(acc_handle, &mfi_sgl->phys_addr,
5359 acmd->cmd_dmacookies[i].dmac_laddress);
5360 ddi_put32(acc_handle, &mfi_sgl->length,
5361 acmd->cmd_dmacookies[i].dmac_size);
5362 }
5363 sge_bytes = sizeof (struct mrsas_sge64)*acmd->cmd_cookiecnt;
5364 }
5365
5366 cmd->frame_count = (sge_bytes / MRMFI_FRAME_SIZE) +
5367 ((sge_bytes % MRMFI_FRAME_SIZE) ? 1 : 0) + 1;
5368
5369 if (cmd->frame_count >= 8) {
5370 cmd->frame_count = 8;
5371 }
5372
5373 return (cmd);
5374 }
5375
5376 #ifndef __sparc
5377 /*
5378 * wait_for_outstanding - Wait for all outstanding cmds
5379 * @instance: Adapter soft state
5380 *
5381 * This function waits for upto MRDRV_RESET_WAIT_TIME seconds for FW to
5382 * complete all its outstanding commands. Returns error if one or more IOs
5383 * are pending after this time period.
5384 */
5385 static int
5386 wait_for_outstanding(struct mrsas_instance *instance)
5387 {
5388 int i;
5389 uint32_t wait_time = 90;
5390
5391 for (i = 0; i < wait_time; i++) {
5392 if (!instance->fw_outstanding) {
5393 break;
5394 }
5395
5396 drv_usecwait(MILLISEC); /* wait for 1000 usecs */;
5397 }
5398
5399 if (instance->fw_outstanding) {
5400 return (1);
5401 }
5402
5403 return (0);
5404 }
5405 #endif /* __sparc */
5406
5407 /*
5408 * issue_mfi_pthru
5409 */
5410 static int
5411 issue_mfi_pthru(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5412 struct mrsas_cmd *cmd, int mode)
5413 {
5414 void *ubuf;
5415 uint32_t kphys_addr = 0;
5416 uint32_t xferlen = 0;
5417 uint32_t new_xfer_length = 0;
5418 uint_t model;
5419 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
5420 dma_obj_t pthru_dma_obj;
5421 struct mrsas_pthru_frame *kpthru;
5422 struct mrsas_pthru_frame *pthru;
5423 int i;
5424 pthru = &cmd->frame->pthru;
5425 kpthru = (struct mrsas_pthru_frame *)&ioctl->frame[0];
5426
5427 if (instance->adapterresetinprogress) {
5428 con_log(CL_ANN1, (CE_WARN, "issue_mfi_pthru: Reset flag set, "
5429 "returning mfi_pkt and setting TRAN_BUSY\n"));
5430 return (DDI_FAILURE);
5431 }
5432 model = ddi_model_convert_from(mode & FMODELS);
5433 if (model == DDI_MODEL_ILP32) {
5434 con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP32"));
5435
5436 xferlen = kpthru->sgl.sge32[0].length;
5437
5438 ubuf = (void *)(ulong_t)kpthru->sgl.sge32[0].phys_addr;
5439 } else {
5440 #ifdef _ILP32
5441 con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP32"));
5442 xferlen = kpthru->sgl.sge32[0].length;
5443 ubuf = (void *)(ulong_t)kpthru->sgl.sge32[0].phys_addr;
5444 #else
5445 con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP64"));
5446 xferlen = kpthru->sgl.sge64[0].length;
5447 ubuf = (void *)(ulong_t)kpthru->sgl.sge64[0].phys_addr;
5448 #endif
5449 }
5450
5451 if (xferlen) {
5452 /* means IOCTL requires DMA */
5453 /* allocate the data transfer buffer */
5454 /* pthru_dma_obj.size = xferlen; */
5455 MRSAS_GET_BOUNDARY_ALIGNED_LEN(xferlen, new_xfer_length,
5456 PAGESIZE);
5457 pthru_dma_obj.size = new_xfer_length;
5458 pthru_dma_obj.dma_attr = mrsas_generic_dma_attr;
5459 pthru_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5460 pthru_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5461 pthru_dma_obj.dma_attr.dma_attr_sgllen = 1;
5462 pthru_dma_obj.dma_attr.dma_attr_align = 1;
5463
5464 /* allocate kernel buffer for DMA */
5465 if (mrsas_alloc_dma_obj(instance, &pthru_dma_obj,
5466 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5467 con_log(CL_ANN, (CE_WARN, "issue_mfi_pthru: "
5468 "could not allocate data transfer buffer."));
5469 return (DDI_FAILURE);
5470 }
5471 (void) memset(pthru_dma_obj.buffer, 0, xferlen);
5472
5473 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5474 if (kpthru->flags & MFI_FRAME_DIR_WRITE) {
5475 for (i = 0; i < xferlen; i++) {
5476 if (ddi_copyin((uint8_t *)ubuf+i,
5483 }
5484 }
5485 }
5486
5487 kphys_addr = pthru_dma_obj.dma_cookie[0].dmac_address;
5488 }
5489
5490 ddi_put8(acc_handle, &pthru->cmd, kpthru->cmd);
5491 ddi_put8(acc_handle, &pthru->sense_len, SENSE_LENGTH);
5492 ddi_put8(acc_handle, &pthru->cmd_status, 0);
5493 ddi_put8(acc_handle, &pthru->scsi_status, 0);
5494 ddi_put8(acc_handle, &pthru->target_id, kpthru->target_id);
5495 ddi_put8(acc_handle, &pthru->lun, kpthru->lun);
5496 ddi_put8(acc_handle, &pthru->cdb_len, kpthru->cdb_len);
5497 ddi_put8(acc_handle, &pthru->sge_count, kpthru->sge_count);
5498 ddi_put16(acc_handle, &pthru->timeout, kpthru->timeout);
5499 ddi_put32(acc_handle, &pthru->data_xfer_len, kpthru->data_xfer_len);
5500
5501 ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_hi, 0);
5502 pthru->sense_buf_phys_addr_lo = cmd->sense_phys_addr;
5503 /* ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_lo, 0); */
5504
5505 ddi_rep_put8(acc_handle, (uint8_t *)kpthru->cdb, (uint8_t *)pthru->cdb,
5506 pthru->cdb_len, DDI_DEV_AUTOINCR);
5507
5508 ddi_put16(acc_handle, &pthru->flags, kpthru->flags & ~MFI_FRAME_SGL64);
5509 ddi_put32(acc_handle, &pthru->sgl.sge32[0].length, xferlen);
5510 ddi_put32(acc_handle, &pthru->sgl.sge32[0].phys_addr, kphys_addr);
5511
5512 cmd->sync_cmd = MRSAS_TRUE;
5513 cmd->frame_count = 1;
5514
5515 if (instance->tbolt) {
5516 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
5517 }
5518
5519 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
5520 con_log(CL_ANN, (CE_WARN,
5521 "issue_mfi_pthru: fw_ioctl failed"));
5522 } else {
5523 if (xferlen && kpthru->flags & MFI_FRAME_DIR_READ) {
5524 for (i = 0; i < xferlen; i++) {
5525 if (ddi_copyout(
5526 (uint8_t *)pthru_dma_obj.buffer+i,
5527 (uint8_t *)ubuf+i, 1, mode)) {
5528 con_log(CL_ANN, (CE_WARN,
5529 "issue_mfi_pthru : "
5530 "copy to user space failed"));
5531 return (DDI_FAILURE);
5532 }
5533 }
5534 }
5535 }
5536
5537 kpthru->cmd_status = ddi_get8(acc_handle, &pthru->cmd_status);
5538 kpthru->scsi_status = ddi_get8(acc_handle, &pthru->scsi_status);
5539
5540 con_log(CL_ANN, (CE_CONT, "issue_mfi_pthru: cmd_status %x, "
5541 "scsi_status %x", kpthru->cmd_status, kpthru->scsi_status));
5542 DTRACE_PROBE3(issue_pthru, uint8_t, kpthru->cmd, uint8_t,
5543 kpthru->cmd_status, uint8_t, kpthru->scsi_status);
5544
5545 if (kpthru->sense_len) {
5546 uint_t sense_len = SENSE_LENGTH;
5547 void *sense_ubuf =
5548 (void *)(ulong_t)kpthru->sense_buf_phys_addr_lo;
5549 if (kpthru->sense_len <= SENSE_LENGTH) {
5550 sense_len = kpthru->sense_len;
5551 }
5552
5553 for (i = 0; i < sense_len; i++) {
5554 if (ddi_copyout(
5555 (uint8_t *)cmd->sense+i,
5556 (uint8_t *)sense_ubuf+i, 1, mode)) {
5557 con_log(CL_ANN, (CE_WARN,
5558 "issue_mfi_pthru : "
5559 "copy to user space failed"));
5560 }
5561 con_log(CL_DLEVEL1, (CE_WARN,
5562 "Copying Sense info sense_buff[%d] = 0x%X",
5563 i, *((uint8_t *)cmd->sense + i)));
5564 }
5565 }
5566 (void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle, 0, 0,
5567 DDI_DMA_SYNC_FORDEV);
5568
5569 if (xferlen) {
5570 /* free kernel buffer */
5571 if (mrsas_free_dma_obj(instance, pthru_dma_obj) != DDI_SUCCESS)
5572 return (DDI_FAILURE);
5573 }
5574
5575 return (DDI_SUCCESS);
5576 }
5577
5578 /*
5579 * issue_mfi_dcmd
5580 */
5581 static int
5582 issue_mfi_dcmd(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5583 struct mrsas_cmd *cmd, int mode)
5584 {
5585 void *ubuf;
5586 uint32_t kphys_addr = 0;
5587 uint32_t xferlen = 0;
5588 uint32_t new_xfer_length = 0;
5589 uint32_t model;
5590 dma_obj_t dcmd_dma_obj;
5591 struct mrsas_dcmd_frame *kdcmd;
5592 struct mrsas_dcmd_frame *dcmd;
5593 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
5594 int i;
5595 dcmd = &cmd->frame->dcmd;
5596 kdcmd = (struct mrsas_dcmd_frame *)&ioctl->frame[0];
5597
5598 if (instance->adapterresetinprogress) {
5599 con_log(CL_ANN1, (CE_NOTE, "Reset flag set, "
5600 "returning mfi_pkt and setting TRAN_BUSY"));
5601 return (DDI_FAILURE);
5602 }
5603 model = ddi_model_convert_from(mode & FMODELS);
5604 if (model == DDI_MODEL_ILP32) {
5605 con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_ILP32"));
5606
5607 xferlen = kdcmd->sgl.sge32[0].length;
5608
5609 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
5610 } else {
5611 #ifdef _ILP32
5612 con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_ILP32"));
5613 xferlen = kdcmd->sgl.sge32[0].length;
5614 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
5615 #else
5616 con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_LP64"));
5617 xferlen = kdcmd->sgl.sge64[0].length;
5618 ubuf = (void *)(ulong_t)kdcmd->sgl.sge64[0].phys_addr;
5619 #endif
5620 }
5621 if (xferlen) {
5622 /* means IOCTL requires DMA */
5623 /* allocate the data transfer buffer */
5624 /* dcmd_dma_obj.size = xferlen; */
5625 MRSAS_GET_BOUNDARY_ALIGNED_LEN(xferlen, new_xfer_length,
5626 PAGESIZE);
5627 dcmd_dma_obj.size = new_xfer_length;
5628 dcmd_dma_obj.dma_attr = mrsas_generic_dma_attr;
5629 dcmd_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5630 dcmd_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5631 dcmd_dma_obj.dma_attr.dma_attr_sgllen = 1;
5632 dcmd_dma_obj.dma_attr.dma_attr_align = 1;
5633
5634 /* allocate kernel buffer for DMA */
5635 if (mrsas_alloc_dma_obj(instance, &dcmd_dma_obj,
5636 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5637 con_log(CL_ANN,
5638 (CE_WARN, "issue_mfi_dcmd: could not "
5639 "allocate data transfer buffer."));
5640 return (DDI_FAILURE);
5641 }
5642 (void) memset(dcmd_dma_obj.buffer, 0, xferlen);
5643
5644 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5645 if (kdcmd->flags & MFI_FRAME_DIR_WRITE) {
5646 for (i = 0; i < xferlen; i++) {
5647 if (ddi_copyin((uint8_t *)ubuf + i,
5648 (uint8_t *)dcmd_dma_obj.buffer + i,
5649 1, mode)) {
5650 con_log(CL_ANN, (CE_WARN,
5651 "issue_mfi_dcmd : "
5652 "copy from user space failed"));
5653 return (DDI_FAILURE);
5654 }
5655 }
5656 }
5657
5658 kphys_addr = dcmd_dma_obj.dma_cookie[0].dmac_address;
5659 }
5681
5682 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
5683 con_log(CL_ANN, (CE_WARN, "issue_mfi_dcmd: fw_ioctl failed"));
5684 } else {
5685 if (xferlen && (kdcmd->flags & MFI_FRAME_DIR_READ)) {
5686 for (i = 0; i < xferlen; i++) {
5687 if (ddi_copyout(
5688 (uint8_t *)dcmd_dma_obj.buffer + i,
5689 (uint8_t *)ubuf + i,
5690 1, mode)) {
5691 con_log(CL_ANN, (CE_WARN,
5692 "issue_mfi_dcmd : "
5693 "copy to user space failed"));
5694 return (DDI_FAILURE);
5695 }
5696 }
5697 }
5698 }
5699
5700 kdcmd->cmd_status = ddi_get8(acc_handle, &dcmd->cmd_status);
5701 con_log(CL_ANN,
5702 (CE_CONT, "issue_mfi_dcmd: cmd_status %x", kdcmd->cmd_status));
5703 DTRACE_PROBE3(issue_dcmd, uint32_t, kdcmd->opcode, uint8_t,
5704 kdcmd->cmd, uint8_t, kdcmd->cmd_status);
5705
5706 if (xferlen) {
5707 /* free kernel buffer */
5708 if (mrsas_free_dma_obj(instance, dcmd_dma_obj) != DDI_SUCCESS)
5709 return (DDI_FAILURE);
5710 }
5711
5712 return (DDI_SUCCESS);
5713 }
5714
5715 /*
5716 * issue_mfi_smp
5717 */
5718 static int
5719 issue_mfi_smp(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5720 struct mrsas_cmd *cmd, int mode)
5721 {
5722 void *request_ubuf;
5723 void *response_ubuf;
5724 uint32_t request_xferlen = 0;
5775
5776 response_ubuf = (void *)(ulong_t)sge32[0].phys_addr;
5777 request_ubuf = (void *)(ulong_t)sge32[1].phys_addr;
5778 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: "
5779 "response_ubuf = %p, request_ubuf = %p",
5780 response_ubuf, request_ubuf));
5781 #else
5782 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: DDI_MODEL_LP64"));
5783
5784 sge64 = &ksmp->sgl[0].sge64[0];
5785 response_xferlen = sge64[0].length;
5786 request_xferlen = sge64[1].length;
5787
5788 response_ubuf = (void *)(ulong_t)sge64[0].phys_addr;
5789 request_ubuf = (void *)(ulong_t)sge64[1].phys_addr;
5790 #endif
5791 }
5792 if (request_xferlen) {
5793 /* means IOCTL requires DMA */
5794 /* allocate the data transfer buffer */
5795 /* request_dma_obj.size = request_xferlen; */
5796 MRSAS_GET_BOUNDARY_ALIGNED_LEN(request_xferlen,
5797 new_xfer_length1, PAGESIZE);
5798 request_dma_obj.size = new_xfer_length1;
5799 request_dma_obj.dma_attr = mrsas_generic_dma_attr;
5800 request_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5801 request_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5802 request_dma_obj.dma_attr.dma_attr_sgllen = 1;
5803 request_dma_obj.dma_attr.dma_attr_align = 1;
5804
5805 /* allocate kernel buffer for DMA */
5806 if (mrsas_alloc_dma_obj(instance, &request_dma_obj,
5807 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5808 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5809 "could not allocate data transfer buffer."));
5810 return (DDI_FAILURE);
5811 }
5812 (void) memset(request_dma_obj.buffer, 0, request_xferlen);
5813
5814 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5815 for (i = 0; i < request_xferlen; i++) {
5816 if (ddi_copyin((uint8_t *)request_ubuf + i,
5817 (uint8_t *)request_dma_obj.buffer + i,
5818 1, mode)) {
5819 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5820 "copy from user space failed"));
5821 return (DDI_FAILURE);
5822 }
5823 }
5824 }
5825
5826 if (response_xferlen) {
5827 /* means IOCTL requires DMA */
5828 /* allocate the data transfer buffer */
5829 /* response_dma_obj.size = response_xferlen; */
5830 MRSAS_GET_BOUNDARY_ALIGNED_LEN(response_xferlen,
5831 new_xfer_length2, PAGESIZE);
5832 response_dma_obj.size = new_xfer_length2;
5833 response_dma_obj.dma_attr = mrsas_generic_dma_attr;
5834 response_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5835 response_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5836 response_dma_obj.dma_attr.dma_attr_sgllen = 1;
5837 response_dma_obj.dma_attr.dma_attr_align = 1;
5838
5839 /* allocate kernel buffer for DMA */
5840 if (mrsas_alloc_dma_obj(instance, &response_dma_obj,
5841 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5842 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5843 "could not allocate data transfer buffer."));
5844 return (DDI_FAILURE);
5845 }
5846 (void) memset(response_dma_obj.buffer, 0, response_xferlen);
5847
5848 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5849 for (i = 0; i < response_xferlen; i++) {
5850 if (ddi_copyin((uint8_t *)response_ubuf + i,
5851 (uint8_t *)response_dma_obj.buffer + i,
5941 }
5942
5943 if (response_xferlen) {
5944 for (i = 0; i < response_xferlen; i++) {
5945 if (ddi_copyout(
5946 (uint8_t *)response_dma_obj.buffer
5947 + i, (uint8_t *)response_ubuf
5948 + i, 1, mode)) {
5949 con_log(CL_ANN, (CE_WARN,
5950 "issue_mfi_smp : copy to "
5951 "user space failed"));
5952 return (DDI_FAILURE);
5953 }
5954 }
5955 }
5956 }
5957
5958 ksmp->cmd_status = ddi_get8(acc_handle, &smp->cmd_status);
5959 con_log(CL_ANN1, (CE_NOTE, "issue_mfi_smp: smp->cmd_status = %d",
5960 ksmp->cmd_status));
5961 DTRACE_PROBE2(issue_smp, uint8_t, ksmp->cmd, uint8_t, ksmp->cmd_status);
5962
5963 if (request_xferlen) {
5964 /* free kernel buffer */
5965 if (mrsas_free_dma_obj(instance, request_dma_obj) !=
5966 DDI_SUCCESS)
5967 return (DDI_FAILURE);
5968 }
5969
5970 if (response_xferlen) {
5971 /* free kernel buffer */
5972 if (mrsas_free_dma_obj(instance, response_dma_obj) !=
5973 DDI_SUCCESS)
5974 return (DDI_FAILURE);
5975 }
5976
5977 return (DDI_SUCCESS);
5978 }
5979
5980 /*
5981 * issue_mfi_stp
5998 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
5999 int i;
6000
6001 stp = &cmd->frame->stp;
6002 kstp = (struct mrsas_stp_frame *)&ioctl->frame[0];
6003
6004 if (instance->adapterresetinprogress) {
6005 con_log(CL_ANN1, (CE_WARN, "Reset flag set, "
6006 "returning mfi_pkt and setting TRAN_BUSY\n"));
6007 return (DDI_FAILURE);
6008 }
6009 model = ddi_model_convert_from(mode & FMODELS);
6010 if (model == DDI_MODEL_ILP32) {
6011 con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_ILP32"));
6012
6013 fis_xferlen = kstp->sgl.sge32[0].length;
6014 data_xferlen = kstp->sgl.sge32[1].length;
6015
6016 fis_ubuf = (void *)(ulong_t)kstp->sgl.sge32[0].phys_addr;
6017 data_ubuf = (void *)(ulong_t)kstp->sgl.sge32[1].phys_addr;
6018 } else {
6019 #ifdef _ILP32
6020 con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_ILP32"));
6021
6022 fis_xferlen = kstp->sgl.sge32[0].length;
6023 data_xferlen = kstp->sgl.sge32[1].length;
6024
6025 fis_ubuf = (void *)(ulong_t)kstp->sgl.sge32[0].phys_addr;
6026 data_ubuf = (void *)(ulong_t)kstp->sgl.sge32[1].phys_addr;
6027 #else
6028 con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_LP64"));
6029
6030 fis_xferlen = kstp->sgl.sge64[0].length;
6031 data_xferlen = kstp->sgl.sge64[1].length;
6032
6033 fis_ubuf = (void *)(ulong_t)kstp->sgl.sge64[0].phys_addr;
6034 data_ubuf = (void *)(ulong_t)kstp->sgl.sge64[1].phys_addr;
6035 #endif
6036 }
6037
6038
6039 if (fis_xferlen) {
6040 con_log(CL_ANN, (CE_CONT, "issue_mfi_stp: "
6041 "fis_ubuf = %p fis_xferlen = %x", fis_ubuf, fis_xferlen));
6042
6043 /* means IOCTL requires DMA */
6044 /* allocate the data transfer buffer */
6045 /* fis_dma_obj.size = fis_xferlen; */
6046 MRSAS_GET_BOUNDARY_ALIGNED_LEN(fis_xferlen,
6047 new_xfer_length1, PAGESIZE);
6048 fis_dma_obj.size = new_xfer_length1;
6049 fis_dma_obj.dma_attr = mrsas_generic_dma_attr;
6050 fis_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
6051 fis_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
6052 fis_dma_obj.dma_attr.dma_attr_sgllen = 1;
6053 fis_dma_obj.dma_attr.dma_attr_align = 1;
6054
6055 /* allocate kernel buffer for DMA */
6056 if (mrsas_alloc_dma_obj(instance, &fis_dma_obj,
6057 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
6058 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp : "
6059 "could not allocate data transfer buffer."));
6060 return (DDI_FAILURE);
6061 }
6062 (void) memset(fis_dma_obj.buffer, 0, fis_xferlen);
6063
6064 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
6065 for (i = 0; i < fis_xferlen; i++) {
6066 if (ddi_copyin((uint8_t *)fis_ubuf + i,
6067 (uint8_t *)fis_dma_obj.buffer + i, 1, mode)) {
6068 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
6069 "copy from user space failed"));
6070 return (DDI_FAILURE);
6071 }
6072 }
6073 }
6074
6075 if (data_xferlen) {
6076 con_log(CL_ANN, (CE_CONT, "issue_mfi_stp: data_ubuf = %p "
6077 "data_xferlen = %x", data_ubuf, data_xferlen));
6078
6079 /* means IOCTL requires DMA */
6080 /* allocate the data transfer buffer */
6081 /* data_dma_obj.size = data_xferlen; */
6082 MRSAS_GET_BOUNDARY_ALIGNED_LEN(data_xferlen, new_xfer_length2,
6083 PAGESIZE);
6084 data_dma_obj.size = new_xfer_length2;
6085 data_dma_obj.dma_attr = mrsas_generic_dma_attr;
6086 data_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
6087 data_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
6088 data_dma_obj.dma_attr.dma_attr_sgllen = 1;
6089 data_dma_obj.dma_attr.dma_attr_align = 1;
6090
6091 /* allocate kernel buffer for DMA */
6092 if (mrsas_alloc_dma_obj(instance, &data_dma_obj,
6093 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
6094 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
6095 "could not allocate data transfer buffer."));
6096 return (DDI_FAILURE);
6097 }
6098 (void) memset(data_dma_obj.buffer, 0, data_xferlen);
6099
6100 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
6101 for (i = 0; i < data_xferlen; i++) {
6102 if (ddi_copyin((uint8_t *)data_ubuf + i,
6103 (uint8_t *)data_dma_obj.buffer + i, 1, mode)) {
6104 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
6105 "copy from user space failed"));
6106 return (DDI_FAILURE);
6107 }
6108 }
6109 }
6110
6111 ddi_put8(acc_handle, &stp->cmd, kstp->cmd);
6152 }
6153 }
6154 }
6155 }
6156 if (data_xferlen) {
6157 for (i = 0; i < data_xferlen; i++) {
6158 if (ddi_copyout(
6159 (uint8_t *)data_dma_obj.buffer + i,
6160 (uint8_t *)data_ubuf + i, 1, mode)) {
6161 con_log(CL_ANN, (CE_WARN,
6162 "issue_mfi_stp : copy to"
6163 " user space failed"));
6164 return (DDI_FAILURE);
6165 }
6166 }
6167 }
6168
6169 kstp->cmd_status = ddi_get8(acc_handle, &stp->cmd_status);
6170 con_log(CL_ANN1, (CE_NOTE, "issue_mfi_stp: stp->cmd_status = %d",
6171 kstp->cmd_status));
6172 DTRACE_PROBE2(issue_stp, uint8_t, kstp->cmd, uint8_t, kstp->cmd_status);
6173
6174 if (fis_xferlen) {
6175 /* free kernel buffer */
6176 if (mrsas_free_dma_obj(instance, fis_dma_obj) != DDI_SUCCESS)
6177 return (DDI_FAILURE);
6178 }
6179
6180 if (data_xferlen) {
6181 /* free kernel buffer */
6182 if (mrsas_free_dma_obj(instance, data_dma_obj) != DDI_SUCCESS)
6183 return (DDI_FAILURE);
6184 }
6185
6186 return (DDI_SUCCESS);
6187 }
6188
6189 /*
6190 * fill_up_drv_ver
6191 */
6192 void
6316 }
6317
6318 /*
6319 * handle_mfi_ioctl
6320 */
6321 static int
6322 handle_mfi_ioctl(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
6323 int mode)
6324 {
6325 int rval = DDI_SUCCESS;
6326
6327 struct mrsas_header *hdr;
6328 struct mrsas_cmd *cmd;
6329
6330 if (instance->tbolt) {
6331 cmd = get_raid_msg_mfi_pkt(instance);
6332 } else {
6333 cmd = get_mfi_pkt(instance);
6334 }
6335 if (!cmd) {
6336 con_log(CL_ANN, (CE_WARN, "mr_sas: "
6337 "failed to get a cmd packet"));
6338 DTRACE_PROBE2(mfi_ioctl_err, uint16_t,
6339 instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
6340 return (DDI_FAILURE);
6341 }
6342
6343 /* Clear the frame buffer and assign back the context id */
6344 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
6345 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
6346 cmd->index);
6347
6348 hdr = (struct mrsas_header *)&ioctl->frame[0];
6349
6350 switch (ddi_get8(cmd->frame_dma_obj.acc_handle, &hdr->cmd)) {
6351 case MFI_CMD_OP_DCMD:
6352 rval = issue_mfi_dcmd(instance, ioctl, cmd, mode);
6353 break;
6354 case MFI_CMD_OP_SMP:
6355 rval = issue_mfi_smp(instance, ioctl, cmd, mode);
6356 break;
6357 case MFI_CMD_OP_STP:
6358 rval = issue_mfi_stp(instance, ioctl, cmd, mode);
6359 break;
6360 case MFI_CMD_OP_LD_SCSI:
6361 case MFI_CMD_OP_PD_SCSI:
6362 rval = issue_mfi_pthru(instance, ioctl, cmd, mode);
6363 break;
6364 default:
6365 con_log(CL_ANN, (CE_WARN, "handle_mfi_ioctl: "
6366 "invalid mfi ioctl hdr->cmd = %d", hdr->cmd));
6367 rval = DDI_FAILURE;
6368 break;
6369 }
6370
6371 if (mrsas_common_check(instance, cmd) != DDI_SUCCESS)
6372 rval = DDI_FAILURE;
6373
6374 if (instance->tbolt) {
6375 return_raid_msg_mfi_pkt(instance, cmd);
6376 } else {
6377 return_mfi_pkt(instance, cmd);
6378 }
6379
6380 return (rval);
6381 }
6382
6383 /*
6384 * AEN
6385 */
6386 static int
6387 handle_mfi_aen(struct mrsas_instance *instance, struct mrsas_aen *aen)
6388 {
6389 int rval = 0;
6390
6391 rval = register_mfi_aen(instance, instance->aen_seq_num,
6392 aen->class_locale_word);
6393
6458
6459 if (ret_val) {
6460 con_log(CL_ANN, (CE_WARN, "register_mfi_aen: "
6461 "failed to abort prevous AEN command"));
6462
6463 return (ret_val);
6464 }
6465 }
6466 } else {
6467 curr_aen.word = LE_32(class_locale_word);
6468 curr_aen.members.locale = LE_16(curr_aen.members.locale);
6469 }
6470
6471 if (instance->tbolt) {
6472 cmd = get_raid_msg_mfi_pkt(instance);
6473 } else {
6474 cmd = get_mfi_pkt(instance);
6475 }
6476
6477 if (!cmd) {
6478 DTRACE_PROBE2(mfi_aen_err, uint16_t, instance->fw_outstanding,
6479 uint16_t, instance->max_fw_cmds);
6480 return (ENOMEM);
6481 }
6482
6483 /* Clear the frame buffer and assign back the context id */
6484 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
6485 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
6486 cmd->index);
6487
6488 dcmd = &cmd->frame->dcmd;
6489
6490 /* for(i = 0; i < DCMD_MBOX_SZ; i++) dcmd->mbox.b[i] = 0; */
6491 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
6492
6493 (void) memset(instance->mfi_evt_detail_obj.buffer, 0,
6494 sizeof (struct mrsas_evt_detail));
6495
6496 /* Prepare DCMD for aen registration */
6497 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
6498 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0x0);
6499 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 1);
6500 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
6501 MFI_FRAME_DIR_READ);
6502 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
6588 i = scsi_inq[0] & 0x1f;
6589
6590
6591 len += snprintf(inquiry_buf + len, 265 - len, " Type: %s ",
6592 i < MAX_SCSI_DEVICE_CODE ? scsi_device_types[i] :
6593 "Unknown ");
6594
6595
6596 len += snprintf(inquiry_buf + len, 265 - len,
6597 " ANSI SCSI revision: %02x", scsi_inq[2] & 0x07);
6598
6599 if ((scsi_inq[2] & 0x07) == 1 && (scsi_inq[3] & 0x0f) == 1) {
6600 len += snprintf(inquiry_buf + len, 265 - len, " CCS\n");
6601 } else {
6602 len += snprintf(inquiry_buf + len, 265 - len, "\n");
6603 }
6604
6605 con_log(CL_DLEVEL2, (CE_CONT, inquiry_buf));
6606 }
6607
6608 static void
6609 io_timeout_checker(void *arg)
6610 {
6611 struct scsi_pkt *pkt;
6612 struct mrsas_instance *instance = arg;
6613 struct mrsas_cmd *cmd = NULL;
6614 struct mrsas_header *hdr;
6615 int time = 0;
6616 int counter = 0;
6617 struct mlist_head *pos, *next;
6618 mlist_t process_list;
6619
6620 if (instance->adapterresetinprogress == 1) {
6621 con_log(CL_ANN, (CE_NOTE, "io_timeout_checker:"
6622 " reset in progress"));
6623
6624 instance->timeout_id = timeout(io_timeout_checker,
6625 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
6626 return;
6627 }
6628
6629 /* See if this check needs to be in the beginning or last in ISR */
6630 if (mrsas_initiate_ocr_if_fw_is_faulty(instance) == 1) {
6631 cmn_err(CE_WARN, "io_timeout_checker: "
6632 "FW Fault, calling reset adapter");
6633 cmn_err(CE_CONT, "io_timeout_checker: "
6634 "fw_outstanding 0x%X max_fw_cmds 0x%X",
6635 instance->fw_outstanding, instance->max_fw_cmds);
6636 if (instance->adapterresetinprogress == 0) {
6637 instance->adapterresetinprogress = 1;
6638 if (instance->tbolt)
6639 (void) mrsas_tbolt_reset_ppc(instance);
6640 else
6641 (void) mrsas_reset_ppc(instance);
6642 instance->adapterresetinprogress = 0;
6643 }
6644 instance->timeout_id = timeout(io_timeout_checker,
6645 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
6646 return;
6647 }
6648
6649 INIT_LIST_HEAD(&process_list);
6650
6651 mutex_enter(&instance->cmd_pend_mtx);
6652 mlist_for_each_safe(pos, next, &instance->cmd_pend_list) {
6653 cmd = mlist_entry(pos, struct mrsas_cmd, list);
6654
6655 if (cmd == NULL) {
6656 continue;
6657 }
6658
6659 if (cmd->sync_cmd == MRSAS_TRUE) {
6660 hdr = (struct mrsas_header *)&cmd->frame->hdr;
6661 if (hdr == NULL) {
6662 continue;
6663 }
6664 time = --cmd->drv_pkt_time;
6665 } else {
6666 pkt = cmd->pkt;
6667 if (pkt == NULL) {
6668 continue;
6669 }
6670 time = --cmd->drv_pkt_time;
6671 }
6672 if (time <= 0) {
6673 cmn_err(CE_WARN, "%llx: "
6674 "io_timeout_checker: TIMING OUT: pkt: %p, "
6675 "cmd %p fw_outstanding 0x%X max_fw_cmds 0x%X\n",
6676 gethrtime(), (void *)pkt, (void *)cmd,
6677 instance->fw_outstanding, instance->max_fw_cmds);
6678
6679 counter++;
6680 break;
6681 }
6682 }
6683 mutex_exit(&instance->cmd_pend_mtx);
6684
6685 if (counter) {
6686 if (instance->disable_online_ctrl_reset == 1) {
6687 cmn_err(CE_WARN, "mr_sas %d: %s(): OCR is NOT "
6688 "supported by Firmware, KILL adapter!!!",
6689 instance->instance, __func__);
6690
6691 if (instance->tbolt)
6692 mrsas_tbolt_kill_adapter(instance);
6693 else
6694 (void) mrsas_kill_adapter(instance);
6695
6696 return;
6697 } else {
6698 if (cmd->retry_count_for_ocr <= IO_RETRY_COUNT) {
6699 if (instance->adapterresetinprogress == 0) {
6700 if (instance->tbolt) {
6701 (void) mrsas_tbolt_reset_ppc(
6702 instance);
6703 } else {
6704 (void) mrsas_reset_ppc(
6705 instance);
6706 }
6707 }
6708 } else {
6709 cmn_err(CE_WARN,
6710 "io_timeout_checker: "
6711 "cmd %p cmd->index %d "
6712 "timed out even after 3 resets: "
6713 "so KILL adapter", (void *)cmd, cmd->index);
6714
6715 mrsas_print_cmd_details(instance, cmd, 0xDD);
6716
6717 if (instance->tbolt)
6718 mrsas_tbolt_kill_adapter(instance);
6719 else
6720 (void) mrsas_kill_adapter(instance);
6721 return;
6722 }
6723 }
6724 }
6725 con_log(CL_ANN, (CE_NOTE, "mrsas: "
6726 "schedule next timeout check: "
6727 "do timeout \n"));
6728 instance->timeout_id =
6729 timeout(io_timeout_checker, (void *)instance,
6730 drv_usectohz(MRSAS_1_SECOND));
6731 }
6732
6733 static uint32_t
6734 read_fw_status_reg_ppc(struct mrsas_instance *instance)
6735 {
6736 return ((uint32_t)RD_OB_SCRATCH_PAD_0(instance));
6737 }
6738
6746 if (pkt) {
6747 con_log(CL_DLEVEL1, (CE_NOTE, "%llx : issue_cmd_ppc:"
6748 "ISSUED CMD TO FW : called : cmd:"
6749 ": %p instance : %p pkt : %p pkt_time : %x\n",
6750 gethrtime(), (void *)cmd, (void *)instance,
6751 (void *)pkt, cmd->drv_pkt_time));
6752 if (instance->adapterresetinprogress) {
6753 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
6754 con_log(CL_ANN1, (CE_NOTE, "Reset the scsi_pkt timer"));
6755 } else {
6756 push_pending_mfi_pkt(instance, cmd);
6757 }
6758
6759 } else {
6760 con_log(CL_DLEVEL1, (CE_NOTE, "%llx : issue_cmd_ppc:"
6761 "ISSUED CMD TO FW : called : cmd : %p, instance: %p"
6762 "(NO PKT)\n", gethrtime(), (void *)cmd, (void *)instance));
6763 }
6764
6765 mutex_enter(&instance->reg_write_mtx);
6766 /* Issue the command to the FW */
6767 WR_IB_QPORT((cmd->frame_phys_addr) |
6768 (((cmd->frame_count - 1) << 1) | 1), instance);
6769 mutex_exit(&instance->reg_write_mtx);
6770
6771 }
6772
6773 /*
6774 * issue_cmd_in_sync_mode
6775 */
6776 static int
6777 issue_cmd_in_sync_mode_ppc(struct mrsas_instance *instance,
6778 struct mrsas_cmd *cmd)
6779 {
6780 int i;
6781 uint32_t msecs = MFI_POLL_TIMEOUT_SECS * (10 * MILLISEC);
6782 struct mrsas_header *hdr = &cmd->frame->hdr;
6783
6784 con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_sync_mode_ppc: called"));
6785
6786 if (instance->adapterresetinprogress) {
6787 cmd->drv_pkt_time = ddi_get16(
6788 cmd->frame_dma_obj.acc_handle, &hdr->timeout);
6789 if (cmd->drv_pkt_time < debug_timeout_g)
6790 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
6791
6792 con_log(CL_ANN1, (CE_NOTE, "sync_mode_ppc: "
6793 "issue and return in reset case\n"));
6794 WR_IB_QPORT((cmd->frame_phys_addr) |
6795 (((cmd->frame_count - 1) << 1) | 1), instance);
6796
6797 return (DDI_SUCCESS);
6798 } else {
6799 con_log(CL_ANN1, (CE_NOTE, "sync_mode_ppc: pushing the pkt\n"));
6800 push_pending_mfi_pkt(instance, cmd);
6801 }
6802
6803 cmd->cmd_status = ENODATA;
6804
6805 mutex_enter(&instance->reg_write_mtx);
6806 /* Issue the command to the FW */
6807 WR_IB_QPORT((cmd->frame_phys_addr) |
6808 (((cmd->frame_count - 1) << 1) | 1), instance);
6809 mutex_exit(&instance->reg_write_mtx);
6810
6811 mutex_enter(&instance->int_cmd_mtx);
6812 for (i = 0; i < msecs && (cmd->cmd_status == ENODATA); i++) {
6813 cv_wait(&instance->int_cmd_cv, &instance->int_cmd_mtx);
6814 }
6815 mutex_exit(&instance->int_cmd_mtx);
6816
6817 con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_sync_mode_ppc: done"));
6818
6819 if (i < (msecs -1)) {
6820 return (DDI_SUCCESS);
6821 } else {
6822 return (DDI_FAILURE);
6823 }
6824 }
6825
6909 #endif
6910 }
6911
6912 static int
6913 intr_ack_ppc(struct mrsas_instance *instance)
6914 {
6915 uint32_t status;
6916 int ret = DDI_INTR_CLAIMED;
6917
6918 con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: called"));
6919
6920 /* check if it is our interrupt */
6921 status = RD_OB_INTR_STATUS(instance);
6922
6923 con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: status = 0x%x", status));
6924
6925 if (!(status & MFI_REPLY_2108_MESSAGE_INTR)) {
6926 ret = DDI_INTR_UNCLAIMED;
6927 }
6928
6929 if (mrsas_check_acc_handle(instance->regmap_handle) != DDI_SUCCESS) {
6930 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
6931 ret = DDI_INTR_UNCLAIMED;
6932 }
6933
6934 if (ret == DDI_INTR_UNCLAIMED) {
6935 return (ret);
6936 }
6937 /* clear the interrupt by writing back the same value */
6938 WR_OB_DOORBELL_CLEAR(status, instance);
6939
6940 /* dummy READ */
6941 status = RD_OB_INTR_STATUS(instance);
6942
6943 con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: interrupt cleared"));
6944
6945 return (ret);
6946 }
6947
6948 /*
6949 * Marks HBA as bad. This will be called either when an
6950 * IO packet times out even after 3 FW resets
6951 * or FW is found to be fault even after 3 continuous resets.
6952 */
6953
6991 "flag set, time %llx", gethrtime()));
6992
6993 instance->func_ptr->disable_intr(instance);
6994 retry_reset:
6995 WR_IB_WRITE_SEQ(0, instance);
6996 WR_IB_WRITE_SEQ(4, instance);
6997 WR_IB_WRITE_SEQ(0xb, instance);
6998 WR_IB_WRITE_SEQ(2, instance);
6999 WR_IB_WRITE_SEQ(7, instance);
7000 WR_IB_WRITE_SEQ(0xd, instance);
7001 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: magic number written "
7002 "to write sequence register\n"));
7003 delay(100 * drv_usectohz(MILLISEC));
7004 status = RD_OB_DRWE(instance);
7005
7006 while (!(status & DIAG_WRITE_ENABLE)) {
7007 delay(100 * drv_usectohz(MILLISEC));
7008 status = RD_OB_DRWE(instance);
7009 if (retry++ == 100) {
7010 cmn_err(CE_WARN, "mrsas_reset_ppc: DRWE bit "
7011 "check retry count %d", retry);
7012 return (DDI_FAILURE);
7013 }
7014 }
7015 WR_IB_DRWE(status | DIAG_RESET_ADAPTER, instance);
7016 delay(100 * drv_usectohz(MILLISEC));
7017 status = RD_OB_DRWE(instance);
7018 while (status & DIAG_RESET_ADAPTER) {
7019 delay(100 * drv_usectohz(MILLISEC));
7020 status = RD_OB_DRWE(instance);
7021 if (retry++ == 100) {
7022 cmn_err(CE_WARN, "mrsas_reset_ppc: "
7023 "RESET FAILED. KILL adapter called.");
7024
7025 (void) mrsas_kill_adapter(instance);
7026 return (DDI_FAILURE);
7027 }
7028 }
7029 con_log(CL_ANN, (CE_NOTE, "mrsas_reset_ppc: Adapter reset complete"));
7030 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7031 "Calling mfi_state_transition_to_ready"));
7032
7033 /* Mark HBA as bad, if FW is fault after 3 continuous resets */
7034 if (mfi_state_transition_to_ready(instance) ||
7035 debug_fw_faults_after_ocr_g == 1) {
7036 cur_abs_reg_val =
7037 instance->func_ptr->read_fw_status_reg(instance);
7038 fw_state = cur_abs_reg_val & MFI_STATE_MASK;
7039
7040 #ifdef OCRDEBUG
7041 con_log(CL_ANN1, (CE_NOTE,
7042 "mrsas_reset_ppc :before fake: FW is not ready "
7043 "FW state = 0x%x", fw_state));
7045 fw_state = MFI_STATE_FAULT;
7046 #endif
7047
7048 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc : FW is not ready "
7049 "FW state = 0x%x", fw_state));
7050
7051 if (fw_state == MFI_STATE_FAULT) {
7052 /* increment the count */
7053 instance->fw_fault_count_after_ocr++;
7054 if (instance->fw_fault_count_after_ocr
7055 < MAX_FW_RESET_COUNT) {
7056 cmn_err(CE_WARN, "mrsas_reset_ppc: "
7057 "FW is in fault after OCR count %d "
7058 "Retry Reset",
7059 instance->fw_fault_count_after_ocr);
7060 goto retry_reset;
7061
7062 } else {
7063 cmn_err(CE_WARN, "mrsas_reset_ppc: "
7064 "Max Reset Count exceeded >%d"
7065 "Mark HBA as bad, KILL adapter",
7066 MAX_FW_RESET_COUNT);
7067
7068 (void) mrsas_kill_adapter(instance);
7069 return (DDI_FAILURE);
7070 }
7071 }
7072 }
7073 /* reset the counter as FW is up after OCR */
7074 instance->fw_fault_count_after_ocr = 0;
7075
7076
7077 ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
7078 instance->producer, 0);
7079
7080 ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
7081 instance->consumer, 0);
7082
7083 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7084 " after resetting produconsumer chck indexs:"
7085 "producer %x consumer %x", *instance->producer,
7086 *instance->consumer));
7109 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7110 "Calling aen registration"));
7111
7112
7113 instance->aen_cmd->retry_count_for_ocr = 0;
7114 instance->aen_cmd->drv_pkt_time = 0;
7115
7116 instance->func_ptr->issue_cmd(instance->aen_cmd, instance);
7117 con_log(CL_ANN1, (CE_NOTE, "Unsetting adpresetinprogress flag.\n"));
7118
7119 mutex_enter(&instance->ocr_flags_mtx);
7120 instance->adapterresetinprogress = 0;
7121 mutex_exit(&instance->ocr_flags_mtx);
7122 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7123 "adpterresetinprogress flag unset"));
7124
7125 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc done\n"));
7126 return (DDI_SUCCESS);
7127 }
7128
7129 /*
7130 * FMA functions.
7131 */
7132 int
7133 mrsas_common_check(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
7134 {
7135 int ret = DDI_SUCCESS;
7136
7137 if (cmd != NULL &&
7138 mrsas_check_dma_handle(cmd->frame_dma_obj.dma_handle) !=
7139 DDI_SUCCESS) {
7140 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7141 if (cmd->pkt != NULL) {
7142 cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7143 cmd->pkt->pkt_statistics = 0;
7144 }
7145 ret = DDI_FAILURE;
7146 }
7147 if (mrsas_check_dma_handle(instance->mfi_internal_dma_obj.dma_handle)
7148 != DDI_SUCCESS) {
7149 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7150 if (cmd != NULL && cmd->pkt != NULL) {
7151 cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7152 cmd->pkt->pkt_statistics = 0;
7153 }
7154 ret = DDI_FAILURE;
7155 }
7156 if (mrsas_check_dma_handle(instance->mfi_evt_detail_obj.dma_handle) !=
7157 DDI_SUCCESS) {
7158 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7159 if (cmd != NULL && cmd->pkt != NULL) {
7160 cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7161 cmd->pkt->pkt_statistics = 0;
7162 }
7163 ret = DDI_FAILURE;
7164 }
7165 if (mrsas_check_acc_handle(instance->regmap_handle) != DDI_SUCCESS) {
7166 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7167
7168 ddi_fm_acc_err_clear(instance->regmap_handle, DDI_FME_VER0);
7169
7170 if (cmd != NULL && cmd->pkt != NULL) {
7171 cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7172 cmd->pkt->pkt_statistics = 0;
7173 }
7174 ret = DDI_FAILURE;
7175 }
7176
7177 return (ret);
7178 }
7179
7180 /*ARGSUSED*/
7181 static int
7182 mrsas_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data)
7183 {
7184 /*
7185 * as the driver can always deal with an error in any dma or
7186 * access handle, we can just return the fme_status value.
7187 */
7188 pci_ereport_post(dip, err, NULL);
7189 return (err->fme_status);
7190 }
7191
7192 static void
7193 mrsas_fm_init(struct mrsas_instance *instance)
7194 {
7195 /* Need to change iblock to priority for new MSI intr */
7196 ddi_iblock_cookie_t fm_ibc;
7197
7198 /* Only register with IO Fault Services if we have some capability */
7199 if (instance->fm_capabilities) {
7200 /* Adjust access and dma attributes for FMA */
7201 endian_attr.devacc_attr_access = DDI_FLAGERR_ACC;
7202 mrsas_generic_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;
7203
7204 /*
7205 * Register capabilities with IO Fault Services.
7206 * fm_capabilities will be updated to indicate
7207 * capabilities actually supported (not requested.)
7208 */
7209
7210 ddi_fm_init(instance->dip, &instance->fm_capabilities, &fm_ibc);
7211
7212 /*
7213 * Initialize pci ereport capabilities if ereport
7214 * capable (should always be.)
7215 */
7216
7217 if (DDI_FM_EREPORT_CAP(instance->fm_capabilities) ||
7218 DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7219 pci_ereport_setup(instance->dip);
7220 }
7221
7222 /*
7223 * Register error callback if error callback capable.
7224 */
7225 if (DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7226 ddi_fm_handler_register(instance->dip,
7227 mrsas_fm_error_cb, (void*) instance);
7228 }
7229 } else {
7230 endian_attr.devacc_attr_access = DDI_DEFAULT_ACC;
7231 mrsas_generic_dma_attr.dma_attr_flags = 0;
7232 }
7233 }
7234
7235 static void
7236 mrsas_fm_fini(struct mrsas_instance *instance)
7237 {
7238 /* Only unregister FMA capabilities if registered */
7239 if (instance->fm_capabilities) {
7240 /*
7241 * Un-register error callback if error callback capable.
7242 */
7243 if (DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7244 ddi_fm_handler_unregister(instance->dip);
7245 }
7246
7247 /*
7248 * Release any resources allocated by pci_ereport_setup()
7249 */
7250 if (DDI_FM_EREPORT_CAP(instance->fm_capabilities) ||
7251 DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7252 pci_ereport_teardown(instance->dip);
7253 }
7254
7255 /* Unregister from IO Fault Services */
7256 ddi_fm_fini(instance->dip);
7257
7258 /* Adjust access and dma attributes for FMA */
7259 endian_attr.devacc_attr_access = DDI_DEFAULT_ACC;
7260 mrsas_generic_dma_attr.dma_attr_flags = 0;
7261 }
7262 }
7263
7264 int
7265 mrsas_check_acc_handle(ddi_acc_handle_t handle)
7266 {
7267 ddi_fm_error_t de;
7268
7269 if (handle == NULL) {
7270 return (DDI_FAILURE);
7271 }
7272
7273 ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION);
7274
7275 return (de.fme_status);
7276 }
7277
7278 int
7279 mrsas_check_dma_handle(ddi_dma_handle_t handle)
7280 {
7281 ddi_fm_error_t de;
7282
7283 if (handle == NULL) {
7284 return (DDI_FAILURE);
7285 }
7286
7287 ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION);
7288
7289 return (de.fme_status);
7290 }
7291
7292 void
7293 mrsas_fm_ereport(struct mrsas_instance *instance, char *detail)
7294 {
7295 uint64_t ena;
7296 char buf[FM_MAX_CLASS];
7297
7298 (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", DDI_FM_DEVICE, detail);
7299 ena = fm_ena_generate(0, FM_ENA_FMT1);
7300 if (DDI_FM_EREPORT_CAP(instance->fm_capabilities)) {
7301 ddi_fm_ereport_post(instance->dip, buf, ena, DDI_NOSLEEP,
7302 FM_VERSION, DATA_TYPE_UINT8, FM_EREPORT_VERSION, NULL);
7303 }
7304 }
7305
7306 static int
7307 mrsas_add_intrs(struct mrsas_instance *instance, int intr_type)
7308 {
7309
7310 dev_info_t *dip = instance->dip;
7311 int avail, actual, count;
7312 int i, flag, ret;
7313
7314 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: intr_type = %x",
7315 intr_type));
7316
7317 /* Get number of interrupts */
7318 ret = ddi_intr_get_nintrs(dip, intr_type, &count);
7319 if ((ret != DDI_SUCCESS) || (count == 0)) {
7320 con_log(CL_ANN, (CE_WARN, "ddi_intr_get_nintrs() failed:"
7321 "ret %d count %d", ret, count));
7322
7323 return (DDI_FAILURE);
7324 }
7325
7326 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: count = %d ", count));
7328 /* Get number of available interrupts */
7329 ret = ddi_intr_get_navail(dip, intr_type, &avail);
7330 if ((ret != DDI_SUCCESS) || (avail == 0)) {
7331 con_log(CL_ANN, (CE_WARN, "ddi_intr_get_navail() failed:"
7332 "ret %d avail %d", ret, avail));
7333
7334 return (DDI_FAILURE);
7335 }
7336 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: avail = %d ", avail));
7337
7338 /* Only one interrupt routine. So limit the count to 1 */
7339 if (count > 1) {
7340 count = 1;
7341 }
7342
7343 /*
7344 * Allocate an array of interrupt handlers. Currently we support
7345 * only one interrupt. The framework can be extended later.
7346 */
7347 instance->intr_htable_size = count * sizeof (ddi_intr_handle_t);
7348 instance->intr_htable = kmem_zalloc(instance->intr_htable_size,
7349 KM_SLEEP);
7350 ASSERT(instance->intr_htable);
7351
7352 flag = ((intr_type == DDI_INTR_TYPE_MSI) ||
7353 (intr_type == DDI_INTR_TYPE_MSIX)) ?
7354 DDI_INTR_ALLOC_STRICT : DDI_INTR_ALLOC_NORMAL;
7355
7356 /* Allocate interrupt */
7357 ret = ddi_intr_alloc(dip, instance->intr_htable, intr_type, 0,
7358 count, &actual, flag);
7359
7360 if ((ret != DDI_SUCCESS) || (actual == 0)) {
7361 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
7362 "avail = %d", avail));
7363 goto mrsas_free_htable;
7364 }
7365
7366 if (actual < count) {
7367 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
7368 "Requested = %d Received = %d", count, actual));
7369 }
7370 instance->intr_cnt = actual;
7371
7372 /*
7373 * Get the priority of the interrupt allocated.
7374 */
7416
7417 if (instance->intr_cap & DDI_INTR_FLAG_BLOCK) {
7418 con_log(CL_ANN, (CE_WARN, "Calling ddi_intr_block _enable"));
7419
7420 (void) ddi_intr_block_enable(instance->intr_htable,
7421 instance->intr_cnt);
7422 } else {
7423 con_log(CL_ANN, (CE_NOTE, " calling ddi_intr_enable"));
7424
7425 for (i = 0; i < instance->intr_cnt; i++) {
7426 (void) ddi_intr_enable(instance->intr_htable[i]);
7427 con_log(CL_ANN, (CE_NOTE, "ddi intr enable returns "
7428 "%d", i));
7429 }
7430 }
7431
7432 return (DDI_SUCCESS);
7433
7434 mrsas_free_handlers:
7435 for (i = 0; i < actual; i++)
7436 (void) ddi_intr_remove_handler(instance->intr_htable[i]);
7437
7438 mrsas_free_handles:
7439 for (i = 0; i < actual; i++)
7440 (void) ddi_intr_free(instance->intr_htable[i]);
7441
7442 mrsas_free_htable:
7443 if (instance->intr_htable != NULL)
7444 kmem_free(instance->intr_htable, instance->intr_htable_size);
7445
7446 instance->intr_htable = NULL;
7447 instance->intr_htable_size = 0;
7448
7449 return (DDI_FAILURE);
7450
7451 }
7452
7453
7454 static void
7455 mrsas_rem_intrs(struct mrsas_instance *instance)
7456 {
7457 int i;
7458
7459 con_log(CL_ANN, (CE_NOTE, "mrsas_rem_intrs called"));
7460
7461 /* Disable all interrupts first */
7462 if (instance->intr_cap & DDI_INTR_FLAG_BLOCK) {
7463 (void) ddi_intr_block_disable(instance->intr_htable,
7464 instance->intr_cnt);
7465 } else {
7466 for (i = 0; i < instance->intr_cnt; i++) {
7467 (void) ddi_intr_disable(instance->intr_htable[i]);
7468 }
7469 }
7470
7471 /* Remove all the handlers */
7472
7473 for (i = 0; i < instance->intr_cnt; i++) {
7474 (void) ddi_intr_remove_handler(instance->intr_htable[i]);
7475 (void) ddi_intr_free(instance->intr_htable[i]);
7476 }
7477
7478 if (instance->intr_htable != NULL)
7479 kmem_free(instance->intr_htable, instance->intr_htable_size);
7480
7481 instance->intr_htable = NULL;
7482 instance->intr_htable_size = 0;
7483
7484 }
7485
7486 static int
7487 mrsas_tran_bus_config(dev_info_t *parent, uint_t flags,
7488 ddi_bus_config_op_t op, void *arg, dev_info_t **childp)
7489 {
7490 struct mrsas_instance *instance;
7491 int config;
7492 int rval = NDI_SUCCESS;
7493
7494 char *ptr = NULL;
7495 int tgt, lun;
7496
7497 con_log(CL_ANN1, (CE_NOTE, "Bus config called for op = %x", op));
7498
7499 if ((instance = ddi_get_soft_state(mrsas_state,
7500 ddi_get_instance(parent))) == NULL) {
7501 return (NDI_FAILURE);
7503
7504 /* Hold nexus during bus_config */
7505 ndi_devi_enter(parent, &config);
7506 switch (op) {
7507 case BUS_CONFIG_ONE: {
7508
7509 /* parse wwid/target name out of name given */
7510 if ((ptr = strchr((char *)arg, '@')) == NULL) {
7511 rval = NDI_FAILURE;
7512 break;
7513 }
7514 ptr++;
7515
7516 if (mrsas_parse_devname(arg, &tgt, &lun) != 0) {
7517 rval = NDI_FAILURE;
7518 break;
7519 }
7520
7521 if (lun == 0) {
7522 rval = mrsas_config_ld(instance, tgt, lun, childp);
7523 #ifdef PDSUPPORT
7524 } else if (instance->tbolt == 1 && lun != 0) {
7525 rval = mrsas_tbolt_config_pd(instance,
7526 tgt, lun, childp);
7527 #endif
7528 } else {
7529 rval = NDI_FAILURE;
7530 }
7531
7532 break;
7533 }
7534 case BUS_CONFIG_DRIVER:
7535 case BUS_CONFIG_ALL: {
7536
7537 rval = mrsas_config_all_devices(instance);
7538
7539 rval = NDI_SUCCESS;
7540 break;
7541 }
7542 }
7543
7544 if (rval == NDI_SUCCESS) {
7545 rval = ndi_busop_bus_config(parent, flags, op, arg, childp, 0);
7546
7547 }
7548 ndi_devi_exit(parent, config);
7549
7550 con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_bus_config: rval = %x",
7551 rval));
7552 return (rval);
7553 }
7554
7555 static int
7556 mrsas_config_all_devices(struct mrsas_instance *instance)
7557 {
7558 int rval, tgt;
7559
7560 for (tgt = 0; tgt < MRDRV_MAX_LD; tgt++) {
7561 (void) mrsas_config_ld(instance, tgt, 0, NULL);
7562
7563 }
7564
7565 #ifdef PDSUPPORT
7566 /* Config PD devices connected to the card */
7567 if (instance->tbolt) {
7568 for (tgt = 0; tgt < instance->mr_tbolt_pd_max; tgt++) {
7569 (void) mrsas_tbolt_config_pd(instance, tgt, 1, NULL);
7570 }
7571 }
7572 #endif
7573
7574 rval = NDI_SUCCESS;
7575 return (rval);
7576 }
7577
7578 static int
7579 mrsas_parse_devname(char *devnm, int *tgt, int *lun)
7580 {
7581 char devbuf[SCSI_MAXNAMELEN];
7582 char *addr;
7583 char *p, *tp, *lp;
7584 long num;
7585
7586 /* Parse dev name and address */
7587 (void) strcpy(devbuf, devnm);
7629
7630 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_config_ld: t = %d l = %d",
7631 tgt, lun));
7632
7633 if ((child = mrsas_find_child(instance, tgt, lun)) != NULL) {
7634 if (ldip) {
7635 *ldip = child;
7636 }
7637 if (instance->mr_ld_list[tgt].flag != MRDRV_TGT_VALID) {
7638 rval = mrsas_service_evt(instance, tgt, 0,
7639 MRSAS_EVT_UNCONFIG_TGT, NULL);
7640 con_log(CL_ANN1, (CE_WARN,
7641 "mr_sas: DELETING STALE ENTRY rval = %d "
7642 "tgt id = %d ", rval, tgt));
7643 return (NDI_FAILURE);
7644 }
7645 return (NDI_SUCCESS);
7646 }
7647
7648 sd = kmem_zalloc(sizeof (struct scsi_device), KM_SLEEP);
7649 sd->sd_address.a_hba_tran = instance->tran;
7650 sd->sd_address.a_target = (uint16_t)tgt;
7651 sd->sd_address.a_lun = (uint8_t)lun;
7652
7653 if (scsi_hba_probe(sd, NULL) == SCSIPROBE_EXISTS)
7654 rval = mrsas_config_scsi_device(instance, sd, ldip);
7655 else
7656 rval = NDI_FAILURE;
7657
7658 /* sd_unprobe is blank now. Free buffer manually */
7659 if (sd->sd_inq) {
7660 kmem_free(sd->sd_inq, SUN_INQSIZE);
7661 sd->sd_inq = (struct scsi_inquiry *)NULL;
7662 }
7663
7664 kmem_free(sd, sizeof (struct scsi_device));
7665 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_config_ld: return rval = %d",
7666 rval));
7667 return (rval);
7668 }
7763 if ((instance->taskq == NULL) || (mrevt =
7764 kmem_zalloc(sizeof (struct mrsas_eventinfo), KM_NOSLEEP)) == NULL) {
7765 return (ENOMEM);
7766 }
7767
7768 mrevt->instance = instance;
7769 mrevt->tgt = tgt;
7770 mrevt->lun = lun;
7771 mrevt->event = event;
7772 mrevt->wwn = wwn;
7773
7774 if ((ddi_taskq_dispatch(instance->taskq,
7775 (void (*)(void *))mrsas_issue_evt_taskq, mrevt, DDI_NOSLEEP)) !=
7776 DDI_SUCCESS) {
7777 con_log(CL_ANN1, (CE_NOTE,
7778 "mr_sas: Event task failed for t%dl%d event = %d",
7779 tgt, lun, event));
7780 kmem_free(mrevt, sizeof (struct mrsas_eventinfo));
7781 return (DDI_FAILURE);
7782 }
7783 DTRACE_PROBE3(service_evt, int, tgt, int, lun, int, event);
7784 return (DDI_SUCCESS);
7785 }
7786
7787 static void
7788 mrsas_issue_evt_taskq(struct mrsas_eventinfo *mrevt)
7789 {
7790 struct mrsas_instance *instance = mrevt->instance;
7791 dev_info_t *dip, *pdip;
7792 int circ1 = 0;
7793 char *devname;
7794
7795 con_log(CL_ANN1, (CE_NOTE, "mrsas_issue_evt_taskq: called for"
7796 " tgt %d lun %d event %d",
7797 mrevt->tgt, mrevt->lun, mrevt->event));
7798
7799 if (mrevt->tgt < MRDRV_MAX_LD && mrevt->lun == 0) {
7800 mutex_enter(&instance->config_dev_mtx);
7801 dip = instance->mr_ld_list[mrevt->tgt].dip;
7802 mutex_exit(&instance->config_dev_mtx);
7803 #ifdef PDSUPPORT
7804 } else {
7805 mutex_enter(&instance->config_dev_mtx);
7806 dip = instance->mr_tbolt_pd_list[mrevt->tgt].dip;
7807 mutex_exit(&instance->config_dev_mtx);
7808 #endif
7809 }
7810
7811
7812 ndi_devi_enter(instance->dip, &circ1);
7813 switch (mrevt->event) {
7814 case MRSAS_EVT_CONFIG_TGT:
7815 if (dip == NULL) {
7816
7817 if (mrevt->lun == 0) {
7818 (void) mrsas_config_ld(instance, mrevt->tgt,
7819 0, NULL);
7820 #ifdef PDSUPPORT
7821 } else if (instance->tbolt) {
7822 (void) mrsas_tbolt_config_pd(instance,
7823 mrevt->tgt,
7824 1, NULL);
7825 #endif
7826 }
7827 con_log(CL_ANN1, (CE_NOTE,
7828 "mr_sas: EVT_CONFIG_TGT called:"
7829 " for tgt %d lun %d event %d",
7830 mrevt->tgt, mrevt->lun, mrevt->event));
7831
7832 } else {
7833 con_log(CL_ANN1, (CE_NOTE,
7834 "mr_sas: EVT_CONFIG_TGT dip != NULL:"
7835 " for tgt %d lun %d event %d",
7836 mrevt->tgt, mrevt->lun, mrevt->event));
7837 }
7838 break;
7839 case MRSAS_EVT_UNCONFIG_TGT:
7840 if (dip) {
7841 if (i_ddi_devi_attached(dip)) {
7842
7843 pdip = ddi_get_parent(dip);
7844
7845 devname = kmem_zalloc(MAXNAMELEN + 1, KM_SLEEP);
7846 (void) ddi_deviname(dip, devname);
7906 }
7907 case 0x4: {
7908 struct mode_geometry *page4p = NULL;
7909 modehdrp = (struct mode_header *)(bp->b_un.b_addr);
7910 modehdrp->bdesc_length = MODE_BLK_DESC_LENGTH;
7911
7912 page4p = (void *)((caddr_t)modehdrp +
7913 MODE_HEADER_LENGTH + MODE_BLK_DESC_LENGTH);
7914 page4p->mode_page.code = 0x4;
7915 page4p->mode_page.length =
7916 (uchar_t)(sizeof (struct mode_geometry));
7917 page4p->heads = 255;
7918 page4p->rpm = 10000;
7919 break;
7920 }
7921 default:
7922 break;
7923 }
7924 return (NULL);
7925 }
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