1 /*
2 * mr_sas.c: source for mr_sas driver
3 *
4 * Solaris MegaRAID device driver for SAS2.0 controllers
5 * Copyright (c) 2008-2012, LSI Logic Corporation.
6 * All rights reserved.
7 *
8 * Version:
9 * Author:
10 * Swaminathan K S
11 * Arun Chandrashekhar
12 * Manju R
13 * Rasheed
14 * Shakeel Bukhari
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions are met:
18 *
19 * 1. Redistributions of source code must retain the above copyright notice,
20 * this list of conditions and the following disclaimer.
21 *
22 * 2. Redistributions in binary form must reproduce the above copyright notice,
23 * this list of conditions and the following disclaimer in the documentation
24 * and/or other materials provided with the distribution.
25 *
26 * 3. Neither the name of the author nor the names of its contributors may be
27 * used to endorse or promote products derived from this software without
28 * specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
31 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
32 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
33 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
34 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
35 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
36 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
37 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
38 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
40 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
41 * DAMAGE.
42 */
43
44 /*
45 * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
46 * Copyright (c) 2011 Bayard G. Bell. All rights reserved.
47 * Copyright 2012 Nexenta System, Inc. All rights reserved.
48 */
49
50 #include <sys/types.h>
51 #include <sys/param.h>
52 #include <sys/file.h>
53 #include <sys/errno.h>
54 #include <sys/open.h>
55 #include <sys/cred.h>
56 #include <sys/modctl.h>
57 #include <sys/conf.h>
58 #include <sys/devops.h>
59 #include <sys/cmn_err.h>
60 #include <sys/kmem.h>
61 #include <sys/stat.h>
62 #include <sys/mkdev.h>
63 #include <sys/pci.h>
64 #include <sys/scsi/scsi.h>
65 #include <sys/ddi.h>
66 #include <sys/sunddi.h>
67 #include <sys/atomic.h>
68 #include <sys/signal.h>
69 #include <sys/byteorder.h>
70 #include <sys/sdt.h>
71 #include <sys/fs/dv_node.h> /* devfs_clean */
72
73 #include "mr_sas.h"
74
75 /*
76 * FMA header files
77 */
78 #include <sys/ddifm.h>
79 #include <sys/fm/protocol.h>
80 #include <sys/fm/util.h>
81 #include <sys/fm/io/ddi.h>
82
83 /*
84 * Local static data
85 */
86 static void *mrsas_state = NULL;
87 static volatile boolean_t mrsas_relaxed_ordering = B_TRUE;
88 volatile int debug_level_g = CL_NONE;
89 static volatile int msi_enable = 1;
90 static volatile int ctio_enable = 1;
91
92 /* Default Timeout value to issue online controller reset */
93 volatile int debug_timeout_g = 0xF0; /* 0xB4; */
94 /* Simulate consecutive firmware fault */
95 static volatile int debug_fw_faults_after_ocr_g = 0;
96 #ifdef OCRDEBUG
97 /* Simulate three consecutive timeout for an IO */
98 static volatile int debug_consecutive_timeout_after_ocr_g = 0;
99 #endif
100
101 #pragma weak scsi_hba_open
102 #pragma weak scsi_hba_close
103 #pragma weak scsi_hba_ioctl
104
105 /* Local static prototypes. */
106 static int mrsas_getinfo(dev_info_t *, ddi_info_cmd_t, void *, void **);
107 static int mrsas_attach(dev_info_t *, ddi_attach_cmd_t);
108 #ifdef __sparc
109 static int mrsas_reset(dev_info_t *, ddi_reset_cmd_t);
110 #else
111 static int mrsas_quiesce(dev_info_t *);
112 #endif
113 static int mrsas_detach(dev_info_t *, ddi_detach_cmd_t);
114 static int mrsas_open(dev_t *, int, int, cred_t *);
115 static int mrsas_close(dev_t, int, int, cred_t *);
116 static int mrsas_ioctl(dev_t, int, intptr_t, int, cred_t *, int *);
117
118 static int mrsas_tran_tgt_init(dev_info_t *, dev_info_t *,
119 scsi_hba_tran_t *, struct scsi_device *);
120 static struct scsi_pkt *mrsas_tran_init_pkt(struct scsi_address *, register
121 struct scsi_pkt *, struct buf *, int, int, int, int,
122 int (*)(), caddr_t);
123 static int mrsas_tran_start(struct scsi_address *,
124 register struct scsi_pkt *);
125 static int mrsas_tran_abort(struct scsi_address *, struct scsi_pkt *);
126 static int mrsas_tran_reset(struct scsi_address *, int);
127 static int mrsas_tran_getcap(struct scsi_address *, char *, int);
128 static int mrsas_tran_setcap(struct scsi_address *, char *, int, int);
129 static void mrsas_tran_destroy_pkt(struct scsi_address *,
130 struct scsi_pkt *);
131 static void mrsas_tran_dmafree(struct scsi_address *, struct scsi_pkt *);
132 static void mrsas_tran_sync_pkt(struct scsi_address *, struct scsi_pkt *);
133 static int mrsas_tran_quiesce(dev_info_t *dip);
134 static int mrsas_tran_unquiesce(dev_info_t *dip);
135 static uint_t mrsas_isr();
136 static uint_t mrsas_softintr();
137 static void mrsas_undo_resources(dev_info_t *, struct mrsas_instance *);
138 static struct mrsas_cmd *get_mfi_pkt(struct mrsas_instance *);
139 static void return_mfi_pkt(struct mrsas_instance *,
140 struct mrsas_cmd *);
141
142 static void free_space_for_mfi(struct mrsas_instance *);
143 static uint32_t read_fw_status_reg_ppc(struct mrsas_instance *);
144 static void issue_cmd_ppc(struct mrsas_cmd *, struct mrsas_instance *);
145 static int issue_cmd_in_poll_mode_ppc(struct mrsas_instance *,
146 struct mrsas_cmd *);
147 static int issue_cmd_in_sync_mode_ppc(struct mrsas_instance *,
148 struct mrsas_cmd *);
149 static void enable_intr_ppc(struct mrsas_instance *);
150 static void disable_intr_ppc(struct mrsas_instance *);
151 static int intr_ack_ppc(struct mrsas_instance *);
152 static void flush_cache(struct mrsas_instance *instance);
153 void display_scsi_inquiry(caddr_t);
154 static int start_mfi_aen(struct mrsas_instance *instance);
155 static int handle_drv_ioctl(struct mrsas_instance *instance,
156 struct mrsas_ioctl *ioctl, int mode);
157 static int handle_mfi_ioctl(struct mrsas_instance *instance,
158 struct mrsas_ioctl *ioctl, int mode);
159 static int handle_mfi_aen(struct mrsas_instance *instance,
160 struct mrsas_aen *aen);
161 static struct mrsas_cmd *build_cmd(struct mrsas_instance *,
162 struct scsi_address *, struct scsi_pkt *, uchar_t *);
163 static int alloc_additional_dma_buffer(struct mrsas_instance *);
164 static void complete_cmd_in_sync_mode(struct mrsas_instance *,
165 struct mrsas_cmd *);
166 static int mrsas_kill_adapter(struct mrsas_instance *);
167 static int mrsas_issue_init_mfi(struct mrsas_instance *);
168 static int mrsas_reset_ppc(struct mrsas_instance *);
169 static uint32_t mrsas_initiate_ocr_if_fw_is_faulty(struct mrsas_instance *);
170 static int wait_for_outstanding(struct mrsas_instance *instance);
171 static int register_mfi_aen(struct mrsas_instance *instance,
172 uint32_t seq_num, uint32_t class_locale_word);
173 static int issue_mfi_pthru(struct mrsas_instance *instance, struct
174 mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
175 static int issue_mfi_dcmd(struct mrsas_instance *instance, struct
176 mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
177 static int issue_mfi_smp(struct mrsas_instance *instance, struct
178 mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
179 static int issue_mfi_stp(struct mrsas_instance *instance, struct
180 mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
181 static int abort_aen_cmd(struct mrsas_instance *instance,
182 struct mrsas_cmd *cmd_to_abort);
183
184 static void mrsas_rem_intrs(struct mrsas_instance *instance);
185 static int mrsas_add_intrs(struct mrsas_instance *instance, int intr_type);
186
187 static void mrsas_tran_tgt_free(dev_info_t *, dev_info_t *,
188 scsi_hba_tran_t *, struct scsi_device *);
189 static int mrsas_tran_bus_config(dev_info_t *, uint_t,
190 ddi_bus_config_op_t, void *, dev_info_t **);
191 static int mrsas_parse_devname(char *, int *, int *);
192 static int mrsas_config_all_devices(struct mrsas_instance *);
193 static int mrsas_config_ld(struct mrsas_instance *, uint16_t,
194 uint8_t, dev_info_t **);
195 static int mrsas_name_node(dev_info_t *, char *, int);
196 static void mrsas_issue_evt_taskq(struct mrsas_eventinfo *);
197 static void free_additional_dma_buffer(struct mrsas_instance *);
198 static void io_timeout_checker(void *);
199 static void mrsas_fm_init(struct mrsas_instance *);
200 static void mrsas_fm_fini(struct mrsas_instance *);
201
202 static struct mrsas_function_template mrsas_function_template_ppc = {
203 .read_fw_status_reg = read_fw_status_reg_ppc,
204 .issue_cmd = issue_cmd_ppc,
205 .issue_cmd_in_sync_mode = issue_cmd_in_sync_mode_ppc,
206 .issue_cmd_in_poll_mode = issue_cmd_in_poll_mode_ppc,
207 .enable_intr = enable_intr_ppc,
208 .disable_intr = disable_intr_ppc,
209 .intr_ack = intr_ack_ppc,
210 .init_adapter = mrsas_init_adapter_ppc
211 };
212
213
214 static struct mrsas_function_template mrsas_function_template_fusion = {
215 .read_fw_status_reg = tbolt_read_fw_status_reg,
216 .issue_cmd = tbolt_issue_cmd,
217 .issue_cmd_in_sync_mode = tbolt_issue_cmd_in_sync_mode,
218 .issue_cmd_in_poll_mode = tbolt_issue_cmd_in_poll_mode,
219 .enable_intr = tbolt_enable_intr,
220 .disable_intr = tbolt_disable_intr,
221 .intr_ack = tbolt_intr_ack,
222 .init_adapter = mrsas_init_adapter_tbolt
223 };
224
225
226 ddi_dma_attr_t mrsas_generic_dma_attr = {
227 DMA_ATTR_V0, /* dma_attr_version */
228 0, /* low DMA address range */
229 0xFFFFFFFFU, /* high DMA address range */
230 0xFFFFFFFFU, /* DMA counter register */
231 8, /* DMA address alignment */
232 0x07, /* DMA burstsizes */
233 1, /* min DMA size */
234 0xFFFFFFFFU, /* max DMA size */
235 0xFFFFFFFFU, /* segment boundary */
236 MRSAS_MAX_SGE_CNT, /* dma_attr_sglen */
237 512, /* granularity of device */
238 0 /* bus specific DMA flags */
239 };
240
241 int32_t mrsas_max_cap_maxxfer = 0x1000000;
242
243 /*
244 * Fix for: Thunderbolt controller IO timeout when IO write size is 1MEG,
245 * Limit size to 256K
246 */
247 uint32_t mrsas_tbolt_max_cap_maxxfer = (512 * 512);
248
249 /*
250 * cb_ops contains base level routines
251 */
252 static struct cb_ops mrsas_cb_ops = {
253 mrsas_open, /* open */
254 mrsas_close, /* close */
255 nodev, /* strategy */
256 nodev, /* print */
257 nodev, /* dump */
258 nodev, /* read */
259 nodev, /* write */
260 mrsas_ioctl, /* ioctl */
261 nodev, /* devmap */
262 nodev, /* mmap */
263 nodev, /* segmap */
264 nochpoll, /* poll */
265 nodev, /* cb_prop_op */
266 0, /* streamtab */
267 D_NEW | D_HOTPLUG, /* cb_flag */
268 CB_REV, /* cb_rev */
269 nodev, /* cb_aread */
270 nodev /* cb_awrite */
271 };
272
273 /*
274 * dev_ops contains configuration routines
275 */
276 static struct dev_ops mrsas_ops = {
277 DEVO_REV, /* rev, */
278 0, /* refcnt */
279 mrsas_getinfo, /* getinfo */
280 nulldev, /* identify */
281 nulldev, /* probe */
282 mrsas_attach, /* attach */
283 mrsas_detach, /* detach */
284 #ifdef __sparc
285 mrsas_reset, /* reset */
286 #else /* __sparc */
287 nodev,
288 #endif /* __sparc */
289 &mrsas_cb_ops, /* char/block ops */
290 NULL, /* bus ops */
291 NULL, /* power */
292 #ifdef __sparc
293 ddi_quiesce_not_needed
294 #else /* __sparc */
295 mrsas_quiesce /* quiesce */
296 #endif /* __sparc */
297 };
298
299 static struct modldrv modldrv = {
300 &mod_driverops, /* module type - driver */
301 MRSAS_VERSION,
302 &mrsas_ops, /* driver ops */
303 };
304
305 static struct modlinkage modlinkage = {
306 MODREV_1, /* ml_rev - must be MODREV_1 */
307 &modldrv, /* ml_linkage */
308 NULL /* end of driver linkage */
309 };
310
311 static struct ddi_device_acc_attr endian_attr = {
312 DDI_DEVICE_ATTR_V1,
313 DDI_STRUCTURE_LE_ACC,
314 DDI_STRICTORDER_ACC,
315 DDI_DEFAULT_ACC
316 };
317
318 /* Use the LSI Fast Path for the 2208 (tbolt) commands. */
319 unsigned int enable_fp = 1;
320
321
322 /*
323 * ************************************************************************** *
324 * *
325 * common entry points - for loadable kernel modules *
326 * *
327 * ************************************************************************** *
328 */
329
330 /*
331 * _init - initialize a loadable module
332 * @void
333 *
334 * The driver should perform any one-time resource allocation or data
335 * initialization during driver loading in _init(). For example, the driver
336 * should initialize any mutexes global to the driver in this routine.
337 * The driver should not, however, use _init() to allocate or initialize
338 * anything that has to do with a particular instance of the device.
339 * Per-instance initialization must be done in attach().
340 */
341 int
342 _init(void)
343 {
344 int ret;
345
346 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
347
348 ret = ddi_soft_state_init(&mrsas_state,
349 sizeof (struct mrsas_instance), 0);
350
351 if (ret != DDI_SUCCESS) {
352 cmn_err(CE_WARN, "mr_sas: could not init state");
353 return (ret);
354 }
355
356 if ((ret = scsi_hba_init(&modlinkage)) != DDI_SUCCESS) {
357 cmn_err(CE_WARN, "mr_sas: could not init scsi hba");
358 ddi_soft_state_fini(&mrsas_state);
359 return (ret);
360 }
361
362 ret = mod_install(&modlinkage);
363
364 if (ret != DDI_SUCCESS) {
365 cmn_err(CE_WARN, "mr_sas: mod_install failed");
366 scsi_hba_fini(&modlinkage);
367 ddi_soft_state_fini(&mrsas_state);
368 }
369
370 return (ret);
371 }
372
373 /*
374 * _info - returns information about a loadable module.
375 * @void
376 *
377 * _info() is called to return module information. This is a typical entry
378 * point that does predefined role. It simply calls mod_info().
379 */
380 int
381 _info(struct modinfo *modinfop)
382 {
383 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
384
385 return (mod_info(&modlinkage, modinfop));
386 }
387
388 /*
389 * _fini - prepare a loadable module for unloading
390 * @void
391 *
392 * In _fini(), the driver should release any resources that were allocated in
393 * _init(). The driver must remove itself from the system module list.
394 */
395 int
396 _fini(void)
397 {
398 int ret;
399
400 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
401
402 if ((ret = mod_remove(&modlinkage)) != DDI_SUCCESS) {
403 con_log(CL_ANN1,
404 (CE_WARN, "_fini: mod_remove() failed, error 0x%X", ret));
405 return (ret);
406 }
407
408 scsi_hba_fini(&modlinkage);
409 con_log(CL_DLEVEL1, (CE_NOTE, "_fini: scsi_hba_fini() done."));
410
411 ddi_soft_state_fini(&mrsas_state);
412 con_log(CL_DLEVEL1, (CE_NOTE, "_fini: ddi_soft_state_fini() done."));
413
414 return (ret);
415 }
416
417
418 /*
419 * ************************************************************************** *
420 * *
421 * common entry points - for autoconfiguration *
422 * *
423 * ************************************************************************** *
424 */
425 /*
426 * attach - adds a device to the system as part of initialization
427 * @dip:
428 * @cmd:
429 *
430 * The kernel calls a driver's attach() entry point to attach an instance of
431 * a device (for MegaRAID, it is instance of a controller) or to resume
432 * operation for an instance of a device that has been suspended or has been
433 * shut down by the power management framework
434 * The attach() entry point typically includes the following types of
435 * processing:
436 * - allocate a soft-state structure for the device instance (for MegaRAID,
437 * controller instance)
438 * - initialize per-instance mutexes
439 * - initialize condition variables
440 * - register the device's interrupts (for MegaRAID, controller's interrupts)
441 * - map the registers and memory of the device instance (for MegaRAID,
442 * controller instance)
443 * - create minor device nodes for the device instance (for MegaRAID,
444 * controller instance)
445 * - report that the device instance (for MegaRAID, controller instance) has
446 * attached
447 */
448 static int
449 mrsas_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
450 {
451 int instance_no;
452 int nregs;
453 int i = 0;
454 uint8_t irq;
455 uint16_t vendor_id;
456 uint16_t device_id;
457 uint16_t subsysvid;
458 uint16_t subsysid;
459 uint16_t command;
460 off_t reglength = 0;
461 int intr_types = 0;
462 char *data;
463
464 scsi_hba_tran_t *tran;
465 ddi_dma_attr_t tran_dma_attr;
466 struct mrsas_instance *instance;
467
468 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
469
470 /* CONSTCOND */
471 ASSERT(NO_COMPETING_THREADS);
472
473 instance_no = ddi_get_instance(dip);
474
475 /*
476 * check to see whether this device is in a DMA-capable slot.
477 */
478 if (ddi_slaveonly(dip) == DDI_SUCCESS) {
479 cmn_err(CE_WARN,
480 "mr_sas%d: Device in slave-only slot, unused",
481 instance_no);
482 return (DDI_FAILURE);
483 }
484
485 switch (cmd) {
486 case DDI_ATTACH:
487 /* allocate the soft state for the instance */
488 if (ddi_soft_state_zalloc(mrsas_state, instance_no)
489 != DDI_SUCCESS) {
490 cmn_err(CE_WARN,
491 "mr_sas%d: Failed to allocate soft state",
492 instance_no);
493 return (DDI_FAILURE);
494 }
495
496 instance = (struct mrsas_instance *)ddi_get_soft_state
497 (mrsas_state, instance_no);
498
499 if (instance == NULL) {
500 cmn_err(CE_WARN,
501 "mr_sas%d: Bad soft state", instance_no);
502 ddi_soft_state_free(mrsas_state, instance_no);
503 return (DDI_FAILURE);
504 }
505
506 instance->unroll.softs = 1;
507
508 /* Setup the PCI configuration space handles */
509 if (pci_config_setup(dip, &instance->pci_handle) !=
510 DDI_SUCCESS) {
511 cmn_err(CE_WARN,
512 "mr_sas%d: pci config setup failed ",
513 instance_no);
514
515 ddi_soft_state_free(mrsas_state, instance_no);
516 return (DDI_FAILURE);
517 }
518
519 if (ddi_dev_nregs(dip, &nregs) != DDI_SUCCESS) {
520 cmn_err(CE_WARN,
521 "mr_sas: failed to get registers.");
522
523 pci_config_teardown(&instance->pci_handle);
524 ddi_soft_state_free(mrsas_state, instance_no);
525 return (DDI_FAILURE);
526 }
527
528 vendor_id = pci_config_get16(instance->pci_handle,
529 PCI_CONF_VENID);
530 device_id = pci_config_get16(instance->pci_handle,
531 PCI_CONF_DEVID);
532
533 subsysvid = pci_config_get16(instance->pci_handle,
534 PCI_CONF_SUBVENID);
535 subsysid = pci_config_get16(instance->pci_handle,
536 PCI_CONF_SUBSYSID);
537
538 pci_config_put16(instance->pci_handle, PCI_CONF_COMM,
539 (pci_config_get16(instance->pci_handle,
540 PCI_CONF_COMM) | PCI_COMM_ME));
541 irq = pci_config_get8(instance->pci_handle,
542 PCI_CONF_ILINE);
543
544 con_log(CL_DLEVEL1, (CE_CONT, "mr_sas%d: "
545 "0x%x:0x%x 0x%x:0x%x, irq:%d drv-ver:%s",
546 instance_no, vendor_id, device_id, subsysvid,
547 subsysid, irq, MRSAS_VERSION));
548
549 /* enable bus-mastering */
550 command = pci_config_get16(instance->pci_handle,
551 PCI_CONF_COMM);
552
553 if (!(command & PCI_COMM_ME)) {
554 command |= PCI_COMM_ME;
555
556 pci_config_put16(instance->pci_handle,
557 PCI_CONF_COMM, command);
558
559 con_log(CL_ANN, (CE_CONT, "mr_sas%d: "
560 "enable bus-mastering", instance_no));
561 } else {
562 con_log(CL_DLEVEL1, (CE_CONT, "mr_sas%d: "
563 "bus-mastering already set", instance_no));
564 }
565
566 /* initialize function pointers */
567 switch (device_id) {
568 case PCI_DEVICE_ID_LSI_TBOLT:
569 case PCI_DEVICE_ID_LSI_INVADER:
570 con_log(CL_ANN, (CE_NOTE,
571 "mr_sas: 2208 T.B. device detected"));
572
573 instance->func_ptr =
574 &mrsas_function_template_fusion;
575 instance->tbolt = 1;
576 break;
577
578 case PCI_DEVICE_ID_LSI_2108VDE:
579 case PCI_DEVICE_ID_LSI_2108V:
580 con_log(CL_ANN, (CE_NOTE,
581 "mr_sas: 2108 Liberator device detected"));
582
583 instance->func_ptr =
584 &mrsas_function_template_ppc;
585 break;
586
587 default:
588 cmn_err(CE_WARN,
589 "mr_sas: Invalid device detected");
590
591 pci_config_teardown(&instance->pci_handle);
592 ddi_soft_state_free(mrsas_state, instance_no);
593 return (DDI_FAILURE);
594 }
595
596 instance->baseaddress = pci_config_get32(
597 instance->pci_handle, PCI_CONF_BASE0);
598 instance->baseaddress &= 0x0fffc;
599
600 instance->dip = dip;
601 instance->vendor_id = vendor_id;
602 instance->device_id = device_id;
603 instance->subsysvid = subsysvid;
604 instance->subsysid = subsysid;
605 instance->instance = instance_no;
606
607 /* Initialize FMA */
608 instance->fm_capabilities = ddi_prop_get_int(
609 DDI_DEV_T_ANY, instance->dip, DDI_PROP_DONTPASS,
610 "fm-capable", DDI_FM_EREPORT_CAPABLE |
611 DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE
612 | DDI_FM_ERRCB_CAPABLE);
613
614 mrsas_fm_init(instance);
615
616 /* Setup register map */
617 if ((ddi_dev_regsize(instance->dip,
618 REGISTER_SET_IO_2108, ®length) != DDI_SUCCESS) ||
619 reglength < MINIMUM_MFI_MEM_SZ) {
620 goto fail_attach;
621 }
622 if (reglength > DEFAULT_MFI_MEM_SZ) {
623 reglength = DEFAULT_MFI_MEM_SZ;
624 con_log(CL_DLEVEL1, (CE_NOTE,
625 "mr_sas: register length to map is 0x%lx bytes",
626 reglength));
627 }
628 if (ddi_regs_map_setup(instance->dip,
629 REGISTER_SET_IO_2108, &instance->regmap, 0,
630 reglength, &endian_attr, &instance->regmap_handle)
631 != DDI_SUCCESS) {
632 cmn_err(CE_WARN,
633 "mr_sas: couldn't map control registers");
634 goto fail_attach;
635 }
636
637 instance->unroll.regs = 1;
638
639 /*
640 * Disable Interrupt Now.
641 * Setup Software interrupt
642 */
643 instance->func_ptr->disable_intr(instance);
644
645 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
646 "mrsas-enable-msi", &data) == DDI_SUCCESS) {
647 if (strncmp(data, "no", 3) == 0) {
648 msi_enable = 0;
649 con_log(CL_ANN1, (CE_WARN,
650 "msi_enable = %d disabled", msi_enable));
651 }
652 ddi_prop_free(data);
653 }
654
655 con_log(CL_DLEVEL1, (CE_NOTE, "msi_enable = %d", msi_enable));
656
657 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
658 "mrsas-enable-fp", &data) == DDI_SUCCESS) {
659 if (strncmp(data, "no", 3) == 0) {
660 enable_fp = 0;
661 cmn_err(CE_NOTE,
662 "enable_fp = %d, Fast-Path disabled.\n",
663 enable_fp);
664 }
665
666 ddi_prop_free(data);
667 }
668
669 con_log(CL_DLEVEL1, (CE_NOTE, "enable_fp = %d\n", enable_fp));
670
671 /* Check for all supported interrupt types */
672 if (ddi_intr_get_supported_types(
673 dip, &intr_types) != DDI_SUCCESS) {
674 cmn_err(CE_WARN,
675 "ddi_intr_get_supported_types() failed");
676 goto fail_attach;
677 }
678
679 con_log(CL_DLEVEL1, (CE_NOTE,
680 "ddi_intr_get_supported_types() ret: 0x%x", intr_types));
681
682 /* Initialize and Setup Interrupt handler */
683 if (msi_enable && (intr_types & DDI_INTR_TYPE_MSIX)) {
684 if (mrsas_add_intrs(instance, DDI_INTR_TYPE_MSIX) !=
685 DDI_SUCCESS) {
686 cmn_err(CE_WARN,
687 "MSIX interrupt query failed");
688 goto fail_attach;
689 }
690 instance->intr_type = DDI_INTR_TYPE_MSIX;
691 } else if (msi_enable && (intr_types & DDI_INTR_TYPE_MSI)) {
692 if (mrsas_add_intrs(instance, DDI_INTR_TYPE_MSI) !=
693 DDI_SUCCESS) {
694 cmn_err(CE_WARN,
695 "MSI interrupt query failed");
696 goto fail_attach;
697 }
698 instance->intr_type = DDI_INTR_TYPE_MSI;
699 } else if (intr_types & DDI_INTR_TYPE_FIXED) {
700 msi_enable = 0;
701 if (mrsas_add_intrs(instance, DDI_INTR_TYPE_FIXED) !=
702 DDI_SUCCESS) {
703 cmn_err(CE_WARN,
704 "FIXED interrupt query failed");
705 goto fail_attach;
706 }
707 instance->intr_type = DDI_INTR_TYPE_FIXED;
708 } else {
709 cmn_err(CE_WARN, "Device cannot "
710 "suppport either FIXED or MSI/X "
711 "interrupts");
712 goto fail_attach;
713 }
714
715 instance->unroll.intr = 1;
716
717 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
718 "mrsas-enable-ctio", &data) == DDI_SUCCESS) {
719 if (strncmp(data, "no", 3) == 0) {
720 ctio_enable = 0;
721 con_log(CL_ANN1, (CE_WARN,
722 "ctio_enable = %d disabled", ctio_enable));
723 }
724 ddi_prop_free(data);
725 }
726
727 con_log(CL_DLEVEL1, (CE_WARN, "ctio_enable = %d", ctio_enable));
728
729 /* setup the mfi based low level driver */
730 if (mrsas_init_adapter(instance) != DDI_SUCCESS) {
731 cmn_err(CE_WARN, "mr_sas: "
732 "could not initialize the low level driver");
733
734 goto fail_attach;
735 }
736
737 /* Initialize all Mutex */
738 INIT_LIST_HEAD(&instance->completed_pool_list);
739 mutex_init(&instance->completed_pool_mtx,
740 "completed_pool_mtx", MUTEX_DRIVER,
741 DDI_INTR_PRI(instance->intr_pri));
742
743 mutex_init(&instance->sync_map_mtx,
744 "sync_map_mtx", MUTEX_DRIVER,
745 DDI_INTR_PRI(instance->intr_pri));
746
747 mutex_init(&instance->app_cmd_pool_mtx,
748 "app_cmd_pool_mtx", MUTEX_DRIVER,
749 DDI_INTR_PRI(instance->intr_pri));
750
751 mutex_init(&instance->config_dev_mtx, "config_dev_mtx",
752 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
753
754 mutex_init(&instance->cmd_pend_mtx, "cmd_pend_mtx",
755 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
756
757 mutex_init(&instance->ocr_flags_mtx, "ocr_flags_mtx",
758 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
759
760 mutex_init(&instance->int_cmd_mtx, "int_cmd_mtx",
761 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
762 cv_init(&instance->int_cmd_cv, NULL, CV_DRIVER, NULL);
763
764 mutex_init(&instance->cmd_pool_mtx, "cmd_pool_mtx",
765 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
766
767 mutex_init(&instance->reg_write_mtx, "reg_write_mtx",
768 MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
769
770 if (instance->tbolt) {
771 mutex_init(&instance->cmd_app_pool_mtx,
772 "cmd_app_pool_mtx", MUTEX_DRIVER,
773 DDI_INTR_PRI(instance->intr_pri));
774
775 mutex_init(&instance->chip_mtx,
776 "chip_mtx", MUTEX_DRIVER,
777 DDI_INTR_PRI(instance->intr_pri));
778
779 }
780
781 instance->unroll.mutexs = 1;
782
783 instance->timeout_id = (timeout_id_t)-1;
784
785 /* Register our soft-isr for highlevel interrupts. */
786 instance->isr_level = instance->intr_pri;
787 if (!(instance->tbolt)) {
788 if (instance->isr_level == HIGH_LEVEL_INTR) {
789 if (ddi_add_softintr(dip,
790 DDI_SOFTINT_HIGH,
791 &instance->soft_intr_id, NULL, NULL,
792 mrsas_softintr, (caddr_t)instance) !=
793 DDI_SUCCESS) {
794 cmn_err(CE_WARN,
795 "Software ISR did not register");
796
797 goto fail_attach;
798 }
799
800 instance->unroll.soft_isr = 1;
801
802 }
803 }
804
805 instance->softint_running = 0;
806
807 /* Allocate a transport structure */
808 tran = scsi_hba_tran_alloc(dip, SCSI_HBA_CANSLEEP);
809
810 if (tran == NULL) {
811 cmn_err(CE_WARN,
812 "scsi_hba_tran_alloc failed");
813 goto fail_attach;
814 }
815
816 instance->tran = tran;
817 instance->unroll.tran = 1;
818
819 tran->tran_hba_private = instance;
820 tran->tran_tgt_init = mrsas_tran_tgt_init;
821 tran->tran_tgt_probe = scsi_hba_probe;
822 tran->tran_tgt_free = mrsas_tran_tgt_free;
823 if (instance->tbolt) {
824 tran->tran_init_pkt =
825 mrsas_tbolt_tran_init_pkt;
826 tran->tran_start =
827 mrsas_tbolt_tran_start;
828 } else {
829 tran->tran_init_pkt = mrsas_tran_init_pkt;
830 tran->tran_start = mrsas_tran_start;
831 }
832 tran->tran_abort = mrsas_tran_abort;
833 tran->tran_reset = mrsas_tran_reset;
834 tran->tran_getcap = mrsas_tran_getcap;
835 tran->tran_setcap = mrsas_tran_setcap;
836 tran->tran_destroy_pkt = mrsas_tran_destroy_pkt;
837 tran->tran_dmafree = mrsas_tran_dmafree;
838 tran->tran_sync_pkt = mrsas_tran_sync_pkt;
839 tran->tran_quiesce = mrsas_tran_quiesce;
840 tran->tran_unquiesce = mrsas_tran_unquiesce;
841 tran->tran_bus_config = mrsas_tran_bus_config;
842
843 if (mrsas_relaxed_ordering)
844 mrsas_generic_dma_attr.dma_attr_flags |=
845 DDI_DMA_RELAXED_ORDERING;
846
847
848 tran_dma_attr = mrsas_generic_dma_attr;
849 tran_dma_attr.dma_attr_sgllen = instance->max_num_sge;
850
851 /* Attach this instance of the hba */
852 if (scsi_hba_attach_setup(dip, &tran_dma_attr, tran, 0)
853 != DDI_SUCCESS) {
854 cmn_err(CE_WARN,
855 "scsi_hba_attach failed");
856
857 goto fail_attach;
858 }
859 instance->unroll.tranSetup = 1;
860 con_log(CL_ANN1,
861 (CE_CONT, "scsi_hba_attach_setup() done."));
862
863 /* create devctl node for cfgadm command */
864 if (ddi_create_minor_node(dip, "devctl",
865 S_IFCHR, INST2DEVCTL(instance_no),
866 DDI_NT_SCSI_NEXUS, 0) == DDI_FAILURE) {
867 cmn_err(CE_WARN,
868 "mr_sas: failed to create devctl node.");
869
870 goto fail_attach;
871 }
872
873 instance->unroll.devctl = 1;
874
875 /* create scsi node for cfgadm command */
876 if (ddi_create_minor_node(dip, "scsi", S_IFCHR,
877 INST2SCSI(instance_no), DDI_NT_SCSI_ATTACHMENT_POINT, 0) ==
878 DDI_FAILURE) {
879 cmn_err(CE_WARN,
880 "mr_sas: failed to create scsi node.");
881
882 goto fail_attach;
883 }
884
885 instance->unroll.scsictl = 1;
886
887 (void) sprintf(instance->iocnode, "%d:lsirdctl",
888 instance_no);
889
890 /*
891 * Create a node for applications
892 * for issuing ioctl to the driver.
893 */
894 if (ddi_create_minor_node(dip, instance->iocnode,
895 S_IFCHR, INST2LSIRDCTL(instance_no), DDI_PSEUDO, 0) ==
896 DDI_FAILURE) {
897 cmn_err(CE_WARN,
898 "mr_sas: failed to create ioctl node.");
899
900 goto fail_attach;
901 }
902
903 instance->unroll.ioctl = 1;
904
905 /* Create a taskq to handle dr events */
906 if ((instance->taskq = ddi_taskq_create(dip,
907 "mrsas_dr_taskq", 1, TASKQ_DEFAULTPRI, 0)) == NULL) {
908 cmn_err(CE_WARN,
909 "mr_sas: failed to create taskq ");
910 instance->taskq = NULL;
911 goto fail_attach;
912 }
913 instance->unroll.taskq = 1;
914 con_log(CL_ANN1, (CE_CONT, "ddi_taskq_create() done."));
915
916 /* enable interrupt */
917 instance->func_ptr->enable_intr(instance);
918
919 /* initiate AEN */
920 if (start_mfi_aen(instance)) {
921 cmn_err(CE_WARN,
922 "mr_sas: failed to initiate AEN.");
923 goto fail_attach;
924 }
925 instance->unroll.aenPend = 1;
926 con_log(CL_ANN1,
927 (CE_CONT, "AEN started for instance %d.", instance_no));
928
929 /* Finally! We are on the air. */
930 ddi_report_dev(dip);
931
932 /* FMA handle checking. */
933 if (mrsas_check_acc_handle(instance->regmap_handle) !=
934 DDI_SUCCESS) {
935 goto fail_attach;
936 }
937 if (mrsas_check_acc_handle(instance->pci_handle) !=
938 DDI_SUCCESS) {
939 goto fail_attach;
940 }
941
942 instance->mr_ld_list =
943 kmem_zalloc(MRDRV_MAX_LD * sizeof (struct mrsas_ld),
944 KM_SLEEP);
945 if (instance->mr_ld_list == NULL) {
946 cmn_err(CE_WARN, "mr_sas attach(): "
947 "failed to allocate ld_list array");
948 goto fail_attach;
949 }
950 instance->unroll.ldlist_buff = 1;
951
952 #ifdef PDSUPPORT
953 if (instance->tbolt) {
954 instance->mr_tbolt_pd_max = MRSAS_TBOLT_PD_TGT_MAX;
955 instance->mr_tbolt_pd_list =
956 kmem_zalloc(MRSAS_TBOLT_GET_PD_MAX(instance) *
957 sizeof (struct mrsas_tbolt_pd), KM_SLEEP);
958 ASSERT(instance->mr_tbolt_pd_list);
959 for (i = 0; i < instance->mr_tbolt_pd_max; i++) {
960 instance->mr_tbolt_pd_list[i].lun_type =
961 MRSAS_TBOLT_PD_LUN;
962 instance->mr_tbolt_pd_list[i].dev_id =
963 (uint8_t)i;
964 }
965
966 instance->unroll.pdlist_buff = 1;
967 }
968 #endif
969 break;
970 case DDI_PM_RESUME:
971 con_log(CL_ANN, (CE_NOTE, "mr_sas: DDI_PM_RESUME"));
972 break;
973 case DDI_RESUME:
974 con_log(CL_ANN, (CE_NOTE, "mr_sas: DDI_RESUME"));
975 break;
976 default:
977 con_log(CL_ANN,
978 (CE_WARN, "mr_sas: invalid attach cmd=%x", cmd));
979 return (DDI_FAILURE);
980 }
981
982
983 con_log(CL_DLEVEL1,
984 (CE_NOTE, "mrsas_attach() return SUCCESS instance_num %d",
985 instance_no));
986 return (DDI_SUCCESS);
987
988 fail_attach:
989
990 mrsas_undo_resources(dip, instance);
991
992 mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
993 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
994
995 mrsas_fm_fini(instance);
996
997 pci_config_teardown(&instance->pci_handle);
998 ddi_soft_state_free(mrsas_state, instance_no);
999
1000 con_log(CL_ANN, (CE_WARN, "mr_sas: return failure from mrsas_attach"));
1001
1002 cmn_err(CE_WARN, "mrsas_attach() return FAILURE instance_num %d",
1003 instance_no);
1004
1005 return (DDI_FAILURE);
1006 }
1007
1008 /*
1009 * getinfo - gets device information
1010 * @dip:
1011 * @cmd:
1012 * @arg:
1013 * @resultp:
1014 *
1015 * The system calls getinfo() to obtain configuration information that only
1016 * the driver knows. The mapping of minor numbers to device instance is
1017 * entirely under the control of the driver. The system sometimes needs to ask
1018 * the driver which device a particular dev_t represents.
1019 * Given the device number return the devinfo pointer from the scsi_device
1020 * structure.
1021 */
1022 /*ARGSUSED*/
1023 static int
1024 mrsas_getinfo(dev_info_t *dip, ddi_info_cmd_t cmd, void *arg, void **resultp)
1025 {
1026 int rval;
1027 int mrsas_minor = getminor((dev_t)arg);
1028
1029 struct mrsas_instance *instance;
1030
1031 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1032
1033 switch (cmd) {
1034 case DDI_INFO_DEVT2DEVINFO:
1035 instance = (struct mrsas_instance *)
1036 ddi_get_soft_state(mrsas_state,
1037 MINOR2INST(mrsas_minor));
1038
1039 if (instance == NULL) {
1040 *resultp = NULL;
1041 rval = DDI_FAILURE;
1042 } else {
1043 *resultp = instance->dip;
1044 rval = DDI_SUCCESS;
1045 }
1046 break;
1047 case DDI_INFO_DEVT2INSTANCE:
1048 *resultp = (void *)(intptr_t)
1049 (MINOR2INST(getminor((dev_t)arg)));
1050 rval = DDI_SUCCESS;
1051 break;
1052 default:
1053 *resultp = NULL;
1054 rval = DDI_FAILURE;
1055 }
1056
1057 return (rval);
1058 }
1059
1060 /*
1061 * detach - detaches a device from the system
1062 * @dip: pointer to the device's dev_info structure
1063 * @cmd: type of detach
1064 *
1065 * A driver's detach() entry point is called to detach an instance of a device
1066 * that is bound to the driver. The entry point is called with the instance of
1067 * the device node to be detached and with DDI_DETACH, which is specified as
1068 * the cmd argument to the entry point.
1069 * This routine is called during driver unload. We free all the allocated
1070 * resources and call the corresponding LLD so that it can also release all
1071 * its resources.
1072 */
1073 static int
1074 mrsas_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
1075 {
1076 int instance_no;
1077
1078 struct mrsas_instance *instance;
1079
1080 con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1081
1082
1083 /* CONSTCOND */
1084 ASSERT(NO_COMPETING_THREADS);
1085
1086 instance_no = ddi_get_instance(dip);
1087
1088 instance = (struct mrsas_instance *)ddi_get_soft_state(mrsas_state,
1089 instance_no);
1090
1091 if (!instance) {
1092 cmn_err(CE_WARN,
1093 "mr_sas:%d could not get instance in detach",
1094 instance_no);
1095
1096 return (DDI_FAILURE);
1097 }
1098
1099 con_log(CL_ANN, (CE_NOTE,
1100 "mr_sas%d: detaching device 0x%4x:0x%4x:0x%4x:0x%4x",
1101 instance_no, instance->vendor_id, instance->device_id,
1102 instance->subsysvid, instance->subsysid));
1103
1104 switch (cmd) {
1105 case DDI_DETACH:
1106 con_log(CL_ANN, (CE_NOTE,
1107 "mrsas_detach: DDI_DETACH"));
1108
1109 mutex_enter(&instance->config_dev_mtx);
1110 if (instance->timeout_id != (timeout_id_t)-1) {
1111 mutex_exit(&instance->config_dev_mtx);
1112 (void) untimeout(instance->timeout_id);
1113 instance->timeout_id = (timeout_id_t)-1;
1114 mutex_enter(&instance->config_dev_mtx);
1115 instance->unroll.timer = 0;
1116 }
1117 mutex_exit(&instance->config_dev_mtx);
1118
1119 if (instance->unroll.tranSetup == 1) {
1120 if (scsi_hba_detach(dip) != DDI_SUCCESS) {
1121 cmn_err(CE_WARN,
1122 "mr_sas2%d: failed to detach",
1123 instance_no);
1124 return (DDI_FAILURE);
1125 }
1126 instance->unroll.tranSetup = 0;
1127 con_log(CL_ANN1,
1128 (CE_CONT, "scsi_hba_dettach() done."));
1129 }
1130
1131 flush_cache(instance);
1132
1133 mrsas_undo_resources(dip, instance);
1134
1135 mrsas_fm_fini(instance);
1136
1137 pci_config_teardown(&instance->pci_handle);
1138 ddi_soft_state_free(mrsas_state, instance_no);
1139 break;
1140
1141 case DDI_PM_SUSPEND:
1142 con_log(CL_ANN, (CE_NOTE,
1143 "mrsas_detach: DDI_PM_SUSPEND"));
1144
1145 break;
1146 case DDI_SUSPEND:
1147 con_log(CL_ANN, (CE_NOTE,
1148 "mrsas_detach: DDI_SUSPEND"));
1149
1150 break;
1151 default:
1152 con_log(CL_ANN, (CE_WARN,
1153 "invalid detach command:0x%x", cmd));
1154 return (DDI_FAILURE);
1155 }
1156
1157 return (DDI_SUCCESS);
1158 }
1159
1160
1161 static void
1162 mrsas_undo_resources(dev_info_t *dip, struct mrsas_instance *instance)
1163 {
1164 int instance_no;
1165
1166 con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1167
1168
1169 instance_no = ddi_get_instance(dip);
1170
1171
1172 if (instance->unroll.ioctl == 1) {
1173 ddi_remove_minor_node(dip, instance->iocnode);
1174 instance->unroll.ioctl = 0;
1175 }
1176
1177 if (instance->unroll.scsictl == 1) {
1178 ddi_remove_minor_node(dip, "scsi");
1179 instance->unroll.scsictl = 0;
1180 }
1181
1182 if (instance->unroll.devctl == 1) {
1183 ddi_remove_minor_node(dip, "devctl");
1184 instance->unroll.devctl = 0;
1185 }
1186
1187 if (instance->unroll.tranSetup == 1) {
1188 if (scsi_hba_detach(dip) != DDI_SUCCESS) {
1189 cmn_err(CE_WARN,
1190 "mr_sas2%d: failed to detach", instance_no);
1191 return; /* DDI_FAILURE */
1192 }
1193 instance->unroll.tranSetup = 0;
1194 con_log(CL_ANN1, (CE_CONT, "scsi_hba_dettach() done."));
1195 }
1196
1197 if (instance->unroll.tran == 1) {
1198 scsi_hba_tran_free(instance->tran);
1199 instance->unroll.tran = 0;
1200 con_log(CL_ANN1, (CE_CONT, "scsi_hba_tran_free() done."));
1201 }
1202
1203 if (instance->unroll.syncCmd == 1) {
1204 if (instance->tbolt) {
1205 if (abort_syncmap_cmd(instance,
1206 instance->map_update_cmd)) {
1207 cmn_err(CE_WARN, "mrsas_detach: "
1208 "failed to abort previous syncmap command");
1209 }
1210
1211 instance->unroll.syncCmd = 0;
1212 con_log(CL_ANN1, (CE_CONT, "sync cmd aborted, done."));
1213 }
1214 }
1215
1216 if (instance->unroll.aenPend == 1) {
1217 if (abort_aen_cmd(instance, instance->aen_cmd))
1218 cmn_err(CE_WARN, "mrsas_detach: "
1219 "failed to abort prevous AEN command");
1220
1221 instance->unroll.aenPend = 0;
1222 con_log(CL_ANN1, (CE_CONT, "aen cmd aborted, done."));
1223 /* This means the controller is fully initialized and running */
1224 /* Shutdown should be a last command to controller. */
1225 /* shutdown_controller(); */
1226 }
1227
1228
1229 if (instance->unroll.timer == 1) {
1230 if (instance->timeout_id != (timeout_id_t)-1) {
1231 (void) untimeout(instance->timeout_id);
1232 instance->timeout_id = (timeout_id_t)-1;
1233
1234 instance->unroll.timer = 0;
1235 }
1236 }
1237
1238 instance->func_ptr->disable_intr(instance);
1239
1240
1241 if (instance->unroll.mutexs == 1) {
1242 mutex_destroy(&instance->cmd_pool_mtx);
1243 mutex_destroy(&instance->app_cmd_pool_mtx);
1244 mutex_destroy(&instance->cmd_pend_mtx);
1245 mutex_destroy(&instance->completed_pool_mtx);
1246 mutex_destroy(&instance->sync_map_mtx);
1247 mutex_destroy(&instance->int_cmd_mtx);
1248 cv_destroy(&instance->int_cmd_cv);
1249 mutex_destroy(&instance->config_dev_mtx);
1250 mutex_destroy(&instance->ocr_flags_mtx);
1251 mutex_destroy(&instance->reg_write_mtx);
1252
1253 if (instance->tbolt) {
1254 mutex_destroy(&instance->cmd_app_pool_mtx);
1255 mutex_destroy(&instance->chip_mtx);
1256 }
1257
1258 instance->unroll.mutexs = 0;
1259 con_log(CL_ANN1, (CE_CONT, "Destroy mutex & cv, done."));
1260 }
1261
1262
1263 if (instance->unroll.soft_isr == 1) {
1264 ddi_remove_softintr(instance->soft_intr_id);
1265 instance->unroll.soft_isr = 0;
1266 }
1267
1268 if (instance->unroll.intr == 1) {
1269 mrsas_rem_intrs(instance);
1270 instance->unroll.intr = 0;
1271 }
1272
1273
1274 if (instance->unroll.taskq == 1) {
1275 if (instance->taskq) {
1276 ddi_taskq_destroy(instance->taskq);
1277 instance->unroll.taskq = 0;
1278 }
1279
1280 }
1281
1282 /*
1283 * free dma memory allocated for
1284 * cmds/frames/queues/driver version etc
1285 */
1286 if (instance->unroll.verBuff == 1) {
1287 (void) mrsas_free_dma_obj(instance, instance->drv_ver_dma_obj);
1288 instance->unroll.verBuff = 0;
1289 }
1290
1291 if (instance->unroll.pdlist_buff == 1) {
1292 if (instance->mr_tbolt_pd_list != NULL) {
1293 kmem_free(instance->mr_tbolt_pd_list,
1294 MRSAS_TBOLT_GET_PD_MAX(instance) *
1295 sizeof (struct mrsas_tbolt_pd));
1296 }
1297
1298 instance->mr_tbolt_pd_list = NULL;
1299 instance->unroll.pdlist_buff = 0;
1300 }
1301
1302 if (instance->unroll.ldlist_buff == 1) {
1303 if (instance->mr_ld_list != NULL) {
1304 kmem_free(instance->mr_ld_list, MRDRV_MAX_LD
1305 * sizeof (struct mrsas_ld));
1306 }
1307
1308 instance->mr_ld_list = NULL;
1309 instance->unroll.ldlist_buff = 0;
1310 }
1311
1312 if (instance->tbolt) {
1313 if (instance->unroll.alloc_space_mpi2 == 1) {
1314 free_space_for_mpi2(instance);
1315 instance->unroll.alloc_space_mpi2 = 0;
1316 }
1317 } else {
1318 if (instance->unroll.alloc_space_mfi == 1) {
1319 free_space_for_mfi(instance);
1320 instance->unroll.alloc_space_mfi = 0;
1321 }
1322 }
1323
1324 if (instance->unroll.regs == 1) {
1325 ddi_regs_map_free(&instance->regmap_handle);
1326 instance->unroll.regs = 0;
1327 con_log(CL_ANN1, (CE_CONT, "ddi_regs_map_free() done."));
1328 }
1329 }
1330
1331
1332
1333 /*
1334 * ************************************************************************** *
1335 * *
1336 * common entry points - for character driver types *
1337 * *
1338 * ************************************************************************** *
1339 */
1340 /*
1341 * open - gets access to a device
1342 * @dev:
1343 * @openflags:
1344 * @otyp:
1345 * @credp:
1346 *
1347 * Access to a device by one or more application programs is controlled
1348 * through the open() and close() entry points. The primary function of
1349 * open() is to verify that the open request is allowed.
1350 */
1351 static int
1352 mrsas_open(dev_t *dev, int openflags, int otyp, cred_t *credp)
1353 {
1354 int rval = 0;
1355
1356 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1357
1358 /* Check root permissions */
1359 if (drv_priv(credp) != 0) {
1360 con_log(CL_ANN, (CE_WARN,
1361 "mr_sas: Non-root ioctl access denied!"));
1362 return (EPERM);
1363 }
1364
1365 /* Verify we are being opened as a character device */
1366 if (otyp != OTYP_CHR) {
1367 con_log(CL_ANN, (CE_WARN,
1368 "mr_sas: ioctl node must be a char node"));
1369 return (EINVAL);
1370 }
1371
1372 if (ddi_get_soft_state(mrsas_state, MINOR2INST(getminor(*dev)))
1373 == NULL) {
1374 return (ENXIO);
1375 }
1376
1377 if (scsi_hba_open) {
1378 rval = scsi_hba_open(dev, openflags, otyp, credp);
1379 }
1380
1381 return (rval);
1382 }
1383
1384 /*
1385 * close - gives up access to a device
1386 * @dev:
1387 * @openflags:
1388 * @otyp:
1389 * @credp:
1390 *
1391 * close() should perform any cleanup necessary to finish using the minor
1392 * device, and prepare the device (and driver) to be opened again.
1393 */
1394 static int
1395 mrsas_close(dev_t dev, int openflags, int otyp, cred_t *credp)
1396 {
1397 int rval = 0;
1398
1399 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1400
1401 /* no need for locks! */
1402
1403 if (scsi_hba_close) {
1404 rval = scsi_hba_close(dev, openflags, otyp, credp);
1405 }
1406
1407 return (rval);
1408 }
1409
1410 /*
1411 * ioctl - performs a range of I/O commands for character drivers
1412 * @dev:
1413 * @cmd:
1414 * @arg:
1415 * @mode:
1416 * @credp:
1417 * @rvalp:
1418 *
1419 * ioctl() routine must make sure that user data is copied into or out of the
1420 * kernel address space explicitly using copyin(), copyout(), ddi_copyin(),
1421 * and ddi_copyout(), as appropriate.
1422 * This is a wrapper routine to serialize access to the actual ioctl routine.
1423 * ioctl() should return 0 on success, or the appropriate error number. The
1424 * driver may also set the value returned to the calling process through rvalp.
1425 */
1426
1427 static int
1428 mrsas_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp,
1429 int *rvalp)
1430 {
1431 int rval = 0;
1432
1433 struct mrsas_instance *instance;
1434 struct mrsas_ioctl *ioctl;
1435 struct mrsas_aen aen;
1436 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1437
1438 instance = ddi_get_soft_state(mrsas_state, MINOR2INST(getminor(dev)));
1439
1440 if (instance == NULL) {
1441 /* invalid minor number */
1442 con_log(CL_ANN, (CE_WARN, "mr_sas: adapter not found."));
1443 return (ENXIO);
1444 }
1445
1446 ioctl = (struct mrsas_ioctl *)kmem_zalloc(sizeof (struct mrsas_ioctl),
1447 KM_SLEEP);
1448 if (ioctl == NULL) {
1449 /* Failed to allocate memory for ioctl */
1450 con_log(CL_ANN, (CE_WARN, "mr_sas_ioctl: "
1451 "failed to allocate memory for ioctl"));
1452 return (ENOMEM);
1453 }
1454
1455 switch ((uint_t)cmd) {
1456 case MRSAS_IOCTL_FIRMWARE:
1457 if (ddi_copyin((void *)arg, ioctl,
1458 sizeof (struct mrsas_ioctl), mode)) {
1459 con_log(CL_ANN, (CE_WARN, "mrsas_ioctl: "
1460 "ERROR IOCTL copyin"));
1461 kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1462 return (EFAULT);
1463 }
1464
1465 if (ioctl->control_code == MRSAS_DRIVER_IOCTL_COMMON) {
1466 rval = handle_drv_ioctl(instance, ioctl, mode);
1467 } else {
1468 rval = handle_mfi_ioctl(instance, ioctl, mode);
1469 }
1470
1471 if (ddi_copyout((void *)ioctl, (void *)arg,
1472 (sizeof (struct mrsas_ioctl) - 1), mode)) {
1473 con_log(CL_ANN, (CE_WARN,
1474 "mrsas_ioctl: copy_to_user failed"));
1475 rval = 1;
1476 }
1477
1478 break;
1479 case MRSAS_IOCTL_AEN:
1480 con_log(CL_ANN,
1481 (CE_NOTE, "mrsas_ioctl: IOCTL Register AEN.\n"));
1482
1483 if (ddi_copyin((void *) arg, &aen,
1484 sizeof (struct mrsas_aen), mode)) {
1485 con_log(CL_ANN, (CE_WARN,
1486 "mrsas_ioctl: ERROR AEN copyin"));
1487 kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1488 return (EFAULT);
1489 }
1490
1491 rval = handle_mfi_aen(instance, &aen);
1492
1493 if (ddi_copyout((void *) &aen, (void *)arg,
1494 sizeof (struct mrsas_aen), mode)) {
1495 con_log(CL_ANN, (CE_WARN,
1496 "mrsas_ioctl: copy_to_user failed"));
1497 rval = 1;
1498 }
1499
1500 break;
1501 default:
1502 rval = scsi_hba_ioctl(dev, cmd, arg,
1503 mode, credp, rvalp);
1504
1505 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_ioctl: "
1506 "scsi_hba_ioctl called, ret = %x.", rval));
1507 }
1508
1509 kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1510 return (rval);
1511 }
1512
1513 /*
1514 * ************************************************************************** *
1515 * *
1516 * common entry points - for block driver types *
1517 * *
1518 * ************************************************************************** *
1519 */
1520 #ifdef __sparc
1521 /*
1522 * reset - TBD
1523 * @dip:
1524 * @cmd:
1525 *
1526 * TBD
1527 */
1528 /*ARGSUSED*/
1529 static int
1530 mrsas_reset(dev_info_t *dip, ddi_reset_cmd_t cmd)
1531 {
1532 int instance_no;
1533
1534 struct mrsas_instance *instance;
1535
1536 instance_no = ddi_get_instance(dip);
1537 instance = (struct mrsas_instance *)ddi_get_soft_state
1538 (mrsas_state, instance_no);
1539
1540 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1541
1542 if (!instance) {
1543 con_log(CL_ANN, (CE_WARN, "mr_sas:%d could not get adapter "
1544 "in reset", instance_no));
1545 return (DDI_FAILURE);
1546 }
1547
1548 instance->func_ptr->disable_intr(instance);
1549
1550 con_log(CL_ANN1, (CE_CONT, "flushing cache for instance %d",
1551 instance_no));
1552
1553 flush_cache(instance);
1554
1555 return (DDI_SUCCESS);
1556 }
1557 #else /* __sparc */
1558 /*ARGSUSED*/
1559 static int
1560 mrsas_quiesce(dev_info_t *dip)
1561 {
1562 int instance_no;
1563
1564 struct mrsas_instance *instance;
1565
1566 instance_no = ddi_get_instance(dip);
1567 instance = (struct mrsas_instance *)ddi_get_soft_state
1568 (mrsas_state, instance_no);
1569
1570 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1571
1572 if (!instance) {
1573 con_log(CL_ANN1, (CE_WARN, "mr_sas:%d could not get adapter "
1574 "in quiesce", instance_no));
1575 return (DDI_FAILURE);
1576 }
1577 if (instance->deadadapter || instance->adapterresetinprogress) {
1578 con_log(CL_ANN1, (CE_WARN, "mr_sas:%d adapter is not in "
1579 "healthy state", instance_no));
1580 return (DDI_FAILURE);
1581 }
1582
1583 if (abort_aen_cmd(instance, instance->aen_cmd)) {
1584 con_log(CL_ANN1, (CE_WARN, "mrsas_quiesce: "
1585 "failed to abort prevous AEN command QUIESCE"));
1586 }
1587
1588 if (instance->tbolt) {
1589 if (abort_syncmap_cmd(instance,
1590 instance->map_update_cmd)) {
1591 cmn_err(CE_WARN,
1592 "mrsas_detach: failed to abort "
1593 "previous syncmap command");
1594 return (DDI_FAILURE);
1595 }
1596 }
1597
1598 instance->func_ptr->disable_intr(instance);
1599
1600 con_log(CL_ANN1, (CE_CONT, "flushing cache for instance %d",
1601 instance_no));
1602
1603 flush_cache(instance);
1604
1605 if (wait_for_outstanding(instance)) {
1606 con_log(CL_ANN1,
1607 (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
1608 return (DDI_FAILURE);
1609 }
1610 return (DDI_SUCCESS);
1611 }
1612 #endif /* __sparc */
1613
1614 /*
1615 * ************************************************************************** *
1616 * *
1617 * entry points (SCSI HBA) *
1618 * *
1619 * ************************************************************************** *
1620 */
1621 /*
1622 * tran_tgt_init - initialize a target device instance
1623 * @hba_dip:
1624 * @tgt_dip:
1625 * @tran:
1626 * @sd:
1627 *
1628 * The tran_tgt_init() entry point enables the HBA to allocate and initialize
1629 * any per-target resources. tran_tgt_init() also enables the HBA to qualify
1630 * the device's address as valid and supportable for that particular HBA.
1631 * By returning DDI_FAILURE, the instance of the target driver for that device
1632 * is not probed or attached.
1633 */
1634 /*ARGSUSED*/
1635 static int
1636 mrsas_tran_tgt_init(dev_info_t *hba_dip, dev_info_t *tgt_dip,
1637 scsi_hba_tran_t *tran, struct scsi_device *sd)
1638 {
1639 struct mrsas_instance *instance;
1640 uint16_t tgt = sd->sd_address.a_target;
1641 uint8_t lun = sd->sd_address.a_lun;
1642 dev_info_t *child = NULL;
1643
1644 con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init target %d lun %d",
1645 tgt, lun));
1646
1647 instance = ADDR2MR(&sd->sd_address);
1648
1649 if (ndi_dev_is_persistent_node(tgt_dip) == 0) {
1650 /*
1651 * If no persistent node exists, we don't allow .conf node
1652 * to be created.
1653 */
1654 if ((child = mrsas_find_child(instance, tgt, lun)) != NULL) {
1655 con_log(CL_DLEVEL2,
1656 (CE_NOTE, "mrsas_tgt_init find child ="
1657 " %p t = %d l = %d", (void *)child, tgt, lun));
1658 if (ndi_merge_node(tgt_dip, mrsas_name_node) !=
1659 DDI_SUCCESS)
1660 /* Create this .conf node */
1661 return (DDI_SUCCESS);
1662 }
1663 con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init in ndi_per "
1664 "DDI_FAILURE t = %d l = %d", tgt, lun));
1665 return (DDI_FAILURE);
1666
1667 }
1668
1669 con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init dev_dip %p tgt_dip %p",
1670 (void *)instance->mr_ld_list[tgt].dip, (void *)tgt_dip));
1671
1672 if (tgt < MRDRV_MAX_LD && lun == 0) {
1673 if (instance->mr_ld_list[tgt].dip == NULL &&
1674 strcmp(ddi_driver_name(sd->sd_dev), "sd") == 0) {
1675 mutex_enter(&instance->config_dev_mtx);
1676 instance->mr_ld_list[tgt].dip = tgt_dip;
1677 instance->mr_ld_list[tgt].lun_type = MRSAS_LD_LUN;
1678 instance->mr_ld_list[tgt].flag = MRDRV_TGT_VALID;
1679 mutex_exit(&instance->config_dev_mtx);
1680 }
1681 }
1682
1683 #ifdef PDSUPPORT
1684 else if (instance->tbolt) {
1685 if (instance->mr_tbolt_pd_list[tgt].dip == NULL) {
1686 mutex_enter(&instance->config_dev_mtx);
1687 instance->mr_tbolt_pd_list[tgt].dip = tgt_dip;
1688 instance->mr_tbolt_pd_list[tgt].flag =
1689 MRDRV_TGT_VALID;
1690 mutex_exit(&instance->config_dev_mtx);
1691 con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_tgt_init:"
1692 "t%xl%x", tgt, lun));
1693 }
1694 }
1695 #endif
1696
1697 return (DDI_SUCCESS);
1698 }
1699
1700 /*ARGSUSED*/
1701 static void
1702 mrsas_tran_tgt_free(dev_info_t *hba_dip, dev_info_t *tgt_dip,
1703 scsi_hba_tran_t *hba_tran, struct scsi_device *sd)
1704 {
1705 struct mrsas_instance *instance;
1706 int tgt = sd->sd_address.a_target;
1707 int lun = sd->sd_address.a_lun;
1708
1709 instance = ADDR2MR(&sd->sd_address);
1710
1711 con_log(CL_DLEVEL2, (CE_NOTE, "tgt_free t = %d l = %d", tgt, lun));
1712
1713 if (tgt < MRDRV_MAX_LD && lun == 0) {
1714 if (instance->mr_ld_list[tgt].dip == tgt_dip) {
1715 mutex_enter(&instance->config_dev_mtx);
1716 instance->mr_ld_list[tgt].dip = NULL;
1717 mutex_exit(&instance->config_dev_mtx);
1718 }
1719 }
1720
1721 #ifdef PDSUPPORT
1722 else if (instance->tbolt) {
1723 mutex_enter(&instance->config_dev_mtx);
1724 instance->mr_tbolt_pd_list[tgt].dip = NULL;
1725 mutex_exit(&instance->config_dev_mtx);
1726 con_log(CL_ANN1, (CE_NOTE, "tgt_free: Setting dip = NULL"
1727 "for tgt:%x", tgt));
1728 }
1729 #endif
1730
1731 }
1732
1733 dev_info_t *
1734 mrsas_find_child(struct mrsas_instance *instance, uint16_t tgt, uint8_t lun)
1735 {
1736 dev_info_t *child = NULL;
1737 char addr[SCSI_MAXNAMELEN];
1738 char tmp[MAXNAMELEN];
1739
1740 (void) sprintf(addr, "%x,%x", tgt, lun);
1741 for (child = ddi_get_child(instance->dip); child;
1742 child = ddi_get_next_sibling(child)) {
1743
1744 if (ndi_dev_is_persistent_node(child) == 0) {
1745 continue;
1746 }
1747
1748 if (mrsas_name_node(child, tmp, MAXNAMELEN) !=
1749 DDI_SUCCESS) {
1750 continue;
1751 }
1752
1753 if (strcmp(addr, tmp) == 0) {
1754 break;
1755 }
1756 }
1757 con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_find_child: return child = %p",
1758 (void *)child));
1759 return (child);
1760 }
1761
1762 /*
1763 * mrsas_name_node -
1764 * @dip:
1765 * @name:
1766 * @len:
1767 */
1768 static int
1769 mrsas_name_node(dev_info_t *dip, char *name, int len)
1770 {
1771 int tgt, lun;
1772
1773 tgt = ddi_prop_get_int(DDI_DEV_T_ANY, dip,
1774 DDI_PROP_DONTPASS, "target", -1);
1775 con_log(CL_DLEVEL2, (CE_NOTE,
1776 "mrsas_name_node: dip %p tgt %d", (void *)dip, tgt));
1777 if (tgt == -1) {
1778 return (DDI_FAILURE);
1779 }
1780 lun = ddi_prop_get_int(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS,
1781 "lun", -1);
1782 con_log(CL_DLEVEL2,
1783 (CE_NOTE, "mrsas_name_node: tgt %d lun %d", tgt, lun));
1784 if (lun == -1) {
1785 return (DDI_FAILURE);
1786 }
1787 (void) snprintf(name, len, "%x,%x", tgt, lun);
1788 return (DDI_SUCCESS);
1789 }
1790
1791 /*
1792 * tran_init_pkt - allocate & initialize a scsi_pkt structure
1793 * @ap:
1794 * @pkt:
1795 * @bp:
1796 * @cmdlen:
1797 * @statuslen:
1798 * @tgtlen:
1799 * @flags:
1800 * @callback:
1801 *
1802 * The tran_init_pkt() entry point allocates and initializes a scsi_pkt
1803 * structure and DMA resources for a target driver request. The
1804 * tran_init_pkt() entry point is called when the target driver calls the
1805 * SCSA function scsi_init_pkt(). Each call of the tran_init_pkt() entry point
1806 * is a request to perform one or more of three possible services:
1807 * - allocation and initialization of a scsi_pkt structure
1808 * - allocation of DMA resources for data transfer
1809 * - reallocation of DMA resources for the next portion of the data transfer
1810 */
1811 static struct scsi_pkt *
1812 mrsas_tran_init_pkt(struct scsi_address *ap, register struct scsi_pkt *pkt,
1813 struct buf *bp, int cmdlen, int statuslen, int tgtlen,
1814 int flags, int (*callback)(), caddr_t arg)
1815 {
1816 struct scsa_cmd *acmd;
1817 struct mrsas_instance *instance;
1818 struct scsi_pkt *new_pkt;
1819
1820 con_log(CL_DLEVEL1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1821
1822 instance = ADDR2MR(ap);
1823
1824 /* step #1 : pkt allocation */
1825 if (pkt == NULL) {
1826 pkt = scsi_hba_pkt_alloc(instance->dip, ap, cmdlen, statuslen,
1827 tgtlen, sizeof (struct scsa_cmd), callback, arg);
1828 if (pkt == NULL) {
1829 return (NULL);
1830 }
1831
1832 acmd = PKT2CMD(pkt);
1833
1834 /*
1835 * Initialize the new pkt - we redundantly initialize
1836 * all the fields for illustrative purposes.
1837 */
1838 acmd->cmd_pkt = pkt;
1839 acmd->cmd_flags = 0;
1840 acmd->cmd_scblen = statuslen;
1841 acmd->cmd_cdblen = cmdlen;
1842 acmd->cmd_dmahandle = NULL;
1843 acmd->cmd_ncookies = 0;
1844 acmd->cmd_cookie = 0;
1845 acmd->cmd_cookiecnt = 0;
1846 acmd->cmd_nwin = 0;
1847
1848 pkt->pkt_address = *ap;
1849 pkt->pkt_comp = (void (*)())NULL;
1850 pkt->pkt_flags = 0;
1851 pkt->pkt_time = 0;
1852 pkt->pkt_resid = 0;
1853 pkt->pkt_state = 0;
1854 pkt->pkt_statistics = 0;
1855 pkt->pkt_reason = 0;
1856 new_pkt = pkt;
1857 } else {
1858 acmd = PKT2CMD(pkt);
1859 new_pkt = NULL;
1860 }
1861
1862 /* step #2 : dma allocation/move */
1863 if (bp && bp->b_bcount != 0) {
1864 if (acmd->cmd_dmahandle == NULL) {
1865 if (mrsas_dma_alloc(instance, pkt, bp, flags,
1866 callback) == DDI_FAILURE) {
1867 if (new_pkt) {
1868 scsi_hba_pkt_free(ap, new_pkt);
1869 }
1870 return ((struct scsi_pkt *)NULL);
1871 }
1872 } else {
1873 if (mrsas_dma_move(instance, pkt, bp) == DDI_FAILURE) {
1874 return ((struct scsi_pkt *)NULL);
1875 }
1876 }
1877 }
1878
1879 return (pkt);
1880 }
1881
1882 /*
1883 * tran_start - transport a SCSI command to the addressed target
1884 * @ap:
1885 * @pkt:
1886 *
1887 * The tran_start() entry point for a SCSI HBA driver is called to transport a
1888 * SCSI command to the addressed target. The SCSI command is described
1889 * entirely within the scsi_pkt structure, which the target driver allocated
1890 * through the HBA driver's tran_init_pkt() entry point. If the command
1891 * involves a data transfer, DMA resources must also have been allocated for
1892 * the scsi_pkt structure.
1893 *
1894 * Return Values :
1895 * TRAN_BUSY - request queue is full, no more free scbs
1896 * TRAN_ACCEPT - pkt has been submitted to the instance
1897 */
1898 static int
1899 mrsas_tran_start(struct scsi_address *ap, register struct scsi_pkt *pkt)
1900 {
1901 uchar_t cmd_done = 0;
1902
1903 struct mrsas_instance *instance = ADDR2MR(ap);
1904 struct mrsas_cmd *cmd;
1905
1906 con_log(CL_DLEVEL1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1907 if (instance->deadadapter == 1) {
1908 con_log(CL_ANN1, (CE_WARN,
1909 "mrsas_tran_start: return TRAN_FATAL_ERROR "
1910 "for IO, as the HBA doesnt take any more IOs"));
1911 if (pkt) {
1912 pkt->pkt_reason = CMD_DEV_GONE;
1913 pkt->pkt_statistics = STAT_DISCON;
1914 }
1915 return (TRAN_FATAL_ERROR);
1916 }
1917
1918 if (instance->adapterresetinprogress) {
1919 con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_start: Reset flag set, "
1920 "returning mfi_pkt and setting TRAN_BUSY\n"));
1921 return (TRAN_BUSY);
1922 }
1923
1924 con_log(CL_ANN1, (CE_CONT, "chkpnt:%s:%d:SCSI CDB[0]=0x%x time:%x",
1925 __func__, __LINE__, pkt->pkt_cdbp[0], pkt->pkt_time));
1926
1927 pkt->pkt_reason = CMD_CMPLT;
1928 *pkt->pkt_scbp = STATUS_GOOD; /* clear arq scsi_status */
1929
1930 cmd = build_cmd(instance, ap, pkt, &cmd_done);
1931
1932 /*
1933 * Check if the command is already completed by the mrsas_build_cmd()
1934 * routine. In which case the busy_flag would be clear and scb will be
1935 * NULL and appropriate reason provided in pkt_reason field
1936 */
1937 if (cmd_done) {
1938 pkt->pkt_reason = CMD_CMPLT;
1939 pkt->pkt_scbp[0] = STATUS_GOOD;
1940 pkt->pkt_state |= STATE_GOT_BUS | STATE_GOT_TARGET
1941 | STATE_SENT_CMD;
1942 if (((pkt->pkt_flags & FLAG_NOINTR) == 0) && pkt->pkt_comp) {
1943 (*pkt->pkt_comp)(pkt);
1944 }
1945
1946 return (TRAN_ACCEPT);
1947 }
1948
1949 if (cmd == NULL) {
1950 return (TRAN_BUSY);
1951 }
1952
1953 if ((pkt->pkt_flags & FLAG_NOINTR) == 0) {
1954 if (instance->fw_outstanding > instance->max_fw_cmds) {
1955 con_log(CL_ANN, (CE_CONT, "mr_sas:Firmware busy"));
1956 DTRACE_PROBE2(start_tran_err,
1957 uint16_t, instance->fw_outstanding,
1958 uint16_t, instance->max_fw_cmds);
1959 return_mfi_pkt(instance, cmd);
1960 return (TRAN_BUSY);
1961 }
1962
1963 /* Synchronize the Cmd frame for the controller */
1964 (void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle, 0, 0,
1965 DDI_DMA_SYNC_FORDEV);
1966 con_log(CL_ANN, (CE_CONT, "issue_cmd_ppc: SCSI CDB[0]=0x%x"
1967 "cmd->index:%x\n", pkt->pkt_cdbp[0], cmd->index));
1968 instance->func_ptr->issue_cmd(cmd, instance);
1969
1970 } else {
1971 struct mrsas_header *hdr = &cmd->frame->hdr;
1972
1973 instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd);
1974
1975 pkt->pkt_reason = CMD_CMPLT;
1976 pkt->pkt_statistics = 0;
1977 pkt->pkt_state |= STATE_XFERRED_DATA | STATE_GOT_STATUS;
1978
1979 switch (ddi_get8(cmd->frame_dma_obj.acc_handle,
1980 &hdr->cmd_status)) {
1981 case MFI_STAT_OK:
1982 pkt->pkt_scbp[0] = STATUS_GOOD;
1983 break;
1984
1985 case MFI_STAT_SCSI_DONE_WITH_ERROR:
1986 con_log(CL_ANN, (CE_CONT,
1987 "mrsas_tran_start: scsi done with error"));
1988 pkt->pkt_reason = CMD_CMPLT;
1989 pkt->pkt_statistics = 0;
1990
1991 ((struct scsi_status *)pkt->pkt_scbp)->sts_chk = 1;
1992 break;
1993
1994 case MFI_STAT_DEVICE_NOT_FOUND:
1995 con_log(CL_ANN, (CE_CONT,
1996 "mrsas_tran_start: device not found error"));
1997 pkt->pkt_reason = CMD_DEV_GONE;
1998 pkt->pkt_statistics = STAT_DISCON;
1999 break;
2000
2001 default:
2002 ((struct scsi_status *)pkt->pkt_scbp)->sts_busy = 1;
2003 }
2004
2005 (void) mrsas_common_check(instance, cmd);
2006 DTRACE_PROBE2(start_nointr_done, uint8_t, hdr->cmd,
2007 uint8_t, hdr->cmd_status);
2008 return_mfi_pkt(instance, cmd);
2009
2010 if (pkt->pkt_comp) {
2011 (*pkt->pkt_comp)(pkt);
2012 }
2013
2014 }
2015
2016 return (TRAN_ACCEPT);
2017 }
2018
2019 /*
2020 * tran_abort - Abort any commands that are currently in transport
2021 * @ap:
2022 * @pkt:
2023 *
2024 * The tran_abort() entry point for a SCSI HBA driver is called to abort any
2025 * commands that are currently in transport for a particular target. This entry
2026 * point is called when a target driver calls scsi_abort(). The tran_abort()
2027 * entry point should attempt to abort the command denoted by the pkt
2028 * parameter. If the pkt parameter is NULL, tran_abort() should attempt to
2029 * abort all outstanding commands in the transport layer for the particular
2030 * target or logical unit.
2031 */
2032 /*ARGSUSED*/
2033 static int
2034 mrsas_tran_abort(struct scsi_address *ap, struct scsi_pkt *pkt)
2035 {
2036 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2037
2038 /* abort command not supported by H/W */
2039
2040 return (DDI_FAILURE);
2041 }
2042
2043 /*
2044 * tran_reset - reset either the SCSI bus or target
2045 * @ap:
2046 * @level:
2047 *
2048 * The tran_reset() entry point for a SCSI HBA driver is called to reset either
2049 * the SCSI bus or a particular SCSI target device. This entry point is called
2050 * when a target driver calls scsi_reset(). The tran_reset() entry point must
2051 * reset the SCSI bus if level is RESET_ALL. If level is RESET_TARGET, just the
2052 * particular target or logical unit must be reset.
2053 */
2054 /*ARGSUSED*/
2055 static int
2056 mrsas_tran_reset(struct scsi_address *ap, int level)
2057 {
2058 struct mrsas_instance *instance = ADDR2MR(ap);
2059
2060 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2061
2062 if (wait_for_outstanding(instance)) {
2063 con_log(CL_ANN1,
2064 (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
2065 return (DDI_FAILURE);
2066 } else {
2067 return (DDI_SUCCESS);
2068 }
2069 }
2070
2071 #if 0
2072 /*
2073 * tran_bus_reset - reset the SCSI bus
2074 * @dip:
2075 * @level:
2076 *
2077 * The tran_bus_reset() vector in the scsi_hba_tran structure should be
2078 * initialized during the HBA driver's attach(). The vector should point to
2079 * an HBA entry point that is to be called when a user initiates a bus reset.
2080 * Implementation is hardware specific. If the HBA driver cannot reset the
2081 * SCSI bus without affecting the targets, the driver should fail RESET_BUS
2082 * or not initialize this vector.
2083 */
2084 /*ARGSUSED*/
2085 static int
2086 mrsas_tran_bus_reset(dev_info_t *dip, int level)
2087 {
2088 int instance_no = ddi_get_instance(dip);
2089
2090 struct mrsas_instance *instance = ddi_get_soft_state(mrsas_state,
2091 instance_no);
2092
2093 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2094
2095 if (wait_for_outstanding(instance)) {
2096 con_log(CL_ANN1,
2097 (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
2098 return (DDI_FAILURE);
2099 } else {
2100 return (DDI_SUCCESS);
2101 }
2102 }
2103 #endif
2104
2105 /*
2106 * tran_getcap - get one of a set of SCSA-defined capabilities
2107 * @ap:
2108 * @cap:
2109 * @whom:
2110 *
2111 * The target driver can request the current setting of the capability for a
2112 * particular target by setting the whom parameter to nonzero. A whom value of
2113 * zero indicates a request for the current setting of the general capability
2114 * for the SCSI bus or for adapter hardware. The tran_getcap() should return -1
2115 * for undefined capabilities or the current value of the requested capability.
2116 */
2117 /*ARGSUSED*/
2118 static int
2119 mrsas_tran_getcap(struct scsi_address *ap, char *cap, int whom)
2120 {
2121 int rval = 0;
2122
2123 struct mrsas_instance *instance = ADDR2MR(ap);
2124
2125 con_log(CL_DLEVEL2, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2126
2127 /* we do allow inquiring about capabilities for other targets */
2128 if (cap == NULL) {
2129 return (-1);
2130 }
2131
2132 switch (scsi_hba_lookup_capstr(cap)) {
2133 case SCSI_CAP_DMA_MAX:
2134 if (instance->tbolt) {
2135 /* Limit to 256k max transfer */
2136 rval = mrsas_tbolt_max_cap_maxxfer;
2137 } else {
2138 /* Limit to 16MB max transfer */
2139 rval = mrsas_max_cap_maxxfer;
2140 }
2141 break;
2142 case SCSI_CAP_MSG_OUT:
2143 rval = 1;
2144 break;
2145 case SCSI_CAP_DISCONNECT:
2146 rval = 0;
2147 break;
2148 case SCSI_CAP_SYNCHRONOUS:
2149 rval = 0;
2150 break;
2151 case SCSI_CAP_WIDE_XFER:
2152 rval = 1;
2153 break;
2154 case SCSI_CAP_TAGGED_QING:
2155 rval = 1;
2156 break;
2157 case SCSI_CAP_UNTAGGED_QING:
2158 rval = 1;
2159 break;
2160 case SCSI_CAP_PARITY:
2161 rval = 1;
2162 break;
2163 case SCSI_CAP_INITIATOR_ID:
2164 rval = instance->init_id;
2165 break;
2166 case SCSI_CAP_ARQ:
2167 rval = 1;
2168 break;
2169 case SCSI_CAP_LINKED_CMDS:
2170 rval = 0;
2171 break;
2172 case SCSI_CAP_RESET_NOTIFICATION:
2173 rval = 1;
2174 break;
2175 case SCSI_CAP_GEOMETRY:
2176 rval = -1;
2177
2178 break;
2179 default:
2180 con_log(CL_DLEVEL2, (CE_NOTE, "Default cap coming 0x%x",
2181 scsi_hba_lookup_capstr(cap)));
2182 rval = -1;
2183 break;
2184 }
2185
2186 return (rval);
2187 }
2188
2189 /*
2190 * tran_setcap - set one of a set of SCSA-defined capabilities
2191 * @ap:
2192 * @cap:
2193 * @value:
2194 * @whom:
2195 *
2196 * The target driver might request that the new value be set for a particular
2197 * target by setting the whom parameter to nonzero. A whom value of zero
2198 * means that request is to set the new value for the SCSI bus or for adapter
2199 * hardware in general.
2200 * The tran_setcap() should return the following values as appropriate:
2201 * - -1 for undefined capabilities
2202 * - 0 if the HBA driver cannot set the capability to the requested value
2203 * - 1 if the HBA driver is able to set the capability to the requested value
2204 */
2205 /*ARGSUSED*/
2206 static int
2207 mrsas_tran_setcap(struct scsi_address *ap, char *cap, int value, int whom)
2208 {
2209 int rval = 1;
2210
2211 con_log(CL_DLEVEL2, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2212
2213 /* We don't allow setting capabilities for other targets */
2214 if (cap == NULL || whom == 0) {
2215 return (-1);
2216 }
2217
2218 switch (scsi_hba_lookup_capstr(cap)) {
2219 case SCSI_CAP_DMA_MAX:
2220 case SCSI_CAP_MSG_OUT:
2221 case SCSI_CAP_PARITY:
2222 case SCSI_CAP_LINKED_CMDS:
2223 case SCSI_CAP_RESET_NOTIFICATION:
2224 case SCSI_CAP_DISCONNECT:
2225 case SCSI_CAP_SYNCHRONOUS:
2226 case SCSI_CAP_UNTAGGED_QING:
2227 case SCSI_CAP_WIDE_XFER:
2228 case SCSI_CAP_INITIATOR_ID:
2229 case SCSI_CAP_ARQ:
2230 /*
2231 * None of these are settable via
2232 * the capability interface.
2233 */
2234 break;
2235 case SCSI_CAP_TAGGED_QING:
2236 rval = 1;
2237 break;
2238 case SCSI_CAP_SECTOR_SIZE:
2239 rval = 1;
2240 break;
2241
2242 case SCSI_CAP_TOTAL_SECTORS:
2243 rval = 1;
2244 break;
2245 default:
2246 rval = -1;
2247 break;
2248 }
2249
2250 return (rval);
2251 }
2252
2253 /*
2254 * tran_destroy_pkt - deallocate scsi_pkt structure
2255 * @ap:
2256 * @pkt:
2257 *
2258 * The tran_destroy_pkt() entry point is the HBA driver function that
2259 * deallocates scsi_pkt structures. The tran_destroy_pkt() entry point is
2260 * called when the target driver calls scsi_destroy_pkt(). The
2261 * tran_destroy_pkt() entry point must free any DMA resources that have been
2262 * allocated for the packet. An implicit DMA synchronization occurs if the
2263 * DMA resources are freed and any cached data remains after the completion
2264 * of the transfer.
2265 */
2266 static void
2267 mrsas_tran_destroy_pkt(struct scsi_address *ap, struct scsi_pkt *pkt)
2268 {
2269 struct scsa_cmd *acmd = PKT2CMD(pkt);
2270
2271 con_log(CL_DLEVEL2, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2272
2273 if (acmd->cmd_flags & CFLAG_DMAVALID) {
2274 acmd->cmd_flags &= ~CFLAG_DMAVALID;
2275
2276 (void) ddi_dma_unbind_handle(acmd->cmd_dmahandle);
2277
2278 ddi_dma_free_handle(&acmd->cmd_dmahandle);
2279
2280 acmd->cmd_dmahandle = NULL;
2281 }
2282
2283 /* free the pkt */
2284 scsi_hba_pkt_free(ap, pkt);
2285 }
2286
2287 /*
2288 * tran_dmafree - deallocates DMA resources
2289 * @ap:
2290 * @pkt:
2291 *
2292 * The tran_dmafree() entry point deallocates DMAQ resources that have been
2293 * allocated for a scsi_pkt structure. The tran_dmafree() entry point is
2294 * called when the target driver calls scsi_dmafree(). The tran_dmafree() must
2295 * free only DMA resources allocated for a scsi_pkt structure, not the
2296 * scsi_pkt itself. When DMA resources are freed, a DMA synchronization is
2297 * implicitly performed.
2298 */
2299 /*ARGSUSED*/
2300 static void
2301 mrsas_tran_dmafree(struct scsi_address *ap, struct scsi_pkt *pkt)
2302 {
2303 register struct scsa_cmd *acmd = PKT2CMD(pkt);
2304
2305 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2306
2307 if (acmd->cmd_flags & CFLAG_DMAVALID) {
2308 acmd->cmd_flags &= ~CFLAG_DMAVALID;
2309
2310 (void) ddi_dma_unbind_handle(acmd->cmd_dmahandle);
2311
2312 ddi_dma_free_handle(&acmd->cmd_dmahandle);
2313
2314 acmd->cmd_dmahandle = NULL;
2315 }
2316 }
2317
2318 /*
2319 * tran_sync_pkt - synchronize the DMA object allocated
2320 * @ap:
2321 * @pkt:
2322 *
2323 * The tran_sync_pkt() entry point synchronizes the DMA object allocated for
2324 * the scsi_pkt structure before or after a DMA transfer. The tran_sync_pkt()
2325 * entry point is called when the target driver calls scsi_sync_pkt(). If the
2326 * data transfer direction is a DMA read from device to memory, tran_sync_pkt()
2327 * must synchronize the CPU's view of the data. If the data transfer direction
2328 * is a DMA write from memory to device, tran_sync_pkt() must synchronize the
2329 * device's view of the data.
2330 */
2331 /*ARGSUSED*/
2332 static void
2333 mrsas_tran_sync_pkt(struct scsi_address *ap, struct scsi_pkt *pkt)
2334 {
2335 register struct scsa_cmd *acmd = PKT2CMD(pkt);
2336
2337 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2338
2339 if (acmd->cmd_flags & CFLAG_DMAVALID) {
2340 (void) ddi_dma_sync(acmd->cmd_dmahandle, acmd->cmd_dma_offset,
2341 acmd->cmd_dma_len, (acmd->cmd_flags & CFLAG_DMASEND) ?
2342 DDI_DMA_SYNC_FORDEV : DDI_DMA_SYNC_FORCPU);
2343 }
2344 }
2345
2346 /*ARGSUSED*/
2347 static int
2348 mrsas_tran_quiesce(dev_info_t *dip)
2349 {
2350 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2351
2352 return (1);
2353 }
2354
2355 /*ARGSUSED*/
2356 static int
2357 mrsas_tran_unquiesce(dev_info_t *dip)
2358 {
2359 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2360
2361 return (1);
2362 }
2363
2364
2365 /*
2366 * mrsas_isr(caddr_t)
2367 *
2368 * The Interrupt Service Routine
2369 *
2370 * Collect status for all completed commands and do callback
2371 *
2372 */
2373 static uint_t
2374 mrsas_isr(struct mrsas_instance *instance)
2375 {
2376 int need_softintr;
2377 uint32_t producer;
2378 uint32_t consumer;
2379 uint32_t context;
2380 int retval;
2381
2382 struct mrsas_cmd *cmd;
2383 struct mrsas_header *hdr;
2384 struct scsi_pkt *pkt;
2385
2386 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2387 ASSERT(instance);
2388 if (instance->tbolt) {
2389 mutex_enter(&instance->chip_mtx);
2390 if ((instance->intr_type == DDI_INTR_TYPE_FIXED) &&
2391 !(instance->func_ptr->intr_ack(instance))) {
2392 mutex_exit(&instance->chip_mtx);
2393 return (DDI_INTR_UNCLAIMED);
2394 }
2395 retval = mr_sas_tbolt_process_outstanding_cmd(instance);
2396 mutex_exit(&instance->chip_mtx);
2397 return (retval);
2398 } else {
2399 if ((instance->intr_type == DDI_INTR_TYPE_FIXED) &&
2400 !instance->func_ptr->intr_ack(instance)) {
2401 return (DDI_INTR_UNCLAIMED);
2402 }
2403 }
2404
2405 (void) ddi_dma_sync(instance->mfi_internal_dma_obj.dma_handle,
2406 0, 0, DDI_DMA_SYNC_FORCPU);
2407
2408 if (mrsas_check_dma_handle(instance->mfi_internal_dma_obj.dma_handle)
2409 != DDI_SUCCESS) {
2410 mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
2411 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
2412 con_log(CL_ANN1, (CE_WARN,
2413 "mr_sas_isr(): FMA check, returning DDI_INTR_UNCLAIMED"));
2414 return (DDI_INTR_CLAIMED);
2415 }
2416 con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2417
2418 #ifdef OCRDEBUG
2419 if (debug_consecutive_timeout_after_ocr_g == 1) {
2420 con_log(CL_ANN1, (CE_NOTE,
2421 "simulating consecutive timeout after ocr"));
2422 return (DDI_INTR_CLAIMED);
2423 }
2424 #endif
2425
2426 mutex_enter(&instance->completed_pool_mtx);
2427 mutex_enter(&instance->cmd_pend_mtx);
2428
2429 producer = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
2430 instance->producer);
2431 consumer = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
2432 instance->consumer);
2433
2434 con_log(CL_ANN, (CE_CONT, " producer %x consumer %x ",
2435 producer, consumer));
2436 if (producer == consumer) {
2437 con_log(CL_ANN, (CE_WARN, "producer == consumer case"));
2438 DTRACE_PROBE2(isr_pc_err, uint32_t, producer,
2439 uint32_t, consumer);
2440 mutex_exit(&instance->cmd_pend_mtx);
2441 mutex_exit(&instance->completed_pool_mtx);
2442 return (DDI_INTR_CLAIMED);
2443 }
2444
2445 while (consumer != producer) {
2446 context = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
2447 &instance->reply_queue[consumer]);
2448 cmd = instance->cmd_list[context];
2449
2450 if (cmd->sync_cmd == MRSAS_TRUE) {
2451 hdr = (struct mrsas_header *)&cmd->frame->hdr;
2452 if (hdr) {
2453 mlist_del_init(&cmd->list);
2454 }
2455 } else {
2456 pkt = cmd->pkt;
2457 if (pkt) {
2458 mlist_del_init(&cmd->list);
2459 }
2460 }
2461
2462 mlist_add_tail(&cmd->list, &instance->completed_pool_list);
2463
2464 consumer++;
2465 if (consumer == (instance->max_fw_cmds + 1)) {
2466 consumer = 0;
2467 }
2468 }
2469 ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
2470 instance->consumer, consumer);
2471 mutex_exit(&instance->cmd_pend_mtx);
2472 mutex_exit(&instance->completed_pool_mtx);
2473
2474 (void) ddi_dma_sync(instance->mfi_internal_dma_obj.dma_handle,
2475 0, 0, DDI_DMA_SYNC_FORDEV);
2476
2477 if (instance->softint_running) {
2478 need_softintr = 0;
2479 } else {
2480 need_softintr = 1;
2481 }
2482
2483 if (instance->isr_level == HIGH_LEVEL_INTR) {
2484 if (need_softintr) {
2485 ddi_trigger_softintr(instance->soft_intr_id);
2486 }
2487 } else {
2488 /*
2489 * Not a high-level interrupt, therefore call the soft level
2490 * interrupt explicitly
2491 */
2492 (void) mrsas_softintr(instance);
2493 }
2494
2495 return (DDI_INTR_CLAIMED);
2496 }
2497
2498
2499 /*
2500 * ************************************************************************** *
2501 * *
2502 * libraries *
2503 * *
2504 * ************************************************************************** *
2505 */
2506 /*
2507 * get_mfi_pkt : Get a command from the free pool
2508 * After successful allocation, the caller of this routine
2509 * must clear the frame buffer (memset to zero) before
2510 * using the packet further.
2511 *
2512 * ***** Note *****
2513 * After clearing the frame buffer the context id of the
2514 * frame buffer SHOULD be restored back.
2515 */
2516 static struct mrsas_cmd *
2517 get_mfi_pkt(struct mrsas_instance *instance)
2518 {
2519 mlist_t *head = &instance->cmd_pool_list;
2520 struct mrsas_cmd *cmd = NULL;
2521
2522 mutex_enter(&instance->cmd_pool_mtx);
2523
2524 if (!mlist_empty(head)) {
2525 cmd = mlist_entry(head->next, struct mrsas_cmd, list);
2526 mlist_del_init(head->next);
2527 }
2528 if (cmd != NULL) {
2529 cmd->pkt = NULL;
2530 cmd->retry_count_for_ocr = 0;
2531 cmd->drv_pkt_time = 0;
2532
2533 }
2534 mutex_exit(&instance->cmd_pool_mtx);
2535
2536 return (cmd);
2537 }
2538
2539 static struct mrsas_cmd *
2540 get_mfi_app_pkt(struct mrsas_instance *instance)
2541 {
2542 mlist_t *head = &instance->app_cmd_pool_list;
2543 struct mrsas_cmd *cmd = NULL;
2544
2545 mutex_enter(&instance->app_cmd_pool_mtx);
2546
2547 if (!mlist_empty(head)) {
2548 cmd = mlist_entry(head->next, struct mrsas_cmd, list);
2549 mlist_del_init(head->next);
2550 }
2551 if (cmd != NULL) {
2552 cmd->pkt = NULL;
2553 cmd->retry_count_for_ocr = 0;
2554 cmd->drv_pkt_time = 0;
2555 }
2556
2557 mutex_exit(&instance->app_cmd_pool_mtx);
2558
2559 return (cmd);
2560 }
2561 /*
2562 * return_mfi_pkt : Return a cmd to free command pool
2563 */
2564 static void
2565 return_mfi_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
2566 {
2567 mutex_enter(&instance->cmd_pool_mtx);
2568 /* use mlist_add_tail for debug assistance */
2569 mlist_add_tail(&cmd->list, &instance->cmd_pool_list);
2570
2571 mutex_exit(&instance->cmd_pool_mtx);
2572 }
2573
2574 static void
2575 return_mfi_app_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
2576 {
2577 mutex_enter(&instance->app_cmd_pool_mtx);
2578
2579 mlist_add(&cmd->list, &instance->app_cmd_pool_list);
2580
2581 mutex_exit(&instance->app_cmd_pool_mtx);
2582 }
2583 void
2584 push_pending_mfi_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
2585 {
2586 struct scsi_pkt *pkt;
2587 struct mrsas_header *hdr;
2588 con_log(CL_DLEVEL2, (CE_NOTE, "push_pending_pkt(): Called\n"));
2589 mutex_enter(&instance->cmd_pend_mtx);
2590 mlist_del_init(&cmd->list);
2591 mlist_add_tail(&cmd->list, &instance->cmd_pend_list);
2592 if (cmd->sync_cmd == MRSAS_TRUE) {
2593 hdr = (struct mrsas_header *)&cmd->frame->hdr;
2594 if (hdr) {
2595 con_log(CL_ANN1, (CE_CONT,
2596 "push_pending_mfi_pkt: "
2597 "cmd %p index %x "
2598 "time %llx",
2599 (void *)cmd, cmd->index,
2600 gethrtime()));
2601 /* Wait for specified interval */
2602 cmd->drv_pkt_time = ddi_get16(
2603 cmd->frame_dma_obj.acc_handle, &hdr->timeout);
2604 if (cmd->drv_pkt_time < debug_timeout_g)
2605 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
2606 con_log(CL_ANN1, (CE_CONT,
2607 "push_pending_pkt(): "
2608 "Called IO Timeout Value %x\n",
2609 cmd->drv_pkt_time));
2610 }
2611 if (hdr && instance->timeout_id == (timeout_id_t)-1) {
2612 instance->timeout_id = timeout(io_timeout_checker,
2613 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
2614 }
2615 } else {
2616 pkt = cmd->pkt;
2617 if (pkt) {
2618 con_log(CL_ANN1, (CE_CONT,
2619 "push_pending_mfi_pkt: "
2620 "cmd %p index %x pkt %p, "
2621 "time %llx",
2622 (void *)cmd, cmd->index, (void *)pkt,
2623 gethrtime()));
2624 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
2625 }
2626 if (pkt && instance->timeout_id == (timeout_id_t)-1) {
2627 instance->timeout_id = timeout(io_timeout_checker,
2628 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
2629 }
2630 }
2631
2632 mutex_exit(&instance->cmd_pend_mtx);
2633
2634 }
2635
2636 int
2637 mrsas_print_pending_cmds(struct mrsas_instance *instance)
2638 {
2639 mlist_t *head = &instance->cmd_pend_list;
2640 mlist_t *tmp = head;
2641 struct mrsas_cmd *cmd = NULL;
2642 struct mrsas_header *hdr;
2643 unsigned int flag = 1;
2644 struct scsi_pkt *pkt;
2645 int saved_level;
2646 int cmd_count = 0;
2647
2648 saved_level = debug_level_g;
2649 debug_level_g = CL_ANN1;
2650
2651 cmn_err(CE_NOTE, "mrsas_print_pending_cmds(): Called\n");
2652
2653 while (flag) {
2654 mutex_enter(&instance->cmd_pend_mtx);
2655 tmp = tmp->next;
2656 if (tmp == head) {
2657 mutex_exit(&instance->cmd_pend_mtx);
2658 flag = 0;
2659 con_log(CL_ANN1, (CE_CONT, "mrsas_print_pending_cmds():"
2660 " NO MORE CMDS PENDING....\n"));
2661 break;
2662 } else {
2663 cmd = mlist_entry(tmp, struct mrsas_cmd, list);
2664 mutex_exit(&instance->cmd_pend_mtx);
2665 if (cmd) {
2666 if (cmd->sync_cmd == MRSAS_TRUE) {
2667 hdr = (struct mrsas_header *)
2668 &cmd->frame->hdr;
2669 if (hdr) {
2670 con_log(CL_ANN1, (CE_CONT,
2671 "print: cmd %p index 0x%x "
2672 "drv_pkt_time 0x%x (NO-PKT)"
2673 " hdr %p\n", (void *)cmd,
2674 cmd->index,
2675 cmd->drv_pkt_time,
2676 (void *)hdr));
2677 }
2678 } else {
2679 pkt = cmd->pkt;
2680 if (pkt) {
2681 con_log(CL_ANN1, (CE_CONT,
2682 "print: cmd %p index 0x%x "
2683 "drv_pkt_time 0x%x pkt %p \n",
2684 (void *)cmd, cmd->index,
2685 cmd->drv_pkt_time, (void *)pkt));
2686 }
2687 }
2688
2689 if (++cmd_count == 1) {
2690 mrsas_print_cmd_details(instance, cmd,
2691 0xDD);
2692 } else {
2693 mrsas_print_cmd_details(instance, cmd,
2694 1);
2695 }
2696
2697 }
2698 }
2699 }
2700 con_log(CL_ANN1, (CE_CONT, "mrsas_print_pending_cmds(): Done\n"));
2701
2702
2703 debug_level_g = saved_level;
2704
2705 return (DDI_SUCCESS);
2706 }
2707
2708
2709 int
2710 mrsas_complete_pending_cmds(struct mrsas_instance *instance)
2711 {
2712
2713 struct mrsas_cmd *cmd = NULL;
2714 struct scsi_pkt *pkt;
2715 struct mrsas_header *hdr;
2716
2717 struct mlist_head *pos, *next;
2718
2719 con_log(CL_ANN1, (CE_NOTE,
2720 "mrsas_complete_pending_cmds(): Called"));
2721
2722 mutex_enter(&instance->cmd_pend_mtx);
2723 mlist_for_each_safe(pos, next, &instance->cmd_pend_list) {
2724 cmd = mlist_entry(pos, struct mrsas_cmd, list);
2725 if (cmd) {
2726 pkt = cmd->pkt;
2727 if (pkt) { /* for IO */
2728 if (((pkt->pkt_flags & FLAG_NOINTR)
2729 == 0) && pkt->pkt_comp) {
2730 pkt->pkt_reason
2731 = CMD_DEV_GONE;
2732 pkt->pkt_statistics
2733 = STAT_DISCON;
2734 con_log(CL_ANN1, (CE_CONT,
2735 "fail and posting to scsa "
2736 "cmd %p index %x"
2737 " pkt %p "
2738 "time : %llx",
2739 (void *)cmd, cmd->index,
2740 (void *)pkt, gethrtime()));
2741 (*pkt->pkt_comp)(pkt);
2742 }
2743 } else { /* for DCMDS */
2744 if (cmd->sync_cmd == MRSAS_TRUE) {
2745 hdr = (struct mrsas_header *)&cmd->frame->hdr;
2746 con_log(CL_ANN1, (CE_CONT,
2747 "posting invalid status to application "
2748 "cmd %p index %x"
2749 " hdr %p "
2750 "time : %llx",
2751 (void *)cmd, cmd->index,
2752 (void *)hdr, gethrtime()));
2753 hdr->cmd_status = MFI_STAT_INVALID_STATUS;
2754 complete_cmd_in_sync_mode(instance, cmd);
2755 }
2756 }
2757 mlist_del_init(&cmd->list);
2758 } else {
2759 con_log(CL_ANN1, (CE_CONT,
2760 "mrsas_complete_pending_cmds:"
2761 "NULL command\n"));
2762 }
2763 con_log(CL_ANN1, (CE_CONT,
2764 "mrsas_complete_pending_cmds:"
2765 "looping for more commands\n"));
2766 }
2767 mutex_exit(&instance->cmd_pend_mtx);
2768
2769 con_log(CL_ANN1, (CE_CONT, "mrsas_complete_pending_cmds(): DONE\n"));
2770 return (DDI_SUCCESS);
2771 }
2772
2773 void
2774 mrsas_print_cmd_details(struct mrsas_instance *instance, struct mrsas_cmd *cmd,
2775 int detail)
2776 {
2777 struct scsi_pkt *pkt = cmd->pkt;
2778 Mpi2RaidSCSIIORequest_t *scsi_io = cmd->scsi_io_request;
2779 int i;
2780 int saved_level;
2781 ddi_acc_handle_t acc_handle =
2782 instance->mpi2_frame_pool_dma_obj.acc_handle;
2783
2784 if (detail == 0xDD) {
2785 saved_level = debug_level_g;
2786 debug_level_g = CL_ANN1;
2787 }
2788
2789
2790 if (instance->tbolt) {
2791 con_log(CL_ANN1, (CE_CONT, "print_cmd_details: cmd %p "
2792 "cmd->index 0x%x SMID 0x%x timer 0x%x sec\n",
2793 (void *)cmd, cmd->index, cmd->SMID, cmd->drv_pkt_time));
2794 } else {
2795 con_log(CL_ANN1, (CE_CONT, "print_cmd_details: cmd %p "
2796 "cmd->index 0x%x timer 0x%x sec\n",
2797 (void *)cmd, cmd->index, cmd->drv_pkt_time));
2798 }
2799
2800 if (pkt) {
2801 con_log(CL_ANN1, (CE_CONT, "scsi_pkt CDB[0]=0x%x",
2802 pkt->pkt_cdbp[0]));
2803 } else {
2804 con_log(CL_ANN1, (CE_CONT, "NO-PKT"));
2805 }
2806
2807 if ((detail == 0xDD) && instance->tbolt) {
2808 con_log(CL_ANN1, (CE_CONT, "RAID_SCSI_IO_REQUEST\n"));
2809 con_log(CL_ANN1, (CE_CONT, "DevHandle=0x%X Function=0x%X "
2810 "IoFlags=0x%X SGLFlags=0x%X DataLength=0x%X\n",
2811 ddi_get16(acc_handle, &scsi_io->DevHandle),
2812 ddi_get8(acc_handle, &scsi_io->Function),
2813 ddi_get16(acc_handle, &scsi_io->IoFlags),
2814 ddi_get16(acc_handle, &scsi_io->SGLFlags),
2815 ddi_get32(acc_handle, &scsi_io->DataLength)));
2816
2817 for (i = 0; i < 32; i++) {
2818 con_log(CL_ANN1, (CE_CONT, "CDB[%d]=0x%x ", i,
2819 ddi_get8(acc_handle, &scsi_io->CDB.CDB32[i])));
2820 }
2821
2822 con_log(CL_ANN1, (CE_CONT, "RAID-CONTEXT\n"));
2823 con_log(CL_ANN1, (CE_CONT, "status=0x%X extStatus=0x%X "
2824 "ldTargetId=0x%X timeoutValue=0x%X regLockFlags=0x%X "
2825 "RAIDFlags=0x%X regLockRowLBA=0x%" PRIu64
2826 " regLockLength=0x%X spanArm=0x%X\n",
2827 ddi_get8(acc_handle, &scsi_io->RaidContext.status),
2828 ddi_get8(acc_handle, &scsi_io->RaidContext.extStatus),
2829 ddi_get16(acc_handle, &scsi_io->RaidContext.ldTargetId),
2830 ddi_get16(acc_handle, &scsi_io->RaidContext.timeoutValue),
2831 ddi_get8(acc_handle, &scsi_io->RaidContext.regLockFlags),
2832 ddi_get8(acc_handle, &scsi_io->RaidContext.RAIDFlags),
2833 ddi_get64(acc_handle, &scsi_io->RaidContext.regLockRowLBA),
2834 ddi_get32(acc_handle, &scsi_io->RaidContext.regLockLength),
2835 ddi_get8(acc_handle, &scsi_io->RaidContext.spanArm)));
2836 }
2837
2838 if (detail == 0xDD) {
2839 debug_level_g = saved_level;
2840 }
2841 }
2842
2843
2844 int
2845 mrsas_issue_pending_cmds(struct mrsas_instance *instance)
2846 {
2847 mlist_t *head = &instance->cmd_pend_list;
2848 mlist_t *tmp = head->next;
2849 struct mrsas_cmd *cmd = NULL;
2850 struct scsi_pkt *pkt;
2851
2852 con_log(CL_ANN1, (CE_NOTE, "mrsas_issue_pending_cmds(): Called"));
2853 while (tmp != head) {
2854 mutex_enter(&instance->cmd_pend_mtx);
2855 cmd = mlist_entry(tmp, struct mrsas_cmd, list);
2856 tmp = tmp->next;
2857 mutex_exit(&instance->cmd_pend_mtx);
2858 if (cmd) {
2859 con_log(CL_ANN1, (CE_CONT,
2860 "mrsas_issue_pending_cmds(): "
2861 "Got a cmd: cmd %p index 0x%x drv_pkt_time 0x%x ",
2862 (void *)cmd, cmd->index, cmd->drv_pkt_time));
2863
2864 /* Reset command timeout value */
2865 if (cmd->drv_pkt_time < debug_timeout_g)
2866 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
2867
2868 cmd->retry_count_for_ocr++;
2869
2870 cmn_err(CE_CONT, "cmd retry count = %d\n",
2871 cmd->retry_count_for_ocr);
2872
2873 if (cmd->retry_count_for_ocr > IO_RETRY_COUNT) {
2874 cmn_err(CE_WARN, "mrsas_issue_pending_cmds(): "
2875 "cmd->retry_count exceeded limit >%d\n",
2876 IO_RETRY_COUNT);
2877 mrsas_print_cmd_details(instance, cmd, 0xDD);
2878
2879 cmn_err(CE_WARN,
2880 "mrsas_issue_pending_cmds():"
2881 "Calling KILL Adapter\n");
2882 if (instance->tbolt)
2883 mrsas_tbolt_kill_adapter(instance);
2884 else
2885 (void) mrsas_kill_adapter(instance);
2886 return (DDI_FAILURE);
2887 }
2888
2889 pkt = cmd->pkt;
2890 if (pkt) {
2891 con_log(CL_ANN1, (CE_CONT,
2892 "PENDING PKT-CMD ISSUE: cmd %p index %x "
2893 "pkt %p time %llx",
2894 (void *)cmd, cmd->index,
2895 (void *)pkt,
2896 gethrtime()));
2897
2898 } else {
2899 cmn_err(CE_CONT,
2900 "mrsas_issue_pending_cmds(): NO-PKT, "
2901 "cmd %p index 0x%x drv_pkt_time 0x%x ",
2902 (void *)cmd, cmd->index, cmd->drv_pkt_time);
2903 }
2904
2905
2906 if (cmd->sync_cmd == MRSAS_TRUE) {
2907 cmn_err(CE_CONT, "mrsas_issue_pending_cmds(): "
2908 "SYNC_CMD == TRUE \n");
2909 instance->func_ptr->issue_cmd_in_sync_mode(
2910 instance, cmd);
2911 } else {
2912 instance->func_ptr->issue_cmd(cmd, instance);
2913 }
2914 } else {
2915 con_log(CL_ANN1, (CE_CONT,
2916 "mrsas_issue_pending_cmds: NULL command\n"));
2917 }
2918 con_log(CL_ANN1, (CE_CONT,
2919 "mrsas_issue_pending_cmds:"
2920 "looping for more commands"));
2921 }
2922 con_log(CL_ANN1, (CE_CONT, "mrsas_issue_pending_cmds(): DONE\n"));
2923 return (DDI_SUCCESS);
2924 }
2925
2926
2927
2928 /*
2929 * destroy_mfi_frame_pool
2930 */
2931 void
2932 destroy_mfi_frame_pool(struct mrsas_instance *instance)
2933 {
2934 int i;
2935 uint32_t max_cmd = instance->max_fw_cmds;
2936
2937 struct mrsas_cmd *cmd;
2938
2939 /* return all frames to pool */
2940
2941 for (i = 0; i < max_cmd; i++) {
2942
2943 cmd = instance->cmd_list[i];
2944
2945 if (cmd->frame_dma_obj_status == DMA_OBJ_ALLOCATED)
2946 (void) mrsas_free_dma_obj(instance, cmd->frame_dma_obj);
2947
2948 cmd->frame_dma_obj_status = DMA_OBJ_FREED;
2949 }
2950
2951 }
2952
2953 /*
2954 * create_mfi_frame_pool
2955 */
2956 int
2957 create_mfi_frame_pool(struct mrsas_instance *instance)
2958 {
2959 int i = 0;
2960 int cookie_cnt;
2961 uint16_t max_cmd;
2962 uint16_t sge_sz;
2963 uint32_t sgl_sz;
2964 uint32_t tot_frame_size;
2965 struct mrsas_cmd *cmd;
2966 int retval = DDI_SUCCESS;
2967
2968 max_cmd = instance->max_fw_cmds;
2969 sge_sz = sizeof (struct mrsas_sge_ieee);
2970 /* calculated the number of 64byte frames required for SGL */
2971 sgl_sz = sge_sz * instance->max_num_sge;
2972 tot_frame_size = sgl_sz + MRMFI_FRAME_SIZE + SENSE_LENGTH;
2973
2974 con_log(CL_DLEVEL3, (CE_NOTE, "create_mfi_frame_pool: "
2975 "sgl_sz %x tot_frame_size %x", sgl_sz, tot_frame_size));
2976
2977 while (i < max_cmd) {
2978 cmd = instance->cmd_list[i];
2979
2980 cmd->frame_dma_obj.size = tot_frame_size;
2981 cmd->frame_dma_obj.dma_attr = mrsas_generic_dma_attr;
2982 cmd->frame_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
2983 cmd->frame_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
2984 cmd->frame_dma_obj.dma_attr.dma_attr_sgllen = 1;
2985 cmd->frame_dma_obj.dma_attr.dma_attr_align = 64;
2986
2987 cookie_cnt = mrsas_alloc_dma_obj(instance, &cmd->frame_dma_obj,
2988 (uchar_t)DDI_STRUCTURE_LE_ACC);
2989
2990 if (cookie_cnt == -1 || cookie_cnt > 1) {
2991 cmn_err(CE_WARN,
2992 "create_mfi_frame_pool: could not alloc.");
2993 retval = DDI_FAILURE;
2994 goto mrsas_undo_frame_pool;
2995 }
2996
2997 bzero(cmd->frame_dma_obj.buffer, tot_frame_size);
2998
2999 cmd->frame_dma_obj_status = DMA_OBJ_ALLOCATED;
3000 cmd->frame = (union mrsas_frame *)cmd->frame_dma_obj.buffer;
3001 cmd->frame_phys_addr =
3002 cmd->frame_dma_obj.dma_cookie[0].dmac_address;
3003
3004 cmd->sense = (uint8_t *)(((unsigned long)
3005 cmd->frame_dma_obj.buffer) +
3006 tot_frame_size - SENSE_LENGTH);
3007 cmd->sense_phys_addr =
3008 cmd->frame_dma_obj.dma_cookie[0].dmac_address +
3009 tot_frame_size - SENSE_LENGTH;
3010
3011 if (!cmd->frame || !cmd->sense) {
3012 cmn_err(CE_WARN,
3013 "mr_sas: pci_pool_alloc failed");
3014 retval = ENOMEM;
3015 goto mrsas_undo_frame_pool;
3016 }
3017
3018 ddi_put32(cmd->frame_dma_obj.acc_handle,
3019 &cmd->frame->io.context, cmd->index);
3020 i++;
3021
3022 con_log(CL_DLEVEL3, (CE_NOTE, "[%x]-%x",
3023 cmd->index, cmd->frame_phys_addr));
3024 }
3025
3026 return (DDI_SUCCESS);
3027
3028 mrsas_undo_frame_pool:
3029 if (i > 0)
3030 destroy_mfi_frame_pool(instance);
3031
3032 return (retval);
3033 }
3034
3035 /*
3036 * free_additional_dma_buffer
3037 */
3038 static void
3039 free_additional_dma_buffer(struct mrsas_instance *instance)
3040 {
3041 if (instance->mfi_internal_dma_obj.status == DMA_OBJ_ALLOCATED) {
3042 (void) mrsas_free_dma_obj(instance,
3043 instance->mfi_internal_dma_obj);
3044 instance->mfi_internal_dma_obj.status = DMA_OBJ_FREED;
3045 }
3046
3047 if (instance->mfi_evt_detail_obj.status == DMA_OBJ_ALLOCATED) {
3048 (void) mrsas_free_dma_obj(instance,
3049 instance->mfi_evt_detail_obj);
3050 instance->mfi_evt_detail_obj.status = DMA_OBJ_FREED;
3051 }
3052 }
3053
3054 /*
3055 * alloc_additional_dma_buffer
3056 */
3057 static int
3058 alloc_additional_dma_buffer(struct mrsas_instance *instance)
3059 {
3060 uint32_t reply_q_sz;
3061 uint32_t internal_buf_size = PAGESIZE*2;
3062
3063 /* max cmds plus 1 + producer & consumer */
3064 reply_q_sz = sizeof (uint32_t) * (instance->max_fw_cmds + 1 + 2);
3065
3066 instance->mfi_internal_dma_obj.size = internal_buf_size;
3067 instance->mfi_internal_dma_obj.dma_attr = mrsas_generic_dma_attr;
3068 instance->mfi_internal_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
3069 instance->mfi_internal_dma_obj.dma_attr.dma_attr_count_max =
3070 0xFFFFFFFFU;
3071 instance->mfi_internal_dma_obj.dma_attr.dma_attr_sgllen = 1;
3072
3073 if (mrsas_alloc_dma_obj(instance, &instance->mfi_internal_dma_obj,
3074 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
3075 cmn_err(CE_WARN,
3076 "mr_sas: could not alloc reply queue");
3077 return (DDI_FAILURE);
3078 }
3079
3080 bzero(instance->mfi_internal_dma_obj.buffer, internal_buf_size);
3081
3082 instance->mfi_internal_dma_obj.status |= DMA_OBJ_ALLOCATED;
3083
3084 instance->producer = (uint32_t *)((unsigned long)
3085 instance->mfi_internal_dma_obj.buffer);
3086 instance->consumer = (uint32_t *)((unsigned long)
3087 instance->mfi_internal_dma_obj.buffer + 4);
3088 instance->reply_queue = (uint32_t *)((unsigned long)
3089 instance->mfi_internal_dma_obj.buffer + 8);
3090 instance->internal_buf = (caddr_t)(((unsigned long)
3091 instance->mfi_internal_dma_obj.buffer) + reply_q_sz + 8);
3092 instance->internal_buf_dmac_add =
3093 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address +
3094 (reply_q_sz + 8);
3095 instance->internal_buf_size = internal_buf_size -
3096 (reply_q_sz + 8);
3097
3098 /* allocate evt_detail */
3099 instance->mfi_evt_detail_obj.size = sizeof (struct mrsas_evt_detail);
3100 instance->mfi_evt_detail_obj.dma_attr = mrsas_generic_dma_attr;
3101 instance->mfi_evt_detail_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
3102 instance->mfi_evt_detail_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
3103 instance->mfi_evt_detail_obj.dma_attr.dma_attr_sgllen = 1;
3104 instance->mfi_evt_detail_obj.dma_attr.dma_attr_align = 1;
3105
3106 if (mrsas_alloc_dma_obj(instance, &instance->mfi_evt_detail_obj,
3107 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
3108 cmn_err(CE_WARN, "alloc_additional_dma_buffer: "
3109 "could not allocate data transfer buffer.");
3110 goto mrsas_undo_internal_buff;
3111 }
3112
3113 bzero(instance->mfi_evt_detail_obj.buffer,
3114 sizeof (struct mrsas_evt_detail));
3115
3116 instance->mfi_evt_detail_obj.status |= DMA_OBJ_ALLOCATED;
3117
3118 return (DDI_SUCCESS);
3119
3120 mrsas_undo_internal_buff:
3121 if (instance->mfi_internal_dma_obj.status == DMA_OBJ_ALLOCATED) {
3122 (void) mrsas_free_dma_obj(instance,
3123 instance->mfi_internal_dma_obj);
3124 instance->mfi_internal_dma_obj.status = DMA_OBJ_FREED;
3125 }
3126
3127 return (DDI_FAILURE);
3128 }
3129
3130
3131 void
3132 mrsas_free_cmd_pool(struct mrsas_instance *instance)
3133 {
3134 int i;
3135 uint32_t max_cmd;
3136 size_t sz;
3137
3138 /* already freed */
3139 if (instance->cmd_list == NULL) {
3140 return;
3141 }
3142
3143 max_cmd = instance->max_fw_cmds;
3144
3145 /* size of cmd_list array */
3146 sz = sizeof (struct mrsas_cmd *) * max_cmd;
3147
3148 /* First free each cmd */
3149 for (i = 0; i < max_cmd; i++) {
3150 if (instance->cmd_list[i] != NULL) {
3151 kmem_free(instance->cmd_list[i],
3152 sizeof (struct mrsas_cmd));
3153 }
3154
3155 instance->cmd_list[i] = NULL;
3156 }
3157
3158 /* Now, free cmd_list array */
3159 if (instance->cmd_list != NULL)
3160 kmem_free(instance->cmd_list, sz);
3161
3162 instance->cmd_list = NULL;
3163
3164 INIT_LIST_HEAD(&instance->cmd_pool_list);
3165 INIT_LIST_HEAD(&instance->cmd_pend_list);
3166 if (instance->tbolt) {
3167 INIT_LIST_HEAD(&instance->cmd_app_pool_list);
3168 } else {
3169 INIT_LIST_HEAD(&instance->app_cmd_pool_list);
3170 }
3171
3172 }
3173
3174
3175 /*
3176 * mrsas_alloc_cmd_pool
3177 */
3178 int
3179 mrsas_alloc_cmd_pool(struct mrsas_instance *instance)
3180 {
3181 int i;
3182 int count;
3183 uint32_t max_cmd;
3184 uint32_t reserve_cmd;
3185 size_t sz;
3186
3187 struct mrsas_cmd *cmd;
3188
3189 max_cmd = instance->max_fw_cmds;
3190 con_log(CL_ANN1, (CE_NOTE, "mrsas_alloc_cmd_pool: "
3191 "max_cmd %x", max_cmd));
3192
3193
3194 sz = sizeof (struct mrsas_cmd *) * max_cmd;
3195
3196 /*
3197 * instance->cmd_list is an array of struct mrsas_cmd pointers.
3198 * Allocate the dynamic array first and then allocate individual
3199 * commands.
3200 */
3201 instance->cmd_list = kmem_zalloc(sz, KM_SLEEP);
3202 if (instance->cmd_list == NULL) {
3203 con_log(CL_NONE, (CE_WARN,
3204 "Failed to allocate memory for cmd_list"));
3205 return (DDI_FAILURE);
3206 }
3207
3208 /* create a frame pool and assign one frame to each cmd */
3209 for (count = 0; count < max_cmd; count++) {
3210 instance->cmd_list[count] =
3211 kmem_zalloc(sizeof (struct mrsas_cmd), KM_SLEEP);
3212 if (instance->cmd_list[count] == NULL) {
3213 con_log(CL_NONE, (CE_WARN,
3214 "Failed to allocate memory for mrsas_cmd"));
3215 goto mrsas_undo_cmds;
3216 }
3217 }
3218
3219 /* add all the commands to command pool */
3220
3221 INIT_LIST_HEAD(&instance->cmd_pool_list);
3222 INIT_LIST_HEAD(&instance->cmd_pend_list);
3223 INIT_LIST_HEAD(&instance->app_cmd_pool_list);
3224
3225 reserve_cmd = MRSAS_APP_RESERVED_CMDS;
3226
3227 for (i = 0; i < reserve_cmd; i++) {
3228 cmd = instance->cmd_list[i];
3229 cmd->index = i;
3230 mlist_add_tail(&cmd->list, &instance->app_cmd_pool_list);
3231 }
3232
3233
3234 for (i = reserve_cmd; i < max_cmd; i++) {
3235 cmd = instance->cmd_list[i];
3236 cmd->index = i;
3237 mlist_add_tail(&cmd->list, &instance->cmd_pool_list);
3238 }
3239
3240 return (DDI_SUCCESS);
3241
3242 mrsas_undo_cmds:
3243 if (count > 0) {
3244 /* free each cmd */
3245 for (i = 0; i < count; i++) {
3246 if (instance->cmd_list[i] != NULL) {
3247 kmem_free(instance->cmd_list[i],
3248 sizeof (struct mrsas_cmd));
3249 }
3250 instance->cmd_list[i] = NULL;
3251 }
3252 }
3253
3254 mrsas_undo_cmd_list:
3255 if (instance->cmd_list != NULL)
3256 kmem_free(instance->cmd_list, sz);
3257 instance->cmd_list = NULL;
3258
3259 return (DDI_FAILURE);
3260 }
3261
3262
3263 /*
3264 * free_space_for_mfi
3265 */
3266 static void
3267 free_space_for_mfi(struct mrsas_instance *instance)
3268 {
3269
3270 /* already freed */
3271 if (instance->cmd_list == NULL) {
3272 return;
3273 }
3274
3275 /* Free additional dma buffer */
3276 free_additional_dma_buffer(instance);
3277
3278 /* Free the MFI frame pool */
3279 destroy_mfi_frame_pool(instance);
3280
3281 /* Free all the commands in the cmd_list */
3282 /* Free the cmd_list buffer itself */
3283 mrsas_free_cmd_pool(instance);
3284 }
3285
3286 /*
3287 * alloc_space_for_mfi
3288 */
3289 static int
3290 alloc_space_for_mfi(struct mrsas_instance *instance)
3291 {
3292 /* Allocate command pool (memory for cmd_list & individual commands) */
3293 if (mrsas_alloc_cmd_pool(instance)) {
3294 cmn_err(CE_WARN, "error creating cmd pool");
3295 return (DDI_FAILURE);
3296 }
3297
3298 /* Allocate MFI Frame pool */
3299 if (create_mfi_frame_pool(instance)) {
3300 cmn_err(CE_WARN, "error creating frame DMA pool");
3301 goto mfi_undo_cmd_pool;
3302 }
3303
3304 /* Allocate additional DMA buffer */
3305 if (alloc_additional_dma_buffer(instance)) {
3306 cmn_err(CE_WARN, "error creating frame DMA pool");
3307 goto mfi_undo_frame_pool;
3308 }
3309
3310 return (DDI_SUCCESS);
3311
3312 mfi_undo_frame_pool:
3313 destroy_mfi_frame_pool(instance);
3314
3315 mfi_undo_cmd_pool:
3316 mrsas_free_cmd_pool(instance);
3317
3318 return (DDI_FAILURE);
3319 }
3320
3321
3322
3323 /*
3324 * get_ctrl_info
3325 */
3326 static int
3327 get_ctrl_info(struct mrsas_instance *instance,
3328 struct mrsas_ctrl_info *ctrl_info)
3329 {
3330 int ret = 0;
3331
3332 struct mrsas_cmd *cmd;
3333 struct mrsas_dcmd_frame *dcmd;
3334 struct mrsas_ctrl_info *ci;
3335
3336 if (instance->tbolt) {
3337 cmd = get_raid_msg_mfi_pkt(instance);
3338 } else {
3339 cmd = get_mfi_pkt(instance);
3340 }
3341
3342 if (!cmd) {
3343 con_log(CL_ANN, (CE_WARN,
3344 "Failed to get a cmd for ctrl info"));
3345 DTRACE_PROBE2(info_mfi_err, uint16_t, instance->fw_outstanding,
3346 uint16_t, instance->max_fw_cmds);
3347 return (DDI_FAILURE);
3348 }
3349
3350 /* Clear the frame buffer and assign back the context id */
3351 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3352 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3353 cmd->index);
3354
3355 dcmd = &cmd->frame->dcmd;
3356
3357 ci = (struct mrsas_ctrl_info *)instance->internal_buf;
3358
3359 if (!ci) {
3360 cmn_err(CE_WARN,
3361 "Failed to alloc mem for ctrl info");
3362 return_mfi_pkt(instance, cmd);
3363 return (DDI_FAILURE);
3364 }
3365
3366 (void) memset(ci, 0, sizeof (struct mrsas_ctrl_info));
3367
3368 /* for( i = 0; i < DCMD_MBOX_SZ; i++ ) dcmd->mbox.b[i] = 0; */
3369 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
3370
3371 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
3372 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status,
3373 MFI_CMD_STATUS_POLL_MODE);
3374 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 1);
3375 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
3376 MFI_FRAME_DIR_READ);
3377 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
3378 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len,
3379 sizeof (struct mrsas_ctrl_info));
3380 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
3381 MR_DCMD_CTRL_GET_INFO);
3382 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].phys_addr,
3383 instance->internal_buf_dmac_add);
3384 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].length,
3385 sizeof (struct mrsas_ctrl_info));
3386
3387 cmd->frame_count = 1;
3388
3389 if (instance->tbolt) {
3390 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
3391 }
3392
3393 if (!instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3394 ret = 0;
3395
3396 ctrl_info->max_request_size = ddi_get32(
3397 cmd->frame_dma_obj.acc_handle, &ci->max_request_size);
3398
3399 ctrl_info->ld_present_count = ddi_get16(
3400 cmd->frame_dma_obj.acc_handle, &ci->ld_present_count);
3401
3402 ctrl_info->properties.on_off_properties = ddi_get32(
3403 cmd->frame_dma_obj.acc_handle,
3404 &ci->properties.on_off_properties);
3405 ddi_rep_get8(cmd->frame_dma_obj.acc_handle,
3406 (uint8_t *)(ctrl_info->product_name),
3407 (uint8_t *)(ci->product_name), 80 * sizeof (char),
3408 DDI_DEV_AUTOINCR);
3409 /* should get more members of ci with ddi_get when needed */
3410 } else {
3411 cmn_err(CE_WARN, "get_ctrl_info: Ctrl info failed");
3412 ret = -1;
3413 }
3414
3415 if (mrsas_common_check(instance, cmd) != DDI_SUCCESS) {
3416 ret = -1;
3417 }
3418 if (instance->tbolt) {
3419 return_raid_msg_mfi_pkt(instance, cmd);
3420 } else {
3421 return_mfi_pkt(instance, cmd);
3422 }
3423
3424 return (ret);
3425 }
3426
3427 /*
3428 * abort_aen_cmd
3429 */
3430 static int
3431 abort_aen_cmd(struct mrsas_instance *instance,
3432 struct mrsas_cmd *cmd_to_abort)
3433 {
3434 int ret = 0;
3435
3436 struct mrsas_cmd *cmd;
3437 struct mrsas_abort_frame *abort_fr;
3438
3439 con_log(CL_ANN1, (CE_NOTE, "chkpnt: abort_aen:%d", __LINE__));
3440
3441 if (instance->tbolt) {
3442 cmd = get_raid_msg_mfi_pkt(instance);
3443 } else {
3444 cmd = get_mfi_pkt(instance);
3445 }
3446
3447 if (!cmd) {
3448 con_log(CL_ANN1, (CE_WARN,
3449 "abort_aen_cmd():Failed to get a cmd for abort_aen_cmd"));
3450 DTRACE_PROBE2(abort_mfi_err, uint16_t, instance->fw_outstanding,
3451 uint16_t, instance->max_fw_cmds);
3452 return (DDI_FAILURE);
3453 }
3454
3455 /* Clear the frame buffer and assign back the context id */
3456 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3457 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3458 cmd->index);
3459
3460 abort_fr = &cmd->frame->abort;
3461
3462 /* prepare and issue the abort frame */
3463 ddi_put8(cmd->frame_dma_obj.acc_handle,
3464 &abort_fr->cmd, MFI_CMD_OP_ABORT);
3465 ddi_put8(cmd->frame_dma_obj.acc_handle, &abort_fr->cmd_status,
3466 MFI_CMD_STATUS_SYNC_MODE);
3467 ddi_put16(cmd->frame_dma_obj.acc_handle, &abort_fr->flags, 0);
3468 ddi_put32(cmd->frame_dma_obj.acc_handle, &abort_fr->abort_context,
3469 cmd_to_abort->index);
3470 ddi_put32(cmd->frame_dma_obj.acc_handle,
3471 &abort_fr->abort_mfi_phys_addr_lo, cmd_to_abort->frame_phys_addr);
3472 ddi_put32(cmd->frame_dma_obj.acc_handle,
3473 &abort_fr->abort_mfi_phys_addr_hi, 0);
3474
3475 instance->aen_cmd->abort_aen = 1;
3476
3477 cmd->frame_count = 1;
3478
3479 if (instance->tbolt) {
3480 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
3481 }
3482
3483 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3484 con_log(CL_ANN1, (CE_WARN,
3485 "abort_aen_cmd: issue_cmd_in_poll_mode failed"));
3486 ret = -1;
3487 } else {
3488 ret = 0;
3489 }
3490
3491 instance->aen_cmd->abort_aen = 1;
3492 instance->aen_cmd = 0;
3493
3494 if (instance->tbolt) {
3495 return_raid_msg_mfi_pkt(instance, cmd);
3496 } else {
3497 return_mfi_pkt(instance, cmd);
3498 }
3499
3500 atomic_add_16(&instance->fw_outstanding, (-1));
3501
3502 return (ret);
3503 }
3504
3505
3506 static int
3507 mrsas_build_init_cmd(struct mrsas_instance *instance,
3508 struct mrsas_cmd **cmd_ptr)
3509 {
3510 struct mrsas_cmd *cmd;
3511 struct mrsas_init_frame *init_frame;
3512 struct mrsas_init_queue_info *initq_info;
3513 struct mrsas_drv_ver drv_ver_info;
3514
3515
3516 /*
3517 * Prepare a init frame. Note the init frame points to queue info
3518 * structure. Each frame has SGL allocated after first 64 bytes. For
3519 * this frame - since we don't need any SGL - we use SGL's space as
3520 * queue info structure
3521 */
3522 cmd = *cmd_ptr;
3523
3524
3525 /* Clear the frame buffer and assign back the context id */
3526 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3527 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3528 cmd->index);
3529
3530 init_frame = (struct mrsas_init_frame *)cmd->frame;
3531 initq_info = (struct mrsas_init_queue_info *)
3532 ((unsigned long)init_frame + 64);
3533
3534 (void) memset(init_frame, 0, MRMFI_FRAME_SIZE);
3535 (void) memset(initq_info, 0, sizeof (struct mrsas_init_queue_info));
3536
3537 ddi_put32(cmd->frame_dma_obj.acc_handle, &initq_info->init_flags, 0);
3538
3539 ddi_put32(cmd->frame_dma_obj.acc_handle,
3540 &initq_info->reply_queue_entries, instance->max_fw_cmds + 1);
3541
3542 ddi_put32(cmd->frame_dma_obj.acc_handle,
3543 &initq_info->producer_index_phys_addr_hi, 0);
3544 ddi_put32(cmd->frame_dma_obj.acc_handle,
3545 &initq_info->producer_index_phys_addr_lo,
3546 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address);
3547
3548 ddi_put32(cmd->frame_dma_obj.acc_handle,
3549 &initq_info->consumer_index_phys_addr_hi, 0);
3550 ddi_put32(cmd->frame_dma_obj.acc_handle,
3551 &initq_info->consumer_index_phys_addr_lo,
3552 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 4);
3553
3554 ddi_put32(cmd->frame_dma_obj.acc_handle,
3555 &initq_info->reply_queue_start_phys_addr_hi, 0);
3556 ddi_put32(cmd->frame_dma_obj.acc_handle,
3557 &initq_info->reply_queue_start_phys_addr_lo,
3558 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 8);
3559
3560 ddi_put8(cmd->frame_dma_obj.acc_handle,
3561 &init_frame->cmd, MFI_CMD_OP_INIT);
3562 ddi_put8(cmd->frame_dma_obj.acc_handle, &init_frame->cmd_status,
3563 MFI_CMD_STATUS_POLL_MODE);
3564 ddi_put16(cmd->frame_dma_obj.acc_handle, &init_frame->flags, 0);
3565 ddi_put32(cmd->frame_dma_obj.acc_handle,
3566 &init_frame->queue_info_new_phys_addr_lo,
3567 cmd->frame_phys_addr + 64);
3568 ddi_put32(cmd->frame_dma_obj.acc_handle,
3569 &init_frame->queue_info_new_phys_addr_hi, 0);
3570
3571
3572 /* fill driver version information */
3573 fill_up_drv_ver(&drv_ver_info);
3574
3575 /* allocate the driver version data transfer buffer */
3576 instance->drv_ver_dma_obj.size = sizeof (drv_ver_info.drv_ver);
3577 instance->drv_ver_dma_obj.dma_attr = mrsas_generic_dma_attr;
3578 instance->drv_ver_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
3579 instance->drv_ver_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
3580 instance->drv_ver_dma_obj.dma_attr.dma_attr_sgllen = 1;
3581 instance->drv_ver_dma_obj.dma_attr.dma_attr_align = 1;
3582
3583 if (mrsas_alloc_dma_obj(instance, &instance->drv_ver_dma_obj,
3584 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
3585 con_log(CL_ANN, (CE_WARN,
3586 "init_mfi : Could not allocate driver version buffer."));
3587 return (DDI_FAILURE);
3588 }
3589 /* copy driver version to dma buffer */
3590 (void) memset(instance->drv_ver_dma_obj.buffer, 0,
3591 sizeof (drv_ver_info.drv_ver));
3592 ddi_rep_put8(cmd->frame_dma_obj.acc_handle,
3593 (uint8_t *)drv_ver_info.drv_ver,
3594 (uint8_t *)instance->drv_ver_dma_obj.buffer,
3595 sizeof (drv_ver_info.drv_ver), DDI_DEV_AUTOINCR);
3596
3597
3598 /* copy driver version physical address to init frame */
3599 ddi_put64(cmd->frame_dma_obj.acc_handle, &init_frame->driverversion,
3600 instance->drv_ver_dma_obj.dma_cookie[0].dmac_address);
3601
3602 ddi_put32(cmd->frame_dma_obj.acc_handle, &init_frame->data_xfer_len,
3603 sizeof (struct mrsas_init_queue_info));
3604
3605 cmd->frame_count = 1;
3606
3607 *cmd_ptr = cmd;
3608
3609 return (DDI_SUCCESS);
3610 }
3611
3612
3613 /*
3614 * mrsas_init_adapter_ppc - Initialize MFI interface adapter.
3615 */
3616 int
3617 mrsas_init_adapter_ppc(struct mrsas_instance *instance)
3618 {
3619 struct mrsas_cmd *cmd;
3620
3621 /*
3622 * allocate memory for mfi adapter(cmd pool, individual commands, mfi
3623 * frames etc
3624 */
3625 if (alloc_space_for_mfi(instance) != DDI_SUCCESS) {
3626 con_log(CL_ANN, (CE_NOTE,
3627 "Error, failed to allocate memory for MFI adapter"));
3628 return (DDI_FAILURE);
3629 }
3630
3631 /* Build INIT command */
3632 cmd = get_mfi_pkt(instance);
3633
3634 if (mrsas_build_init_cmd(instance, &cmd) != DDI_SUCCESS) {
3635 con_log(CL_ANN,
3636 (CE_NOTE, "Error, failed to build INIT command"));
3637
3638 goto fail_undo_alloc_mfi_space;
3639 }
3640
3641 /*
3642 * Disable interrupt before sending init frame ( see linux driver code)
3643 * send INIT MFI frame in polled mode
3644 */
3645 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3646 con_log(CL_ANN, (CE_WARN, "failed to init firmware"));
3647 goto fail_fw_init;
3648 }
3649
3650 if (mrsas_common_check(instance, cmd) != DDI_SUCCESS)
3651 goto fail_fw_init;
3652 return_mfi_pkt(instance, cmd);
3653
3654 if (ctio_enable &&
3655 (instance->func_ptr->read_fw_status_reg(instance) & 0x04000000)) {
3656 con_log(CL_ANN, (CE_NOTE, "mr_sas: IEEE SGL's supported"));
3657 instance->flag_ieee = 1;
3658 } else {
3659 instance->flag_ieee = 0;
3660 }
3661
3662 instance->unroll.alloc_space_mfi = 1;
3663 instance->unroll.verBuff = 1;
3664
3665 return (DDI_SUCCESS);
3666
3667
3668 fail_fw_init:
3669 (void) mrsas_free_dma_obj(instance, instance->drv_ver_dma_obj);
3670
3671 fail_undo_alloc_mfi_space:
3672 return_mfi_pkt(instance, cmd);
3673 free_space_for_mfi(instance);
3674
3675 return (DDI_FAILURE);
3676
3677 }
3678
3679 /*
3680 * mrsas_init_adapter - Initialize adapter.
3681 */
3682 int
3683 mrsas_init_adapter(struct mrsas_instance *instance)
3684 {
3685 struct mrsas_ctrl_info ctrl_info;
3686
3687
3688 /* we expect the FW state to be READY */
3689 if (mfi_state_transition_to_ready(instance)) {
3690 con_log(CL_ANN, (CE_WARN, "mr_sas: F/W is not ready"));
3691 return (DDI_FAILURE);
3692 }
3693
3694 /* get various operational parameters from status register */
3695 instance->max_num_sge =
3696 (instance->func_ptr->read_fw_status_reg(instance) &
3697 0xFF0000) >> 0x10;
3698 instance->max_num_sge =
3699 (instance->max_num_sge > MRSAS_MAX_SGE_CNT) ?
3700 MRSAS_MAX_SGE_CNT : instance->max_num_sge;
3701
3702 /*
3703 * Reduce the max supported cmds by 1. This is to ensure that the
3704 * reply_q_sz (1 more than the max cmd that driver may send)
3705 * does not exceed max cmds that the FW can support
3706 */
3707 instance->max_fw_cmds =
3708 instance->func_ptr->read_fw_status_reg(instance) & 0xFFFF;
3709 instance->max_fw_cmds = instance->max_fw_cmds - 1;
3710
3711
3712
3713 /* Initialize adapter */
3714 if (instance->func_ptr->init_adapter(instance) != DDI_SUCCESS) {
3715 con_log(CL_ANN,
3716 (CE_WARN, "mr_sas: could not initialize adapter"));
3717 return (DDI_FAILURE);
3718 }
3719
3720 /* gather misc FW related information */
3721 instance->disable_online_ctrl_reset = 0;
3722
3723 if (!get_ctrl_info(instance, &ctrl_info)) {
3724 instance->max_sectors_per_req = ctrl_info.max_request_size;
3725 con_log(CL_ANN1, (CE_NOTE,
3726 "product name %s ld present %d",
3727 ctrl_info.product_name, ctrl_info.ld_present_count));
3728 } else {
3729 instance->max_sectors_per_req = instance->max_num_sge *
3730 PAGESIZE / 512;
3731 }
3732
3733 if (ctrl_info.properties.on_off_properties & DISABLE_OCR_PROP_FLAG) {
3734 instance->disable_online_ctrl_reset = 1;
3735 con_log(CL_ANN1,
3736 (CE_NOTE, "Disable online control Flag is set\n"));
3737 } else {
3738 con_log(CL_ANN1,
3739 (CE_NOTE, "Disable online control Flag is not set\n"));
3740 }
3741
3742 return (DDI_SUCCESS);
3743
3744 }
3745
3746
3747
3748 static int
3749 mrsas_issue_init_mfi(struct mrsas_instance *instance)
3750 {
3751 struct mrsas_cmd *cmd;
3752 struct mrsas_init_frame *init_frame;
3753 struct mrsas_init_queue_info *initq_info;
3754
3755 /*
3756 * Prepare a init frame. Note the init frame points to queue info
3757 * structure. Each frame has SGL allocated after first 64 bytes. For
3758 * this frame - since we don't need any SGL - we use SGL's space as
3759 * queue info structure
3760 */
3761 con_log(CL_ANN1, (CE_NOTE,
3762 "mrsas_issue_init_mfi: entry\n"));
3763 cmd = get_mfi_app_pkt(instance);
3764
3765 if (!cmd) {
3766 con_log(CL_ANN1, (CE_WARN,
3767 "mrsas_issue_init_mfi: get_pkt failed\n"));
3768 return (DDI_FAILURE);
3769 }
3770
3771 /* Clear the frame buffer and assign back the context id */
3772 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3773 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3774 cmd->index);
3775
3776 init_frame = (struct mrsas_init_frame *)cmd->frame;
3777 initq_info = (struct mrsas_init_queue_info *)
3778 ((unsigned long)init_frame + 64);
3779
3780 (void) memset(init_frame, 0, MRMFI_FRAME_SIZE);
3781 (void) memset(initq_info, 0, sizeof (struct mrsas_init_queue_info));
3782
3783 ddi_put32(cmd->frame_dma_obj.acc_handle, &initq_info->init_flags, 0);
3784
3785 ddi_put32(cmd->frame_dma_obj.acc_handle,
3786 &initq_info->reply_queue_entries, instance->max_fw_cmds + 1);
3787 ddi_put32(cmd->frame_dma_obj.acc_handle,
3788 &initq_info->producer_index_phys_addr_hi, 0);
3789 ddi_put32(cmd->frame_dma_obj.acc_handle,
3790 &initq_info->producer_index_phys_addr_lo,
3791 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address);
3792 ddi_put32(cmd->frame_dma_obj.acc_handle,
3793 &initq_info->consumer_index_phys_addr_hi, 0);
3794 ddi_put32(cmd->frame_dma_obj.acc_handle,
3795 &initq_info->consumer_index_phys_addr_lo,
3796 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 4);
3797
3798 ddi_put32(cmd->frame_dma_obj.acc_handle,
3799 &initq_info->reply_queue_start_phys_addr_hi, 0);
3800 ddi_put32(cmd->frame_dma_obj.acc_handle,
3801 &initq_info->reply_queue_start_phys_addr_lo,
3802 instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 8);
3803
3804 ddi_put8(cmd->frame_dma_obj.acc_handle,
3805 &init_frame->cmd, MFI_CMD_OP_INIT);
3806 ddi_put8(cmd->frame_dma_obj.acc_handle, &init_frame->cmd_status,
3807 MFI_CMD_STATUS_POLL_MODE);
3808 ddi_put16(cmd->frame_dma_obj.acc_handle, &init_frame->flags, 0);
3809 ddi_put32(cmd->frame_dma_obj.acc_handle,
3810 &init_frame->queue_info_new_phys_addr_lo,
3811 cmd->frame_phys_addr + 64);
3812 ddi_put32(cmd->frame_dma_obj.acc_handle,
3813 &init_frame->queue_info_new_phys_addr_hi, 0);
3814
3815 ddi_put32(cmd->frame_dma_obj.acc_handle, &init_frame->data_xfer_len,
3816 sizeof (struct mrsas_init_queue_info));
3817
3818 cmd->frame_count = 1;
3819
3820 /* issue the init frame in polled mode */
3821 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3822 con_log(CL_ANN1, (CE_WARN,
3823 "mrsas_issue_init_mfi():failed to "
3824 "init firmware"));
3825 return_mfi_app_pkt(instance, cmd);
3826 return (DDI_FAILURE);
3827 }
3828
3829 if (mrsas_common_check(instance, cmd) != DDI_SUCCESS) {
3830 return_mfi_pkt(instance, cmd);
3831 return (DDI_FAILURE);
3832 }
3833
3834 return_mfi_app_pkt(instance, cmd);
3835 con_log(CL_ANN1, (CE_CONT, "mrsas_issue_init_mfi: Done"));
3836
3837 return (DDI_SUCCESS);
3838 }
3839 /*
3840 * mfi_state_transition_to_ready : Move the FW to READY state
3841 *
3842 * @reg_set : MFI register set
3843 */
3844 int
3845 mfi_state_transition_to_ready(struct mrsas_instance *instance)
3846 {
3847 int i;
3848 uint8_t max_wait;
3849 uint32_t fw_ctrl = 0;
3850 uint32_t fw_state;
3851 uint32_t cur_state;
3852 uint32_t cur_abs_reg_val;
3853 uint32_t prev_abs_reg_val;
3854 uint32_t status;
3855
3856 cur_abs_reg_val =
3857 instance->func_ptr->read_fw_status_reg(instance);
3858 fw_state =
3859 cur_abs_reg_val & MFI_STATE_MASK;
3860 con_log(CL_ANN1, (CE_CONT,
3861 "mfi_state_transition_to_ready:FW state = 0x%x", fw_state));
3862
3863 while (fw_state != MFI_STATE_READY) {
3864 con_log(CL_ANN, (CE_CONT,
3865 "mfi_state_transition_to_ready:FW state%x", fw_state));
3866
3867 switch (fw_state) {
3868 case MFI_STATE_FAULT:
3869 con_log(CL_ANN, (CE_NOTE,
3870 "mr_sas: FW in FAULT state!!"));
3871
3872 return (ENODEV);
3873 case MFI_STATE_WAIT_HANDSHAKE:
3874 /* set the CLR bit in IMR0 */
3875 con_log(CL_ANN1, (CE_NOTE,
3876 "mr_sas: FW waiting for HANDSHAKE"));
3877 /*
3878 * PCI_Hot Plug: MFI F/W requires
3879 * (MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG)
3880 * to be set
3881 */
3882 /* WR_IB_MSG_0(MFI_INIT_CLEAR_HANDSHAKE, instance); */
3883 if (!instance->tbolt) {
3884 WR_IB_DOORBELL(MFI_INIT_CLEAR_HANDSHAKE |
3885 MFI_INIT_HOTPLUG, instance);
3886 } else {
3887 WR_RESERVED0_REGISTER(MFI_INIT_CLEAR_HANDSHAKE |
3888 MFI_INIT_HOTPLUG, instance);
3889 }
3890 max_wait = (instance->tbolt == 1) ? 180 : 2;
3891 cur_state = MFI_STATE_WAIT_HANDSHAKE;
3892 break;
3893 case MFI_STATE_BOOT_MESSAGE_PENDING:
3894 /* set the CLR bit in IMR0 */
3895 con_log(CL_ANN1, (CE_NOTE,
3896 "mr_sas: FW state boot message pending"));
3897 /*
3898 * PCI_Hot Plug: MFI F/W requires
3899 * (MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG)
3900 * to be set
3901 */
3902 if (!instance->tbolt) {
3903 WR_IB_DOORBELL(MFI_INIT_HOTPLUG, instance);
3904 } else {
3905 WR_RESERVED0_REGISTER(MFI_INIT_HOTPLUG,
3906 instance);
3907 }
3908 max_wait = (instance->tbolt == 1) ? 180 : 10;
3909 cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
3910 break;
3911 case MFI_STATE_OPERATIONAL:
3912 /* bring it to READY state; assuming max wait 2 secs */
3913 instance->func_ptr->disable_intr(instance);
3914 con_log(CL_ANN1, (CE_NOTE,
3915 "mr_sas: FW in OPERATIONAL state"));
3916 /*
3917 * PCI_Hot Plug: MFI F/W requires
3918 * (MFI_INIT_READY | MFI_INIT_MFIMODE | MFI_INIT_ABORT)
3919 * to be set
3920 */
3921 /* WR_IB_DOORBELL(MFI_INIT_READY, instance); */
3922 if (!instance->tbolt) {
3923 WR_IB_DOORBELL(MFI_RESET_FLAGS, instance);
3924 } else {
3925 WR_RESERVED0_REGISTER(MFI_RESET_FLAGS,
3926 instance);
3927
3928 for (i = 0; i < (10 * 1000); i++) {
3929 status =
3930 RD_RESERVED0_REGISTER(instance);
3931 if (status & 1) {
3932 delay(1 *
3933 drv_usectohz(MILLISEC));
3934 } else {
3935 break;
3936 }
3937 }
3938
3939 }
3940 max_wait = (instance->tbolt == 1) ? 180 : 10;
3941 cur_state = MFI_STATE_OPERATIONAL;
3942 break;
3943 case MFI_STATE_UNDEFINED:
3944 /* this state should not last for more than 2 seconds */
3945 con_log(CL_ANN1, (CE_NOTE, "FW state undefined"));
3946
3947 max_wait = (instance->tbolt == 1) ? 180 : 2;
3948 cur_state = MFI_STATE_UNDEFINED;
3949 break;
3950 case MFI_STATE_BB_INIT:
3951 max_wait = (instance->tbolt == 1) ? 180 : 2;
3952 cur_state = MFI_STATE_BB_INIT;
3953 break;
3954 case MFI_STATE_FW_INIT:
3955 max_wait = (instance->tbolt == 1) ? 180 : 2;
3956 cur_state = MFI_STATE_FW_INIT;
3957 break;
3958 case MFI_STATE_FW_INIT_2:
3959 max_wait = 180;
3960 cur_state = MFI_STATE_FW_INIT_2;
3961 break;
3962 case MFI_STATE_DEVICE_SCAN:
3963 max_wait = 180;
3964 cur_state = MFI_STATE_DEVICE_SCAN;
3965 prev_abs_reg_val = cur_abs_reg_val;
3966 con_log(CL_NONE, (CE_NOTE,
3967 "Device scan in progress ...\n"));
3968 break;
3969 case MFI_STATE_FLUSH_CACHE:
3970 max_wait = 180;
3971 cur_state = MFI_STATE_FLUSH_CACHE;
3972 break;
3973 default:
3974 con_log(CL_ANN1, (CE_NOTE,
3975 "mr_sas: Unknown state 0x%x", fw_state));
3976 return (ENODEV);
3977 }
3978
3979 /* the cur_state should not last for more than max_wait secs */
3980 for (i = 0; i < (max_wait * MILLISEC); i++) {
3981 /* fw_state = RD_OB_MSG_0(instance) & MFI_STATE_MASK; */
3982 cur_abs_reg_val =
3983 instance->func_ptr->read_fw_status_reg(instance);
3984 fw_state = cur_abs_reg_val & MFI_STATE_MASK;
3985
3986 if (fw_state == cur_state) {
3987 delay(1 * drv_usectohz(MILLISEC));
3988 } else {
3989 break;
3990 }
3991 }
3992 if (fw_state == MFI_STATE_DEVICE_SCAN) {
3993 if (prev_abs_reg_val != cur_abs_reg_val) {
3994 continue;
3995 }
3996 }
3997
3998 /* return error if fw_state hasn't changed after max_wait */
3999 if (fw_state == cur_state) {
4000 con_log(CL_ANN1, (CE_WARN,
4001 "FW state hasn't changed in %d secs", max_wait));
4002 return (ENODEV);
4003 }
4004 };
4005
4006 if (!instance->tbolt) {
4007 fw_ctrl = RD_IB_DOORBELL(instance);
4008 con_log(CL_ANN1, (CE_CONT,
4009 "mfi_state_transition_to_ready:FW ctrl = 0x%x", fw_ctrl));
4010
4011 /*
4012 * Write 0xF to the doorbell register to do the following.
4013 * - Abort all outstanding commands (bit 0).
4014 * - Transition from OPERATIONAL to READY state (bit 1).
4015 * - Discard (possible) low MFA posted in 64-bit mode (bit-2).
4016 * - Set to release FW to continue running (i.e. BIOS handshake
4017 * (bit 3).
4018 */
4019 WR_IB_DOORBELL(0xF, instance);
4020 }
4021
4022 if (mrsas_check_acc_handle(instance->regmap_handle) != DDI_SUCCESS) {
4023 return (ENODEV);
4024 }
4025
4026 return (DDI_SUCCESS);
4027 }
4028
4029 /*
4030 * get_seq_num
4031 */
4032 static int
4033 get_seq_num(struct mrsas_instance *instance,
4034 struct mrsas_evt_log_info *eli)
4035 {
4036 int ret = DDI_SUCCESS;
4037
4038 dma_obj_t dcmd_dma_obj;
4039 struct mrsas_cmd *cmd;
4040 struct mrsas_dcmd_frame *dcmd;
4041 struct mrsas_evt_log_info *eli_tmp;
4042 if (instance->tbolt) {
4043 cmd = get_raid_msg_mfi_pkt(instance);
4044 } else {
4045 cmd = get_mfi_pkt(instance);
4046 }
4047
4048 if (!cmd) {
4049 cmn_err(CE_WARN, "mr_sas: failed to get a cmd");
4050 DTRACE_PROBE2(seq_num_mfi_err, uint16_t,
4051 instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
4052 return (ENOMEM);
4053 }
4054
4055 /* Clear the frame buffer and assign back the context id */
4056 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
4057 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
4058 cmd->index);
4059
4060 dcmd = &cmd->frame->dcmd;
4061
4062 /* allocate the data transfer buffer */
4063 dcmd_dma_obj.size = sizeof (struct mrsas_evt_log_info);
4064 dcmd_dma_obj.dma_attr = mrsas_generic_dma_attr;
4065 dcmd_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
4066 dcmd_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
4067 dcmd_dma_obj.dma_attr.dma_attr_sgllen = 1;
4068 dcmd_dma_obj.dma_attr.dma_attr_align = 1;
4069
4070 if (mrsas_alloc_dma_obj(instance, &dcmd_dma_obj,
4071 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
4072 cmn_err(CE_WARN,
4073 "get_seq_num: could not allocate data transfer buffer.");
4074 return (DDI_FAILURE);
4075 }
4076
4077 (void) memset(dcmd_dma_obj.buffer, 0,
4078 sizeof (struct mrsas_evt_log_info));
4079
4080 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
4081
4082 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
4083 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0);
4084 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 1);
4085 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
4086 MFI_FRAME_DIR_READ);
4087 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
4088 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len,
4089 sizeof (struct mrsas_evt_log_info));
4090 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
4091 MR_DCMD_CTRL_EVENT_GET_INFO);
4092 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].length,
4093 sizeof (struct mrsas_evt_log_info));
4094 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].phys_addr,
4095 dcmd_dma_obj.dma_cookie[0].dmac_address);
4096
4097 cmd->sync_cmd = MRSAS_TRUE;
4098 cmd->frame_count = 1;
4099
4100 if (instance->tbolt) {
4101 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
4102 }
4103
4104 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
4105 cmn_err(CE_WARN, "get_seq_num: "
4106 "failed to issue MRSAS_DCMD_CTRL_EVENT_GET_INFO");
4107 ret = DDI_FAILURE;
4108 } else {
4109 eli_tmp = (struct mrsas_evt_log_info *)dcmd_dma_obj.buffer;
4110 eli->newest_seq_num = ddi_get32(cmd->frame_dma_obj.acc_handle,
4111 &eli_tmp->newest_seq_num);
4112 ret = DDI_SUCCESS;
4113 }
4114
4115 if (mrsas_free_dma_obj(instance, dcmd_dma_obj) != DDI_SUCCESS)
4116 ret = DDI_FAILURE;
4117
4118 if (instance->tbolt) {
4119 return_raid_msg_mfi_pkt(instance, cmd);
4120 } else {
4121 return_mfi_pkt(instance, cmd);
4122 }
4123
4124 return (ret);
4125 }
4126
4127 /*
4128 * start_mfi_aen
4129 */
4130 static int
4131 start_mfi_aen(struct mrsas_instance *instance)
4132 {
4133 int ret = 0;
4134
4135 struct mrsas_evt_log_info eli;
4136 union mrsas_evt_class_locale class_locale;
4137
4138 /* get the latest sequence number from FW */
4139 (void) memset(&eli, 0, sizeof (struct mrsas_evt_log_info));
4140
4141 if (get_seq_num(instance, &eli)) {
4142 cmn_err(CE_WARN, "start_mfi_aen: failed to get seq num");
4143 return (-1);
4144 }
4145
4146 /* register AEN with FW for latest sequence number plus 1 */
4147 class_locale.members.reserved = 0;
4148 class_locale.members.locale = LE_16(MR_EVT_LOCALE_ALL);
4149 class_locale.members.class = MR_EVT_CLASS_INFO;
4150 class_locale.word = LE_32(class_locale.word);
4151 ret = register_mfi_aen(instance, eli.newest_seq_num + 1,
4152 class_locale.word);
4153
4154 if (ret) {
4155 cmn_err(CE_WARN, "start_mfi_aen: aen registration failed");
4156 return (-1);
4157 }
4158
4159
4160 return (ret);
4161 }
4162
4163 /*
4164 * flush_cache
4165 */
4166 static void
4167 flush_cache(struct mrsas_instance *instance)
4168 {
4169 struct mrsas_cmd *cmd = NULL;
4170 struct mrsas_dcmd_frame *dcmd;
4171 if (instance->tbolt) {
4172 cmd = get_raid_msg_mfi_pkt(instance);
4173 } else {
4174 cmd = get_mfi_pkt(instance);
4175 }
4176
4177 if (!cmd) {
4178 con_log(CL_ANN1, (CE_WARN,
4179 "flush_cache():Failed to get a cmd for flush_cache"));
4180 DTRACE_PROBE2(flush_cache_err, uint16_t,
4181 instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
4182 return;
4183 }
4184
4185 /* Clear the frame buffer and assign back the context id */
4186 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
4187 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
4188 cmd->index);
4189
4190 dcmd = &cmd->frame->dcmd;
4191
4192 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
4193
4194 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
4195 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0x0);
4196 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 0);
4197 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
4198 MFI_FRAME_DIR_NONE);
4199 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
4200 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len, 0);
4201 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
4202 MR_DCMD_CTRL_CACHE_FLUSH);
4203 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->mbox.b[0],
4204 MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE);
4205
4206 cmd->frame_count = 1;
4207
4208 if (instance->tbolt) {
4209 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
4210 }
4211
4212 if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
4213 con_log(CL_ANN1, (CE_WARN,
4214 "flush_cache: failed to issue MFI_DCMD_CTRL_CACHE_FLUSH"));
4215 }
4216 con_log(CL_ANN1, (CE_CONT, "flush_cache done"));
4217 if (instance->tbolt) {
4218 return_raid_msg_mfi_pkt(instance, cmd);
4219 } else {
4220 return_mfi_pkt(instance, cmd);
4221 }
4222
4223 }
4224
4225 /*
4226 * service_mfi_aen- Completes an AEN command
4227 * @instance: Adapter soft state
4228 * @cmd: Command to be completed
4229 *
4230 */
4231 void
4232 service_mfi_aen(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
4233 {
4234 uint32_t seq_num;
4235 struct mrsas_evt_detail *evt_detail =
4236 (struct mrsas_evt_detail *)instance->mfi_evt_detail_obj.buffer;
4237 int rval = 0;
4238 int tgt = 0;
4239 uint8_t dtype;
4240 #ifdef PDSUPPORT
4241 mrsas_pd_address_t *pd_addr;
4242 #endif
4243 ddi_acc_handle_t acc_handle;
4244
4245 con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
4246
4247 acc_handle = cmd->frame_dma_obj.acc_handle;
4248 cmd->cmd_status = ddi_get8(acc_handle, &cmd->frame->io.cmd_status);
4249 if (cmd->cmd_status == ENODATA) {
4250 cmd->cmd_status = 0;
4251 }
4252
4253 /*
4254 * log the MFI AEN event to the sysevent queue so that
4255 * application will get noticed
4256 */
4257 if (ddi_log_sysevent(instance->dip, DDI_VENDOR_LSI, "LSIMEGA", "SAS",
4258 NULL, NULL, DDI_NOSLEEP) != DDI_SUCCESS) {
4259 int instance_no = ddi_get_instance(instance->dip);
4260 con_log(CL_ANN, (CE_WARN,
4261 "mr_sas%d: Failed to log AEN event", instance_no));
4262 }
4263 /*
4264 * Check for any ld devices that has changed state. i.e. online
4265 * or offline.
4266 */
4267 con_log(CL_ANN1, (CE_CONT,
4268 "AEN: code = %x class = %x locale = %x args = %x",
4269 ddi_get32(acc_handle, &evt_detail->code),
4270 evt_detail->cl.members.class,
4271 ddi_get16(acc_handle, &evt_detail->cl.members.locale),
4272 ddi_get8(acc_handle, &evt_detail->arg_type)));
4273
4274 switch (ddi_get32(acc_handle, &evt_detail->code)) {
4275 case MR_EVT_CFG_CLEARED: {
4276 for (tgt = 0; tgt < MRDRV_MAX_LD; tgt++) {
4277 if (instance->mr_ld_list[tgt].dip != NULL) {
4278 mutex_enter(&instance->config_dev_mtx);
4279 instance->mr_ld_list[tgt].flag =
4280 (uint8_t)~MRDRV_TGT_VALID;
4281 mutex_exit(&instance->config_dev_mtx);
4282 rval = mrsas_service_evt(instance, tgt, 0,
4283 MRSAS_EVT_UNCONFIG_TGT, NULL);
4284 con_log(CL_ANN1, (CE_WARN,
4285 "mr_sas: CFG CLEARED AEN rval = %d "
4286 "tgt id = %d", rval, tgt));
4287 }
4288 }
4289 break;
4290 }
4291
4292 case MR_EVT_LD_DELETED: {
4293 tgt = ddi_get16(acc_handle, &evt_detail->args.ld.target_id);
4294 mutex_enter(&instance->config_dev_mtx);
4295 instance->mr_ld_list[tgt].flag = (uint8_t)~MRDRV_TGT_VALID;
4296 mutex_exit(&instance->config_dev_mtx);
4297 rval = mrsas_service_evt(instance,
4298 ddi_get16(acc_handle, &evt_detail->args.ld.target_id), 0,
4299 MRSAS_EVT_UNCONFIG_TGT, NULL);
4300 con_log(CL_ANN1, (CE_WARN, "mr_sas: LD DELETED AEN rval = %d "
4301 "tgt id = %d index = %d", rval,
4302 ddi_get16(acc_handle, &evt_detail->args.ld.target_id),
4303 ddi_get8(acc_handle, &evt_detail->args.ld.ld_index)));
4304 break;
4305 } /* End of MR_EVT_LD_DELETED */
4306
4307 case MR_EVT_LD_CREATED: {
4308 rval = mrsas_service_evt(instance,
4309 ddi_get16(acc_handle, &evt_detail->args.ld.target_id), 0,
4310 MRSAS_EVT_CONFIG_TGT, NULL);
4311 con_log(CL_ANN1, (CE_WARN, "mr_sas: LD CREATED AEN rval = %d "
4312 "tgt id = %d index = %d", rval,
4313 ddi_get16(acc_handle, &evt_detail->args.ld.target_id),
4314 ddi_get8(acc_handle, &evt_detail->args.ld.ld_index)));
4315 break;
4316 } /* End of MR_EVT_LD_CREATED */
4317
4318 #ifdef PDSUPPORT
4319 case MR_EVT_PD_REMOVED_EXT: {
4320 if (instance->tbolt) {
4321 pd_addr = &evt_detail->args.pd_addr;
4322 dtype = pd_addr->scsi_dev_type;
4323 con_log(CL_DLEVEL1, (CE_NOTE,
4324 " MR_EVT_PD_REMOVED_EXT: dtype = %x,"
4325 " arg_type = %d ", dtype, evt_detail->arg_type));
4326 tgt = ddi_get16(acc_handle,
4327 &evt_detail->args.pd.device_id);
4328 mutex_enter(&instance->config_dev_mtx);
4329 instance->mr_tbolt_pd_list[tgt].flag =
4330 (uint8_t)~MRDRV_TGT_VALID;
4331 mutex_exit(&instance->config_dev_mtx);
4332 rval = mrsas_service_evt(instance, ddi_get16(
4333 acc_handle, &evt_detail->args.pd.device_id),
4334 1, MRSAS_EVT_UNCONFIG_TGT, NULL);
4335 con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_REMOVED:"
4336 "rval = %d tgt id = %d ", rval,
4337 ddi_get16(acc_handle,
4338 &evt_detail->args.pd.device_id)));
4339 }
4340 break;
4341 } /* End of MR_EVT_PD_REMOVED_EXT */
4342
4343 case MR_EVT_PD_INSERTED_EXT: {
4344 if (instance->tbolt) {
4345 rval = mrsas_service_evt(instance,
4346 ddi_get16(acc_handle,
4347 &evt_detail->args.pd.device_id),
4348 1, MRSAS_EVT_CONFIG_TGT, NULL);
4349 con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_INSERTEDi_EXT:"
4350 "rval = %d tgt id = %d ", rval,
4351 ddi_get16(acc_handle,
4352 &evt_detail->args.pd.device_id)));
4353 }
4354 break;
4355 } /* End of MR_EVT_PD_INSERTED_EXT */
4356
4357 case MR_EVT_PD_STATE_CHANGE: {
4358 if (instance->tbolt) {
4359 tgt = ddi_get16(acc_handle,
4360 &evt_detail->args.pd.device_id);
4361 if ((evt_detail->args.pd_state.prevState ==
4362 PD_SYSTEM) &&
4363 (evt_detail->args.pd_state.newState != PD_SYSTEM)) {
4364 mutex_enter(&instance->config_dev_mtx);
4365 instance->mr_tbolt_pd_list[tgt].flag =
4366 (uint8_t)~MRDRV_TGT_VALID;
4367 mutex_exit(&instance->config_dev_mtx);
4368 rval = mrsas_service_evt(instance,
4369 ddi_get16(acc_handle,
4370 &evt_detail->args.pd.device_id),
4371 1, MRSAS_EVT_UNCONFIG_TGT, NULL);
4372 con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_REMOVED:"
4373 "rval = %d tgt id = %d ", rval,
4374 ddi_get16(acc_handle,
4375 &evt_detail->args.pd.device_id)));
4376 break;
4377 }
4378 if ((evt_detail->args.pd_state.prevState
4379 == UNCONFIGURED_GOOD) &&
4380 (evt_detail->args.pd_state.newState == PD_SYSTEM)) {
4381 rval = mrsas_service_evt(instance,
4382 ddi_get16(acc_handle,
4383 &evt_detail->args.pd.device_id),
4384 1, MRSAS_EVT_CONFIG_TGT, NULL);
4385 con_log(CL_ANN1, (CE_WARN,
4386 "mr_sas: PD_INSERTED: rval = %d "
4387 " tgt id = %d ", rval,
4388 ddi_get16(acc_handle,
4389 &evt_detail->args.pd.device_id)));
4390 break;
4391 }
4392 }
4393 break;
4394 }
4395 #endif
4396
4397 } /* End of Main Switch */
4398
4399 /* get copy of seq_num and class/locale for re-registration */
4400 seq_num = ddi_get32(acc_handle, &evt_detail->seq_num);
4401 seq_num++;
4402 (void) memset(instance->mfi_evt_detail_obj.buffer, 0,
4403 sizeof (struct mrsas_evt_detail));
4404
4405 ddi_put8(acc_handle, &cmd->frame->dcmd.cmd_status, 0x0);
4406 ddi_put32(acc_handle, &cmd->frame->dcmd.mbox.w[0], seq_num);
4407
4408 instance->aen_seq_num = seq_num;
4409
4410 cmd->frame_count = 1;
4411
4412 cmd->retry_count_for_ocr = 0;
4413 cmd->drv_pkt_time = 0;
4414
4415 /* Issue the aen registration frame */
4416 instance->func_ptr->issue_cmd(cmd, instance);
4417 }
4418
4419 /*
4420 * complete_cmd_in_sync_mode - Completes an internal command
4421 * @instance: Adapter soft state
4422 * @cmd: Command to be completed
4423 *
4424 * The issue_cmd_in_sync_mode() function waits for a command to complete
4425 * after it issues a command. This function wakes up that waiting routine by
4426 * calling wake_up() on the wait queue.
4427 */
4428 static void
4429 complete_cmd_in_sync_mode(struct mrsas_instance *instance,
4430 struct mrsas_cmd *cmd)
4431 {
4432 cmd->cmd_status = ddi_get8(cmd->frame_dma_obj.acc_handle,
4433 &cmd->frame->io.cmd_status);
4434
4435 cmd->sync_cmd = MRSAS_FALSE;
4436
4437 con_log(CL_ANN1, (CE_NOTE, "complete_cmd_in_sync_mode called %p \n",
4438 (void *)cmd));
4439
4440 mutex_enter(&instance->int_cmd_mtx);
4441 if (cmd->cmd_status == ENODATA) {
4442 cmd->cmd_status = 0;
4443 }
4444 cv_broadcast(&instance->int_cmd_cv);
4445 mutex_exit(&instance->int_cmd_mtx);
4446
4447 }
4448
4449 /*
4450 * Call this function inside mrsas_softintr.
4451 * mrsas_initiate_ocr_if_fw_is_faulty - Initiates OCR if FW status is faulty
4452 * @instance: Adapter soft state
4453 */
4454
4455 static uint32_t
4456 mrsas_initiate_ocr_if_fw_is_faulty(struct mrsas_instance *instance)
4457 {
4458 uint32_t cur_abs_reg_val;
4459 uint32_t fw_state;
4460
4461 cur_abs_reg_val = instance->func_ptr->read_fw_status_reg(instance);
4462 fw_state = cur_abs_reg_val & MFI_STATE_MASK;
4463 if (fw_state == MFI_STATE_FAULT) {
4464 if (instance->disable_online_ctrl_reset == 1) {
4465 cmn_err(CE_WARN,
4466 "mrsas_initiate_ocr_if_fw_is_faulty: "
4467 "FW in Fault state, detected in ISR: "
4468 "FW doesn't support ocr ");
4469
4470 return (ADAPTER_RESET_NOT_REQUIRED);
4471 } else {
4472 con_log(CL_ANN, (CE_NOTE,
4473 "mrsas_initiate_ocr_if_fw_is_faulty: FW in Fault "
4474 "state, detected in ISR: FW supports ocr "));
4475
4476 return (ADAPTER_RESET_REQUIRED);
4477 }
4478 }
4479
4480 return (ADAPTER_RESET_NOT_REQUIRED);
4481 }
4482
4483 /*
4484 * mrsas_softintr - The Software ISR
4485 * @param arg : HBA soft state
4486 *
4487 * called from high-level interrupt if hi-level interrupt are not there,
4488 * otherwise triggered as a soft interrupt
4489 */
4490 static uint_t
4491 mrsas_softintr(struct mrsas_instance *instance)
4492 {
4493 struct scsi_pkt *pkt;
4494 struct scsa_cmd *acmd;
4495 struct mrsas_cmd *cmd;
4496 struct mlist_head *pos, *next;
4497 mlist_t process_list;
4498 struct mrsas_header *hdr;
4499 struct scsi_arq_status *arqstat;
4500
4501 con_log(CL_ANN1, (CE_NOTE, "mrsas_softintr() called."));
4502
4503 ASSERT(instance);
4504
4505 mutex_enter(&instance->completed_pool_mtx);
4506
4507 if (mlist_empty(&instance->completed_pool_list)) {
4508 mutex_exit(&instance->completed_pool_mtx);
4509 return (DDI_INTR_CLAIMED);
4510 }
4511
4512 instance->softint_running = 1;
4513
4514 INIT_LIST_HEAD(&process_list);
4515 mlist_splice(&instance->completed_pool_list, &process_list);
4516 INIT_LIST_HEAD(&instance->completed_pool_list);
4517
4518 mutex_exit(&instance->completed_pool_mtx);
4519
4520 /* perform all callbacks first, before releasing the SCBs */
4521 mlist_for_each_safe(pos, next, &process_list) {
4522 cmd = mlist_entry(pos, struct mrsas_cmd, list);
4523
4524 /* syncronize the Cmd frame for the controller */
4525 (void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle,
4526 0, 0, DDI_DMA_SYNC_FORCPU);
4527
4528 if (mrsas_check_dma_handle(cmd->frame_dma_obj.dma_handle) !=
4529 DDI_SUCCESS) {
4530 mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
4531 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4532 con_log(CL_ANN1, (CE_WARN,
4533 "mrsas_softintr: "
4534 "FMA check reports DMA handle failure"));
4535 return (DDI_INTR_CLAIMED);
4536 }
4537
4538 hdr = &cmd->frame->hdr;
4539
4540 /* remove the internal command from the process list */
4541 mlist_del_init(&cmd->list);
4542
4543 switch (ddi_get8(cmd->frame_dma_obj.acc_handle, &hdr->cmd)) {
4544 case MFI_CMD_OP_PD_SCSI:
4545 case MFI_CMD_OP_LD_SCSI:
4546 case MFI_CMD_OP_LD_READ:
4547 case MFI_CMD_OP_LD_WRITE:
4548 /*
4549 * MFI_CMD_OP_PD_SCSI and MFI_CMD_OP_LD_SCSI
4550 * could have been issued either through an
4551 * IO path or an IOCTL path. If it was via IOCTL,
4552 * we will send it to internal completion.
4553 */
4554 if (cmd->sync_cmd == MRSAS_TRUE) {
4555 complete_cmd_in_sync_mode(instance, cmd);
4556 break;
4557 }
4558
4559 /* regular commands */
4560 acmd = cmd->cmd;
4561 pkt = CMD2PKT(acmd);
4562
4563 if (acmd->cmd_flags & CFLAG_DMAVALID) {
4564 if (acmd->cmd_flags & CFLAG_CONSISTENT) {
4565 (void) ddi_dma_sync(acmd->cmd_dmahandle,
4566 acmd->cmd_dma_offset,
4567 acmd->cmd_dma_len,
4568 DDI_DMA_SYNC_FORCPU);
4569 }
4570 }
4571
4572 pkt->pkt_reason = CMD_CMPLT;
4573 pkt->pkt_statistics = 0;
4574 pkt->pkt_state = STATE_GOT_BUS
4575 | STATE_GOT_TARGET | STATE_SENT_CMD
4576 | STATE_XFERRED_DATA | STATE_GOT_STATUS;
4577
4578 con_log(CL_ANN, (CE_CONT,
4579 "CDB[0] = %x completed for %s: size %lx context %x",
4580 pkt->pkt_cdbp[0], ((acmd->islogical) ? "LD" : "PD"),
4581 acmd->cmd_dmacount, hdr->context));
4582 DTRACE_PROBE3(softintr_cdb, uint8_t, pkt->pkt_cdbp[0],
4583 uint_t, acmd->cmd_cdblen, ulong_t,
4584 acmd->cmd_dmacount);
4585
4586 if (pkt->pkt_cdbp[0] == SCMD_INQUIRY) {
4587 struct scsi_inquiry *inq;
4588
4589 if (acmd->cmd_dmacount != 0) {
4590 bp_mapin(acmd->cmd_buf);
4591 inq = (struct scsi_inquiry *)
4592 acmd->cmd_buf->b_un.b_addr;
4593
4594 /* don't expose physical drives to OS */
4595 if (acmd->islogical &&
4596 (hdr->cmd_status == MFI_STAT_OK)) {
4597 display_scsi_inquiry(
4598 (caddr_t)inq);
4599 } else if ((hdr->cmd_status ==
4600 MFI_STAT_OK) && inq->inq_dtype ==
4601 DTYPE_DIRECT) {
4602
4603 display_scsi_inquiry(
4604 (caddr_t)inq);
4605
4606 /* for physical disk */
4607 hdr->cmd_status =
4608 MFI_STAT_DEVICE_NOT_FOUND;
4609 }
4610 }
4611 }
4612
4613 DTRACE_PROBE2(softintr_done, uint8_t, hdr->cmd,
4614 uint8_t, hdr->cmd_status);
4615
4616 switch (hdr->cmd_status) {
4617 case MFI_STAT_OK:
4618 pkt->pkt_scbp[0] = STATUS_GOOD;
4619 break;
4620 case MFI_STAT_LD_CC_IN_PROGRESS:
4621 case MFI_STAT_LD_RECON_IN_PROGRESS:
4622 pkt->pkt_scbp[0] = STATUS_GOOD;
4623 break;
4624 case MFI_STAT_LD_INIT_IN_PROGRESS:
4625 con_log(CL_ANN,
4626 (CE_WARN, "Initialization in Progress"));
4627 pkt->pkt_reason = CMD_TRAN_ERR;
4628
4629 break;
4630 case MFI_STAT_SCSI_DONE_WITH_ERROR:
4631 con_log(CL_ANN, (CE_CONT, "scsi_done error"));
4632
4633 pkt->pkt_reason = CMD_CMPLT;
4634 ((struct scsi_status *)
4635 pkt->pkt_scbp)->sts_chk = 1;
4636
4637 if (pkt->pkt_cdbp[0] == SCMD_TEST_UNIT_READY) {
4638 con_log(CL_ANN,
4639 (CE_WARN, "TEST_UNIT_READY fail"));
4640 } else {
4641 pkt->pkt_state |= STATE_ARQ_DONE;
4642 arqstat = (void *)(pkt->pkt_scbp);
4643 arqstat->sts_rqpkt_reason = CMD_CMPLT;
4644 arqstat->sts_rqpkt_resid = 0;
4645 arqstat->sts_rqpkt_state |=
4646 STATE_GOT_BUS | STATE_GOT_TARGET
4647 | STATE_SENT_CMD
4648 | STATE_XFERRED_DATA;
4649 *(uint8_t *)&arqstat->sts_rqpkt_status =
4650 STATUS_GOOD;
4651 ddi_rep_get8(
4652 cmd->frame_dma_obj.acc_handle,
4653 (uint8_t *)
4654 &(arqstat->sts_sensedata),
4655 cmd->sense,
4656 sizeof (struct scsi_extended_sense),
4657 DDI_DEV_AUTOINCR);
4658 }
4659 break;
4660 case MFI_STAT_LD_OFFLINE:
4661 case MFI_STAT_DEVICE_NOT_FOUND:
4662 con_log(CL_ANN, (CE_CONT,
4663 "mrsas_softintr:device not found error"));
4664 pkt->pkt_reason = CMD_DEV_GONE;
4665 pkt->pkt_statistics = STAT_DISCON;
4666 break;
4667 case MFI_STAT_LD_LBA_OUT_OF_RANGE:
4668 pkt->pkt_state |= STATE_ARQ_DONE;
4669 pkt->pkt_reason = CMD_CMPLT;
4670 ((struct scsi_status *)
4671 pkt->pkt_scbp)->sts_chk = 1;
4672
4673 arqstat = (void *)(pkt->pkt_scbp);
4674 arqstat->sts_rqpkt_reason = CMD_CMPLT;
4675 arqstat->sts_rqpkt_resid = 0;
4676 arqstat->sts_rqpkt_state |= STATE_GOT_BUS
4677 | STATE_GOT_TARGET | STATE_SENT_CMD
4678 | STATE_XFERRED_DATA;
4679 *(uint8_t *)&arqstat->sts_rqpkt_status =
4680 STATUS_GOOD;
4681
4682 arqstat->sts_sensedata.es_valid = 1;
4683 arqstat->sts_sensedata.es_key =
4684 KEY_ILLEGAL_REQUEST;
4685 arqstat->sts_sensedata.es_class =
4686 CLASS_EXTENDED_SENSE;
4687
4688 /*
4689 * LOGICAL BLOCK ADDRESS OUT OF RANGE:
4690 * ASC: 0x21h; ASCQ: 0x00h;
4691 */
4692 arqstat->sts_sensedata.es_add_code = 0x21;
4693 arqstat->sts_sensedata.es_qual_code = 0x00;
4694
4695 break;
4696
4697 default:
4698 con_log(CL_ANN, (CE_CONT, "Unknown status!"));
4699 pkt->pkt_reason = CMD_TRAN_ERR;
4700
4701 break;
4702 }
4703
4704 atomic_add_16(&instance->fw_outstanding, (-1));
4705
4706 (void) mrsas_common_check(instance, cmd);
4707
4708 if (acmd->cmd_dmahandle) {
4709 if (mrsas_check_dma_handle(
4710 acmd->cmd_dmahandle) != DDI_SUCCESS) {
4711 ddi_fm_service_impact(instance->dip,
4712 DDI_SERVICE_UNAFFECTED);
4713 pkt->pkt_reason = CMD_TRAN_ERR;
4714 pkt->pkt_statistics = 0;
4715 }
4716 }
4717
4718 /* Call the callback routine */
4719 if (((pkt->pkt_flags & FLAG_NOINTR) == 0) &&
4720 pkt->pkt_comp) {
4721
4722 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_softintr: "
4723 "posting to scsa cmd %p index %x pkt %p "
4724 "time %llx", (void *)cmd, cmd->index,
4725 (void *)pkt, gethrtime()));
4726 (*pkt->pkt_comp)(pkt);
4727
4728 }
4729
4730 return_mfi_pkt(instance, cmd);
4731 break;
4732
4733 case MFI_CMD_OP_SMP:
4734 case MFI_CMD_OP_STP:
4735 complete_cmd_in_sync_mode(instance, cmd);
4736 break;
4737
4738 case MFI_CMD_OP_DCMD:
4739 /* see if got an event notification */
4740 if (ddi_get32(cmd->frame_dma_obj.acc_handle,
4741 &cmd->frame->dcmd.opcode) ==
4742 MR_DCMD_CTRL_EVENT_WAIT) {
4743 if ((instance->aen_cmd == cmd) &&
4744 (instance->aen_cmd->abort_aen)) {
4745 con_log(CL_ANN, (CE_WARN,
4746 "mrsas_softintr: "
4747 "aborted_aen returned"));
4748 } else {
4749 atomic_add_16(&instance->fw_outstanding,
4750 (-1));
4751 service_mfi_aen(instance, cmd);
4752 }
4753 } else {
4754 complete_cmd_in_sync_mode(instance, cmd);
4755 }
4756
4757 break;
4758
4759 case MFI_CMD_OP_ABORT:
4760 con_log(CL_ANN, (CE_NOTE, "MFI_CMD_OP_ABORT complete"));
4761 /*
4762 * MFI_CMD_OP_ABORT successfully completed
4763 * in the synchronous mode
4764 */
4765 complete_cmd_in_sync_mode(instance, cmd);
4766 break;
4767
4768 default:
4769 mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
4770 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4771
4772 if (cmd->pkt != NULL) {
4773 pkt = cmd->pkt;
4774 if (((pkt->pkt_flags & FLAG_NOINTR) == 0) &&
4775 pkt->pkt_comp) {
4776
4777 con_log(CL_ANN1, (CE_CONT, "posting to "
4778 "scsa cmd %p index %x pkt %p"
4779 "time %llx, default ", (void *)cmd,
4780 cmd->index, (void *)pkt,
4781 gethrtime()));
4782
4783 (*pkt->pkt_comp)(pkt);
4784
4785 }
4786 }
4787 con_log(CL_ANN, (CE_WARN, "Cmd type unknown !"));
4788 break;
4789 }
4790 }
4791
4792 instance->softint_running = 0;
4793
4794 return (DDI_INTR_CLAIMED);
4795 }
4796
4797 /*
4798 * mrsas_alloc_dma_obj
4799 *
4800 * Allocate the memory and other resources for an dma object.
4801 */
4802 int
4803 mrsas_alloc_dma_obj(struct mrsas_instance *instance, dma_obj_t *obj,
4804 uchar_t endian_flags)
4805 {
4806 int i;
4807 size_t alen = 0;
4808 uint_t cookie_cnt;
4809 struct ddi_device_acc_attr tmp_endian_attr;
4810
4811 tmp_endian_attr = endian_attr;
4812 tmp_endian_attr.devacc_attr_endian_flags = endian_flags;
4813 tmp_endian_attr.devacc_attr_access = DDI_DEFAULT_ACC;
4814
4815 i = ddi_dma_alloc_handle(instance->dip, &obj->dma_attr,
4816 DDI_DMA_SLEEP, NULL, &obj->dma_handle);
4817 if (i != DDI_SUCCESS) {
4818
4819 switch (i) {
4820 case DDI_DMA_BADATTR :
4821 con_log(CL_ANN, (CE_WARN,
4822 "Failed ddi_dma_alloc_handle- Bad attribute"));
4823 break;
4824 case DDI_DMA_NORESOURCES :
4825 con_log(CL_ANN, (CE_WARN,
4826 "Failed ddi_dma_alloc_handle- No Resources"));
4827 break;
4828 default :
4829 con_log(CL_ANN, (CE_WARN,
4830 "Failed ddi_dma_alloc_handle: "
4831 "unknown status %d", i));
4832 break;
4833 }
4834
4835 return (-1);
4836 }
4837
4838 if ((ddi_dma_mem_alloc(obj->dma_handle, obj->size, &tmp_endian_attr,
4839 DDI_DMA_RDWR | DDI_DMA_STREAMING, DDI_DMA_SLEEP, NULL,
4840 &obj->buffer, &alen, &obj->acc_handle) != DDI_SUCCESS) ||
4841 alen < obj->size) {
4842
4843 ddi_dma_free_handle(&obj->dma_handle);
4844
4845 con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_mem_alloc"));
4846
4847 return (-1);
4848 }
4849
4850 if (ddi_dma_addr_bind_handle(obj->dma_handle, NULL, obj->buffer,
4851 obj->size, DDI_DMA_RDWR | DDI_DMA_STREAMING, DDI_DMA_SLEEP,
4852 NULL, &obj->dma_cookie[0], &cookie_cnt) != DDI_SUCCESS) {
4853
4854 ddi_dma_mem_free(&obj->acc_handle);
4855 ddi_dma_free_handle(&obj->dma_handle);
4856
4857 con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_addr_bind_handle"));
4858
4859 return (-1);
4860 }
4861
4862 if (mrsas_check_dma_handle(obj->dma_handle) != DDI_SUCCESS) {
4863 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4864 return (-1);
4865 }
4866
4867 if (mrsas_check_acc_handle(obj->acc_handle) != DDI_SUCCESS) {
4868 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4869 return (-1);
4870 }
4871
4872 return (cookie_cnt);
4873 }
4874
4875 /*
4876 * mrsas_free_dma_obj(struct mrsas_instance *, dma_obj_t)
4877 *
4878 * De-allocate the memory and other resources for an dma object, which must
4879 * have been alloated by a previous call to mrsas_alloc_dma_obj()
4880 */
4881 /* ARGSUSED */
4882 int
4883 mrsas_free_dma_obj(struct mrsas_instance *instance, dma_obj_t obj)
4884 {
4885
4886 if ((obj.dma_handle == NULL) || (obj.acc_handle == NULL)) {
4887 return (DDI_SUCCESS);
4888 }
4889
4890 /*
4891 * NOTE: These check-handle functions fail if *_handle == NULL, but
4892 * this function succeeds because of the previous check.
4893 */
4894 if (mrsas_check_dma_handle(obj.dma_handle) != DDI_SUCCESS) {
4895 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
4896 return (DDI_FAILURE);
4897 }
4898
4899 if (mrsas_check_acc_handle(obj.acc_handle) != DDI_SUCCESS) {
4900 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
4901 return (DDI_FAILURE);
4902 }
4903
4904 (void) ddi_dma_unbind_handle(obj.dma_handle);
4905 ddi_dma_mem_free(&obj.acc_handle);
4906 ddi_dma_free_handle(&obj.dma_handle);
4907 obj.acc_handle = NULL;
4908 return (DDI_SUCCESS);
4909 }
4910
4911 /*
4912 * mrsas_dma_alloc(instance_t *, struct scsi_pkt *, struct buf *,
4913 * int, int (*)())
4914 *
4915 * Allocate dma resources for a new scsi command
4916 */
4917 int
4918 mrsas_dma_alloc(struct mrsas_instance *instance, struct scsi_pkt *pkt,
4919 struct buf *bp, int flags, int (*callback)())
4920 {
4921 int dma_flags;
4922 int (*cb)(caddr_t);
4923 int i;
4924
4925 ddi_dma_attr_t tmp_dma_attr = mrsas_generic_dma_attr;
4926 struct scsa_cmd *acmd = PKT2CMD(pkt);
4927
4928 acmd->cmd_buf = bp;
4929
4930 if (bp->b_flags & B_READ) {
4931 acmd->cmd_flags &= ~CFLAG_DMASEND;
4932 dma_flags = DDI_DMA_READ;
4933 } else {
4934 acmd->cmd_flags |= CFLAG_DMASEND;
4935 dma_flags = DDI_DMA_WRITE;
4936 }
4937
4938 if (flags & PKT_CONSISTENT) {
4939 acmd->cmd_flags |= CFLAG_CONSISTENT;
4940 dma_flags |= DDI_DMA_CONSISTENT;
4941 }
4942
4943 if (flags & PKT_DMA_PARTIAL) {
4944 dma_flags |= DDI_DMA_PARTIAL;
4945 }
4946
4947 dma_flags |= DDI_DMA_REDZONE;
4948
4949 cb = (callback == NULL_FUNC) ? DDI_DMA_DONTWAIT : DDI_DMA_SLEEP;
4950
4951 tmp_dma_attr.dma_attr_sgllen = instance->max_num_sge;
4952 tmp_dma_attr.dma_attr_addr_hi = 0xffffffffffffffffull;
4953 if (instance->tbolt) {
4954 /* OCR-RESET FIX */
4955 tmp_dma_attr.dma_attr_count_max =
4956 (U64)mrsas_tbolt_max_cap_maxxfer; /* limit to 256K */
4957 tmp_dma_attr.dma_attr_maxxfer =
4958 (U64)mrsas_tbolt_max_cap_maxxfer; /* limit to 256K */
4959 }
4960
4961 if ((i = ddi_dma_alloc_handle(instance->dip, &tmp_dma_attr,
4962 cb, 0, &acmd->cmd_dmahandle)) != DDI_SUCCESS) {
4963 switch (i) {
4964 case DDI_DMA_BADATTR:
4965 bioerror(bp, EFAULT);
4966 return (DDI_FAILURE);
4967
4968 case DDI_DMA_NORESOURCES:
4969 bioerror(bp, 0);
4970 return (DDI_FAILURE);
4971
4972 default:
4973 con_log(CL_ANN, (CE_PANIC, "ddi_dma_alloc_handle: "
4974 "impossible result (0x%x)", i));
4975 bioerror(bp, EFAULT);
4976 return (DDI_FAILURE);
4977 }
4978 }
4979
4980 i = ddi_dma_buf_bind_handle(acmd->cmd_dmahandle, bp, dma_flags,
4981 cb, 0, &acmd->cmd_dmacookies[0], &acmd->cmd_ncookies);
4982
4983 switch (i) {
4984 case DDI_DMA_PARTIAL_MAP:
4985 if ((dma_flags & DDI_DMA_PARTIAL) == 0) {
4986 con_log(CL_ANN, (CE_PANIC, "ddi_dma_buf_bind_handle: "
4987 "DDI_DMA_PARTIAL_MAP impossible"));
4988 goto no_dma_cookies;
4989 }
4990
4991 if (ddi_dma_numwin(acmd->cmd_dmahandle, &acmd->cmd_nwin) ==
4992 DDI_FAILURE) {
4993 con_log(CL_ANN, (CE_PANIC, "ddi_dma_numwin failed"));
4994 goto no_dma_cookies;
4995 }
4996
4997 if (ddi_dma_getwin(acmd->cmd_dmahandle, acmd->cmd_curwin,
4998 &acmd->cmd_dma_offset, &acmd->cmd_dma_len,
4999 &acmd->cmd_dmacookies[0], &acmd->cmd_ncookies) ==
5000 DDI_FAILURE) {
5001
5002 con_log(CL_ANN, (CE_PANIC, "ddi_dma_getwin failed"));
5003 goto no_dma_cookies;
5004 }
5005
5006 goto get_dma_cookies;
5007 case DDI_DMA_MAPPED:
5008 acmd->cmd_nwin = 1;
5009 acmd->cmd_dma_len = 0;
5010 acmd->cmd_dma_offset = 0;
5011
5012 get_dma_cookies:
5013 i = 0;
5014 acmd->cmd_dmacount = 0;
5015 for (;;) {
5016 acmd->cmd_dmacount +=
5017 acmd->cmd_dmacookies[i++].dmac_size;
5018
5019 if (i == instance->max_num_sge ||
5020 i == acmd->cmd_ncookies)
5021 break;
5022
5023 ddi_dma_nextcookie(acmd->cmd_dmahandle,
5024 &acmd->cmd_dmacookies[i]);
5025 }
5026
5027 acmd->cmd_cookie = i;
5028 acmd->cmd_cookiecnt = i;
5029
5030 acmd->cmd_flags |= CFLAG_DMAVALID;
5031
5032 if (bp->b_bcount >= acmd->cmd_dmacount) {
5033 pkt->pkt_resid = bp->b_bcount - acmd->cmd_dmacount;
5034 } else {
5035 pkt->pkt_resid = 0;
5036 }
5037
5038 return (DDI_SUCCESS);
5039 case DDI_DMA_NORESOURCES:
5040 bioerror(bp, 0);
5041 break;
5042 case DDI_DMA_NOMAPPING:
5043 bioerror(bp, EFAULT);
5044 break;
5045 case DDI_DMA_TOOBIG:
5046 bioerror(bp, EINVAL);
5047 break;
5048 case DDI_DMA_INUSE:
5049 con_log(CL_ANN, (CE_PANIC, "ddi_dma_buf_bind_handle:"
5050 " DDI_DMA_INUSE impossible"));
5051 break;
5052 default:
5053 con_log(CL_ANN, (CE_PANIC, "ddi_dma_buf_bind_handle: "
5054 "impossible result (0x%x)", i));
5055 break;
5056 }
5057
5058 no_dma_cookies:
5059 ddi_dma_free_handle(&acmd->cmd_dmahandle);
5060 acmd->cmd_dmahandle = NULL;
5061 acmd->cmd_flags &= ~CFLAG_DMAVALID;
5062 return (DDI_FAILURE);
5063 }
5064
5065 /*
5066 * mrsas_dma_move(struct mrsas_instance *, struct scsi_pkt *, struct buf *)
5067 *
5068 * move dma resources to next dma window
5069 *
5070 */
5071 int
5072 mrsas_dma_move(struct mrsas_instance *instance, struct scsi_pkt *pkt,
5073 struct buf *bp)
5074 {
5075 int i = 0;
5076
5077 struct scsa_cmd *acmd = PKT2CMD(pkt);
5078
5079 /*
5080 * If there are no more cookies remaining in this window,
5081 * must move to the next window first.
5082 */
5083 if (acmd->cmd_cookie == acmd->cmd_ncookies) {
5084 if (acmd->cmd_curwin == acmd->cmd_nwin && acmd->cmd_nwin == 1) {
5085 return (DDI_SUCCESS);
5086 }
5087
5088 /* at last window, cannot move */
5089 if (++acmd->cmd_curwin >= acmd->cmd_nwin) {
5090 return (DDI_FAILURE);
5091 }
5092
5093 if (ddi_dma_getwin(acmd->cmd_dmahandle, acmd->cmd_curwin,
5094 &acmd->cmd_dma_offset, &acmd->cmd_dma_len,
5095 &acmd->cmd_dmacookies[0], &acmd->cmd_ncookies) ==
5096 DDI_FAILURE) {
5097 return (DDI_FAILURE);
5098 }
5099
5100 acmd->cmd_cookie = 0;
5101 } else {
5102 /* still more cookies in this window - get the next one */
5103 ddi_dma_nextcookie(acmd->cmd_dmahandle,
5104 &acmd->cmd_dmacookies[0]);
5105 }
5106
5107 /* get remaining cookies in this window, up to our maximum */
5108 for (;;) {
5109 acmd->cmd_dmacount += acmd->cmd_dmacookies[i++].dmac_size;
5110 acmd->cmd_cookie++;
5111
5112 if (i == instance->max_num_sge ||
5113 acmd->cmd_cookie == acmd->cmd_ncookies) {
5114 break;
5115 }
5116
5117 ddi_dma_nextcookie(acmd->cmd_dmahandle,
5118 &acmd->cmd_dmacookies[i]);
5119 }
5120
5121 acmd->cmd_cookiecnt = i;
5122
5123 if (bp->b_bcount >= acmd->cmd_dmacount) {
5124 pkt->pkt_resid = bp->b_bcount - acmd->cmd_dmacount;
5125 } else {
5126 pkt->pkt_resid = 0;
5127 }
5128
5129 return (DDI_SUCCESS);
5130 }
5131
5132 /*
5133 * build_cmd
5134 */
5135 static struct mrsas_cmd *
5136 build_cmd(struct mrsas_instance *instance, struct scsi_address *ap,
5137 struct scsi_pkt *pkt, uchar_t *cmd_done)
5138 {
5139 uint16_t flags = 0;
5140 uint32_t i;
5141 uint32_t context;
5142 uint32_t sge_bytes;
5143 uint32_t tmp_data_xfer_len;
5144 ddi_acc_handle_t acc_handle;
5145 struct mrsas_cmd *cmd;
5146 struct mrsas_sge64 *mfi_sgl;
5147 struct mrsas_sge_ieee *mfi_sgl_ieee;
5148 struct scsa_cmd *acmd = PKT2CMD(pkt);
5149 struct mrsas_pthru_frame *pthru;
5150 struct mrsas_io_frame *ldio;
5151
5152 /* find out if this is logical or physical drive command. */
5153 acmd->islogical = MRDRV_IS_LOGICAL(ap);
5154 acmd->device_id = MAP_DEVICE_ID(instance, ap);
5155 *cmd_done = 0;
5156
5157 /* get the command packet */
5158 if (!(cmd = get_mfi_pkt(instance))) {
5159 DTRACE_PROBE2(build_cmd_mfi_err, uint16_t,
5160 instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
5161 return (NULL);
5162 }
5163
5164 acc_handle = cmd->frame_dma_obj.acc_handle;
5165
5166 /* Clear the frame buffer and assign back the context id */
5167 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
5168 ddi_put32(acc_handle, &cmd->frame->hdr.context, cmd->index);
5169
5170 cmd->pkt = pkt;
5171 cmd->cmd = acmd;
5172 DTRACE_PROBE3(build_cmds, uint8_t, pkt->pkt_cdbp[0],
5173 ulong_t, acmd->cmd_dmacount, ulong_t, acmd->cmd_dma_len);
5174
5175 /* lets get the command directions */
5176 if (acmd->cmd_flags & CFLAG_DMASEND) {
5177 flags = MFI_FRAME_DIR_WRITE;
5178
5179 if (acmd->cmd_flags & CFLAG_CONSISTENT) {
5180 (void) ddi_dma_sync(acmd->cmd_dmahandle,
5181 acmd->cmd_dma_offset, acmd->cmd_dma_len,
5182 DDI_DMA_SYNC_FORDEV);
5183 }
5184 } else if (acmd->cmd_flags & ~CFLAG_DMASEND) {
5185 flags = MFI_FRAME_DIR_READ;
5186
5187 if (acmd->cmd_flags & CFLAG_CONSISTENT) {
5188 (void) ddi_dma_sync(acmd->cmd_dmahandle,
5189 acmd->cmd_dma_offset, acmd->cmd_dma_len,
5190 DDI_DMA_SYNC_FORCPU);
5191 }
5192 } else {
5193 flags = MFI_FRAME_DIR_NONE;
5194 }
5195
5196 if (instance->flag_ieee) {
5197 flags |= MFI_FRAME_IEEE;
5198 }
5199 flags |= MFI_FRAME_SGL64;
5200
5201 switch (pkt->pkt_cdbp[0]) {
5202
5203 /*
5204 * case SCMD_SYNCHRONIZE_CACHE:
5205 * flush_cache(instance);
5206 * return_mfi_pkt(instance, cmd);
5207 * *cmd_done = 1;
5208 *
5209 * return (NULL);
5210 */
5211
5212 case SCMD_READ:
5213 case SCMD_WRITE:
5214 case SCMD_READ_G1:
5215 case SCMD_WRITE_G1:
5216 case SCMD_READ_G4:
5217 case SCMD_WRITE_G4:
5218 case SCMD_READ_G5:
5219 case SCMD_WRITE_G5:
5220 if (acmd->islogical) {
5221 ldio = (struct mrsas_io_frame *)cmd->frame;
5222
5223 /*
5224 * preare the Logical IO frame:
5225 * 2nd bit is zero for all read cmds
5226 */
5227 ddi_put8(acc_handle, &ldio->cmd,
5228 (pkt->pkt_cdbp[0] & 0x02) ? MFI_CMD_OP_LD_WRITE
5229 : MFI_CMD_OP_LD_READ);
5230 ddi_put8(acc_handle, &ldio->cmd_status, 0x0);
5231 ddi_put8(acc_handle, &ldio->scsi_status, 0x0);
5232 ddi_put8(acc_handle, &ldio->target_id, acmd->device_id);
5233 ddi_put16(acc_handle, &ldio->timeout, 0);
5234 ddi_put8(acc_handle, &ldio->reserved_0, 0);
5235 ddi_put16(acc_handle, &ldio->pad_0, 0);
5236 ddi_put16(acc_handle, &ldio->flags, flags);
5237
5238 /* Initialize sense Information */
5239 bzero(cmd->sense, SENSE_LENGTH);
5240 ddi_put8(acc_handle, &ldio->sense_len, SENSE_LENGTH);
5241 ddi_put32(acc_handle, &ldio->sense_buf_phys_addr_hi, 0);
5242 ddi_put32(acc_handle, &ldio->sense_buf_phys_addr_lo,
5243 cmd->sense_phys_addr);
5244 ddi_put32(acc_handle, &ldio->start_lba_hi, 0);
5245 ddi_put8(acc_handle, &ldio->access_byte,
5246 (acmd->cmd_cdblen != 6) ? pkt->pkt_cdbp[1] : 0);
5247 ddi_put8(acc_handle, &ldio->sge_count,
5248 acmd->cmd_cookiecnt);
5249 if (instance->flag_ieee) {
5250 mfi_sgl_ieee =
5251 (struct mrsas_sge_ieee *)&ldio->sgl;
5252 } else {
5253 mfi_sgl = (struct mrsas_sge64 *)&ldio->sgl;
5254 }
5255
5256 context = ddi_get32(acc_handle, &ldio->context);
5257
5258 if (acmd->cmd_cdblen == CDB_GROUP0) {
5259 /* 6-byte cdb */
5260 ddi_put32(acc_handle, &ldio->lba_count, (
5261 (uint16_t)(pkt->pkt_cdbp[4])));
5262
5263 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5264 ((uint32_t)(pkt->pkt_cdbp[3])) |
5265 ((uint32_t)(pkt->pkt_cdbp[2]) << 8) |
5266 ((uint32_t)((pkt->pkt_cdbp[1]) & 0x1F)
5267 << 16)));
5268 } else if (acmd->cmd_cdblen == CDB_GROUP1) {
5269 /* 10-byte cdb */
5270 ddi_put32(acc_handle, &ldio->lba_count, (
5271 ((uint16_t)(pkt->pkt_cdbp[8])) |
5272 ((uint16_t)(pkt->pkt_cdbp[7]) << 8)));
5273
5274 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5275 ((uint32_t)(pkt->pkt_cdbp[5])) |
5276 ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
5277 ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
5278 ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
5279 } else if (acmd->cmd_cdblen == CDB_GROUP5) {
5280 /* 12-byte cdb */
5281 ddi_put32(acc_handle, &ldio->lba_count, (
5282 ((uint32_t)(pkt->pkt_cdbp[9])) |
5283 ((uint32_t)(pkt->pkt_cdbp[8]) << 8) |
5284 ((uint32_t)(pkt->pkt_cdbp[7]) << 16) |
5285 ((uint32_t)(pkt->pkt_cdbp[6]) << 24)));
5286
5287 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5288 ((uint32_t)(pkt->pkt_cdbp[5])) |
5289 ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
5290 ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
5291 ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
5292 } else if (acmd->cmd_cdblen == CDB_GROUP4) {
5293 /* 16-byte cdb */
5294 ddi_put32(acc_handle, &ldio->lba_count, (
5295 ((uint32_t)(pkt->pkt_cdbp[13])) |
5296 ((uint32_t)(pkt->pkt_cdbp[12]) << 8) |
5297 ((uint32_t)(pkt->pkt_cdbp[11]) << 16) |
5298 ((uint32_t)(pkt->pkt_cdbp[10]) << 24)));
5299
5300 ddi_put32(acc_handle, &ldio->start_lba_lo, (
5301 ((uint32_t)(pkt->pkt_cdbp[9])) |
5302 ((uint32_t)(pkt->pkt_cdbp[8]) << 8) |
5303 ((uint32_t)(pkt->pkt_cdbp[7]) << 16) |
5304 ((uint32_t)(pkt->pkt_cdbp[6]) << 24)));
5305
5306 ddi_put32(acc_handle, &ldio->start_lba_hi, (
5307 ((uint32_t)(pkt->pkt_cdbp[5])) |
5308 ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
5309 ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
5310 ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
5311 }
5312
5313 break;
5314 }
5315 /* fall through For all non-rd/wr cmds */
5316 default:
5317
5318 switch (pkt->pkt_cdbp[0]) {
5319 case SCMD_MODE_SENSE:
5320 case SCMD_MODE_SENSE_G1: {
5321 union scsi_cdb *cdbp;
5322 uint16_t page_code;
5323
5324 cdbp = (void *)pkt->pkt_cdbp;
5325 page_code = (uint16_t)cdbp->cdb_un.sg.scsi[0];
5326 switch (page_code) {
5327 case 0x3:
5328 case 0x4:
5329 (void) mrsas_mode_sense_build(pkt);
5330 return_mfi_pkt(instance, cmd);
5331 *cmd_done = 1;
5332 return (NULL);
5333 }
5334 break;
5335 }
5336 default:
5337 break;
5338 }
5339
5340 pthru = (struct mrsas_pthru_frame *)cmd->frame;
5341
5342 /* prepare the DCDB frame */
5343 ddi_put8(acc_handle, &pthru->cmd, (acmd->islogical) ?
5344 MFI_CMD_OP_LD_SCSI : MFI_CMD_OP_PD_SCSI);
5345 ddi_put8(acc_handle, &pthru->cmd_status, 0x0);
5346 ddi_put8(acc_handle, &pthru->scsi_status, 0x0);
5347 ddi_put8(acc_handle, &pthru->target_id, acmd->device_id);
5348 ddi_put8(acc_handle, &pthru->lun, 0);
5349 ddi_put8(acc_handle, &pthru->cdb_len, acmd->cmd_cdblen);
5350 ddi_put16(acc_handle, &pthru->timeout, 0);
5351 ddi_put16(acc_handle, &pthru->flags, flags);
5352 tmp_data_xfer_len = 0;
5353 for (i = 0; i < acmd->cmd_cookiecnt; i++) {
5354 tmp_data_xfer_len += acmd->cmd_dmacookies[i].dmac_size;
5355 }
5356 ddi_put32(acc_handle, &pthru->data_xfer_len,
5357 tmp_data_xfer_len);
5358 ddi_put8(acc_handle, &pthru->sge_count, acmd->cmd_cookiecnt);
5359 if (instance->flag_ieee) {
5360 mfi_sgl_ieee = (struct mrsas_sge_ieee *)&pthru->sgl;
5361 } else {
5362 mfi_sgl = (struct mrsas_sge64 *)&pthru->sgl;
5363 }
5364
5365 bzero(cmd->sense, SENSE_LENGTH);
5366 ddi_put8(acc_handle, &pthru->sense_len, SENSE_LENGTH);
5367 ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_hi, 0);
5368 ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_lo,
5369 cmd->sense_phys_addr);
5370
5371 context = ddi_get32(acc_handle, &pthru->context);
5372 ddi_rep_put8(acc_handle, (uint8_t *)pkt->pkt_cdbp,
5373 (uint8_t *)pthru->cdb, acmd->cmd_cdblen, DDI_DEV_AUTOINCR);
5374
5375 break;
5376 }
5377 #ifdef lint
5378 context = context;
5379 #endif
5380 /* prepare the scatter-gather list for the firmware */
5381 if (instance->flag_ieee) {
5382 for (i = 0; i < acmd->cmd_cookiecnt; i++, mfi_sgl_ieee++) {
5383 ddi_put64(acc_handle, &mfi_sgl_ieee->phys_addr,
5384 acmd->cmd_dmacookies[i].dmac_laddress);
5385 ddi_put32(acc_handle, &mfi_sgl_ieee->length,
5386 acmd->cmd_dmacookies[i].dmac_size);
5387 }
5388 sge_bytes = sizeof (struct mrsas_sge_ieee)*acmd->cmd_cookiecnt;
5389 } else {
5390 for (i = 0; i < acmd->cmd_cookiecnt; i++, mfi_sgl++) {
5391 ddi_put64(acc_handle, &mfi_sgl->phys_addr,
5392 acmd->cmd_dmacookies[i].dmac_laddress);
5393 ddi_put32(acc_handle, &mfi_sgl->length,
5394 acmd->cmd_dmacookies[i].dmac_size);
5395 }
5396 sge_bytes = sizeof (struct mrsas_sge64)*acmd->cmd_cookiecnt;
5397 }
5398
5399 cmd->frame_count = (sge_bytes / MRMFI_FRAME_SIZE) +
5400 ((sge_bytes % MRMFI_FRAME_SIZE) ? 1 : 0) + 1;
5401
5402 if (cmd->frame_count >= 8) {
5403 cmd->frame_count = 8;
5404 }
5405
5406 return (cmd);
5407 }
5408
5409 #ifndef __sparc
5410 /*
5411 * wait_for_outstanding - Wait for all outstanding cmds
5412 * @instance: Adapter soft state
5413 *
5414 * This function waits for upto MRDRV_RESET_WAIT_TIME seconds for FW to
5415 * complete all its outstanding commands. Returns error if one or more IOs
5416 * are pending after this time period.
5417 */
5418 static int
5419 wait_for_outstanding(struct mrsas_instance *instance)
5420 {
5421 int i;
5422 uint32_t wait_time = 90;
5423
5424 for (i = 0; i < wait_time; i++) {
5425 if (!instance->fw_outstanding) {
5426 break;
5427 }
5428
5429 drv_usecwait(MILLISEC); /* wait for 1000 usecs */;
5430 }
5431
5432 if (instance->fw_outstanding) {
5433 return (1);
5434 }
5435
5436 return (0);
5437 }
5438 #endif /* __sparc */
5439
5440 /*
5441 * issue_mfi_pthru
5442 */
5443 static int
5444 issue_mfi_pthru(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5445 struct mrsas_cmd *cmd, int mode)
5446 {
5447 void *ubuf;
5448 uint32_t kphys_addr = 0;
5449 uint32_t xferlen = 0;
5450 uint32_t new_xfer_length = 0;
5451 uint_t model;
5452 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
5453 dma_obj_t pthru_dma_obj;
5454 struct mrsas_pthru_frame *kpthru;
5455 struct mrsas_pthru_frame *pthru;
5456 int i;
5457 pthru = &cmd->frame->pthru;
5458 kpthru = (struct mrsas_pthru_frame *)&ioctl->frame[0];
5459
5460 if (instance->adapterresetinprogress) {
5461 con_log(CL_ANN1, (CE_WARN, "issue_mfi_pthru: Reset flag set, "
5462 "returning mfi_pkt and setting TRAN_BUSY\n"));
5463 return (DDI_FAILURE);
5464 }
5465 model = ddi_model_convert_from(mode & FMODELS);
5466 if (model == DDI_MODEL_ILP32) {
5467 con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP32"));
5468
5469 xferlen = kpthru->sgl.sge32[0].length;
5470
5471 ubuf = (void *)(ulong_t)kpthru->sgl.sge32[0].phys_addr;
5472 } else {
5473 #ifdef _ILP32
5474 con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP32"));
5475 xferlen = kpthru->sgl.sge32[0].length;
5476 ubuf = (void *)(ulong_t)kpthru->sgl.sge32[0].phys_addr;
5477 #else
5478 con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP64"));
5479 xferlen = kpthru->sgl.sge64[0].length;
5480 ubuf = (void *)(ulong_t)kpthru->sgl.sge64[0].phys_addr;
5481 #endif
5482 }
5483
5484 if (xferlen) {
5485 /* means IOCTL requires DMA */
5486 /* allocate the data transfer buffer */
5487 /* pthru_dma_obj.size = xferlen; */
5488 MRSAS_GET_BOUNDARY_ALIGNED_LEN(xferlen, new_xfer_length,
5489 PAGESIZE);
5490 pthru_dma_obj.size = new_xfer_length;
5491 pthru_dma_obj.dma_attr = mrsas_generic_dma_attr;
5492 pthru_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5493 pthru_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5494 pthru_dma_obj.dma_attr.dma_attr_sgllen = 1;
5495 pthru_dma_obj.dma_attr.dma_attr_align = 1;
5496
5497 /* allocate kernel buffer for DMA */
5498 if (mrsas_alloc_dma_obj(instance, &pthru_dma_obj,
5499 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5500 con_log(CL_ANN, (CE_WARN, "issue_mfi_pthru: "
5501 "could not allocate data transfer buffer."));
5502 return (DDI_FAILURE);
5503 }
5504 (void) memset(pthru_dma_obj.buffer, 0, xferlen);
5505
5506 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5507 if (kpthru->flags & MFI_FRAME_DIR_WRITE) {
5508 for (i = 0; i < xferlen; i++) {
5509 if (ddi_copyin((uint8_t *)ubuf+i,
5510 (uint8_t *)pthru_dma_obj.buffer+i,
5511 1, mode)) {
5512 con_log(CL_ANN, (CE_WARN,
5513 "issue_mfi_pthru : "
5514 "copy from user space failed"));
5515 return (DDI_FAILURE);
5516 }
5517 }
5518 }
5519
5520 kphys_addr = pthru_dma_obj.dma_cookie[0].dmac_address;
5521 }
5522
5523 ddi_put8(acc_handle, &pthru->cmd, kpthru->cmd);
5524 ddi_put8(acc_handle, &pthru->sense_len, SENSE_LENGTH);
5525 ddi_put8(acc_handle, &pthru->cmd_status, 0);
5526 ddi_put8(acc_handle, &pthru->scsi_status, 0);
5527 ddi_put8(acc_handle, &pthru->target_id, kpthru->target_id);
5528 ddi_put8(acc_handle, &pthru->lun, kpthru->lun);
5529 ddi_put8(acc_handle, &pthru->cdb_len, kpthru->cdb_len);
5530 ddi_put8(acc_handle, &pthru->sge_count, kpthru->sge_count);
5531 ddi_put16(acc_handle, &pthru->timeout, kpthru->timeout);
5532 ddi_put32(acc_handle, &pthru->data_xfer_len, kpthru->data_xfer_len);
5533
5534 ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_hi, 0);
5535 pthru->sense_buf_phys_addr_lo = cmd->sense_phys_addr;
5536 /* ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_lo, 0); */
5537
5538 ddi_rep_put8(acc_handle, (uint8_t *)kpthru->cdb, (uint8_t *)pthru->cdb,
5539 pthru->cdb_len, DDI_DEV_AUTOINCR);
5540
5541 ddi_put16(acc_handle, &pthru->flags, kpthru->flags & ~MFI_FRAME_SGL64);
5542 ddi_put32(acc_handle, &pthru->sgl.sge32[0].length, xferlen);
5543 ddi_put32(acc_handle, &pthru->sgl.sge32[0].phys_addr, kphys_addr);
5544
5545 cmd->sync_cmd = MRSAS_TRUE;
5546 cmd->frame_count = 1;
5547
5548 if (instance->tbolt) {
5549 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
5550 }
5551
5552 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
5553 con_log(CL_ANN, (CE_WARN,
5554 "issue_mfi_pthru: fw_ioctl failed"));
5555 } else {
5556 if (xferlen && kpthru->flags & MFI_FRAME_DIR_READ) {
5557 for (i = 0; i < xferlen; i++) {
5558 if (ddi_copyout(
5559 (uint8_t *)pthru_dma_obj.buffer+i,
5560 (uint8_t *)ubuf+i, 1, mode)) {
5561 con_log(CL_ANN, (CE_WARN,
5562 "issue_mfi_pthru : "
5563 "copy to user space failed"));
5564 return (DDI_FAILURE);
5565 }
5566 }
5567 }
5568 }
5569
5570 kpthru->cmd_status = ddi_get8(acc_handle, &pthru->cmd_status);
5571 kpthru->scsi_status = ddi_get8(acc_handle, &pthru->scsi_status);
5572
5573 con_log(CL_ANN, (CE_CONT, "issue_mfi_pthru: cmd_status %x, "
5574 "scsi_status %x", kpthru->cmd_status, kpthru->scsi_status));
5575 DTRACE_PROBE3(issue_pthru, uint8_t, kpthru->cmd, uint8_t,
5576 kpthru->cmd_status, uint8_t, kpthru->scsi_status);
5577
5578 if (kpthru->sense_len) {
5579 uint_t sense_len = SENSE_LENGTH;
5580 void *sense_ubuf =
5581 (void *)(ulong_t)kpthru->sense_buf_phys_addr_lo;
5582 if (kpthru->sense_len <= SENSE_LENGTH) {
5583 sense_len = kpthru->sense_len;
5584 }
5585
5586 for (i = 0; i < sense_len; i++) {
5587 if (ddi_copyout(
5588 (uint8_t *)cmd->sense+i,
5589 (uint8_t *)sense_ubuf+i, 1, mode)) {
5590 con_log(CL_ANN, (CE_WARN,
5591 "issue_mfi_pthru : "
5592 "copy to user space failed"));
5593 }
5594 con_log(CL_DLEVEL1, (CE_WARN,
5595 "Copying Sense info sense_buff[%d] = 0x%X\n",
5596 i, *((uint8_t *)cmd->sense + i)));
5597 }
5598 }
5599 (void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle, 0, 0,
5600 DDI_DMA_SYNC_FORDEV);
5601
5602 if (xferlen) {
5603 /* free kernel buffer */
5604 if (mrsas_free_dma_obj(instance, pthru_dma_obj) != DDI_SUCCESS)
5605 return (DDI_FAILURE);
5606 }
5607
5608 return (DDI_SUCCESS);
5609 }
5610
5611 /*
5612 * issue_mfi_dcmd
5613 */
5614 static int
5615 issue_mfi_dcmd(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5616 struct mrsas_cmd *cmd, int mode)
5617 {
5618 void *ubuf;
5619 uint32_t kphys_addr = 0;
5620 uint32_t xferlen = 0;
5621 uint32_t new_xfer_length = 0;
5622 uint32_t model;
5623 dma_obj_t dcmd_dma_obj;
5624 struct mrsas_dcmd_frame *kdcmd;
5625 struct mrsas_dcmd_frame *dcmd;
5626 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
5627 int i;
5628 dcmd = &cmd->frame->dcmd;
5629 kdcmd = (struct mrsas_dcmd_frame *)&ioctl->frame[0];
5630
5631 if (instance->adapterresetinprogress) {
5632 con_log(CL_ANN1, (CE_WARN, "Reset flag set, "
5633 "returning mfi_pkt and setting TRAN_BUSY\n"));
5634 return (DDI_FAILURE);
5635 }
5636 model = ddi_model_convert_from(mode & FMODELS);
5637 if (model == DDI_MODEL_ILP32) {
5638 con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_ILP32"));
5639
5640 xferlen = kdcmd->sgl.sge32[0].length;
5641
5642 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
5643 } else {
5644 #ifdef _ILP32
5645 con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_ILP32"));
5646 xferlen = kdcmd->sgl.sge32[0].length;
5647 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
5648 #else
5649 con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_LP64"));
5650 xferlen = kdcmd->sgl.sge64[0].length;
5651 ubuf = (void *)(ulong_t)kdcmd->sgl.sge64[0].phys_addr;
5652 #endif
5653 }
5654 if (xferlen) {
5655 /* means IOCTL requires DMA */
5656 /* allocate the data transfer buffer */
5657 /* dcmd_dma_obj.size = xferlen; */
5658 MRSAS_GET_BOUNDARY_ALIGNED_LEN(xferlen, new_xfer_length,
5659 PAGESIZE);
5660 dcmd_dma_obj.size = new_xfer_length;
5661 dcmd_dma_obj.dma_attr = mrsas_generic_dma_attr;
5662 dcmd_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5663 dcmd_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5664 dcmd_dma_obj.dma_attr.dma_attr_sgllen = 1;
5665 dcmd_dma_obj.dma_attr.dma_attr_align = 1;
5666
5667 /* allocate kernel buffer for DMA */
5668 if (mrsas_alloc_dma_obj(instance, &dcmd_dma_obj,
5669 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5670 con_log(CL_ANN,
5671 (CE_WARN, "issue_mfi_dcmd: could not "
5672 "allocate data transfer buffer."));
5673 return (DDI_FAILURE);
5674 }
5675 (void) memset(dcmd_dma_obj.buffer, 0, xferlen);
5676
5677 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5678 if (kdcmd->flags & MFI_FRAME_DIR_WRITE) {
5679 for (i = 0; i < xferlen; i++) {
5680 if (ddi_copyin((uint8_t *)ubuf + i,
5681 (uint8_t *)dcmd_dma_obj.buffer + i,
5682 1, mode)) {
5683 con_log(CL_ANN, (CE_WARN,
5684 "issue_mfi_dcmd : "
5685 "copy from user space failed"));
5686 return (DDI_FAILURE);
5687 }
5688 }
5689 }
5690
5691 kphys_addr = dcmd_dma_obj.dma_cookie[0].dmac_address;
5692 }
5693
5694 ddi_put8(acc_handle, &dcmd->cmd, kdcmd->cmd);
5695 ddi_put8(acc_handle, &dcmd->cmd_status, 0);
5696 ddi_put8(acc_handle, &dcmd->sge_count, kdcmd->sge_count);
5697 ddi_put16(acc_handle, &dcmd->timeout, kdcmd->timeout);
5698 ddi_put32(acc_handle, &dcmd->data_xfer_len, kdcmd->data_xfer_len);
5699 ddi_put32(acc_handle, &dcmd->opcode, kdcmd->opcode);
5700
5701 ddi_rep_put8(acc_handle, (uint8_t *)kdcmd->mbox.b,
5702 (uint8_t *)dcmd->mbox.b, DCMD_MBOX_SZ, DDI_DEV_AUTOINCR);
5703
5704 ddi_put16(acc_handle, &dcmd->flags, kdcmd->flags & ~MFI_FRAME_SGL64);
5705 ddi_put32(acc_handle, &dcmd->sgl.sge32[0].length, xferlen);
5706 ddi_put32(acc_handle, &dcmd->sgl.sge32[0].phys_addr, kphys_addr);
5707
5708 cmd->sync_cmd = MRSAS_TRUE;
5709 cmd->frame_count = 1;
5710
5711 if (instance->tbolt) {
5712 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
5713 }
5714
5715 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
5716 con_log(CL_ANN, (CE_WARN, "issue_mfi_dcmd: fw_ioctl failed"));
5717 } else {
5718 if (xferlen && (kdcmd->flags & MFI_FRAME_DIR_READ)) {
5719 for (i = 0; i < xferlen; i++) {
5720 if (ddi_copyout(
5721 (uint8_t *)dcmd_dma_obj.buffer + i,
5722 (uint8_t *)ubuf + i,
5723 1, mode)) {
5724 con_log(CL_ANN, (CE_WARN,
5725 "issue_mfi_dcmd : "
5726 "copy to user space failed"));
5727 return (DDI_FAILURE);
5728 }
5729 }
5730 }
5731 }
5732
5733 kdcmd->cmd_status = ddi_get8(acc_handle, &dcmd->cmd_status);
5734 con_log(CL_ANN,
5735 (CE_CONT, "issue_mfi_dcmd: cmd_status %x", kdcmd->cmd_status));
5736 DTRACE_PROBE3(issue_dcmd, uint32_t, kdcmd->opcode, uint8_t,
5737 kdcmd->cmd, uint8_t, kdcmd->cmd_status);
5738
5739 if (xferlen) {
5740 /* free kernel buffer */
5741 if (mrsas_free_dma_obj(instance, dcmd_dma_obj) != DDI_SUCCESS)
5742 return (DDI_FAILURE);
5743 }
5744
5745 return (DDI_SUCCESS);
5746 }
5747
5748 /*
5749 * issue_mfi_smp
5750 */
5751 static int
5752 issue_mfi_smp(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5753 struct mrsas_cmd *cmd, int mode)
5754 {
5755 void *request_ubuf;
5756 void *response_ubuf;
5757 uint32_t request_xferlen = 0;
5758 uint32_t response_xferlen = 0;
5759 uint32_t new_xfer_length1 = 0;
5760 uint32_t new_xfer_length2 = 0;
5761 uint_t model;
5762 dma_obj_t request_dma_obj;
5763 dma_obj_t response_dma_obj;
5764 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
5765 struct mrsas_smp_frame *ksmp;
5766 struct mrsas_smp_frame *smp;
5767 struct mrsas_sge32 *sge32;
5768 #ifndef _ILP32
5769 struct mrsas_sge64 *sge64;
5770 #endif
5771 int i;
5772 uint64_t tmp_sas_addr;
5773
5774 smp = &cmd->frame->smp;
5775 ksmp = (struct mrsas_smp_frame *)&ioctl->frame[0];
5776
5777 if (instance->adapterresetinprogress) {
5778 con_log(CL_ANN1, (CE_WARN, "Reset flag set, "
5779 "returning mfi_pkt and setting TRAN_BUSY\n"));
5780 return (DDI_FAILURE);
5781 }
5782 model = ddi_model_convert_from(mode & FMODELS);
5783 if (model == DDI_MODEL_ILP32) {
5784 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: DDI_MODEL_ILP32"));
5785
5786 sge32 = &ksmp->sgl[0].sge32[0];
5787 response_xferlen = sge32[0].length;
5788 request_xferlen = sge32[1].length;
5789 con_log(CL_ANN, (CE_CONT, "issue_mfi_smp: "
5790 "response_xferlen = %x, request_xferlen = %x",
5791 response_xferlen, request_xferlen));
5792
5793 response_ubuf = (void *)(ulong_t)sge32[0].phys_addr;
5794 request_ubuf = (void *)(ulong_t)sge32[1].phys_addr;
5795 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: "
5796 "response_ubuf = %p, request_ubuf = %p",
5797 response_ubuf, request_ubuf));
5798 } else {
5799 #ifdef _ILP32
5800 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: DDI_MODEL_ILP32"));
5801
5802 sge32 = &ksmp->sgl[0].sge32[0];
5803 response_xferlen = sge32[0].length;
5804 request_xferlen = sge32[1].length;
5805 con_log(CL_ANN, (CE_CONT, "issue_mfi_smp: "
5806 "response_xferlen = %x, request_xferlen = %x",
5807 response_xferlen, request_xferlen));
5808
5809 response_ubuf = (void *)(ulong_t)sge32[0].phys_addr;
5810 request_ubuf = (void *)(ulong_t)sge32[1].phys_addr;
5811 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: "
5812 "response_ubuf = %p, request_ubuf = %p",
5813 response_ubuf, request_ubuf));
5814 #else
5815 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: DDI_MODEL_LP64"));
5816
5817 sge64 = &ksmp->sgl[0].sge64[0];
5818 response_xferlen = sge64[0].length;
5819 request_xferlen = sge64[1].length;
5820
5821 response_ubuf = (void *)(ulong_t)sge64[0].phys_addr;
5822 request_ubuf = (void *)(ulong_t)sge64[1].phys_addr;
5823 #endif
5824 }
5825 if (request_xferlen) {
5826 /* means IOCTL requires DMA */
5827 /* allocate the data transfer buffer */
5828 /* request_dma_obj.size = request_xferlen; */
5829 MRSAS_GET_BOUNDARY_ALIGNED_LEN(request_xferlen,
5830 new_xfer_length1, PAGESIZE);
5831 request_dma_obj.size = new_xfer_length1;
5832 request_dma_obj.dma_attr = mrsas_generic_dma_attr;
5833 request_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5834 request_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5835 request_dma_obj.dma_attr.dma_attr_sgllen = 1;
5836 request_dma_obj.dma_attr.dma_attr_align = 1;
5837
5838 /* allocate kernel buffer for DMA */
5839 if (mrsas_alloc_dma_obj(instance, &request_dma_obj,
5840 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5841 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5842 "could not allocate data transfer buffer."));
5843 return (DDI_FAILURE);
5844 }
5845 (void) memset(request_dma_obj.buffer, 0, request_xferlen);
5846
5847 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5848 for (i = 0; i < request_xferlen; i++) {
5849 if (ddi_copyin((uint8_t *)request_ubuf + i,
5850 (uint8_t *)request_dma_obj.buffer + i,
5851 1, mode)) {
5852 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5853 "copy from user space failed"));
5854 return (DDI_FAILURE);
5855 }
5856 }
5857 }
5858
5859 if (response_xferlen) {
5860 /* means IOCTL requires DMA */
5861 /* allocate the data transfer buffer */
5862 /* response_dma_obj.size = response_xferlen; */
5863 MRSAS_GET_BOUNDARY_ALIGNED_LEN(response_xferlen,
5864 new_xfer_length2, PAGESIZE);
5865 response_dma_obj.size = new_xfer_length2;
5866 response_dma_obj.dma_attr = mrsas_generic_dma_attr;
5867 response_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5868 response_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5869 response_dma_obj.dma_attr.dma_attr_sgllen = 1;
5870 response_dma_obj.dma_attr.dma_attr_align = 1;
5871
5872 /* allocate kernel buffer for DMA */
5873 if (mrsas_alloc_dma_obj(instance, &response_dma_obj,
5874 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5875 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5876 "could not allocate data transfer buffer."));
5877 return (DDI_FAILURE);
5878 }
5879 (void) memset(response_dma_obj.buffer, 0, response_xferlen);
5880
5881 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5882 for (i = 0; i < response_xferlen; i++) {
5883 if (ddi_copyin((uint8_t *)response_ubuf + i,
5884 (uint8_t *)response_dma_obj.buffer + i,
5885 1, mode)) {
5886 con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5887 "copy from user space failed"));
5888 return (DDI_FAILURE);
5889 }
5890 }
5891 }
5892
5893 ddi_put8(acc_handle, &smp->cmd, ksmp->cmd);
5894 ddi_put8(acc_handle, &smp->cmd_status, 0);
5895 ddi_put8(acc_handle, &smp->connection_status, 0);
5896 ddi_put8(acc_handle, &smp->sge_count, ksmp->sge_count);
5897 /* smp->context = ksmp->context; */
5898 ddi_put16(acc_handle, &smp->timeout, ksmp->timeout);
5899 ddi_put32(acc_handle, &smp->data_xfer_len, ksmp->data_xfer_len);
5900
5901 bcopy((void *)&ksmp->sas_addr, (void *)&tmp_sas_addr,
5902 sizeof (uint64_t));
5903 ddi_put64(acc_handle, &smp->sas_addr, tmp_sas_addr);
5904
5905 ddi_put16(acc_handle, &smp->flags, ksmp->flags & ~MFI_FRAME_SGL64);
5906
5907 model = ddi_model_convert_from(mode & FMODELS);
5908 if (model == DDI_MODEL_ILP32) {
5909 con_log(CL_ANN1, (CE_CONT,
5910 "issue_mfi_smp: DDI_MODEL_ILP32"));
5911
5912 sge32 = &smp->sgl[0].sge32[0];
5913 ddi_put32(acc_handle, &sge32[0].length, response_xferlen);
5914 ddi_put32(acc_handle, &sge32[0].phys_addr,
5915 response_dma_obj.dma_cookie[0].dmac_address);
5916 ddi_put32(acc_handle, &sge32[1].length, request_xferlen);
5917 ddi_put32(acc_handle, &sge32[1].phys_addr,
5918 request_dma_obj.dma_cookie[0].dmac_address);
5919 } else {
5920 #ifdef _ILP32
5921 con_log(CL_ANN1, (CE_CONT,
5922 "issue_mfi_smp: DDI_MODEL_ILP32"));
5923 sge32 = &smp->sgl[0].sge32[0];
5924 ddi_put32(acc_handle, &sge32[0].length, response_xferlen);
5925 ddi_put32(acc_handle, &sge32[0].phys_addr,
5926 response_dma_obj.dma_cookie[0].dmac_address);
5927 ddi_put32(acc_handle, &sge32[1].length, request_xferlen);
5928 ddi_put32(acc_handle, &sge32[1].phys_addr,
5929 request_dma_obj.dma_cookie[0].dmac_address);
5930 #else
5931 con_log(CL_ANN1, (CE_CONT,
5932 "issue_mfi_smp: DDI_MODEL_LP64"));
5933 sge64 = &smp->sgl[0].sge64[0];
5934 ddi_put32(acc_handle, &sge64[0].length, response_xferlen);
5935 ddi_put64(acc_handle, &sge64[0].phys_addr,
5936 response_dma_obj.dma_cookie[0].dmac_address);
5937 ddi_put32(acc_handle, &sge64[1].length, request_xferlen);
5938 ddi_put64(acc_handle, &sge64[1].phys_addr,
5939 request_dma_obj.dma_cookie[0].dmac_address);
5940 #endif
5941 }
5942 con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp : "
5943 "smp->response_xferlen = %d, smp->request_xferlen = %d "
5944 "smp->data_xfer_len = %d", ddi_get32(acc_handle, &sge32[0].length),
5945 ddi_get32(acc_handle, &sge32[1].length),
5946 ddi_get32(acc_handle, &smp->data_xfer_len)));
5947
5948 cmd->sync_cmd = MRSAS_TRUE;
5949 cmd->frame_count = 1;
5950
5951 if (instance->tbolt) {
5952 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
5953 }
5954
5955 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
5956 con_log(CL_ANN, (CE_WARN,
5957 "issue_mfi_smp: fw_ioctl failed"));
5958 } else {
5959 con_log(CL_ANN1, (CE_CONT,
5960 "issue_mfi_smp: copy to user space"));
5961
5962 if (request_xferlen) {
5963 for (i = 0; i < request_xferlen; i++) {
5964 if (ddi_copyout(
5965 (uint8_t *)request_dma_obj.buffer +
5966 i, (uint8_t *)request_ubuf + i,
5967 1, mode)) {
5968 con_log(CL_ANN, (CE_WARN,
5969 "issue_mfi_smp : copy to user space"
5970 " failed"));
5971 return (DDI_FAILURE);
5972 }
5973 }
5974 }
5975
5976 if (response_xferlen) {
5977 for (i = 0; i < response_xferlen; i++) {
5978 if (ddi_copyout(
5979 (uint8_t *)response_dma_obj.buffer
5980 + i, (uint8_t *)response_ubuf
5981 + i, 1, mode)) {
5982 con_log(CL_ANN, (CE_WARN,
5983 "issue_mfi_smp : copy to "
5984 "user space failed"));
5985 return (DDI_FAILURE);
5986 }
5987 }
5988 }
5989 }
5990
5991 ksmp->cmd_status = ddi_get8(acc_handle, &smp->cmd_status);
5992 con_log(CL_ANN1, (CE_NOTE, "issue_mfi_smp: smp->cmd_status = %d",
5993 ksmp->cmd_status));
5994 DTRACE_PROBE2(issue_smp, uint8_t, ksmp->cmd, uint8_t, ksmp->cmd_status);
5995
5996 if (request_xferlen) {
5997 /* free kernel buffer */
5998 if (mrsas_free_dma_obj(instance, request_dma_obj) !=
5999 DDI_SUCCESS)
6000 return (DDI_FAILURE);
6001 }
6002
6003 if (response_xferlen) {
6004 /* free kernel buffer */
6005 if (mrsas_free_dma_obj(instance, response_dma_obj) !=
6006 DDI_SUCCESS)
6007 return (DDI_FAILURE);
6008 }
6009
6010 return (DDI_SUCCESS);
6011 }
6012
6013 /*
6014 * issue_mfi_stp
6015 */
6016 static int
6017 issue_mfi_stp(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
6018 struct mrsas_cmd *cmd, int mode)
6019 {
6020 void *fis_ubuf;
6021 void *data_ubuf;
6022 uint32_t fis_xferlen = 0;
6023 uint32_t new_xfer_length1 = 0;
6024 uint32_t new_xfer_length2 = 0;
6025 uint32_t data_xferlen = 0;
6026 uint_t model;
6027 dma_obj_t fis_dma_obj;
6028 dma_obj_t data_dma_obj;
6029 struct mrsas_stp_frame *kstp;
6030 struct mrsas_stp_frame *stp;
6031 ddi_acc_handle_t acc_handle = cmd->frame_dma_obj.acc_handle;
6032 int i;
6033
6034 stp = &cmd->frame->stp;
6035 kstp = (struct mrsas_stp_frame *)&ioctl->frame[0];
6036
6037 if (instance->adapterresetinprogress) {
6038 con_log(CL_ANN1, (CE_WARN, "Reset flag set, "
6039 "returning mfi_pkt and setting TRAN_BUSY\n"));
6040 return (DDI_FAILURE);
6041 }
6042 model = ddi_model_convert_from(mode & FMODELS);
6043 if (model == DDI_MODEL_ILP32) {
6044 con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_ILP32"));
6045
6046 fis_xferlen = kstp->sgl.sge32[0].length;
6047 data_xferlen = kstp->sgl.sge32[1].length;
6048
6049 fis_ubuf = (void *)(ulong_t)kstp->sgl.sge32[0].phys_addr;
6050 data_ubuf = (void *)(ulong_t)kstp->sgl.sge32[1].phys_addr;
6051 } else {
6052 #ifdef _ILP32
6053 con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_ILP32"));
6054
6055 fis_xferlen = kstp->sgl.sge32[0].length;
6056 data_xferlen = kstp->sgl.sge32[1].length;
6057
6058 fis_ubuf = (void *)(ulong_t)kstp->sgl.sge32[0].phys_addr;
6059 data_ubuf = (void *)(ulong_t)kstp->sgl.sge32[1].phys_addr;
6060 #else
6061 con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_LP64"));
6062
6063 fis_xferlen = kstp->sgl.sge64[0].length;
6064 data_xferlen = kstp->sgl.sge64[1].length;
6065
6066 fis_ubuf = (void *)(ulong_t)kstp->sgl.sge64[0].phys_addr;
6067 data_ubuf = (void *)(ulong_t)kstp->sgl.sge64[1].phys_addr;
6068 #endif
6069 }
6070
6071
6072 if (fis_xferlen) {
6073 con_log(CL_ANN, (CE_CONT, "issue_mfi_stp: "
6074 "fis_ubuf = %p fis_xferlen = %x", fis_ubuf, fis_xferlen));
6075
6076 /* means IOCTL requires DMA */
6077 /* allocate the data transfer buffer */
6078 /* fis_dma_obj.size = fis_xferlen; */
6079 MRSAS_GET_BOUNDARY_ALIGNED_LEN(fis_xferlen,
6080 new_xfer_length1, PAGESIZE);
6081 fis_dma_obj.size = new_xfer_length1;
6082 fis_dma_obj.dma_attr = mrsas_generic_dma_attr;
6083 fis_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
6084 fis_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
6085 fis_dma_obj.dma_attr.dma_attr_sgllen = 1;
6086 fis_dma_obj.dma_attr.dma_attr_align = 1;
6087
6088 /* allocate kernel buffer for DMA */
6089 if (mrsas_alloc_dma_obj(instance, &fis_dma_obj,
6090 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
6091 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp : "
6092 "could not allocate data transfer buffer."));
6093 return (DDI_FAILURE);
6094 }
6095 (void) memset(fis_dma_obj.buffer, 0, fis_xferlen);
6096
6097 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
6098 for (i = 0; i < fis_xferlen; i++) {
6099 if (ddi_copyin((uint8_t *)fis_ubuf + i,
6100 (uint8_t *)fis_dma_obj.buffer + i, 1, mode)) {
6101 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
6102 "copy from user space failed"));
6103 return (DDI_FAILURE);
6104 }
6105 }
6106 }
6107
6108 if (data_xferlen) {
6109 con_log(CL_ANN, (CE_CONT, "issue_mfi_stp: data_ubuf = %p "
6110 "data_xferlen = %x", data_ubuf, data_xferlen));
6111
6112 /* means IOCTL requires DMA */
6113 /* allocate the data transfer buffer */
6114 /* data_dma_obj.size = data_xferlen; */
6115 MRSAS_GET_BOUNDARY_ALIGNED_LEN(data_xferlen, new_xfer_length2,
6116 PAGESIZE);
6117 data_dma_obj.size = new_xfer_length2;
6118 data_dma_obj.dma_attr = mrsas_generic_dma_attr;
6119 data_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
6120 data_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
6121 data_dma_obj.dma_attr.dma_attr_sgllen = 1;
6122 data_dma_obj.dma_attr.dma_attr_align = 1;
6123
6124 /* allocate kernel buffer for DMA */
6125 if (mrsas_alloc_dma_obj(instance, &data_dma_obj,
6126 (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
6127 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
6128 "could not allocate data transfer buffer."));
6129 return (DDI_FAILURE);
6130 }
6131 (void) memset(data_dma_obj.buffer, 0, data_xferlen);
6132
6133 /* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
6134 for (i = 0; i < data_xferlen; i++) {
6135 if (ddi_copyin((uint8_t *)data_ubuf + i,
6136 (uint8_t *)data_dma_obj.buffer + i, 1, mode)) {
6137 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
6138 "copy from user space failed"));
6139 return (DDI_FAILURE);
6140 }
6141 }
6142 }
6143
6144 ddi_put8(acc_handle, &stp->cmd, kstp->cmd);
6145 ddi_put8(acc_handle, &stp->cmd_status, 0);
6146 ddi_put8(acc_handle, &stp->connection_status, 0);
6147 ddi_put8(acc_handle, &stp->target_id, kstp->target_id);
6148 ddi_put8(acc_handle, &stp->sge_count, kstp->sge_count);
6149
6150 ddi_put16(acc_handle, &stp->timeout, kstp->timeout);
6151 ddi_put32(acc_handle, &stp->data_xfer_len, kstp->data_xfer_len);
6152
6153 ddi_rep_put8(acc_handle, (uint8_t *)kstp->fis, (uint8_t *)stp->fis, 10,
6154 DDI_DEV_AUTOINCR);
6155
6156 ddi_put16(acc_handle, &stp->flags, kstp->flags & ~MFI_FRAME_SGL64);
6157 ddi_put32(acc_handle, &stp->stp_flags, kstp->stp_flags);
6158 ddi_put32(acc_handle, &stp->sgl.sge32[0].length, fis_xferlen);
6159 ddi_put32(acc_handle, &stp->sgl.sge32[0].phys_addr,
6160 fis_dma_obj.dma_cookie[0].dmac_address);
6161 ddi_put32(acc_handle, &stp->sgl.sge32[1].length, data_xferlen);
6162 ddi_put32(acc_handle, &stp->sgl.sge32[1].phys_addr,
6163 data_dma_obj.dma_cookie[0].dmac_address);
6164
6165 cmd->sync_cmd = MRSAS_TRUE;
6166 cmd->frame_count = 1;
6167
6168 if (instance->tbolt) {
6169 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
6170 }
6171
6172 if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
6173 con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: fw_ioctl failed"));
6174 } else {
6175
6176 if (fis_xferlen) {
6177 for (i = 0; i < fis_xferlen; i++) {
6178 if (ddi_copyout(
6179 (uint8_t *)fis_dma_obj.buffer + i,
6180 (uint8_t *)fis_ubuf + i, 1, mode)) {
6181 con_log(CL_ANN, (CE_WARN,
6182 "issue_mfi_stp : copy to "
6183 "user space failed"));
6184 return (DDI_FAILURE);
6185 }
6186 }
6187 }
6188 }
6189 if (data_xferlen) {
6190 for (i = 0; i < data_xferlen; i++) {
6191 if (ddi_copyout(
6192 (uint8_t *)data_dma_obj.buffer + i,
6193 (uint8_t *)data_ubuf + i, 1, mode)) {
6194 con_log(CL_ANN, (CE_WARN,
6195 "issue_mfi_stp : copy to"
6196 " user space failed"));
6197 return (DDI_FAILURE);
6198 }
6199 }
6200 }
6201
6202 kstp->cmd_status = ddi_get8(acc_handle, &stp->cmd_status);
6203 con_log(CL_ANN1, (CE_NOTE, "issue_mfi_stp: stp->cmd_status = %d",
6204 kstp->cmd_status));
6205 DTRACE_PROBE2(issue_stp, uint8_t, kstp->cmd, uint8_t, kstp->cmd_status);
6206
6207 if (fis_xferlen) {
6208 /* free kernel buffer */
6209 if (mrsas_free_dma_obj(instance, fis_dma_obj) != DDI_SUCCESS)
6210 return (DDI_FAILURE);
6211 }
6212
6213 if (data_xferlen) {
6214 /* free kernel buffer */
6215 if (mrsas_free_dma_obj(instance, data_dma_obj) != DDI_SUCCESS)
6216 return (DDI_FAILURE);
6217 }
6218
6219 return (DDI_SUCCESS);
6220 }
6221
6222 /*
6223 * fill_up_drv_ver
6224 */
6225 void
6226 fill_up_drv_ver(struct mrsas_drv_ver *dv)
6227 {
6228 (void) memset(dv, 0, sizeof (struct mrsas_drv_ver));
6229
6230 (void) memcpy(dv->signature, "$LSI LOGIC$", strlen("$LSI LOGIC$"));
6231 (void) memcpy(dv->os_name, "Solaris", strlen("Solaris"));
6232 (void) memcpy(dv->drv_name, "mr_sas", strlen("mr_sas"));
6233 (void) memcpy(dv->drv_ver, MRSAS_VERSION, strlen(MRSAS_VERSION));
6234 (void) memcpy(dv->drv_rel_date, MRSAS_RELDATE,
6235 strlen(MRSAS_RELDATE));
6236
6237 }
6238
6239 /*
6240 * handle_drv_ioctl
6241 */
6242 static int
6243 handle_drv_ioctl(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
6244 int mode)
6245 {
6246 int i;
6247 int rval = DDI_SUCCESS;
6248 int *props = NULL;
6249 void *ubuf;
6250
6251 uint8_t *pci_conf_buf;
6252 uint32_t xferlen;
6253 uint32_t num_props;
6254 uint_t model;
6255 struct mrsas_dcmd_frame *kdcmd;
6256 struct mrsas_drv_ver dv;
6257 struct mrsas_pci_information pi;
6258
6259 kdcmd = (struct mrsas_dcmd_frame *)&ioctl->frame[0];
6260
6261 model = ddi_model_convert_from(mode & FMODELS);
6262 if (model == DDI_MODEL_ILP32) {
6263 con_log(CL_ANN1, (CE_CONT,
6264 "handle_drv_ioctl: DDI_MODEL_ILP32"));
6265
6266 xferlen = kdcmd->sgl.sge32[0].length;
6267
6268 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
6269 } else {
6270 #ifdef _ILP32
6271 con_log(CL_ANN1, (CE_CONT,
6272 "handle_drv_ioctl: DDI_MODEL_ILP32"));
6273 xferlen = kdcmd->sgl.sge32[0].length;
6274 ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
6275 #else
6276 con_log(CL_ANN1, (CE_CONT,
6277 "handle_drv_ioctl: DDI_MODEL_LP64"));
6278 xferlen = kdcmd->sgl.sge64[0].length;
6279 ubuf = (void *)(ulong_t)kdcmd->sgl.sge64[0].phys_addr;
6280 #endif
6281 }
6282 con_log(CL_ANN1, (CE_CONT, "handle_drv_ioctl: "
6283 "dataBuf=%p size=%d bytes", ubuf, xferlen));
6284
6285 switch (kdcmd->opcode) {
6286 case MRSAS_DRIVER_IOCTL_DRIVER_VERSION:
6287 con_log(CL_ANN1, (CE_CONT, "handle_drv_ioctl: "
6288 "MRSAS_DRIVER_IOCTL_DRIVER_VERSION"));
6289
6290 fill_up_drv_ver(&dv);
6291
6292 if (ddi_copyout(&dv, ubuf, xferlen, mode)) {
6293 con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
6294 "MRSAS_DRIVER_IOCTL_DRIVER_VERSION : "
6295 "copy to user space failed"));
6296 kdcmd->cmd_status = 1;
6297 rval = 1;
6298 } else {
6299 kdcmd->cmd_status = 0;
6300 }
6301 break;
6302 case MRSAS_DRIVER_IOCTL_PCI_INFORMATION:
6303 con_log(CL_ANN1, (CE_NOTE, "handle_drv_ioctl: "
6304 "MRSAS_DRIVER_IOCTL_PCI_INFORMAITON"));
6305
6306 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, instance->dip,
6307 0, "reg", &props, &num_props)) {
6308 con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
6309 "MRSAS_DRIVER_IOCTL_PCI_INFORMATION : "
6310 "ddi_prop_look_int_array failed"));
6311 rval = DDI_FAILURE;
6312 } else {
6313
6314 pi.busNumber = (props[0] >> 16) & 0xFF;
6315 pi.deviceNumber = (props[0] >> 11) & 0x1f;
6316 pi.functionNumber = (props[0] >> 8) & 0x7;
6317 ddi_prop_free((void *)props);
6318 }
6319
6320 pci_conf_buf = (uint8_t *)&pi.pciHeaderInfo;
6321
6322 for (i = 0; i < (sizeof (struct mrsas_pci_information) -
6323 offsetof(struct mrsas_pci_information, pciHeaderInfo));
6324 i++) {
6325 pci_conf_buf[i] =
6326 pci_config_get8(instance->pci_handle, i);
6327 }
6328
6329 if (ddi_copyout(&pi, ubuf, xferlen, mode)) {
6330 con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
6331 "MRSAS_DRIVER_IOCTL_PCI_INFORMATION : "
6332 "copy to user space failed"));
6333 kdcmd->cmd_status = 1;
6334 rval = 1;
6335 } else {
6336 kdcmd->cmd_status = 0;
6337 }
6338 break;
6339 default:
6340 con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
6341 "invalid driver specific IOCTL opcode = 0x%x",
6342 kdcmd->opcode));
6343 kdcmd->cmd_status = 1;
6344 rval = DDI_FAILURE;
6345 break;
6346 }
6347
6348 return (rval);
6349 }
6350
6351 /*
6352 * handle_mfi_ioctl
6353 */
6354 static int
6355 handle_mfi_ioctl(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
6356 int mode)
6357 {
6358 int rval = DDI_SUCCESS;
6359
6360 struct mrsas_header *hdr;
6361 struct mrsas_cmd *cmd;
6362
6363 if (instance->tbolt) {
6364 cmd = get_raid_msg_mfi_pkt(instance);
6365 } else {
6366 cmd = get_mfi_pkt(instance);
6367 }
6368 if (!cmd) {
6369 con_log(CL_ANN, (CE_WARN, "mr_sas: "
6370 "failed to get a cmd packet"));
6371 DTRACE_PROBE2(mfi_ioctl_err, uint16_t,
6372 instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
6373 return (DDI_FAILURE);
6374 }
6375
6376 /* Clear the frame buffer and assign back the context id */
6377 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
6378 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
6379 cmd->index);
6380
6381 hdr = (struct mrsas_header *)&ioctl->frame[0];
6382
6383 switch (ddi_get8(cmd->frame_dma_obj.acc_handle, &hdr->cmd)) {
6384 case MFI_CMD_OP_DCMD:
6385 rval = issue_mfi_dcmd(instance, ioctl, cmd, mode);
6386 break;
6387 case MFI_CMD_OP_SMP:
6388 rval = issue_mfi_smp(instance, ioctl, cmd, mode);
6389 break;
6390 case MFI_CMD_OP_STP:
6391 rval = issue_mfi_stp(instance, ioctl, cmd, mode);
6392 break;
6393 case MFI_CMD_OP_LD_SCSI:
6394 case MFI_CMD_OP_PD_SCSI:
6395 rval = issue_mfi_pthru(instance, ioctl, cmd, mode);
6396 break;
6397 default:
6398 con_log(CL_ANN, (CE_WARN, "handle_mfi_ioctl: "
6399 "invalid mfi ioctl hdr->cmd = %d", hdr->cmd));
6400 rval = DDI_FAILURE;
6401 break;
6402 }
6403
6404 if (mrsas_common_check(instance, cmd) != DDI_SUCCESS)
6405 rval = DDI_FAILURE;
6406
6407 if (instance->tbolt) {
6408 return_raid_msg_mfi_pkt(instance, cmd);
6409 } else {
6410 return_mfi_pkt(instance, cmd);
6411 }
6412
6413 return (rval);
6414 }
6415
6416 /*
6417 * AEN
6418 */
6419 static int
6420 handle_mfi_aen(struct mrsas_instance *instance, struct mrsas_aen *aen)
6421 {
6422 int rval = 0;
6423
6424 rval = register_mfi_aen(instance, instance->aen_seq_num,
6425 aen->class_locale_word);
6426
6427 aen->cmd_status = (uint8_t)rval;
6428
6429 return (rval);
6430 }
6431
6432 static int
6433 register_mfi_aen(struct mrsas_instance *instance, uint32_t seq_num,
6434 uint32_t class_locale_word)
6435 {
6436 int ret_val;
6437
6438 struct mrsas_cmd *cmd, *aen_cmd;
6439 struct mrsas_dcmd_frame *dcmd;
6440 union mrsas_evt_class_locale curr_aen;
6441 union mrsas_evt_class_locale prev_aen;
6442
6443 con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
6444 /*
6445 * If there an AEN pending already (aen_cmd), check if the
6446 * class_locale of that pending AEN is inclusive of the new
6447 * AEN request we currently have. If it is, then we don't have
6448 * to do anything. In other words, whichever events the current
6449 * AEN request is subscribing to, have already been subscribed
6450 * to.
6451 *
6452 * If the old_cmd is _not_ inclusive, then we have to abort
6453 * that command, form a class_locale that is superset of both
6454 * old and current and re-issue to the FW
6455 */
6456
6457 curr_aen.word = LE_32(class_locale_word);
6458 curr_aen.members.locale = LE_16(curr_aen.members.locale);
6459 aen_cmd = instance->aen_cmd;
6460 if (aen_cmd) {
6461 prev_aen.word = ddi_get32(aen_cmd->frame_dma_obj.acc_handle,
6462 &aen_cmd->frame->dcmd.mbox.w[1]);
6463 prev_aen.word = LE_32(prev_aen.word);
6464 prev_aen.members.locale = LE_16(prev_aen.members.locale);
6465 /*
6466 * A class whose enum value is smaller is inclusive of all
6467 * higher values. If a PROGRESS (= -1) was previously
6468 * registered, then a new registration requests for higher
6469 * classes need not be sent to FW. They are automatically
6470 * included.
6471 *
6472 * Locale numbers don't have such hierarchy. They are bitmap
6473 * values
6474 */
6475 if ((prev_aen.members.class <= curr_aen.members.class) &&
6476 !((prev_aen.members.locale & curr_aen.members.locale) ^
6477 curr_aen.members.locale)) {
6478 /*
6479 * Previously issued event registration includes
6480 * current request. Nothing to do.
6481 */
6482
6483 return (0);
6484 } else {
6485 curr_aen.members.locale |= prev_aen.members.locale;
6486
6487 if (prev_aen.members.class < curr_aen.members.class)
6488 curr_aen.members.class = prev_aen.members.class;
6489
6490 ret_val = abort_aen_cmd(instance, aen_cmd);
6491
6492 if (ret_val) {
6493 con_log(CL_ANN, (CE_WARN, "register_mfi_aen: "
6494 "failed to abort prevous AEN command"));
6495
6496 return (ret_val);
6497 }
6498 }
6499 } else {
6500 curr_aen.word = LE_32(class_locale_word);
6501 curr_aen.members.locale = LE_16(curr_aen.members.locale);
6502 }
6503
6504 if (instance->tbolt) {
6505 cmd = get_raid_msg_mfi_pkt(instance);
6506 } else {
6507 cmd = get_mfi_pkt(instance);
6508 }
6509
6510 if (!cmd) {
6511 DTRACE_PROBE2(mfi_aen_err, uint16_t, instance->fw_outstanding,
6512 uint16_t, instance->max_fw_cmds);
6513 return (ENOMEM);
6514 }
6515
6516 /* Clear the frame buffer and assign back the context id */
6517 (void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
6518 ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
6519 cmd->index);
6520
6521 dcmd = &cmd->frame->dcmd;
6522
6523 /* for(i = 0; i < DCMD_MBOX_SZ; i++) dcmd->mbox.b[i] = 0; */
6524 (void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
6525
6526 (void) memset(instance->mfi_evt_detail_obj.buffer, 0,
6527 sizeof (struct mrsas_evt_detail));
6528
6529 /* Prepare DCMD for aen registration */
6530 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
6531 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0x0);
6532 ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 1);
6533 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
6534 MFI_FRAME_DIR_READ);
6535 ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
6536 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len,
6537 sizeof (struct mrsas_evt_detail));
6538 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
6539 MR_DCMD_CTRL_EVENT_WAIT);
6540 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->mbox.w[0], seq_num);
6541 curr_aen.members.locale = LE_16(curr_aen.members.locale);
6542 curr_aen.word = LE_32(curr_aen.word);
6543 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->mbox.w[1],
6544 curr_aen.word);
6545 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].phys_addr,
6546 instance->mfi_evt_detail_obj.dma_cookie[0].dmac_address);
6547 ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].length,
6548 sizeof (struct mrsas_evt_detail));
6549
6550 instance->aen_seq_num = seq_num;
6551
6552
6553 /*
6554 * Store reference to the cmd used to register for AEN. When an
6555 * application wants us to register for AEN, we have to abort this
6556 * cmd and re-register with a new EVENT LOCALE supplied by that app
6557 */
6558 instance->aen_cmd = cmd;
6559
6560 cmd->frame_count = 1;
6561
6562 /* Issue the aen registration frame */
6563 /* atomic_add_16 (&instance->fw_outstanding, 1); */
6564 if (instance->tbolt) {
6565 mr_sas_tbolt_build_mfi_cmd(instance, cmd);
6566 }
6567 instance->func_ptr->issue_cmd(cmd, instance);
6568
6569 return (0);
6570 }
6571
6572 void
6573 display_scsi_inquiry(caddr_t scsi_inq)
6574 {
6575 #define MAX_SCSI_DEVICE_CODE 14
6576 int i;
6577 char inquiry_buf[256] = {0};
6578 int len;
6579 const char *const scsi_device_types[] = {
6580 "Direct-Access ",
6581 "Sequential-Access",
6582 "Printer ",
6583 "Processor ",
6584 "WORM ",
6585 "CD-ROM ",
6586 "Scanner ",
6587 "Optical Device ",
6588 "Medium Changer ",
6589 "Communications ",
6590 "Unknown ",
6591 "Unknown ",
6592 "Unknown ",
6593 "Enclosure ",
6594 };
6595
6596 len = 0;
6597
6598 len += snprintf(inquiry_buf + len, 265 - len, " Vendor: ");
6599 for (i = 8; i < 16; i++) {
6600 len += snprintf(inquiry_buf + len, 265 - len, "%c",
6601 scsi_inq[i]);
6602 }
6603
6604 len += snprintf(inquiry_buf + len, 265 - len, " Model: ");
6605
6606 for (i = 16; i < 32; i++) {
6607 len += snprintf(inquiry_buf + len, 265 - len, "%c",
6608 scsi_inq[i]);
6609 }
6610
6611 len += snprintf(inquiry_buf + len, 265 - len, " Rev: ");
6612
6613 for (i = 32; i < 36; i++) {
6614 len += snprintf(inquiry_buf + len, 265 - len, "%c",
6615 scsi_inq[i]);
6616 }
6617
6618 len += snprintf(inquiry_buf + len, 265 - len, "\n");
6619
6620
6621 i = scsi_inq[0] & 0x1f;
6622
6623
6624 len += snprintf(inquiry_buf + len, 265 - len, " Type: %s ",
6625 i < MAX_SCSI_DEVICE_CODE ? scsi_device_types[i] :
6626 "Unknown ");
6627
6628
6629 len += snprintf(inquiry_buf + len, 265 - len,
6630 " ANSI SCSI revision: %02x", scsi_inq[2] & 0x07);
6631
6632 if ((scsi_inq[2] & 0x07) == 1 && (scsi_inq[3] & 0x0f) == 1) {
6633 len += snprintf(inquiry_buf + len, 265 - len, " CCS\n");
6634 } else {
6635 len += snprintf(inquiry_buf + len, 265 - len, "\n");
6636 }
6637
6638 con_log(CL_DLEVEL2, (CE_CONT, inquiry_buf));
6639 }
6640
6641 static void
6642 io_timeout_checker(void *arg)
6643 {
6644 struct scsi_pkt *pkt;
6645 struct mrsas_instance *instance = arg;
6646 struct mrsas_cmd *cmd = NULL;
6647 struct mrsas_header *hdr;
6648 int time = 0;
6649 int counter = 0;
6650 struct mlist_head *pos, *next;
6651 mlist_t process_list;
6652
6653 if (instance->adapterresetinprogress == 1) {
6654 con_log(CL_ANN, (CE_NOTE, "io_timeout_checker:"
6655 " reset in progress"));
6656
6657 instance->timeout_id = timeout(io_timeout_checker,
6658 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
6659 return;
6660 }
6661
6662 /* See if this check needs to be in the beginning or last in ISR */
6663 if (mrsas_initiate_ocr_if_fw_is_faulty(instance) == 1) {
6664 cmn_err(CE_WARN, "io_timeout_checker: "
6665 "FW Fault, calling reset adapter");
6666 cmn_err(CE_CONT, "io_timeout_checker: "
6667 "fw_outstanding 0x%X max_fw_cmds 0x%X",
6668 instance->fw_outstanding, instance->max_fw_cmds);
6669 if (instance->adapterresetinprogress == 0) {
6670 instance->adapterresetinprogress = 1;
6671 if (instance->tbolt)
6672 (void) mrsas_tbolt_reset_ppc(instance);
6673 else
6674 (void) mrsas_reset_ppc(instance);
6675 instance->adapterresetinprogress = 0;
6676 }
6677 instance->timeout_id = timeout(io_timeout_checker,
6678 (void *) instance, drv_usectohz(MRSAS_1_SECOND));
6679 return;
6680 }
6681
6682 INIT_LIST_HEAD(&process_list);
6683
6684 mutex_enter(&instance->cmd_pend_mtx);
6685 mlist_for_each_safe(pos, next, &instance->cmd_pend_list) {
6686 cmd = mlist_entry(pos, struct mrsas_cmd, list);
6687
6688 if (cmd == NULL) {
6689 continue;
6690 }
6691
6692 if (cmd->sync_cmd == MRSAS_TRUE) {
6693 hdr = (struct mrsas_header *)&cmd->frame->hdr;
6694 if (hdr == NULL) {
6695 continue;
6696 }
6697 time = --cmd->drv_pkt_time;
6698 } else {
6699 pkt = cmd->pkt;
6700 if (pkt == NULL) {
6701 continue;
6702 }
6703 time = --cmd->drv_pkt_time;
6704 }
6705 if (time <= 0) {
6706 cmn_err(CE_WARN, "%llx: "
6707 "io_timeout_checker: TIMING OUT: pkt: %p, "
6708 "cmd %p fw_outstanding 0x%X max_fw_cmds 0x%X\n",
6709 gethrtime(), (void *)pkt, (void *)cmd,
6710 instance->fw_outstanding, instance->max_fw_cmds);
6711
6712 counter++;
6713 break;
6714 }
6715 }
6716 mutex_exit(&instance->cmd_pend_mtx);
6717
6718 if (counter) {
6719 if (instance->disable_online_ctrl_reset == 1) {
6720 cmn_err(CE_WARN, "mr_sas %d: %s(): OCR is NOT "
6721 "supported by Firmware, KILL adapter!!!",
6722 instance->instance, __func__);
6723
6724 if (instance->tbolt)
6725 mrsas_tbolt_kill_adapter(instance);
6726 else
6727 (void) mrsas_kill_adapter(instance);
6728
6729 return;
6730 } else {
6731 if (cmd->retry_count_for_ocr <= IO_RETRY_COUNT) {
6732 if (instance->adapterresetinprogress == 0) {
6733 if (instance->tbolt) {
6734 (void) mrsas_tbolt_reset_ppc(
6735 instance);
6736 } else {
6737 (void) mrsas_reset_ppc(
6738 instance);
6739 }
6740 }
6741 } else {
6742 cmn_err(CE_WARN,
6743 "io_timeout_checker: "
6744 "cmd %p cmd->index %d "
6745 "timed out even after 3 resets: "
6746 "so KILL adapter", (void *)cmd, cmd->index);
6747
6748 mrsas_print_cmd_details(instance, cmd, 0xDD);
6749
6750 if (instance->tbolt)
6751 mrsas_tbolt_kill_adapter(instance);
6752 else
6753 (void) mrsas_kill_adapter(instance);
6754 return;
6755 }
6756 }
6757 }
6758 con_log(CL_ANN, (CE_NOTE, "mrsas: "
6759 "schedule next timeout check: "
6760 "do timeout \n"));
6761 instance->timeout_id =
6762 timeout(io_timeout_checker, (void *)instance,
6763 drv_usectohz(MRSAS_1_SECOND));
6764 }
6765
6766 static uint32_t
6767 read_fw_status_reg_ppc(struct mrsas_instance *instance)
6768 {
6769 return ((uint32_t)RD_OB_SCRATCH_PAD_0(instance));
6770 }
6771
6772 static void
6773 issue_cmd_ppc(struct mrsas_cmd *cmd, struct mrsas_instance *instance)
6774 {
6775 struct scsi_pkt *pkt;
6776 atomic_add_16(&instance->fw_outstanding, 1);
6777
6778 pkt = cmd->pkt;
6779 if (pkt) {
6780 con_log(CL_DLEVEL1, (CE_NOTE, "%llx : issue_cmd_ppc:"
6781 "ISSUED CMD TO FW : called : cmd:"
6782 ": %p instance : %p pkt : %p pkt_time : %x\n",
6783 gethrtime(), (void *)cmd, (void *)instance,
6784 (void *)pkt, cmd->drv_pkt_time));
6785 if (instance->adapterresetinprogress) {
6786 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
6787 con_log(CL_ANN1, (CE_NOTE, "Reset the scsi_pkt timer"));
6788 } else {
6789 push_pending_mfi_pkt(instance, cmd);
6790 }
6791
6792 } else {
6793 con_log(CL_DLEVEL1, (CE_NOTE, "%llx : issue_cmd_ppc:"
6794 "ISSUED CMD TO FW : called : cmd : %p, instance: %p"
6795 "(NO PKT)\n", gethrtime(), (void *)cmd, (void *)instance));
6796 }
6797
6798 mutex_enter(&instance->reg_write_mtx);
6799 /* Issue the command to the FW */
6800 WR_IB_QPORT((cmd->frame_phys_addr) |
6801 (((cmd->frame_count - 1) << 1) | 1), instance);
6802 mutex_exit(&instance->reg_write_mtx);
6803
6804 }
6805
6806 /*
6807 * issue_cmd_in_sync_mode
6808 */
6809 static int
6810 issue_cmd_in_sync_mode_ppc(struct mrsas_instance *instance,
6811 struct mrsas_cmd *cmd)
6812 {
6813 int i;
6814 uint32_t msecs = MFI_POLL_TIMEOUT_SECS * (10 * MILLISEC);
6815 struct mrsas_header *hdr = &cmd->frame->hdr;
6816
6817 con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_sync_mode_ppc: called"));
6818
6819 if (instance->adapterresetinprogress) {
6820 cmd->drv_pkt_time = ddi_get16(
6821 cmd->frame_dma_obj.acc_handle, &hdr->timeout);
6822 if (cmd->drv_pkt_time < debug_timeout_g)
6823 cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
6824
6825 con_log(CL_ANN1, (CE_NOTE, "sync_mode_ppc: "
6826 "issue and return in reset case\n"));
6827 WR_IB_QPORT((cmd->frame_phys_addr) |
6828 (((cmd->frame_count - 1) << 1) | 1), instance);
6829
6830 return (DDI_SUCCESS);
6831 } else {
6832 con_log(CL_ANN1, (CE_NOTE, "sync_mode_ppc: pushing the pkt\n"));
6833 push_pending_mfi_pkt(instance, cmd);
6834 }
6835
6836 cmd->cmd_status = ENODATA;
6837
6838 mutex_enter(&instance->reg_write_mtx);
6839 /* Issue the command to the FW */
6840 WR_IB_QPORT((cmd->frame_phys_addr) |
6841 (((cmd->frame_count - 1) << 1) | 1), instance);
6842 mutex_exit(&instance->reg_write_mtx);
6843
6844 mutex_enter(&instance->int_cmd_mtx);
6845 for (i = 0; i < msecs && (cmd->cmd_status == ENODATA); i++) {
6846 cv_wait(&instance->int_cmd_cv, &instance->int_cmd_mtx);
6847 }
6848 mutex_exit(&instance->int_cmd_mtx);
6849
6850 con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_sync_mode_ppc: done"));
6851
6852 if (i < (msecs -1)) {
6853 return (DDI_SUCCESS);
6854 } else {
6855 return (DDI_FAILURE);
6856 }
6857 }
6858
6859 /*
6860 * issue_cmd_in_poll_mode
6861 */
6862 static int
6863 issue_cmd_in_poll_mode_ppc(struct mrsas_instance *instance,
6864 struct mrsas_cmd *cmd)
6865 {
6866 int i;
6867 uint16_t flags;
6868 uint32_t msecs = MFI_POLL_TIMEOUT_SECS * MILLISEC;
6869 struct mrsas_header *frame_hdr;
6870
6871 con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_poll_mode_ppc: called"));
6872
6873 frame_hdr = (struct mrsas_header *)cmd->frame;
6874 ddi_put8(cmd->frame_dma_obj.acc_handle, &frame_hdr->cmd_status,
6875 MFI_CMD_STATUS_POLL_MODE);
6876 flags = ddi_get16(cmd->frame_dma_obj.acc_handle, &frame_hdr->flags);
6877 flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE;
6878
6879 ddi_put16(cmd->frame_dma_obj.acc_handle, &frame_hdr->flags, flags);
6880
6881 /* issue the frame using inbound queue port */
6882 WR_IB_QPORT((cmd->frame_phys_addr) |
6883 (((cmd->frame_count - 1) << 1) | 1), instance);
6884
6885 /* wait for cmd_status to change from 0xFF */
6886 for (i = 0; i < msecs && (
6887 ddi_get8(cmd->frame_dma_obj.acc_handle, &frame_hdr->cmd_status)
6888 == MFI_CMD_STATUS_POLL_MODE); i++) {
6889 drv_usecwait(MILLISEC); /* wait for 1000 usecs */
6890 }
6891
6892 if (ddi_get8(cmd->frame_dma_obj.acc_handle, &frame_hdr->cmd_status)
6893 == MFI_CMD_STATUS_POLL_MODE) {
6894 con_log(CL_ANN, (CE_NOTE, "issue_cmd_in_poll_mode: "
6895 "cmd polling timed out"));
6896 return (DDI_FAILURE);
6897 }
6898
6899 return (DDI_SUCCESS);
6900 }
6901
6902 static void
6903 enable_intr_ppc(struct mrsas_instance *instance)
6904 {
6905 uint32_t mask;
6906
6907 con_log(CL_ANN1, (CE_NOTE, "enable_intr_ppc: called"));
6908
6909 /* WR_OB_DOORBELL_CLEAR(0xFFFFFFFF, instance); */
6910 WR_OB_DOORBELL_CLEAR(OB_DOORBELL_CLEAR_MASK, instance);
6911
6912 /* WR_OB_INTR_MASK(~0x80000000, instance); */
6913 WR_OB_INTR_MASK(~(MFI_REPLY_2108_MESSAGE_INTR_MASK), instance);
6914
6915 /* dummy read to force PCI flush */
6916 mask = RD_OB_INTR_MASK(instance);
6917
6918 con_log(CL_ANN1, (CE_NOTE, "enable_intr_ppc: "
6919 "outbound_intr_mask = 0x%x", mask));
6920 }
6921
6922 static void
6923 disable_intr_ppc(struct mrsas_instance *instance)
6924 {
6925 uint32_t mask;
6926
6927 con_log(CL_ANN1, (CE_NOTE, "disable_intr_ppc: called"));
6928
6929 con_log(CL_ANN1, (CE_NOTE, "disable_intr_ppc: before : "
6930 "outbound_intr_mask = 0x%x", RD_OB_INTR_MASK(instance)));
6931
6932 /* WR_OB_INTR_MASK(0xFFFFFFFF, instance); */
6933 WR_OB_INTR_MASK(OB_INTR_MASK, instance);
6934
6935 con_log(CL_ANN1, (CE_NOTE, "disable_intr_ppc: after : "
6936 "outbound_intr_mask = 0x%x", RD_OB_INTR_MASK(instance)));
6937
6938 /* dummy read to force PCI flush */
6939 mask = RD_OB_INTR_MASK(instance);
6940 #ifdef lint
6941 mask = mask;
6942 #endif
6943 }
6944
6945 static int
6946 intr_ack_ppc(struct mrsas_instance *instance)
6947 {
6948 uint32_t status;
6949 int ret = DDI_INTR_CLAIMED;
6950
6951 con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: called"));
6952
6953 /* check if it is our interrupt */
6954 status = RD_OB_INTR_STATUS(instance);
6955
6956 con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: status = 0x%x", status));
6957
6958 if (!(status & MFI_REPLY_2108_MESSAGE_INTR)) {
6959 ret = DDI_INTR_UNCLAIMED;
6960 }
6961
6962 if (mrsas_check_acc_handle(instance->regmap_handle) != DDI_SUCCESS) {
6963 ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
6964 ret = DDI_INTR_UNCLAIMED;
6965 }
6966
6967 if (ret == DDI_INTR_UNCLAIMED) {
6968 return (ret);
6969 }
6970 /* clear the interrupt by writing back the same value */
6971 WR_OB_DOORBELL_CLEAR(status, instance);
6972
6973 /* dummy READ */
6974 status = RD_OB_INTR_STATUS(instance);
6975
6976 con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: interrupt cleared"));
6977
6978 return (ret);
6979 }
6980
6981 /*
6982 * Marks HBA as bad. This will be called either when an
6983 * IO packet times out even after 3 FW resets
6984 * or FW is found to be fault even after 3 continuous resets.
6985 */
6986
6987 static int
6988 mrsas_kill_adapter(struct mrsas_instance *instance)
6989 {
6990 if (instance->deadadapter == 1)
6991 return (DDI_FAILURE);
6992
6993 con_log(CL_ANN1, (CE_NOTE, "mrsas_kill_adapter: "
6994 "Writing to doorbell with MFI_STOP_ADP "));
6995 mutex_enter(&instance->ocr_flags_mtx);
6996 instance->deadadapter = 1;
6997 mutex_exit(&instance->ocr_flags_mtx);
6998 instance->func_ptr->disable_intr(instance);
6999 WR_IB_DOORBELL(MFI_STOP_ADP, instance);
7000 (void) mrsas_complete_pending_cmds(instance);
7001 return (DDI_SUCCESS);
7002 }
7003
7004
7005 static int
7006 mrsas_reset_ppc(struct mrsas_instance *instance)
7007 {
7008 uint32_t status;
7009 uint32_t retry = 0;
7010 uint32_t cur_abs_reg_val;
7011 uint32_t fw_state;
7012
7013 con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
7014
7015 if (instance->deadadapter == 1) {
7016 cmn_err(CE_WARN, "mrsas_reset_ppc: "
7017 "no more resets as HBA has been marked dead ");
7018 return (DDI_FAILURE);
7019 }
7020 mutex_enter(&instance->ocr_flags_mtx);
7021 instance->adapterresetinprogress = 1;
7022 mutex_exit(&instance->ocr_flags_mtx);
7023 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: adpterresetinprogress "
7024 "flag set, time %llx", gethrtime()));
7025
7026 instance->func_ptr->disable_intr(instance);
7027 retry_reset:
7028 WR_IB_WRITE_SEQ(0, instance);
7029 WR_IB_WRITE_SEQ(4, instance);
7030 WR_IB_WRITE_SEQ(0xb, instance);
7031 WR_IB_WRITE_SEQ(2, instance);
7032 WR_IB_WRITE_SEQ(7, instance);
7033 WR_IB_WRITE_SEQ(0xd, instance);
7034 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: magic number written "
7035 "to write sequence register\n"));
7036 delay(100 * drv_usectohz(MILLISEC));
7037 status = RD_OB_DRWE(instance);
7038
7039 while (!(status & DIAG_WRITE_ENABLE)) {
7040 delay(100 * drv_usectohz(MILLISEC));
7041 status = RD_OB_DRWE(instance);
7042 if (retry++ == 100) {
7043 cmn_err(CE_WARN, "mrsas_reset_ppc: DRWE bit "
7044 "check retry count %d\n", retry);
7045 return (DDI_FAILURE);
7046 }
7047 }
7048 WR_IB_DRWE(status | DIAG_RESET_ADAPTER, instance);
7049 delay(100 * drv_usectohz(MILLISEC));
7050 status = RD_OB_DRWE(instance);
7051 while (status & DIAG_RESET_ADAPTER) {
7052 delay(100 * drv_usectohz(MILLISEC));
7053 status = RD_OB_DRWE(instance);
7054 if (retry++ == 100) {
7055 cmn_err(CE_WARN, "mrsas_reset_ppc: "
7056 "RESET FAILED. KILL adapter called\n.");
7057
7058 (void) mrsas_kill_adapter(instance);
7059 return (DDI_FAILURE);
7060 }
7061 }
7062 con_log(CL_ANN, (CE_NOTE, "mrsas_reset_ppc: Adapter reset complete"));
7063 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7064 "Calling mfi_state_transition_to_ready"));
7065
7066 /* Mark HBA as bad, if FW is fault after 3 continuous resets */
7067 if (mfi_state_transition_to_ready(instance) ||
7068 debug_fw_faults_after_ocr_g == 1) {
7069 cur_abs_reg_val =
7070 instance->func_ptr->read_fw_status_reg(instance);
7071 fw_state = cur_abs_reg_val & MFI_STATE_MASK;
7072
7073 #ifdef OCRDEBUG
7074 con_log(CL_ANN1, (CE_NOTE,
7075 "mrsas_reset_ppc :before fake: FW is not ready "
7076 "FW state = 0x%x", fw_state));
7077 if (debug_fw_faults_after_ocr_g == 1)
7078 fw_state = MFI_STATE_FAULT;
7079 #endif
7080
7081 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc : FW is not ready "
7082 "FW state = 0x%x", fw_state));
7083
7084 if (fw_state == MFI_STATE_FAULT) {
7085 /* increment the count */
7086 instance->fw_fault_count_after_ocr++;
7087 if (instance->fw_fault_count_after_ocr
7088 < MAX_FW_RESET_COUNT) {
7089 cmn_err(CE_WARN, "mrsas_reset_ppc: "
7090 "FW is in fault after OCR count %d "
7091 "Retry Reset",
7092 instance->fw_fault_count_after_ocr);
7093 goto retry_reset;
7094
7095 } else {
7096 cmn_err(CE_WARN, "mrsas_reset_ppc: "
7097 "Max Reset Count exceeded >%d"
7098 "Mark HBA as bad, KILL adapter",
7099 MAX_FW_RESET_COUNT);
7100
7101 (void) mrsas_kill_adapter(instance);
7102 return (DDI_FAILURE);
7103 }
7104 }
7105 }
7106 /* reset the counter as FW is up after OCR */
7107 instance->fw_fault_count_after_ocr = 0;
7108
7109
7110 ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
7111 instance->producer, 0);
7112
7113 ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
7114 instance->consumer, 0);
7115
7116 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7117 " after resetting produconsumer chck indexs:"
7118 "producer %x consumer %x", *instance->producer,
7119 *instance->consumer));
7120
7121 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7122 "Calling mrsas_issue_init_mfi"));
7123 (void) mrsas_issue_init_mfi(instance);
7124 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7125 "mrsas_issue_init_mfi Done"));
7126
7127 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7128 "Calling mrsas_print_pending_cmd\n"));
7129 (void) mrsas_print_pending_cmds(instance);
7130 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7131 "mrsas_print_pending_cmd done\n"));
7132
7133 instance->func_ptr->enable_intr(instance);
7134 instance->fw_outstanding = 0;
7135
7136 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7137 "Calling mrsas_issue_pending_cmds"));
7138 (void) mrsas_issue_pending_cmds(instance);
7139 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7140 "issue_pending_cmds done.\n"));
7141
7142 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7143 "Calling aen registration"));
7144
7145
7146 instance->aen_cmd->retry_count_for_ocr = 0;
7147 instance->aen_cmd->drv_pkt_time = 0;
7148
7149 instance->func_ptr->issue_cmd(instance->aen_cmd, instance);
7150 con_log(CL_ANN1, (CE_NOTE, "Unsetting adpresetinprogress flag.\n"));
7151
7152 mutex_enter(&instance->ocr_flags_mtx);
7153 instance->adapterresetinprogress = 0;
7154 mutex_exit(&instance->ocr_flags_mtx);
7155 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7156 "adpterresetinprogress flag unset"));
7157
7158 con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc done\n"));
7159 return (DDI_SUCCESS);
7160 }
7161
7162 /*
7163 * FMA functions.
7164 */
7165 int
7166 mrsas_common_check(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
7167 {
7168 int ret = DDI_SUCCESS;
7169
7170 if (cmd != NULL &&
7171 mrsas_check_dma_handle(cmd->frame_dma_obj.dma_handle) !=
7172 DDI_SUCCESS) {
7173 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7174 if (cmd->pkt != NULL) {
7175 cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7176 cmd->pkt->pkt_statistics = 0;
7177 }
7178 ret = DDI_FAILURE;
7179 }
7180 if (mrsas_check_dma_handle(instance->mfi_internal_dma_obj.dma_handle)
7181 != DDI_SUCCESS) {
7182 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7183 if (cmd != NULL && cmd->pkt != NULL) {
7184 cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7185 cmd->pkt->pkt_statistics = 0;
7186 }
7187 ret = DDI_FAILURE;
7188 }
7189 if (mrsas_check_dma_handle(instance->mfi_evt_detail_obj.dma_handle) !=
7190 DDI_SUCCESS) {
7191 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7192 if (cmd != NULL && cmd->pkt != NULL) {
7193 cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7194 cmd->pkt->pkt_statistics = 0;
7195 }
7196 ret = DDI_FAILURE;
7197 }
7198 if (mrsas_check_acc_handle(instance->regmap_handle) != DDI_SUCCESS) {
7199 ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7200
7201 ddi_fm_acc_err_clear(instance->regmap_handle, DDI_FME_VER0);
7202
7203 if (cmd != NULL && cmd->pkt != NULL) {
7204 cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7205 cmd->pkt->pkt_statistics = 0;
7206 }
7207 ret = DDI_FAILURE;
7208 }
7209
7210 return (ret);
7211 }
7212
7213 /*ARGSUSED*/
7214 static int
7215 mrsas_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data)
7216 {
7217 /*
7218 * as the driver can always deal with an error in any dma or
7219 * access handle, we can just return the fme_status value.
7220 */
7221 pci_ereport_post(dip, err, NULL);
7222 return (err->fme_status);
7223 }
7224
7225 static void
7226 mrsas_fm_init(struct mrsas_instance *instance)
7227 {
7228 /* Need to change iblock to priority for new MSI intr */
7229 ddi_iblock_cookie_t fm_ibc;
7230
7231 /* Only register with IO Fault Services if we have some capability */
7232 if (instance->fm_capabilities) {
7233 /* Adjust access and dma attributes for FMA */
7234 endian_attr.devacc_attr_access = DDI_FLAGERR_ACC;
7235 mrsas_generic_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;
7236
7237 /*
7238 * Register capabilities with IO Fault Services.
7239 * fm_capabilities will be updated to indicate
7240 * capabilities actually supported (not requested.)
7241 */
7242
7243 ddi_fm_init(instance->dip, &instance->fm_capabilities, &fm_ibc);
7244
7245 /*
7246 * Initialize pci ereport capabilities if ereport
7247 * capable (should always be.)
7248 */
7249
7250 if (DDI_FM_EREPORT_CAP(instance->fm_capabilities) ||
7251 DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7252 pci_ereport_setup(instance->dip);
7253 }
7254
7255 /*
7256 * Register error callback if error callback capable.
7257 */
7258 if (DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7259 ddi_fm_handler_register(instance->dip,
7260 mrsas_fm_error_cb, (void*) instance);
7261 }
7262 } else {
7263 endian_attr.devacc_attr_access = DDI_DEFAULT_ACC;
7264 mrsas_generic_dma_attr.dma_attr_flags = 0;
7265 }
7266 }
7267
7268 static void
7269 mrsas_fm_fini(struct mrsas_instance *instance)
7270 {
7271 /* Only unregister FMA capabilities if registered */
7272 if (instance->fm_capabilities) {
7273 /*
7274 * Un-register error callback if error callback capable.
7275 */
7276 if (DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7277 ddi_fm_handler_unregister(instance->dip);
7278 }
7279
7280 /*
7281 * Release any resources allocated by pci_ereport_setup()
7282 */
7283 if (DDI_FM_EREPORT_CAP(instance->fm_capabilities) ||
7284 DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7285 pci_ereport_teardown(instance->dip);
7286 }
7287
7288 /* Unregister from IO Fault Services */
7289 ddi_fm_fini(instance->dip);
7290
7291 /* Adjust access and dma attributes for FMA */
7292 endian_attr.devacc_attr_access = DDI_DEFAULT_ACC;
7293 mrsas_generic_dma_attr.dma_attr_flags = 0;
7294 }
7295 }
7296
7297 int
7298 mrsas_check_acc_handle(ddi_acc_handle_t handle)
7299 {
7300 ddi_fm_error_t de;
7301
7302 if (handle == NULL) {
7303 return (DDI_FAILURE);
7304 }
7305
7306 ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION);
7307
7308 return (de.fme_status);
7309 }
7310
7311 int
7312 mrsas_check_dma_handle(ddi_dma_handle_t handle)
7313 {
7314 ddi_fm_error_t de;
7315
7316 if (handle == NULL) {
7317 return (DDI_FAILURE);
7318 }
7319
7320 ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION);
7321
7322 return (de.fme_status);
7323 }
7324
7325 void
7326 mrsas_fm_ereport(struct mrsas_instance *instance, char *detail)
7327 {
7328 uint64_t ena;
7329 char buf[FM_MAX_CLASS];
7330
7331 (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", DDI_FM_DEVICE, detail);
7332 ena = fm_ena_generate(0, FM_ENA_FMT1);
7333 if (DDI_FM_EREPORT_CAP(instance->fm_capabilities)) {
7334 ddi_fm_ereport_post(instance->dip, buf, ena, DDI_NOSLEEP,
7335 FM_VERSION, DATA_TYPE_UINT8, FM_EREPORT_VERSION, NULL);
7336 }
7337 }
7338
7339 static int
7340 mrsas_add_intrs(struct mrsas_instance *instance, int intr_type)
7341 {
7342
7343 dev_info_t *dip = instance->dip;
7344 int avail, actual, count;
7345 int i, flag, ret;
7346
7347 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: intr_type = %x",
7348 intr_type));
7349
7350 /* Get number of interrupts */
7351 ret = ddi_intr_get_nintrs(dip, intr_type, &count);
7352 if ((ret != DDI_SUCCESS) || (count == 0)) {
7353 con_log(CL_ANN, (CE_WARN, "ddi_intr_get_nintrs() failed:"
7354 "ret %d count %d", ret, count));
7355
7356 return (DDI_FAILURE);
7357 }
7358
7359 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: count = %d ", count));
7360
7361 /* Get number of available interrupts */
7362 ret = ddi_intr_get_navail(dip, intr_type, &avail);
7363 if ((ret != DDI_SUCCESS) || (avail == 0)) {
7364 con_log(CL_ANN, (CE_WARN, "ddi_intr_get_navail() failed:"
7365 "ret %d avail %d", ret, avail));
7366
7367 return (DDI_FAILURE);
7368 }
7369 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: avail = %d ", avail));
7370
7371 /* Only one interrupt routine. So limit the count to 1 */
7372 if (count > 1) {
7373 count = 1;
7374 }
7375
7376 /*
7377 * Allocate an array of interrupt handlers. Currently we support
7378 * only one interrupt. The framework can be extended later.
7379 */
7380 instance->intr_htable_size = count * sizeof (ddi_intr_handle_t);
7381 instance->intr_htable = kmem_zalloc(instance->intr_htable_size,
7382 KM_SLEEP);
7383 if (instance->intr_htable == NULL) {
7384 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
7385 "failed to allocate memory for intr-handle table"));
7386 instance->intr_htable_size = 0;
7387 return (DDI_FAILURE);
7388 }
7389
7390 flag = ((intr_type == DDI_INTR_TYPE_MSI) ||
7391 (intr_type == DDI_INTR_TYPE_MSIX)) ?
7392 DDI_INTR_ALLOC_STRICT : DDI_INTR_ALLOC_NORMAL;
7393
7394 /* Allocate interrupt */
7395 ret = ddi_intr_alloc(dip, instance->intr_htable, intr_type, 0,
7396 count, &actual, flag);
7397
7398 if ((ret != DDI_SUCCESS) || (actual == 0)) {
7399 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
7400 "avail = %d", avail));
7401 goto mrsas_free_htable;
7402 }
7403
7404 if (actual < count) {
7405 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
7406 "Requested = %d Received = %d", count, actual));
7407 }
7408 instance->intr_cnt = actual;
7409
7410 /*
7411 * Get the priority of the interrupt allocated.
7412 */
7413 if ((ret = ddi_intr_get_pri(instance->intr_htable[0],
7414 &instance->intr_pri)) != DDI_SUCCESS) {
7415 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
7416 "get priority call failed"));
7417 goto mrsas_free_handles;
7418 }
7419
7420 /*
7421 * Test for high level mutex. we don't support them.
7422 */
7423 if (instance->intr_pri >= ddi_intr_get_hilevel_pri()) {
7424 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
7425 "High level interrupts not supported."));
7426 goto mrsas_free_handles;
7427 }
7428
7429 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: intr_pri = 0x%x ",
7430 instance->intr_pri));
7431
7432 /* Call ddi_intr_add_handler() */
7433 for (i = 0; i < actual; i++) {
7434 ret = ddi_intr_add_handler(instance->intr_htable[i],
7435 (ddi_intr_handler_t *)mrsas_isr, (caddr_t)instance,
7436 (caddr_t)(uintptr_t)i);
7437
7438 if (ret != DDI_SUCCESS) {
7439 con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs:"
7440 "failed %d", ret));
7441 goto mrsas_free_handles;
7442 }
7443
7444 }
7445
7446 con_log(CL_DLEVEL1, (CE_NOTE, " ddi_intr_add_handler done"));
7447
7448 if ((ret = ddi_intr_get_cap(instance->intr_htable[0],
7449 &instance->intr_cap)) != DDI_SUCCESS) {
7450 con_log(CL_ANN, (CE_WARN, "ddi_intr_get_cap() failed %d",
7451 ret));
7452 goto mrsas_free_handlers;
7453 }
7454
7455 if (instance->intr_cap & DDI_INTR_FLAG_BLOCK) {
7456 con_log(CL_ANN, (CE_WARN, "Calling ddi_intr_block _enable"));
7457
7458 (void) ddi_intr_block_enable(instance->intr_htable,
7459 instance->intr_cnt);
7460 } else {
7461 con_log(CL_ANN, (CE_NOTE, " calling ddi_intr_enable"));
7462
7463 for (i = 0; i < instance->intr_cnt; i++) {
7464 (void) ddi_intr_enable(instance->intr_htable[i]);
7465 con_log(CL_ANN, (CE_NOTE, "ddi intr enable returns "
7466 "%d", i));
7467 }
7468 }
7469
7470 return (DDI_SUCCESS);
7471
7472 mrsas_free_handlers:
7473 for (i = 0; i < actual; i++)
7474 (void) ddi_intr_remove_handler(instance->intr_htable[i]);
7475
7476 mrsas_free_handles:
7477 for (i = 0; i < actual; i++)
7478 (void) ddi_intr_free(instance->intr_htable[i]);
7479
7480 mrsas_free_htable:
7481 if (instance->intr_htable != NULL)
7482 kmem_free(instance->intr_htable, instance->intr_htable_size);
7483
7484 instance->intr_htable = NULL;
7485 instance->intr_htable_size = 0;
7486
7487 return (DDI_FAILURE);
7488
7489 }
7490
7491
7492 static void
7493 mrsas_rem_intrs(struct mrsas_instance *instance)
7494 {
7495 int i;
7496
7497 con_log(CL_ANN, (CE_NOTE, "mrsas_rem_intrs called"));
7498
7499 /* Disable all interrupts first */
7500 if (instance->intr_cap & DDI_INTR_FLAG_BLOCK) {
7501 (void) ddi_intr_block_disable(instance->intr_htable,
7502 instance->intr_cnt);
7503 } else {
7504 for (i = 0; i < instance->intr_cnt; i++) {
7505 (void) ddi_intr_disable(instance->intr_htable[i]);
7506 }
7507 }
7508
7509 /* Remove all the handlers */
7510
7511 for (i = 0; i < instance->intr_cnt; i++) {
7512 (void) ddi_intr_remove_handler(instance->intr_htable[i]);
7513 (void) ddi_intr_free(instance->intr_htable[i]);
7514 }
7515
7516 if (instance->intr_htable != NULL)
7517 kmem_free(instance->intr_htable, instance->intr_htable_size);
7518
7519 instance->intr_htable = NULL;
7520 instance->intr_htable_size = 0;
7521
7522 }
7523
7524 static int
7525 mrsas_tran_bus_config(dev_info_t *parent, uint_t flags,
7526 ddi_bus_config_op_t op, void *arg, dev_info_t **childp)
7527 {
7528 struct mrsas_instance *instance;
7529 int config;
7530 int rval = NDI_SUCCESS;
7531
7532 char *ptr = NULL;
7533 int tgt, lun;
7534
7535 con_log(CL_ANN1, (CE_NOTE, "Bus config called for op = %x", op));
7536
7537 if ((instance = ddi_get_soft_state(mrsas_state,
7538 ddi_get_instance(parent))) == NULL) {
7539 return (NDI_FAILURE);
7540 }
7541
7542 /* Hold nexus during bus_config */
7543 ndi_devi_enter(parent, &config);
7544 switch (op) {
7545 case BUS_CONFIG_ONE: {
7546
7547 /* parse wwid/target name out of name given */
7548 if ((ptr = strchr((char *)arg, '@')) == NULL) {
7549 rval = NDI_FAILURE;
7550 break;
7551 }
7552 ptr++;
7553
7554 if (mrsas_parse_devname(arg, &tgt, &lun) != 0) {
7555 rval = NDI_FAILURE;
7556 break;
7557 }
7558
7559 if (lun == 0) {
7560 rval = mrsas_config_ld(instance, tgt, lun, childp);
7561 #ifdef PDSUPPORT
7562 } else if (instance->tbolt == 1 && lun != 0) {
7563 rval = mrsas_tbolt_config_pd(instance,
7564 tgt, lun, childp);
7565 #endif
7566 } else {
7567 rval = NDI_FAILURE;
7568 }
7569
7570 break;
7571 }
7572 case BUS_CONFIG_DRIVER:
7573 case BUS_CONFIG_ALL: {
7574
7575 rval = mrsas_config_all_devices(instance);
7576
7577 rval = NDI_SUCCESS;
7578 break;
7579 }
7580 }
7581
7582 if (rval == NDI_SUCCESS) {
7583 rval = ndi_busop_bus_config(parent, flags, op, arg, childp, 0);
7584
7585 }
7586 ndi_devi_exit(parent, config);
7587
7588 con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_bus_config: rval = %x",
7589 rval));
7590 return (rval);
7591 }
7592
7593 static int
7594 mrsas_config_all_devices(struct mrsas_instance *instance)
7595 {
7596 int rval, tgt;
7597
7598 for (tgt = 0; tgt < MRDRV_MAX_LD; tgt++) {
7599 (void) mrsas_config_ld(instance, tgt, 0, NULL);
7600
7601 }
7602
7603 #ifdef PDSUPPORT
7604 /* Config PD devices connected to the card */
7605 if (instance->tbolt) {
7606 for (tgt = 0; tgt < instance->mr_tbolt_pd_max; tgt++) {
7607 (void) mrsas_tbolt_config_pd(instance, tgt, 1, NULL);
7608 }
7609 }
7610 #endif
7611
7612 rval = NDI_SUCCESS;
7613 return (rval);
7614 }
7615
7616 static int
7617 mrsas_parse_devname(char *devnm, int *tgt, int *lun)
7618 {
7619 char devbuf[SCSI_MAXNAMELEN];
7620 char *addr;
7621 char *p, *tp, *lp;
7622 long num;
7623
7624 /* Parse dev name and address */
7625 (void) strcpy(devbuf, devnm);
7626 addr = "";
7627 for (p = devbuf; *p != '\0'; p++) {
7628 if (*p == '@') {
7629 addr = p + 1;
7630 *p = '\0';
7631 } else if (*p == ':') {
7632 *p = '\0';
7633 break;
7634 }
7635 }
7636
7637 /* Parse target and lun */
7638 for (p = tp = addr, lp = NULL; *p != '\0'; p++) {
7639 if (*p == ',') {
7640 lp = p + 1;
7641 *p = '\0';
7642 break;
7643 }
7644 }
7645 if (tgt && tp) {
7646 if (ddi_strtol(tp, NULL, 0x10, &num)) {
7647 return (DDI_FAILURE); /* Can declare this as constant */
7648 }
7649 *tgt = (int)num;
7650 }
7651 if (lun && lp) {
7652 if (ddi_strtol(lp, NULL, 0x10, &num)) {
7653 return (DDI_FAILURE);
7654 }
7655 *lun = (int)num;
7656 }
7657 return (DDI_SUCCESS); /* Success case */
7658 }
7659
7660 static int
7661 mrsas_config_ld(struct mrsas_instance *instance, uint16_t tgt,
7662 uint8_t lun, dev_info_t **ldip)
7663 {
7664 struct scsi_device *sd;
7665 dev_info_t *child;
7666 int rval;
7667
7668 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_config_ld: t = %d l = %d",
7669 tgt, lun));
7670
7671 if ((child = mrsas_find_child(instance, tgt, lun)) != NULL) {
7672 if (ldip) {
7673 *ldip = child;
7674 }
7675 if (instance->mr_ld_list[tgt].flag != MRDRV_TGT_VALID) {
7676 rval = mrsas_service_evt(instance, tgt, 0,
7677 MRSAS_EVT_UNCONFIG_TGT, NULL);
7678 con_log(CL_ANN1, (CE_WARN,
7679 "mr_sas: DELETING STALE ENTRY rval = %d "
7680 "tgt id = %d ", rval, tgt));
7681 return (NDI_FAILURE);
7682 }
7683 return (NDI_SUCCESS);
7684 }
7685
7686 sd = kmem_zalloc(sizeof (struct scsi_device), KM_SLEEP);
7687 if (sd == NULL) {
7688 con_log(CL_ANN1, (CE_WARN, "mrsas_config_ld: "
7689 "failed to allocate mem for scsi_device"));
7690 return (NDI_FAILURE);
7691 }
7692 sd->sd_address.a_hba_tran = instance->tran;
7693 sd->sd_address.a_target = (uint16_t)tgt;
7694 sd->sd_address.a_lun = (uint8_t)lun;
7695
7696 if (scsi_hba_probe(sd, NULL) == SCSIPROBE_EXISTS)
7697 rval = mrsas_config_scsi_device(instance, sd, ldip);
7698 else
7699 rval = NDI_FAILURE;
7700
7701 /* sd_unprobe is blank now. Free buffer manually */
7702 if (sd->sd_inq) {
7703 kmem_free(sd->sd_inq, SUN_INQSIZE);
7704 sd->sd_inq = (struct scsi_inquiry *)NULL;
7705 }
7706
7707 kmem_free(sd, sizeof (struct scsi_device));
7708 con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_config_ld: return rval = %d",
7709 rval));
7710 return (rval);
7711 }
7712
7713 int
7714 mrsas_config_scsi_device(struct mrsas_instance *instance,
7715 struct scsi_device *sd, dev_info_t **dipp)
7716 {
7717 char *nodename = NULL;
7718 char **compatible = NULL;
7719 int ncompatible = 0;
7720 char *childname;
7721 dev_info_t *ldip = NULL;
7722 int tgt = sd->sd_address.a_target;
7723 int lun = sd->sd_address.a_lun;
7724 int dtype = sd->sd_inq->inq_dtype & DTYPE_MASK;
7725 int rval;
7726
7727 con_log(CL_DLEVEL1, (CE_NOTE, "mr_sas: scsi_device t%dL%d", tgt, lun));
7728 scsi_hba_nodename_compatible_get(sd->sd_inq, NULL, dtype,
7729 NULL, &nodename, &compatible, &ncompatible);
7730
7731 if (nodename == NULL) {
7732 con_log(CL_ANN1, (CE_WARN, "mr_sas: Found no compatible driver "
7733 "for t%dL%d", tgt, lun));
7734 rval = NDI_FAILURE;
7735 goto finish;
7736 }
7737
7738 childname = (dtype == DTYPE_DIRECT) ? "sd" : nodename;
7739 con_log(CL_DLEVEL1, (CE_NOTE,
7740 "mr_sas: Childname = %2s nodename = %s", childname, nodename));
7741
7742 /* Create a dev node */
7743 rval = ndi_devi_alloc(instance->dip, childname, DEVI_SID_NODEID, &ldip);
7744 con_log(CL_DLEVEL1, (CE_NOTE,
7745 "mr_sas_config_scsi_device: ndi_devi_alloc rval = %x", rval));
7746 if (rval == NDI_SUCCESS) {
7747 if (ndi_prop_update_int(DDI_DEV_T_NONE, ldip, "target", tgt) !=
7748 DDI_PROP_SUCCESS) {
7749 con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to create "
7750 "property for t%dl%d target", tgt, lun));
7751 rval = NDI_FAILURE;
7752 goto finish;
7753 }
7754 if (ndi_prop_update_int(DDI_DEV_T_NONE, ldip, "lun", lun) !=
7755 DDI_PROP_SUCCESS) {
7756 con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to create "
7757 "property for t%dl%d lun", tgt, lun));
7758 rval = NDI_FAILURE;
7759 goto finish;
7760 }
7761
7762 if (ndi_prop_update_string_array(DDI_DEV_T_NONE, ldip,
7763 "compatible", compatible, ncompatible) !=
7764 DDI_PROP_SUCCESS) {
7765 con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to create "
7766 "property for t%dl%d compatible", tgt, lun));
7767 rval = NDI_FAILURE;
7768 goto finish;
7769 }
7770
7771 rval = ndi_devi_online(ldip, NDI_ONLINE_ATTACH);
7772 if (rval != NDI_SUCCESS) {
7773 con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to online "
7774 "t%dl%d", tgt, lun));
7775 ndi_prop_remove_all(ldip);
7776 (void) ndi_devi_free(ldip);
7777 } else {
7778 con_log(CL_ANN1, (CE_CONT, "mr_sas: online Done :"
7779 "0 t%dl%d", tgt, lun));
7780 }
7781
7782 }
7783 finish:
7784 if (dipp) {
7785 *dipp = ldip;
7786 }
7787
7788 con_log(CL_DLEVEL1, (CE_NOTE,
7789 "mr_sas: config_scsi_device rval = %d t%dL%d",
7790 rval, tgt, lun));
7791 scsi_hba_nodename_compatible_free(nodename, compatible);
7792 return (rval);
7793 }
7794
7795 /*ARGSUSED*/
7796 int
7797 mrsas_service_evt(struct mrsas_instance *instance, int tgt, int lun, int event,
7798 uint64_t wwn)
7799 {
7800 struct mrsas_eventinfo *mrevt = NULL;
7801
7802 con_log(CL_ANN1, (CE_NOTE,
7803 "mrsas_service_evt called for t%dl%d event = %d",
7804 tgt, lun, event));
7805
7806 if ((instance->taskq == NULL) || (mrevt =
7807 kmem_zalloc(sizeof (struct mrsas_eventinfo), KM_NOSLEEP)) == NULL) {
7808 return (ENOMEM);
7809 }
7810
7811 mrevt->instance = instance;
7812 mrevt->tgt = tgt;
7813 mrevt->lun = lun;
7814 mrevt->event = event;
7815 mrevt->wwn = wwn;
7816
7817 if ((ddi_taskq_dispatch(instance->taskq,
7818 (void (*)(void *))mrsas_issue_evt_taskq, mrevt, DDI_NOSLEEP)) !=
7819 DDI_SUCCESS) {
7820 con_log(CL_ANN1, (CE_NOTE,
7821 "mr_sas: Event task failed for t%dl%d event = %d",
7822 tgt, lun, event));
7823 kmem_free(mrevt, sizeof (struct mrsas_eventinfo));
7824 return (DDI_FAILURE);
7825 }
7826 DTRACE_PROBE3(service_evt, int, tgt, int, lun, int, event);
7827 return (DDI_SUCCESS);
7828 }
7829
7830 static void
7831 mrsas_issue_evt_taskq(struct mrsas_eventinfo *mrevt)
7832 {
7833 struct mrsas_instance *instance = mrevt->instance;
7834 dev_info_t *dip, *pdip;
7835 int circ1 = 0;
7836 char *devname;
7837
7838 con_log(CL_ANN1, (CE_NOTE, "mrsas_issue_evt_taskq: called for"
7839 " tgt %d lun %d event %d",
7840 mrevt->tgt, mrevt->lun, mrevt->event));
7841
7842 if (mrevt->tgt < MRDRV_MAX_LD && mrevt->lun == 0) {
7843 mutex_enter(&instance->config_dev_mtx);
7844 dip = instance->mr_ld_list[mrevt->tgt].dip;
7845 mutex_exit(&instance->config_dev_mtx);
7846 #ifdef PDSUPPORT
7847 } else {
7848 mutex_enter(&instance->config_dev_mtx);
7849 dip = instance->mr_tbolt_pd_list[mrevt->tgt].dip;
7850 mutex_exit(&instance->config_dev_mtx);
7851 #endif
7852 }
7853
7854
7855 ndi_devi_enter(instance->dip, &circ1);
7856 switch (mrevt->event) {
7857 case MRSAS_EVT_CONFIG_TGT:
7858 if (dip == NULL) {
7859
7860 if (mrevt->lun == 0) {
7861 (void) mrsas_config_ld(instance, mrevt->tgt,
7862 0, NULL);
7863 #ifdef PDSUPPORT
7864 } else if (instance->tbolt) {
7865 (void) mrsas_tbolt_config_pd(instance,
7866 mrevt->tgt,
7867 1, NULL);
7868 #endif
7869 }
7870 con_log(CL_ANN1, (CE_NOTE,
7871 "mr_sas: EVT_CONFIG_TGT called:"
7872 " for tgt %d lun %d event %d",
7873 mrevt->tgt, mrevt->lun, mrevt->event));
7874
7875 } else {
7876 con_log(CL_ANN1, (CE_NOTE,
7877 "mr_sas: EVT_CONFIG_TGT dip != NULL:"
7878 " for tgt %d lun %d event %d",
7879 mrevt->tgt, mrevt->lun, mrevt->event));
7880 }
7881 break;
7882 case MRSAS_EVT_UNCONFIG_TGT:
7883 if (dip) {
7884 if (i_ddi_devi_attached(dip)) {
7885
7886 pdip = ddi_get_parent(dip);
7887
7888 devname = kmem_zalloc(MAXNAMELEN + 1, KM_SLEEP);
7889 (void) ddi_deviname(dip, devname);
7890
7891 (void) devfs_clean(pdip, devname + 1,
7892 DV_CLEAN_FORCE);
7893 kmem_free(devname, MAXNAMELEN + 1);
7894 }
7895 (void) ndi_devi_offline(dip, NDI_DEVI_REMOVE);
7896 con_log(CL_ANN1, (CE_NOTE,
7897 "mr_sas: EVT_UNCONFIG_TGT called:"
7898 " for tgt %d lun %d event %d",
7899 mrevt->tgt, mrevt->lun, mrevt->event));
7900 } else {
7901 con_log(CL_ANN1, (CE_NOTE,
7902 "mr_sas: EVT_UNCONFIG_TGT dip == NULL:"
7903 " for tgt %d lun %d event %d",
7904 mrevt->tgt, mrevt->lun, mrevt->event));
7905 }
7906 break;
7907 }
7908 kmem_free(mrevt, sizeof (struct mrsas_eventinfo));
7909 ndi_devi_exit(instance->dip, circ1);
7910 }
7911
7912
7913 int
7914 mrsas_mode_sense_build(struct scsi_pkt *pkt)
7915 {
7916 union scsi_cdb *cdbp;
7917 uint16_t page_code;
7918 struct scsa_cmd *acmd;
7919 struct buf *bp;
7920 struct mode_header *modehdrp;
7921
7922 cdbp = (void *)pkt->pkt_cdbp;
7923 page_code = cdbp->cdb_un.sg.scsi[0];
7924 acmd = PKT2CMD(pkt);
7925 bp = acmd->cmd_buf;
7926 if ((!bp) && bp->b_un.b_addr && bp->b_bcount && acmd->cmd_dmacount) {
7927 con_log(CL_ANN1, (CE_WARN, "Failing MODESENSE Command"));
7928 /* ADD pkt statistics as Command failed. */
7929 return (NULL);
7930 }
7931
7932 bp_mapin(bp);
7933 bzero(bp->b_un.b_addr, bp->b_bcount);
7934
7935 switch (page_code) {
7936 case 0x3: {
7937 struct mode_format *page3p = NULL;
7938 modehdrp = (struct mode_header *)(bp->b_un.b_addr);
7939 modehdrp->bdesc_length = MODE_BLK_DESC_LENGTH;
7940
7941 page3p = (void *)((caddr_t)modehdrp +
7942 MODE_HEADER_LENGTH + MODE_BLK_DESC_LENGTH);
7943 page3p->mode_page.code = 0x3;
7944 page3p->mode_page.length =
7945 (uchar_t)(sizeof (struct mode_format));
7946 page3p->data_bytes_sect = 512;
7947 page3p->sect_track = 63;
7948 break;
7949 }
7950 case 0x4: {
7951 struct mode_geometry *page4p = NULL;
7952 modehdrp = (struct mode_header *)(bp->b_un.b_addr);
7953 modehdrp->bdesc_length = MODE_BLK_DESC_LENGTH;
7954
7955 page4p = (void *)((caddr_t)modehdrp +
7956 MODE_HEADER_LENGTH + MODE_BLK_DESC_LENGTH);
7957 page4p->mode_page.code = 0x4;
7958 page4p->mode_page.length =
7959 (uchar_t)(sizeof (struct mode_geometry));
7960 page4p->heads = 255;
7961 page4p->rpm = 10000;
7962 break;
7963 }
7964 default:
7965 break;
7966 }
7967 return (NULL);
7968 }