1 /******************************************************************************
2
3 Copyright (c) 2001-2012, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
99 /* RAR, Multicast, VLAN */
100 mac->ops.set_vmdq = &ixgbe_set_vmdq_generic;
101 mac->ops.set_vmdq_san_mac = &ixgbe_set_vmdq_san_mac_generic;
102 mac->ops.clear_vmdq = &ixgbe_clear_vmdq_generic;
103 mac->ops.insert_mac_addr = &ixgbe_insert_mac_addr_generic;
104 mac->rar_highwater = 1;
105 mac->ops.set_vfta = &ixgbe_set_vfta_generic;
106 mac->ops.set_vlvf = &ixgbe_set_vlvf_generic;
107 mac->ops.clear_vfta = &ixgbe_clear_vfta_generic;
108 mac->ops.init_uta_tables = &ixgbe_init_uta_tables_generic;
109 mac->ops.set_mac_anti_spoofing = &ixgbe_set_mac_anti_spoofing;
110 mac->ops.set_vlan_anti_spoofing = &ixgbe_set_vlan_anti_spoofing;
111
112 /* Link */
113 mac->ops.get_link_capabilities =
114 &ixgbe_get_copper_link_capabilities_generic;
115 mac->ops.setup_link = &ixgbe_setup_mac_link_X540;
116 mac->ops.setup_rxpba = &ixgbe_set_rxpba_generic;
117 mac->ops.check_link = &ixgbe_check_mac_link_generic;
118
119 mac->mcft_size = 128;
120 mac->vft_size = 128;
121 mac->num_rar_entries = 128;
122 mac->rx_pb_size = 384;
123 mac->max_tx_queues = 128;
124 mac->max_rx_queues = 128;
125 mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw);
126
127 /*
128 * FWSM register
129 * ARC supported; valid only if manageability features are
130 * enabled.
131 */
132 mac->arc_subsystem_valid = (IXGBE_READ_REG(hw, IXGBE_FWSM) &
133 IXGBE_FWSM_MODE_MASK) ? TRUE : FALSE;
134
135 hw->mbx.ops.init_params = ixgbe_init_mbx_params_pf;
136
137 /* LEDs */
138 mac->ops.blink_led_start = ixgbe_blink_led_start_X540;
158 {
159 return ixgbe_get_copper_link_capabilities_generic(hw, speed, autoneg);
160 }
161
162 /**
163 * ixgbe_get_media_type_X540 - Get media type
164 * @hw: pointer to hardware structure
165 *
166 * Returns the media type (fiber, copper, backplane)
167 **/
168 enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw)
169 {
170 UNREFERENCED_1PARAMETER(hw);
171 return ixgbe_media_type_copper;
172 }
173
174 /**
175 * ixgbe_setup_mac_link_X540 - Sets the auto advertised capabilities
176 * @hw: pointer to hardware structure
177 * @speed: new link speed
178 * @autoneg: TRUE if autonegotiation enabled
179 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
180 **/
181 s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw,
182 ixgbe_link_speed speed, bool autoneg,
183 bool autoneg_wait_to_complete)
184 {
185 DEBUGFUNC("ixgbe_setup_mac_link_X540");
186 return hw->phy.ops.setup_link_speed(hw, speed, autoneg,
187 autoneg_wait_to_complete);
188 }
189
190 /**
191 * ixgbe_reset_hw_X540 - Perform hardware reset
192 * @hw: pointer to hardware structure
193 *
194 * Resets the hardware by resetting the transmit and receive units, masks
195 * and clears all interrupts, and perform a reset.
196 **/
197 s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)
198 {
199 s32 status;
200 u32 ctrl, i;
201
202 DEBUGFUNC("ixgbe_reset_hw_X540");
203
204 /* Call adapter stop to disable tx/rx and clear interrupts */
205 status = hw->mac.ops.stop_adapter(hw);
206 if (status != IXGBE_SUCCESS)
207 goto reset_hw_out;
955 u32 macc_reg;
956 u32 ledctl_reg;
957
958 DEBUGFUNC("ixgbe_blink_led_stop_X540");
959
960 /* Restore the LED to its default value. */
961 ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
962 ledctl_reg &= ~IXGBE_LED_MODE_MASK(index);
963 ledctl_reg |= IXGBE_LED_LINK_ACTIVE << IXGBE_LED_MODE_SHIFT(index);
964 ledctl_reg &= ~IXGBE_LED_BLINK(index);
965 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg);
966
967 /* Unforce link and speed in the MAC. */
968 macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);
969 macc_reg &= ~(IXGBE_MACC_FLU | IXGBE_MACC_FSV_10G | IXGBE_MACC_FS);
970 IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);
971 IXGBE_WRITE_FLUSH(hw);
972
973 return IXGBE_SUCCESS;
974 }
975
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1 /******************************************************************************
2
3 Copyright (c) 2001-2013, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
99 /* RAR, Multicast, VLAN */
100 mac->ops.set_vmdq = &ixgbe_set_vmdq_generic;
101 mac->ops.set_vmdq_san_mac = &ixgbe_set_vmdq_san_mac_generic;
102 mac->ops.clear_vmdq = &ixgbe_clear_vmdq_generic;
103 mac->ops.insert_mac_addr = &ixgbe_insert_mac_addr_generic;
104 mac->rar_highwater = 1;
105 mac->ops.set_vfta = &ixgbe_set_vfta_generic;
106 mac->ops.set_vlvf = &ixgbe_set_vlvf_generic;
107 mac->ops.clear_vfta = &ixgbe_clear_vfta_generic;
108 mac->ops.init_uta_tables = &ixgbe_init_uta_tables_generic;
109 mac->ops.set_mac_anti_spoofing = &ixgbe_set_mac_anti_spoofing;
110 mac->ops.set_vlan_anti_spoofing = &ixgbe_set_vlan_anti_spoofing;
111
112 /* Link */
113 mac->ops.get_link_capabilities =
114 &ixgbe_get_copper_link_capabilities_generic;
115 mac->ops.setup_link = &ixgbe_setup_mac_link_X540;
116 mac->ops.setup_rxpba = &ixgbe_set_rxpba_generic;
117 mac->ops.check_link = &ixgbe_check_mac_link_generic;
118
119
120 mac->mcft_size = 128;
121 mac->vft_size = 128;
122 mac->num_rar_entries = 128;
123 mac->rx_pb_size = 384;
124 mac->max_tx_queues = 128;
125 mac->max_rx_queues = 128;
126 mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw);
127
128 /*
129 * FWSM register
130 * ARC supported; valid only if manageability features are
131 * enabled.
132 */
133 mac->arc_subsystem_valid = (IXGBE_READ_REG(hw, IXGBE_FWSM) &
134 IXGBE_FWSM_MODE_MASK) ? TRUE : FALSE;
135
136 hw->mbx.ops.init_params = ixgbe_init_mbx_params_pf;
137
138 /* LEDs */
139 mac->ops.blink_led_start = ixgbe_blink_led_start_X540;
159 {
160 return ixgbe_get_copper_link_capabilities_generic(hw, speed, autoneg);
161 }
162
163 /**
164 * ixgbe_get_media_type_X540 - Get media type
165 * @hw: pointer to hardware structure
166 *
167 * Returns the media type (fiber, copper, backplane)
168 **/
169 enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw)
170 {
171 UNREFERENCED_1PARAMETER(hw);
172 return ixgbe_media_type_copper;
173 }
174
175 /**
176 * ixgbe_setup_mac_link_X540 - Sets the auto advertised capabilities
177 * @hw: pointer to hardware structure
178 * @speed: new link speed
179 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
180 **/
181 s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw,
182 ixgbe_link_speed speed,
183 bool autoneg_wait_to_complete)
184 {
185 DEBUGFUNC("ixgbe_setup_mac_link_X540");
186 return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait_to_complete);
187 }
188
189 /**
190 * ixgbe_reset_hw_X540 - Perform hardware reset
191 * @hw: pointer to hardware structure
192 *
193 * Resets the hardware by resetting the transmit and receive units, masks
194 * and clears all interrupts, and perform a reset.
195 **/
196 s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)
197 {
198 s32 status;
199 u32 ctrl, i;
200
201 DEBUGFUNC("ixgbe_reset_hw_X540");
202
203 /* Call adapter stop to disable tx/rx and clear interrupts */
204 status = hw->mac.ops.stop_adapter(hw);
205 if (status != IXGBE_SUCCESS)
206 goto reset_hw_out;
954 u32 macc_reg;
955 u32 ledctl_reg;
956
957 DEBUGFUNC("ixgbe_blink_led_stop_X540");
958
959 /* Restore the LED to its default value. */
960 ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
961 ledctl_reg &= ~IXGBE_LED_MODE_MASK(index);
962 ledctl_reg |= IXGBE_LED_LINK_ACTIVE << IXGBE_LED_MODE_SHIFT(index);
963 ledctl_reg &= ~IXGBE_LED_BLINK(index);
964 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg);
965
966 /* Unforce link and speed in the MAC. */
967 macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);
968 macc_reg &= ~(IXGBE_MACC_FLU | IXGBE_MACC_FSV_10G | IXGBE_MACC_FS);
969 IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);
970 IXGBE_WRITE_FLUSH(hw);
971
972 return IXGBE_SUCCESS;
973 }
974
975
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