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Import some changes from FreeBSD (details later, this is quick-n-dirty for now).
        
*** 1,8 ****
  /******************************************************************************
  
!   Copyright (c) 2001-2012, Intel Corporation 
    All rights reserved.
    
    Redistribution and use in source and binary forms, with or without 
    modification, are permitted provided that the following conditions are met:
    
--- 1,8 ----
  /******************************************************************************
  
!   Copyright (c) 2001-2013, Intel Corporation 
    All rights reserved.
    
    Redistribution and use in source and binary forms, with or without 
    modification, are permitted provided that the following conditions are met:
    
*** 44,64 ****
          do { \
                  IXGBE_WRITE_REG(hw, reg, (u32) value); \
                  IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \
          } while (0)
  #endif
  
  u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
- 
  s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
  s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
  s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
  s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
  s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
  s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num);
  s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
                                    u32 pba_num_size);
  s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
  s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
  void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
  s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
  
--- 44,76 ----
          do { \
                  IXGBE_WRITE_REG(hw, reg, (u32) value); \
                  IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \
          } while (0)
  #endif
+ #if !defined(NO_READ_PBA_RAW) || !defined(NO_WRITE_PBA_RAW)
+ struct ixgbe_pba {
+         u16 word[2];
+         u16 *pba_block;
+ };
+ #endif
  
  u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
  s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
  s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
  s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
  s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
  s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
  s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num);
  s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
                                    u32 pba_num_size);
+ s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
+                        u32 eeprom_buf_size, u16 max_pba_block_size,
+                        struct ixgbe_pba *pba);
+ s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
+                         u32 eeprom_buf_size, struct ixgbe_pba *pba);
+ s32 ixgbe_get_pba_block_size(struct ixgbe_hw *hw, u16 *eeprom_buf,
+                              u32 eeprom_buf_size, u16 *pba_block_size);
  s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
  s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
  void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
  s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
  
*** 99,108 ****
--- 111,121 ----
  s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
  s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw);
  s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw);
  
  s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
+ s32 ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);
  void ixgbe_fc_autoneg(struct ixgbe_hw *hw);
  
  s32 ixgbe_validate_mac_addr(u8 *mac_addr);
  s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask);
  void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u16 mask);
*** 140,146 ****
--- 153,165 ----
  void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,
                               int strategy);
  void ixgbe_enable_relaxed_ordering_gen2(struct ixgbe_hw *hw);
  s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
                                   u8 build, u8 ver);
+ u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);
+ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
+                                  u32 length);
  void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);
+ 
+ extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw);
+ 
  #endif /* IXGBE_COMMON */