1 /******************************************************************************
2
3 Copyright (c) 2001-2013, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32 ******************************************************************************/
33 /*$FreeBSD: src/sys/dev/ixgbe/ixgbe_api.c,v 1.13 2012/07/05 20:51:44 jfv Exp $*/
34
35 #include "ixgbe_api.h"
36 #include "ixgbe_common.h"
37
38 /**
39 * ixgbe_init_shared_code - Initialize the shared code
40 * @hw: pointer to hardware structure
41 *
42 * This will assign function pointers and assign the MAC type and PHY code.
43 * Does not touch the hardware. This function must be called prior to any
44 * other function in the shared code. The ixgbe_hw structure should be
45 * memset to 0 prior to calling this function. The following fields in
46 * hw structure should be filled in prior to calling this function:
47 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
48 * subsystem_vendor_id, and revision_id
49 **/
50 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
51 {
52 s32 status;
53
54 DEBUGFUNC("ixgbe_init_shared_code");
55
56 /*
57 * Set the mac type
58 */
59 status = ixgbe_set_mac_type(hw);
60 if (status != IXGBE_SUCCESS)
61 return (status);
62
63 switch (hw->mac.type) {
64 case ixgbe_mac_82598EB:
65 status = ixgbe_init_ops_82598(hw);
66 break;
67 case ixgbe_mac_82599EB:
68 status = ixgbe_init_ops_82599(hw);
69 break;
70 case ixgbe_mac_X540:
71 status = ixgbe_init_ops_X540(hw);
72 break;
73 default:
74 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
75 break;
76 }
77
78 return status;
79 }
80
81 /**
82 * ixgbe_set_mac_type - Sets MAC type
83 * @hw: pointer to the HW structure
84 *
85 * This function sets the mac type of the adapter based on the
86 * vendor ID and device ID stored in the hw structure.
87 **/
88 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
89 {
90 s32 ret_val = IXGBE_SUCCESS;
91
92 DEBUGFUNC("ixgbe_set_mac_type\n");
93
94 switch (hw->device_id) {
95 case IXGBE_DEV_ID_82598:
96 case IXGBE_DEV_ID_82598_BX:
97 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
98 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
99 case IXGBE_DEV_ID_82598AT:
100 case IXGBE_DEV_ID_82598AT2:
101 case IXGBE_DEV_ID_82598EB_CX4:
102 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
103 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
104 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
105 case IXGBE_DEV_ID_82598EB_XF_LR:
106 case IXGBE_DEV_ID_82598EB_SFP_LOM:
107 hw->mac.type = ixgbe_mac_82598EB;
108 break;
109 case IXGBE_DEV_ID_82599_KX4:
110 case IXGBE_DEV_ID_82599_KX4_MEZZ:
111 case IXGBE_DEV_ID_82599_XAUI_LOM:
112 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
113 case IXGBE_DEV_ID_82599_KR:
114 case IXGBE_DEV_ID_82599_SFP:
115 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
116 case IXGBE_DEV_ID_82599_SFP_FCOE:
117 case IXGBE_DEV_ID_82599_SFP_EM:
118 case IXGBE_DEV_ID_82599_SFP_SF2:
119 case IXGBE_DEV_ID_82599_SFP_SF_QP:
120 case IXGBE_DEV_ID_82599EN_SFP:
121 case IXGBE_DEV_ID_82599_CX4:
122 case IXGBE_DEV_ID_82599_BYPASS:
123 case IXGBE_DEV_ID_82599_T3_LOM:
124 hw->mac.type = ixgbe_mac_82599EB;
125 break;
126 case IXGBE_DEV_ID_82599_VF:
127 case IXGBE_DEV_ID_82599_VF_HV:
128 hw->mac.type = ixgbe_mac_82599_vf;
129 break;
130 case IXGBE_DEV_ID_X540_VF:
131 case IXGBE_DEV_ID_X540_VF_HV:
132 hw->mac.type = ixgbe_mac_X540_vf;
133 break;
134 case IXGBE_DEV_ID_X540T:
135 case IXGBE_DEV_ID_X540_BYPASS:
136 hw->mac.type = ixgbe_mac_X540;
137 break;
138 default:
139 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
140 break;
141 }
142
143 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
144 hw->mac.type, ret_val);
145 return ret_val;
146 }
147
148 /**
149 * ixgbe_init_hw - Initialize the hardware
150 * @hw: pointer to hardware structure
151 *
152 * Initialize the hardware by resetting and then starting the hardware
153 **/
154 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
155 {
156 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
157 IXGBE_NOT_IMPLEMENTED);
158 }
159
160 /**
161 * ixgbe_reset_hw - Performs a hardware reset
162 * @hw: pointer to hardware structure
163 *
164 * Resets the hardware by resetting the transmit and receive units, masks and
165 * clears all interrupts, performs a PHY reset, and performs a MAC reset
166 **/
167 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
168 {
169 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
170 IXGBE_NOT_IMPLEMENTED);
171 }
172
173 /**
174 * ixgbe_start_hw - Prepares hardware for Rx/Tx
175 * @hw: pointer to hardware structure
176 *
177 * Starts the hardware by filling the bus info structure and media type,
178 * clears all on chip counters, initializes receive address registers,
179 * multicast table, VLAN filter table, calls routine to setup link and
180 * flow control settings, and leaves transmit and receive units disabled
181 * and uninitialized.
182 **/
183 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
184 {
185 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
186 IXGBE_NOT_IMPLEMENTED);
187 }
188
189 /**
190 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
191 * which is disabled by default in ixgbe_start_hw();
192 *
193 * @hw: pointer to hardware structure
194 *
195 * Enable relaxed ordering;
196 **/
197 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
198 {
199 if (hw->mac.ops.enable_relaxed_ordering)
200 hw->mac.ops.enable_relaxed_ordering(hw);
201 }
202
203 /**
204 * ixgbe_clear_hw_cntrs - Clear hardware counters
205 * @hw: pointer to hardware structure
206 *
207 * Clears all hardware statistics counters by reading them from the hardware
208 * Statistics counters are clear on read.
209 **/
210 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
211 {
212 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
213 IXGBE_NOT_IMPLEMENTED);
214 }
215
216 /**
217 * ixgbe_get_media_type - Get media type
218 * @hw: pointer to hardware structure
219 *
220 * Returns the media type (fiber, copper, backplane)
221 **/
222 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
223 {
224 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
225 ixgbe_media_type_unknown);
226 }
227
228 /**
229 * ixgbe_get_mac_addr - Get MAC address
230 * @hw: pointer to hardware structure
231 * @mac_addr: Adapter MAC address
232 *
233 * Reads the adapter's MAC address from the first Receive Address Register
234 * (RAR0) A reset of the adapter must have been performed prior to calling
235 * this function in order for the MAC address to have been loaded from the
236 * EEPROM into RAR0
237 **/
238 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
239 {
240 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
241 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
242 }
243
244 /**
245 * ixgbe_get_san_mac_addr - Get SAN MAC address
246 * @hw: pointer to hardware structure
247 * @san_mac_addr: SAN MAC address
248 *
249 * Reads the SAN MAC address from the EEPROM, if it's available. This is
250 * per-port, so set_lan_id() must be called before reading the addresses.
251 **/
252 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
253 {
254 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
255 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
256 }
257
258 /**
259 * ixgbe_set_san_mac_addr - Write a SAN MAC address
260 * @hw: pointer to hardware structure
261 * @san_mac_addr: SAN MAC address
262 *
263 * Writes A SAN MAC address to the EEPROM.
264 **/
265 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
266 {
267 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
268 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
269 }
270
271 /**
272 * ixgbe_get_device_caps - Get additional device capabilities
273 * @hw: pointer to hardware structure
274 * @device_caps: the EEPROM word for device capabilities
275 *
276 * Reads the extra device capabilities from the EEPROM
277 **/
278 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
279 {
280 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
281 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
282 }
283
284 /**
285 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
286 * @hw: pointer to hardware structure
287 * @wwnn_prefix: the alternative WWNN prefix
288 * @wwpn_prefix: the alternative WWPN prefix
289 *
290 * This function will read the EEPROM from the alternative SAN MAC address
291 * block to check the support for the alternative WWNN/WWPN prefix support.
292 **/
293 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
294 u16 *wwpn_prefix)
295 {
296 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
297 (hw, wwnn_prefix, wwpn_prefix),
298 IXGBE_NOT_IMPLEMENTED);
299 }
300
301 /**
302 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
303 * @hw: pointer to hardware structure
304 * @bs: the fcoe boot status
305 *
306 * This function will read the FCOE boot status from the iSCSI FCOE block
307 **/
308 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
309 {
310 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
311 (hw, bs),
312 IXGBE_NOT_IMPLEMENTED);
313 }
314
315 /**
316 * ixgbe_get_bus_info - Set PCI bus info
317 * @hw: pointer to hardware structure
318 *
319 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
320 **/
321 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
322 {
323 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
324 IXGBE_NOT_IMPLEMENTED);
325 }
326
327 /**
328 * ixgbe_get_num_of_tx_queues - Get Tx queues
329 * @hw: pointer to hardware structure
330 *
331 * Returns the number of transmit queues for the given adapter.
332 **/
333 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
334 {
335 return hw->mac.max_tx_queues;
336 }
337
338 /**
339 * ixgbe_get_num_of_rx_queues - Get Rx queues
340 * @hw: pointer to hardware structure
341 *
342 * Returns the number of receive queues for the given adapter.
343 **/
344 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
345 {
346 return hw->mac.max_rx_queues;
347 }
348
349 /**
350 * ixgbe_stop_adapter - Disable Rx/Tx units
351 * @hw: pointer to hardware structure
352 *
353 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
354 * disables transmit and receive units. The adapter_stopped flag is used by
355 * the shared code and drivers to determine if the adapter is in a stopped
356 * state and should not touch the hardware.
357 **/
358 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
359 {
360 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
361 IXGBE_NOT_IMPLEMENTED);
362 }
363
364 /**
365 * ixgbe_read_pba_string - Reads part number string from EEPROM
366 * @hw: pointer to hardware structure
367 * @pba_num: stores the part number string from the EEPROM
368 * @pba_num_size: part number string buffer length
369 *
370 * Reads the part number string from the EEPROM.
371 **/
372 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
373 {
374 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
375 }
376
377 /**
378 * ixgbe_read_pba_num - Reads part number from EEPROM
379 * @hw: pointer to hardware structure
380 * @pba_num: stores the part number from the EEPROM
381 *
382 * Reads the part number from the EEPROM.
383 **/
384 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
385 {
386 return ixgbe_read_pba_num_generic(hw, pba_num);
387 }
388
389 /**
390 * ixgbe_identify_phy - Get PHY type
391 * @hw: pointer to hardware structure
392 *
393 * Determines the physical layer module found on the current adapter.
394 **/
395 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
396 {
397 s32 status = IXGBE_SUCCESS;
398
399 if (hw->phy.type == ixgbe_phy_unknown) {
400 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
401 IXGBE_NOT_IMPLEMENTED);
402 }
403
404 return status;
405 }
406
407 /**
408 * ixgbe_reset_phy - Perform a PHY reset
409 * @hw: pointer to hardware structure
410 **/
411 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
412 {
413 s32 status = IXGBE_SUCCESS;
414
415 if (hw->phy.type == ixgbe_phy_unknown) {
416 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
417 status = IXGBE_ERR_PHY;
418 }
419
420 if (status == IXGBE_SUCCESS) {
421 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
422 IXGBE_NOT_IMPLEMENTED);
423 }
424 return status;
425 }
426
427 /**
428 * ixgbe_get_phy_firmware_version -
429 * @hw: pointer to hardware structure
430 * @firmware_version: pointer to firmware version
431 **/
432 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
433 {
434 s32 status = IXGBE_SUCCESS;
435
436 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
437 (hw, firmware_version),
438 IXGBE_NOT_IMPLEMENTED);
439 return status;
440 }
441
442 /**
443 * ixgbe_read_phy_reg - Read PHY register
444 * @hw: pointer to hardware structure
445 * @reg_addr: 32 bit address of PHY register to read
446 * @phy_data: Pointer to read data from PHY register
447 *
448 * Reads a value from a specified PHY register
449 **/
450 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
451 u16 *phy_data)
452 {
453 s32 status;
454
455 if (hw->phy.id == 0)
456 status = ixgbe_identify_phy(hw);
457 else
458 status = IXGBE_SUCCESS;
459
460 if (status == IXGBE_SUCCESS) {
461 status = ixgbe_call_func(hw, hw->phy.ops.read_reg,
462 (hw, reg_addr, device_type, phy_data),
463 IXGBE_NOT_IMPLEMENTED);
464 }
465 return (status);
466 }
467
468 /**
469 * ixgbe_write_phy_reg - Write PHY register
470 * @hw: pointer to hardware structure
471 * @reg_addr: 32 bit PHY register to write
472 * @phy_data: Data to write to the PHY register
473 *
474 * Writes a value to specified PHY register
475 **/
476 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
477 u16 phy_data)
478 {
479 s32 status;
480
481 if (hw->phy.id == 0)
482 status = ixgbe_identify_phy(hw);
483 else
484 status = IXGBE_SUCCESS;
485
486 if (status == IXGBE_SUCCESS) {
487 status = ixgbe_call_func(hw, hw->phy.ops.write_reg,
488 (hw, reg_addr, device_type, phy_data),
489 IXGBE_NOT_IMPLEMENTED);
490 }
491
492 return status;
493 }
494
495 /**
496 * ixgbe_setup_phy_link - Restart PHY autoneg
497 * @hw: pointer to hardware structure
498 *
499 * Restart autonegotiation and PHY and waits for completion.
500 **/
501 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
502 {
503 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
504 IXGBE_NOT_IMPLEMENTED);
505 }
506
507 /**
508 * ixgbe_check_phy_link - Determine link and speed status
509 * @hw: pointer to hardware structure
510 *
511 * Reads a PHY register to determine if link is up and the current speed for
512 * the PHY.
513 **/
514 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
515 bool *link_up)
516 {
517 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
518 link_up), IXGBE_NOT_IMPLEMENTED);
519 }
520
521 /**
522 * ixgbe_setup_phy_link_speed - Set auto advertise
523 * @hw: pointer to hardware structure
524 * @speed: new link speed
525 *
526 * Sets the auto advertised capabilities
527 **/
528 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
529 bool autoneg_wait_to_complete)
530 {
531 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
532 autoneg_wait_to_complete),
533 IXGBE_NOT_IMPLEMENTED);
534 }
535
536 /**
537 * ixgbe_check_link - Get link and speed status
538 * @hw: pointer to hardware structure
539 *
540 * Reads the links register to determine if link is up and the current speed
541 **/
542 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
543 bool *link_up, bool link_up_wait_to_complete)
544 {
545 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
546 link_up, link_up_wait_to_complete),
547 IXGBE_NOT_IMPLEMENTED);
548 }
549
550 /**
551 * ixgbe_disable_tx_laser - Disable Tx laser
552 * @hw: pointer to hardware structure
553 *
554 * If the driver needs to disable the laser on SFI optics.
555 **/
556 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
557 {
558 if (hw->mac.ops.disable_tx_laser)
559 hw->mac.ops.disable_tx_laser(hw);
560 }
561
562 /**
563 * ixgbe_enable_tx_laser - Enable Tx laser
564 * @hw: pointer to hardware structure
565 *
566 * If the driver needs to enable the laser on SFI optics.
567 **/
568 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
569 {
570 if (hw->mac.ops.enable_tx_laser)
571 hw->mac.ops.enable_tx_laser(hw);
572 }
573
574 /**
575 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
576 * @hw: pointer to hardware structure
577 *
578 * When the driver changes the link speeds that it can support then
579 * flap the tx laser to alert the link partner to start autotry
580 * process on its end.
581 **/
582 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
583 {
584 if (hw->mac.ops.flap_tx_laser)
585 hw->mac.ops.flap_tx_laser(hw);
586 }
587
588 /**
589 * ixgbe_setup_link - Set link speed
590 * @hw: pointer to hardware structure
591 * @speed: new link speed
592 *
593 * Configures link settings. Restarts the link.
594 * Performs autonegotiation if needed.
595 **/
596 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
597 bool autoneg_wait_to_complete)
598 {
599 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
600 autoneg_wait_to_complete),
601 IXGBE_NOT_IMPLEMENTED);
602 }
603
604 /**
605 * ixgbe_get_link_capabilities - Returns link capabilities
606 * @hw: pointer to hardware structure
607 *
608 * Determines the link capabilities of the current configuration.
609 **/
610 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
611 bool *autoneg)
612 {
613 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
614 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
615 }
616
617 /**
618 * ixgbe_led_on - Turn on LEDs
619 * @hw: pointer to hardware structure
620 * @index: led number to turn on
621 *
622 * Turns on the software controllable LEDs.
623 **/
624 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
625 {
626 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
627 IXGBE_NOT_IMPLEMENTED);
628 }
629
630 /**
631 * ixgbe_led_off - Turn off LEDs
632 * @hw: pointer to hardware structure
633 * @index: led number to turn off
634 *
635 * Turns off the software controllable LEDs.
636 **/
637 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
638 {
639 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
640 IXGBE_NOT_IMPLEMENTED);
641 }
642
643 /**
644 * ixgbe_blink_led_start - Blink LEDs
645 * @hw: pointer to hardware structure
646 * @index: led number to blink
647 *
648 * Blink LED based on index.
649 **/
650 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
651 {
652 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
653 IXGBE_NOT_IMPLEMENTED);
654 }
655
656 /**
657 * ixgbe_blink_led_stop - Stop blinking LEDs
658 * @hw: pointer to hardware structure
659 *
660 * Stop blinking LED based on index.
661 **/
662 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
663 {
664 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
665 IXGBE_NOT_IMPLEMENTED);
666 }
667
668 /**
669 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
670 * @hw: pointer to hardware structure
671 *
672 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
673 * ixgbe_hw struct in order to set up EEPROM access.
674 **/
675 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
676 {
677 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
678 IXGBE_NOT_IMPLEMENTED);
679 }
680
681
682 /**
683 * ixgbe_write_eeprom - Write word to EEPROM
684 * @hw: pointer to hardware structure
685 * @offset: offset within the EEPROM to be written to
686 * @data: 16 bit word to be written to the EEPROM
687 *
688 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
689 * called after this function, the EEPROM will most likely contain an
690 * invalid checksum.
691 **/
692 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
693 {
694 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
695 IXGBE_NOT_IMPLEMENTED);
696 }
697
698 /**
699 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
700 * @hw: pointer to hardware structure
701 * @offset: offset within the EEPROM to be written to
702 * @data: 16 bit word(s) to be written to the EEPROM
703 * @words: number of words
704 *
705 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
706 * called after this function, the EEPROM will most likely contain an
707 * invalid checksum.
708 **/
709 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
710 u16 *data)
711 {
712 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
713 (hw, offset, words, data),
714 IXGBE_NOT_IMPLEMENTED);
715 }
716
717 /**
718 * ixgbe_read_eeprom - Read word from EEPROM
719 * @hw: pointer to hardware structure
720 * @offset: offset within the EEPROM to be read
721 * @data: read 16 bit value from EEPROM
722 *
723 * Reads 16 bit value from EEPROM
724 **/
725 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
726 {
727 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
728 IXGBE_NOT_IMPLEMENTED);
729 }
730
731 /**
732 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
733 * @hw: pointer to hardware structure
734 * @offset: offset within the EEPROM to be read
735 * @data: read 16 bit word(s) from EEPROM
736 * @words: number of words
737 *
738 * Reads 16 bit word(s) from EEPROM
739 **/
740 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
741 u16 words, u16 *data)
742 {
743 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
744 (hw, offset, words, data),
745 IXGBE_NOT_IMPLEMENTED);
746 }
747
748 /**
749 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
750 * @hw: pointer to hardware structure
751 * @checksum_val: calculated checksum
752 *
753 * Performs checksum calculation and validates the EEPROM checksum
754 **/
755 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
756 {
757 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
758 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
759 }
760
761 /**
762 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
763 * @hw: pointer to hardware structure
764 **/
765 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
766 {
767 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
768 IXGBE_NOT_IMPLEMENTED);
769 }
770
771 /**
772 * ixgbe_insert_mac_addr - Find a RAR for this mac address
773 * @hw: pointer to hardware structure
774 * @addr: Address to put into receive address register
775 * @vmdq: VMDq pool to assign
776 *
777 * Puts an ethernet address into a receive address register, or
778 * finds the rar that it is aleady in; adds to the pool list
779 **/
780 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
781 {
782 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
783 (hw, addr, vmdq),
784 IXGBE_NOT_IMPLEMENTED);
785 }
786
787 /**
788 * ixgbe_set_rar - Set Rx address register
789 * @hw: pointer to hardware structure
790 * @index: Receive address register to write
791 * @addr: Address to put into receive address register
792 * @vmdq: VMDq "set"
793 * @enable_addr: set flag that address is active
794 *
795 * Puts an ethernet address into a receive address register.
796 **/
797 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
798 u32 enable_addr)
799 {
800 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
801 enable_addr), IXGBE_NOT_IMPLEMENTED);
802 }
803
804 /**
805 * ixgbe_clear_rar - Clear Rx address register
806 * @hw: pointer to hardware structure
807 * @index: Receive address register to write
808 *
809 * Puts an ethernet address into a receive address register.
810 **/
811 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
812 {
813 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
814 IXGBE_NOT_IMPLEMENTED);
815 }
816
817 /**
818 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
819 * @hw: pointer to hardware structure
820 * @rar: receive address register index to associate with VMDq index
821 * @vmdq: VMDq set or pool index
822 **/
823 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
824 {
825 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
826 IXGBE_NOT_IMPLEMENTED);
827
828 }
829
830 /**
831 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
832 * @hw: pointer to hardware structure
833 * @vmdq: VMDq default pool index
834 **/
835 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
836 {
837 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
838 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
839 }
840
841 /**
842 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
843 * @hw: pointer to hardware structure
844 * @rar: receive address register index to disassociate with VMDq index
845 * @vmdq: VMDq set or pool index
846 **/
847 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
848 {
849 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
850 IXGBE_NOT_IMPLEMENTED);
851 }
852
853 /**
854 * ixgbe_init_rx_addrs - Initializes receive address filters.
855 * @hw: pointer to hardware structure
856 *
857 * Places the MAC address in receive address register 0 and clears the rest
858 * of the receive address registers. Clears the multicast table. Assumes
859 * the receiver is in reset when the routine is called.
860 **/
861 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
862 {
863 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
864 IXGBE_NOT_IMPLEMENTED);
865 }
866
867 /**
868 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
869 * @hw: pointer to hardware structure
870 **/
871 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
872 {
873 return hw->mac.num_rar_entries;
874 }
875
876 /**
877 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
878 * @hw: pointer to hardware structure
879 * @addr_list: the list of new multicast addresses
880 * @addr_count: number of addresses
881 * @func: iterator function to walk the multicast address list
882 *
883 * The given list replaces any existing list. Clears the secondary addrs from
884 * receive address registers. Uses unused receive address registers for the
885 * first secondary addresses, and falls back to promiscuous mode as needed.
886 **/
887 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
888 u32 addr_count, ixgbe_mc_addr_itr func)
889 {
890 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
891 addr_list, addr_count, func),
892 IXGBE_NOT_IMPLEMENTED);
893 }
894
895 /**
896 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
897 * @hw: pointer to hardware structure
898 * @mc_addr_list: the list of new multicast addresses
899 * @mc_addr_count: number of addresses
900 * @func: iterator function to walk the multicast address list
901 *
902 * The given list replaces any existing list. Clears the MC addrs from receive
903 * address registers and the multicast table. Uses unused receive address
904 * registers for the first multicast addresses, and hashes the rest into the
905 * multicast table.
906 **/
907 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
908 u32 mc_addr_count, ixgbe_mc_addr_itr func,
909 bool clear)
910 {
911 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
912 mc_addr_list, mc_addr_count, func, clear),
913 IXGBE_NOT_IMPLEMENTED);
914 }
915
916 /**
917 * ixgbe_enable_mc - Enable multicast address in RAR
918 * @hw: pointer to hardware structure
919 *
920 * Enables multicast address in RAR and the use of the multicast hash table.
921 **/
922 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
923 {
924 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
925 IXGBE_NOT_IMPLEMENTED);
926 }
927
928 /**
929 * ixgbe_disable_mc - Disable multicast address in RAR
930 * @hw: pointer to hardware structure
931 *
932 * Disables multicast address in RAR and the use of the multicast hash table.
933 **/
934 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
935 {
936 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
937 IXGBE_NOT_IMPLEMENTED);
938 }
939
940 /**
941 * ixgbe_clear_vfta - Clear VLAN filter table
942 * @hw: pointer to hardware structure
943 *
944 * Clears the VLAN filer table, and the VMDq index associated with the filter
945 **/
946 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
947 {
948 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
949 IXGBE_NOT_IMPLEMENTED);
950 }
951
952 /**
953 * ixgbe_set_vfta - Set VLAN filter table
954 * @hw: pointer to hardware structure
955 * @vlan: VLAN id to write to VLAN filter
956 * @vind: VMDq output index that maps queue to VLAN id in VFTA
957 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
958 *
959 * Turn on/off specified VLAN in the VLAN filter table.
960 **/
961 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
962 {
963 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
964 vlan_on), IXGBE_NOT_IMPLEMENTED);
965 }
966
967 /**
968 * ixgbe_set_vlvf - Set VLAN Pool Filter
969 * @hw: pointer to hardware structure
970 * @vlan: VLAN id to write to VLAN filter
971 * @vind: VMDq output index that maps queue to VLAN id in VFVFB
972 * @vlan_on: boolean flag to turn on/off VLAN in VFVF
973 * @vfta_changed: pointer to boolean flag which indicates whether VFTA
974 * should be changed
975 *
976 * Turn on/off specified bit in VLVF table.
977 **/
978 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
979 bool *vfta_changed)
980 {
981 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
982 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
983 }
984
985 /**
986 * ixgbe_fc_enable - Enable flow control
987 * @hw: pointer to hardware structure
988 *
989 * Configures the flow control settings based on SW configuration.
990 **/
991 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
992 {
993 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
994 IXGBE_NOT_IMPLEMENTED);
995 }
996
997 /**
998 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
999 * @hw: pointer to hardware structure
1000 * @maj: driver major number to be sent to firmware
1001 * @min: driver minor number to be sent to firmware
1002 * @build: driver build number to be sent to firmware
1003 * @ver: driver version number to be sent to firmware
1004 **/
1005 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
1006 u8 ver)
1007 {
1008 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1009 build, ver), IXGBE_NOT_IMPLEMENTED);
1010 }
1011
1012
1013 /**
1014 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1015 * @hw: pointer to hardware structure
1016 * @reg: analog register to read
1017 * @val: read value
1018 *
1019 * Performs write operation to analog register specified.
1020 **/
1021 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1022 {
1023 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1024 val), IXGBE_NOT_IMPLEMENTED);
1025 }
1026
1027 /**
1028 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1029 * @hw: pointer to hardware structure
1030 * @reg: analog register to write
1031 * @val: value to write
1032 *
1033 * Performs write operation to Atlas analog register specified.
1034 **/
1035 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1036 {
1037 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1038 val), IXGBE_NOT_IMPLEMENTED);
1039 }
1040
1041 /**
1042 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1043 * @hw: pointer to hardware structure
1044 *
1045 * Initializes the Unicast Table Arrays to zero on device load. This
1046 * is part of the Rx init addr execution path.
1047 **/
1048 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1049 {
1050 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1051 IXGBE_NOT_IMPLEMENTED);
1052 }
1053
1054 /**
1055 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1056 * @hw: pointer to hardware structure
1057 * @byte_offset: byte offset to read
1058 * @data: value read
1059 *
1060 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1061 **/
1062 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1063 u8 *data)
1064 {
1065 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1066 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1067 }
1068
1069 /**
1070 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1071 * @hw: pointer to hardware structure
1072 * @byte_offset: byte offset to write
1073 * @data: value to write
1074 *
1075 * Performs byte write operation to SFP module's EEPROM over I2C interface
1076 * at a specified device address.
1077 **/
1078 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1079 u8 data)
1080 {
1081 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1082 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1083 }
1084
1085 /**
1086 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1087 * @hw: pointer to hardware structure
1088 * @byte_offset: EEPROM byte offset to write
1089 * @eeprom_data: value to write
1090 *
1091 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1092 **/
1093 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1094 u8 byte_offset, u8 eeprom_data)
1095 {
1096 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1097 (hw, byte_offset, eeprom_data),
1098 IXGBE_NOT_IMPLEMENTED);
1099 }
1100
1101 /**
1102 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1103 * @hw: pointer to hardware structure
1104 * @byte_offset: EEPROM byte offset to read
1105 * @eeprom_data: value read
1106 *
1107 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1108 **/
1109 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1110 {
1111 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1112 (hw, byte_offset, eeprom_data),
1113 IXGBE_NOT_IMPLEMENTED);
1114 }
1115
1116 /**
1117 * ixgbe_get_supported_physical_layer - Returns physical layer type
1118 * @hw: pointer to hardware structure
1119 *
1120 * Determines physical layer capabilities of the current configuration.
1121 **/
1122 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1123 {
1124 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1125 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1126 }
1127
1128 /**
1129 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1130 * @hw: pointer to hardware structure
1131 * @regval: bitfield to write to the Rx DMA register
1132 *
1133 * Enables the Rx DMA unit of the device.
1134 **/
1135 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1136 {
1137 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1138 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1139 }
1140
1141 /**
1142 * ixgbe_disable_sec_rx_path - Stops the receive data path
1143 * @hw: pointer to hardware structure
1144 *
1145 * Stops the receive data path.
1146 **/
1147 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1148 {
1149 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1150 (hw), IXGBE_NOT_IMPLEMENTED);
1151 }
1152
1153 /**
1154 * ixgbe_enable_sec_rx_path - Enables the receive data path
1155 * @hw: pointer to hardware structure
1156 *
1157 * Enables the receive data path.
1158 **/
1159 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1160 {
1161 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1162 (hw), IXGBE_NOT_IMPLEMENTED);
1163 }
1164
1165 /**
1166 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1167 * @hw: pointer to hardware structure
1168 * @mask: Mask to specify which semaphore to acquire
1169 *
1170 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1171 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1172 **/
1173 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
1174 {
1175 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1176 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1177 }
1178
1179 /**
1180 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1181 * @hw: pointer to hardware structure
1182 * @mask: Mask to specify which semaphore to release
1183 *
1184 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1185 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1186 **/
1187 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
1188 {
1189 if (hw->mac.ops.release_swfw_sync)
1190 hw->mac.ops.release_swfw_sync(hw, mask);
1191 }
1192