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OS-5192 need faster clock_gettime
Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>
Reviewed by: Robert Mustacchi <rm@joyent.com>
Reviewed by: Joshua M. Clulow <jmc@joyent.com>
Reviewed by: Ryan Zezeski <ryan@zinascii.com>
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--- old/usr/src/uts/intel/sys/machlock.h
+++ new/usr/src/uts/intel/sys/machlock.h
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
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14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21 /*
22 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
23 23 * Use is subject to license terms.
24 + * Copyright 2016 Joyent, Inc.
24 25 */
25 26
26 27 #ifndef _SYS_MACHLOCK_H
27 28 #define _SYS_MACHLOCK_H
28 29
29 -#pragma ident "%Z%%M% %I% %E% SMI"
30 -
31 30 #ifndef _ASM
32 31 #include <sys/types.h>
33 32 #include <sys/time.h>
34 33 #endif /* _ASM */
35 34
36 35 #ifdef __cplusplus
37 36 extern "C" {
38 37 #endif
39 38
40 39 #ifndef _ASM
41 40
42 41 #ifdef _KERNEL
43 42
44 43 extern void lock_set(lock_t *lp);
45 44 extern int lock_try(lock_t *lp);
46 45 extern int lock_spin_try(lock_t *lp);
47 46 extern int ulock_try(lock_t *lp);
48 47 extern void lock_clear(lock_t *lp);
49 48 extern void ulock_clear(lock_t *lp);
50 49 extern void lock_set_spl(lock_t *lp, int new_pil, ushort_t *old_pil);
51 50 extern void lock_clear_splx(lock_t *lp, int s);
52 51
53 52 #endif /* _KERNEL */
54 53
55 54 #define LOCK_HELD_VALUE 0xff
56 55 #define LOCK_INIT_CLEAR(lp) (*(lp) = 0)
57 56 #define LOCK_INIT_HELD(lp) (*(lp) = LOCK_HELD_VALUE)
58 57 #define LOCK_HELD(lp) (*(volatile lock_t *)(lp) != 0)
59 58
60 59 typedef lock_t disp_lock_t; /* dispatcher lock type */
61 60
62 61 /*
63 62 * SPIN_LOCK() macro indicates whether lock is implemented as a spin lock or
64 63 * an adaptive mutex, depending on what interrupt levels use it.
65 64 */
66 65 #define SPIN_LOCK(pl) ((pl) > ipltospl(LOCK_LEVEL))
67 66
68 67 /*
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69 68 * Macro to control loops which spin on a lock and then check state
70 69 * periodically. Its passed an integer, and returns a boolean value
71 70 * that if true indicates its a good time to get the scheduler lock and
72 71 * check the state of the current owner of the lock.
73 72 */
74 73 #define LOCK_SAMPLE_INTERVAL(i) (((i) & 0xff) == 0)
75 74
76 75 /*
77 76 * Externs for CLOCK_LOCK and clock resolution
78 77 */
79 -extern volatile int hres_lock;
78 +extern volatile uint32_t hres_lock;
80 79 extern hrtime_t hrtime_base;
81 80 extern int clock_res;
82 81
83 82 #endif /* _ASM */
84 83
85 84 /*
86 85 * The definitions of the symbolic interrupt levels:
87 86 *
88 87 * CLOCK_LEVEL => The level at which one must be to block the clock.
89 88 *
90 89 * LOCK_LEVEL => The highest level at which one may block (and thus the
91 90 * highest level at which one may acquire adaptive locks)
92 91 * Also the highest level at which one may be preempted.
93 92 *
94 93 * DISP_LEVEL => The level at which one must be to perform dispatcher
95 94 * operations.
96 95 *
97 96 * The constraints on the platform:
98 97 *
99 98 * - CLOCK_LEVEL must be less than or equal to LOCK_LEVEL
100 99 * - LOCK_LEVEL must be less than DISP_LEVEL
101 100 * - DISP_LEVEL should be as close to LOCK_LEVEL as possible
102 101 *
103 102 * Note that LOCK_LEVEL and CLOCK_LEVEL have historically always been equal;
104 103 * changing this relationship is probably possible but not advised.
105 104 *
106 105 */
107 106
108 107 #define PIL_MAX 15
109 108
110 109 #define CLOCK_LEVEL 10
111 110 #define LOCK_LEVEL 10
112 111 #define DISP_LEVEL (LOCK_LEVEL + 1)
113 112
114 113 #define HIGH_LEVELS (PIL_MAX - LOCK_LEVEL)
115 114
116 115 /*
117 116 * The following mask is for the cpu_intr_actv bits corresponding to
118 117 * high-level PILs. It should equal:
119 118 * ((((1 << PIL_MAX + 1) - 1) >> LOCK_LEVEL + 1) << LOCK_LEVEL + 1)
120 119 */
121 120 #define CPU_INTR_ACTV_HIGH_LEVEL_MASK 0xF800
122 121
123 122 /*
124 123 * The semaphore code depends on being able to represent a lock plus
125 124 * owner in a single 32-bit word. (Mutexes used to have a similar
126 125 * dependency, but no longer.) Thus the owner must contain at most
127 126 * 24 significant bits. At present only threads and semaphores
128 127 * must be aware of this vile constraint. Different ISAs may handle this
129 128 * differently depending on their capabilities (e.g. compare-and-swap)
130 129 * and limitations (e.g. constraints on alignment and/or KERNELBASE).
131 130 */
132 131 #define PTR24_LSB 5 /* lower bits all zero */
133 132 #define PTR24_MSB (PTR24_LSB + 24) /* upper bits all one */
134 133 #define PTR24_ALIGN 32 /* minimum alignment (1 << lsb) */
135 134 #define PTR24_BASE 0xe0000000 /* minimum ptr value (-1 >> (32-msb)) */
136 135
137 136 #ifdef __cplusplus
138 137 }
139 138 #endif
140 139
141 140 #endif /* _SYS_MACHLOCK_H */
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