7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
25 */
26
27 #pragma ident "%Z%%M% %I% %E% SMI"
28
29 #include <sys/fasttrap_isa.h>
30 #include <sys/fasttrap_impl.h>
31 #include <sys/dtrace.h>
32 #include <sys/dtrace_impl.h>
33 #include <sys/cmn_err.h>
34 #include <sys/regset.h>
35 #include <sys/privregs.h>
36 #include <sys/segments.h>
37 #include <sys/x86_archext.h>
38 #include <sys/sysmacros.h>
39 #include <sys/trap.h>
40 #include <sys/archsystm.h>
41
42 /*
43 * Lossless User-Land Tracing on x86
44 * ---------------------------------
45 *
46 * The execution of most instructions is not dependent on the address; for
47 * these instructions it is sufficient to copy them into the user process's
48 * address space and execute them. To effectively single-step an instruction
49 * in user-land, we copy out the following sequence of instructions to scratch
50 * space in the user thread's ulwp_t structure.
51 *
52 * We then set the program counter (%eip or %rip) to point to this scratch
53 * space. Once execution resumes, the original instruction is executed and
54 * then control flow is redirected to what was originally the subsequent
55 * instruction. If the kernel attemps to deliver a signal while single-
56 * stepping, the signal is deferred and the program counter is moved into the
57 * second sequence of instructions. The second sequence ends in a trap into
58 * the kernel where the deferred signal is then properly handled and delivered.
59 *
60 * For instructions whose execute is position dependent, we perform simple
1377 case FASTTRAP_T_COMMON:
1378 {
1379 uintptr_t addr;
1380 #if defined(__amd64)
1381 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 22];
1382 #else
1383 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 7];
1384 #endif
1385 uint_t i = 0;
1386 klwp_t *lwp = ttolwp(curthread);
1387
1388 /*
1389 * Compute the address of the ulwp_t and step over the
1390 * ul_self pointer. The method used to store the user-land
1391 * thread pointer is very different on 32- and 64-bit
1392 * kernels.
1393 */
1394 #if defined(__amd64)
1395 if (p->p_model == DATAMODEL_LP64) {
1396 addr = lwp->lwp_pcb.pcb_fsbase;
1397 addr += sizeof (void *);
1398 } else {
1399 addr = lwp->lwp_pcb.pcb_gsbase;
1400 addr += sizeof (caddr32_t);
1401 }
1402 #else
1403 addr = USEGD_GETBASE(&lwp->lwp_pcb.pcb_gsdesc);
1404 addr += sizeof (void *);
1405 #endif
1406
1407 /*
1408 * Generic Instruction Tracing
1409 * ---------------------------
1410 *
1411 * This is the layout of the scratch space in the user-land
1412 * thread structure for our generated instructions.
1413 *
1414 * 32-bit mode bytes
1415 * ------------------------ -----
1416 * a: <original instruction> <= 15
|
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
25 */
26
27 /*
28 * Copyright (c) 2015, Joyent, Inc. All rights reserved.
29 */
30
31 #include <sys/fasttrap_isa.h>
32 #include <sys/fasttrap_impl.h>
33 #include <sys/dtrace.h>
34 #include <sys/dtrace_impl.h>
35 #include <sys/cmn_err.h>
36 #include <sys/regset.h>
37 #include <sys/privregs.h>
38 #include <sys/segments.h>
39 #include <sys/x86_archext.h>
40 #include <sys/sysmacros.h>
41 #include <sys/trap.h>
42 #include <sys/archsystm.h>
43 #include <sys/proc.h>
44 #include <sys/brand.h>
45 #include <sys/machbrand.h>
46
47 /*
48 * Lossless User-Land Tracing on x86
49 * ---------------------------------
50 *
51 * The execution of most instructions is not dependent on the address; for
52 * these instructions it is sufficient to copy them into the user process's
53 * address space and execute them. To effectively single-step an instruction
54 * in user-land, we copy out the following sequence of instructions to scratch
55 * space in the user thread's ulwp_t structure.
56 *
57 * We then set the program counter (%eip or %rip) to point to this scratch
58 * space. Once execution resumes, the original instruction is executed and
59 * then control flow is redirected to what was originally the subsequent
60 * instruction. If the kernel attemps to deliver a signal while single-
61 * stepping, the signal is deferred and the program counter is moved into the
62 * second sequence of instructions. The second sequence ends in a trap into
63 * the kernel where the deferred signal is then properly handled and delivered.
64 *
65 * For instructions whose execute is position dependent, we perform simple
1382 case FASTTRAP_T_COMMON:
1383 {
1384 uintptr_t addr;
1385 #if defined(__amd64)
1386 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 22];
1387 #else
1388 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 7];
1389 #endif
1390 uint_t i = 0;
1391 klwp_t *lwp = ttolwp(curthread);
1392
1393 /*
1394 * Compute the address of the ulwp_t and step over the
1395 * ul_self pointer. The method used to store the user-land
1396 * thread pointer is very different on 32- and 64-bit
1397 * kernels.
1398 */
1399 #if defined(__amd64)
1400 if (p->p_model == DATAMODEL_LP64) {
1401 addr = lwp->lwp_pcb.pcb_fsbase;
1402
1403 /*
1404 * If we're branded, convert the fsbase from the
1405 * brand's fsbase to the native fsbase.
1406 */
1407 if (PROC_IS_BRANDED(p) && BRMOP(p)->b_fsbase != NULL)
1408 addr = BRMOP(p)->b_fsbase(lwp, addr);
1409
1410 addr += sizeof (void *);
1411 } else {
1412 addr = lwp->lwp_pcb.pcb_gsbase;
1413 addr += sizeof (caddr32_t);
1414 }
1415 #else
1416 addr = USEGD_GETBASE(&lwp->lwp_pcb.pcb_gsdesc);
1417 addr += sizeof (void *);
1418 #endif
1419
1420 /*
1421 * Generic Instruction Tracing
1422 * ---------------------------
1423 *
1424 * This is the layout of the scratch space in the user-land
1425 * thread structure for our generated instructions.
1426 *
1427 * 32-bit mode bytes
1428 * ------------------------ -----
1429 * a: <original instruction> <= 15
|