OS-5192 need faster clock_gettime
Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>
Reviewed by: Robert Mustacchi <rm@joyent.com>
Reviewed by: Joshua M. Clulow <jmc@joyent.com>
Reviewed by: Ryan Zezeski <ryan@zinascii.com>

*** 21,30 ****
--- 21,31 ----
  /*
   * Copyright (c) 2012 Gary Mills
   *
   * Copyright (c) 1993, 2010, Oracle and/or its affiliates. All rights reserved.
   * Copyright (c) 2011 by Delphix. All rights reserved.
+  * Copyright 2016 Joyent, Inc.
   */
  /*
   * Copyright (c) 2010, Intel Corporation.
   * All rights reserved.
   */
*** 59,68 ****
--- 60,70 ----
  #include <sys/kdi_machimpl.h>
  #include <sys/archsystm.h>
  #include <sys/promif.h>
  #include <sys/pci_cfgspace.h>
  #include <sys/bootvfs.h>
+ #include <sys/tsc.h>
  #ifdef __xpv
  #include <sys/hypervisor.h>
  #else
  #include <sys/xpv_support.h>
  #endif
*** 225,243 ****
           * The Xen hypervisor does not correctly report whether rdtscp is
           * supported or not, so we must assume that it is not.
           */
          if ((get_hwenv() & HW_XEN_HVM) == 0 &&
              is_x86_feature(x86_featureset, X86FSET_TSCP))
!                 patch_tsc_read(X86_HAVE_TSCP);
          else if (cpuid_getvendor(CPU) == X86_VENDOR_AMD &&
              cpuid_getfamily(CPU) <= 0xf &&
              is_x86_feature(x86_featureset, X86FSET_SSE2))
!                 patch_tsc_read(X86_TSC_MFENCE);
          else if (cpuid_getvendor(CPU) == X86_VENDOR_Intel &&
              cpuid_getfamily(CPU) <= 6 &&
              is_x86_feature(x86_featureset, X86FSET_SSE2))
!                 patch_tsc_read(X86_TSC_LFENCE);
  
  #endif  /* !__xpv */
  
  #if defined(__i386) && !defined(__xpv)
          /*
--- 227,245 ----
           * The Xen hypervisor does not correctly report whether rdtscp is
           * supported or not, so we must assume that it is not.
           */
          if ((get_hwenv() & HW_XEN_HVM) == 0 &&
              is_x86_feature(x86_featureset, X86FSET_TSCP))
!                 patch_tsc_read(TSC_TSCP);
          else if (cpuid_getvendor(CPU) == X86_VENDOR_AMD &&
              cpuid_getfamily(CPU) <= 0xf &&
              is_x86_feature(x86_featureset, X86FSET_SSE2))
!                 patch_tsc_read(TSC_RDTSC_MFENCE);
          else if (cpuid_getvendor(CPU) == X86_VENDOR_Intel &&
              cpuid_getfamily(CPU) <= 6 &&
              is_x86_feature(x86_featureset, X86FSET_SSE2))
!                 patch_tsc_read(TSC_RDTSC_LFENCE);
  
  #endif  /* !__xpv */
  
  #if defined(__i386) && !defined(__xpv)
          /*
*** 244,254 ****
           * Some i386 processors do not implement the rdtsc instruction,
           * or at least they do not implement it correctly. Patch them to
           * return 0.
           */
          if (!is_x86_feature(x86_featureset, X86FSET_TSC))
!                 patch_tsc_read(X86_NO_TSC);
  #endif  /* __i386 && !__xpv */
  
  #if defined(__amd64) && !defined(__xpv)
          patch_memops(cpuid_getvendor(CPU));
  #endif  /* __amd64 && !__xpv */
--- 246,256 ----
           * Some i386 processors do not implement the rdtsc instruction,
           * or at least they do not implement it correctly. Patch them to
           * return 0.
           */
          if (!is_x86_feature(x86_featureset, X86FSET_TSC))
!                 patch_tsc_read(TSC_NONE);
  #endif  /* __i386 && !__xpv */
  
  #if defined(__amd64) && !defined(__xpv)
          patch_memops(cpuid_getvendor(CPU));
  #endif  /* __amd64 && !__xpv */