8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 
  22 /*
  23  * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
  24  */
  25 
  26 /*
  27  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
  28  */
  29 
  30 #include "igb_sw.h"
  31 
  32 int
  33 igb_m_stat(void *arg, uint_t stat, uint64_t *val)
  34 {
  35         igb_t *igb = (igb_t *)arg;
  36         struct e1000_hw *hw = &igb->hw;
  37         igb_stat_t *igb_ks;
  38         uint32_t low_val, high_val;
  39 
  40         igb_ks = (igb_stat_t *)igb->igb_ks->ks_data;
  41 
  42         mutex_enter(&igb->gen_lock);
  43 
  44         if (igb->igb_state & IGB_SUSPENDED) {
  45                 mutex_exit(&igb->gen_lock);
  46                 return (ECANCELED);
  47         }
 
1368                 case MAC_PROP_EN_100HDX_CAP:
1369                 case MAC_PROP_EN_10FDX_CAP:
1370                 case MAC_PROP_EN_10HDX_CAP:
1371                 case MAC_PROP_AUTONEG:
1372                 case MAC_PROP_FLOWCTRL:
1373                         return (B_TRUE);
1374         }
1375         return (B_FALSE);
1376 }
1377 
1378 /* ARGSUSED */
1379 int
1380 igb_set_priv_prop(igb_t *igb, const char *pr_name,
1381     uint_t pr_valsize, const void *pr_val)
1382 {
1383         int err = 0;
1384         long result;
1385         struct e1000_hw *hw = &igb->hw;
1386         int i;
1387 
1388         if (strcmp(pr_name, "_tx_copy_thresh") == 0) {
1389                 if (pr_val == NULL) {
1390                         err = EINVAL;
1391                         return (err);
1392                 }
1393                 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
1394                 if (result < MIN_TX_COPY_THRESHOLD ||
1395                     result > MAX_TX_COPY_THRESHOLD)
1396                         err = EINVAL;
1397                 else {
1398                         igb->tx_copy_thresh = (uint32_t)result;
1399                 }
1400                 return (err);
1401         }
1402         if (strcmp(pr_name, "_tx_recycle_thresh") == 0) {
1403                 if (pr_val == NULL) {
1404                         err = EINVAL;
1405                         return (err);
1406                 }
1407                 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
 
1490                         /* Set interrupt throttling rate */
1491                         for (i = 0; i < igb->intr_cnt; i++)
1492                                 E1000_WRITE_REG(hw, E1000_EITR(i),
1493                                     igb->intr_throttling[i]);
1494                 }
1495                 return (err);
1496         }
1497         return (ENOTSUP);
1498 }
1499 
1500 int
1501 igb_get_priv_prop(igb_t *igb, const char *pr_name, uint_t pr_valsize,
1502     void *pr_val)
1503 {
1504         int value;
1505 
1506         if (strcmp(pr_name, "_adv_pause_cap") == 0) {
1507                 value = igb->param_adv_pause_cap;
1508         } else if (strcmp(pr_name, "_adv_asym_pause_cap") == 0) {
1509                 value = igb->param_adv_asym_pause_cap;
1510         } else if (strcmp(pr_name, "_tx_copy_thresh") == 0) {
1511                 value = igb->tx_copy_thresh;
1512         } else if (strcmp(pr_name, "_tx_recycle_thresh") == 0) {
1513                 value = igb->tx_recycle_thresh;
1514         } else if (strcmp(pr_name, "_tx_overload_thresh") == 0) {
1515                 value = igb->tx_overload_thresh;
1516         } else if (strcmp(pr_name, "_tx_resched_thresh") == 0) {
1517                 value = igb->tx_resched_thresh;
1518         } else if (strcmp(pr_name, "_rx_copy_thresh") == 0) {
1519                 value = igb->rx_copy_thresh;
1520         } else if (strcmp(pr_name, "_rx_limit_per_intr") == 0) {
1521                 value = igb->rx_limit_per_intr;
1522         } else if (strcmp(pr_name, "_intr_throttling") == 0) {
1523                 value = igb->intr_throttling[0];
1524         } else {
1525                 return (ENOTSUP);
1526         }
1527 
1528         (void) snprintf(pr_val, pr_valsize, "%d", value);
1529         return (0);
 
 | 
 
 
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 
  22 /*
  23  * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
  24  */
  25 
  26 /*
  27  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
  28  * Copyright 2013, Nexenta Systems, Inc. All rights reserved.
  29  */
  30 
  31 #include "igb_sw.h"
  32 
  33 int
  34 igb_m_stat(void *arg, uint_t stat, uint64_t *val)
  35 {
  36         igb_t *igb = (igb_t *)arg;
  37         struct e1000_hw *hw = &igb->hw;
  38         igb_stat_t *igb_ks;
  39         uint32_t low_val, high_val;
  40 
  41         igb_ks = (igb_stat_t *)igb->igb_ks->ks_data;
  42 
  43         mutex_enter(&igb->gen_lock);
  44 
  45         if (igb->igb_state & IGB_SUSPENDED) {
  46                 mutex_exit(&igb->gen_lock);
  47                 return (ECANCELED);
  48         }
 
1369                 case MAC_PROP_EN_100HDX_CAP:
1370                 case MAC_PROP_EN_10FDX_CAP:
1371                 case MAC_PROP_EN_10HDX_CAP:
1372                 case MAC_PROP_AUTONEG:
1373                 case MAC_PROP_FLOWCTRL:
1374                         return (B_TRUE);
1375         }
1376         return (B_FALSE);
1377 }
1378 
1379 /* ARGSUSED */
1380 int
1381 igb_set_priv_prop(igb_t *igb, const char *pr_name,
1382     uint_t pr_valsize, const void *pr_val)
1383 {
1384         int err = 0;
1385         long result;
1386         struct e1000_hw *hw = &igb->hw;
1387         int i;
1388 
1389         if (strcmp(pr_name, "_eee_support") == 0) {
1390                 if (pr_val == NULL)
1391                         return (EINVAL);
1392                 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
1393                 switch (result) {
1394                 case 0:
1395                 case 1:
1396                         if (hw->mac.type != e1000_i350) {
1397                                 /*
1398                                  * For now, only supported on I350.
1399                                  * Add new mac.type values (or use < instead)
1400                                  * as new cards offer up EEE.
1401                                  */
1402                                 return (ENXIO);
1403                         }
1404                         /* Must set this prior to the set call. */
1405                         hw->dev_spec._82575.eee_disable = !result;
1406                         if (e1000_set_eee_i350(hw) != E1000_SUCCESS)
1407                                 err = EIO;
1408                         break;
1409                 default:
1410                         err = EINVAL;
1411                         /* FALLTHRU */
1412                 }
1413                 return (err);
1414         }
1415         if (strcmp(pr_name, "_tx_copy_thresh") == 0) {
1416                 if (pr_val == NULL) {
1417                         err = EINVAL;
1418                         return (err);
1419                 }
1420                 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
1421                 if (result < MIN_TX_COPY_THRESHOLD ||
1422                     result > MAX_TX_COPY_THRESHOLD)
1423                         err = EINVAL;
1424                 else {
1425                         igb->tx_copy_thresh = (uint32_t)result;
1426                 }
1427                 return (err);
1428         }
1429         if (strcmp(pr_name, "_tx_recycle_thresh") == 0) {
1430                 if (pr_val == NULL) {
1431                         err = EINVAL;
1432                         return (err);
1433                 }
1434                 (void) ddi_strtol(pr_val, (char **)NULL, 0, &result);
 
1517                         /* Set interrupt throttling rate */
1518                         for (i = 0; i < igb->intr_cnt; i++)
1519                                 E1000_WRITE_REG(hw, E1000_EITR(i),
1520                                     igb->intr_throttling[i]);
1521                 }
1522                 return (err);
1523         }
1524         return (ENOTSUP);
1525 }
1526 
1527 int
1528 igb_get_priv_prop(igb_t *igb, const char *pr_name, uint_t pr_valsize,
1529     void *pr_val)
1530 {
1531         int value;
1532 
1533         if (strcmp(pr_name, "_adv_pause_cap") == 0) {
1534                 value = igb->param_adv_pause_cap;
1535         } else if (strcmp(pr_name, "_adv_asym_pause_cap") == 0) {
1536                 value = igb->param_adv_asym_pause_cap;
1537         } else if (strcmp(pr_name, "_eee_support") == 0) {
1538                 /*
1539                  * For now, only supported on I350.  Add new mac.type values
1540                  * (or use < instead) as new cards offer up EEE.
1541                  */
1542                 value = (igb->hw.mac.type != e1000_i350) ? 0 :
1543                     !(igb->hw.dev_spec._82575.eee_disable);
1544         } else if (strcmp(pr_name, "_tx_copy_thresh") == 0) {
1545                 value = igb->tx_copy_thresh;
1546         } else if (strcmp(pr_name, "_tx_recycle_thresh") == 0) {
1547                 value = igb->tx_recycle_thresh;
1548         } else if (strcmp(pr_name, "_tx_overload_thresh") == 0) {
1549                 value = igb->tx_overload_thresh;
1550         } else if (strcmp(pr_name, "_tx_resched_thresh") == 0) {
1551                 value = igb->tx_resched_thresh;
1552         } else if (strcmp(pr_name, "_rx_copy_thresh") == 0) {
1553                 value = igb->rx_copy_thresh;
1554         } else if (strcmp(pr_name, "_rx_limit_per_intr") == 0) {
1555                 value = igb->rx_limit_per_intr;
1556         } else if (strcmp(pr_name, "_intr_throttling") == 0) {
1557                 value = igb->intr_throttling[0];
1558         } else {
1559                 return (ENOTSUP);
1560         }
1561 
1562         (void) snprintf(pr_val, pr_valsize, "%d", value);
1563         return (0);
 
 |