2038 Add in I350 and ET2 support into igb
Reviewed by: Dan McDonald <danmcd@nexenta.com>

*** 18,28 ****
   *
   * CDDL HEADER END
   */
  
  /*
!  * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
   */
  
  /*
   * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
   */
--- 18,28 ----
   *
   * CDDL HEADER END
   */
  
  /*
!  * Copyright (c) 2007-2012 Intel Corporation. All rights reserved.
   */
  
  /*
   * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
   */
*** 568,576 ****
--- 568,584 ----
  #define E1000_PCIEMISC  0x05BB8 /* PCIE misc config register */
  
  /* PCIe Parity Status Register */
  #define E1000_PCIEERRSTS        0x05BA8
  
+ /* Energy Efficient Ethernet "EEE" registers */
+ #define E1000_IPCNFG    0x0E38 /* Internal PHY Configuration */
+ #define E1000_LTRC      0x01A0 /* Latency Tolerance Reporting Control */
+ #define E1000_EEER      0x0E30 /* Energy Efficient Ethernet "EEE" */
+ #define E1000_EEE_SU    0x0E34 /* EEE Setup */
+ #define E1000_TLPIC     0x4148 /* EEE Tx LPI Count - TLPIC */
+ #define E1000_RLPIC     0x414C /* EEE Rx LPI Count - RLPIC */
+ 
  #ifdef __cplusplus
  }
  #endif
  #endif  /* _IGB_REGS_H */