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2038 Add in I350 and ET2 support into igb
Reviewed by: Dan McDonald <danmcd@nexenta.com>


   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 
  22 /*
  23  * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
  24  */
  25 
  26 /*
  27  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
  28  */
  29 
  30 /* IntelVersion: 1.446.2.1 v3_3_14_3_BHSW1 */
  31 
  32 #ifndef _IGB_HW_H
  33 #define _IGB_HW_H
  34 
  35 #ifdef __cplusplus
  36 extern "C" {
  37 #endif
  38 
  39 #include "igb_osdep.h"
  40 #include "igb_regs.h"
  41 #include "igb_defines.h"
  42 
  43 struct e1000_hw;
  44 
  45 #define E1000_DEV_ID_82576                      0x10C9
  46 #define E1000_DEV_ID_82576_FIBER                0x10E6
  47 #define E1000_DEV_ID_82576_SERDES               0x10E7
  48 #define E1000_DEV_ID_82576_QUAD_COPPER          0x10E8

  49 #define E1000_DEV_ID_82576_NS                   0x150A
  50 #define E1000_DEV_ID_82576_NS_SERDES            0x1518
  51 #define E1000_DEV_ID_82576_SERDES_QUAD          0x150D
  52 #define E1000_DEV_ID_82575EB_COPPER             0x10A7
  53 #define E1000_DEV_ID_82575EB_FIBER_SERDES       0x10A9
  54 #define E1000_DEV_ID_82575GB_QUAD_COPPER        0x10D6
  55 #define E1000_DEV_ID_82580_COPPER               0x150E
  56 #define E1000_DEV_ID_82580_FIBER                0x150F
  57 #define E1000_DEV_ID_82580_SERDES               0x1510
  58 #define E1000_DEV_ID_82580_SGMII                0x1511
  59 #define E1000_DEV_ID_82580_COPPER_DUAL          0x1516

  60 
  61 #define E1000_REVISION_0 0
  62 #define E1000_REVISION_1 1
  63 #define E1000_REVISION_2 2
  64 #define E1000_REVISION_3 3
  65 #define E1000_REVISION_4 4
  66 
  67 #define E1000_FUNC_0    0
  68 #define E1000_FUNC_1    1
  69 #define E1000_FUNC_2    2
  70 #define E1000_FUNC_3    3
  71 
  72 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN0       0
  73 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN1       3
  74 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN2       6
  75 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN3       9
  76 
  77 enum e1000_mac_type {
  78         e1000_undefined = 0,
  79         e1000_82575,
  80         e1000_82576,
  81         e1000_82580,

  82         e1000_num_macs  /* List is 1-based, so subtract 1 for true count. */
  83 };
  84 
  85 enum e1000_media_type {
  86         e1000_media_type_unknown = 0,
  87         e1000_media_type_copper = 1,
  88         e1000_media_type_fiber = 2,
  89         e1000_media_type_internal_serdes = 3,
  90         e1000_num_media_types
  91 };
  92 
  93 enum e1000_nvm_type {
  94         e1000_nvm_unknown = 0,
  95         e1000_nvm_none,
  96         e1000_nvm_eeprom_spi,
  97         e1000_nvm_eeprom_microwire,
  98         e1000_nvm_flash_hw,
  99         e1000_nvm_flash_sw
 100 };
 101 


 623         enum e1000_bus_speed speed;
 624         enum e1000_bus_width width;
 625 
 626         u16 func;
 627         u16 pci_cmd_word;
 628 };
 629 
 630 struct e1000_fc_info {
 631         u32 high_water;         /* Flow control high-water mark */
 632         u32 low_water;          /* Flow control low-water mark */
 633         u16 pause_time;         /* Flow control pause timer */
 634         bool send_xon;          /* Flow control send XON */
 635         bool strict_ieee;       /* Strict IEEE mode */
 636         enum e1000_fc_mode current_mode; /* FC mode in effect */
 637         enum e1000_fc_mode requested_mode; /* FC mode requested by caller */
 638 };
 639 
 640 struct e1000_dev_spec_82575 {
 641         bool sgmii_active;
 642         bool global_device_reset;

 643 };
 644 
 645 struct e1000_dev_spec_vf {
 646         u32     vf_number;
 647         u32     v2p_mailbox;
 648 };
 649 
 650 struct e1000_hw {
 651         void *back;
 652 
 653         u8 *hw_addr;
 654         u8 *flash_address;
 655         unsigned long io_base;
 656 
 657         struct e1000_mac_info  mac;
 658         struct e1000_fc_info   fc;
 659         struct e1000_phy_info  phy;
 660         struct e1000_nvm_info  nvm;
 661         struct e1000_bus_info  bus;
 662         struct e1000_host_mng_dhcp_cookie mng_cookie;




   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 
  22 /*
  23  * Copyright (c) 2007-2012 Intel Corporation. All rights reserved.
  24  */
  25 
  26 /*
  27  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
  28  */
  29 
  30 /* IntelVersion: 1.446.2.1 v3_3_14_3_BHSW1 */
  31 
  32 #ifndef _IGB_HW_H
  33 #define _IGB_HW_H
  34 
  35 #ifdef __cplusplus
  36 extern "C" {
  37 #endif
  38 
  39 #include "igb_osdep.h"
  40 #include "igb_regs.h"
  41 #include "igb_defines.h"
  42 
  43 struct e1000_hw;
  44 
  45 #define E1000_DEV_ID_82576                      0x10C9
  46 #define E1000_DEV_ID_82576_FIBER                0x10E6
  47 #define E1000_DEV_ID_82576_SERDES               0x10E7
  48 #define E1000_DEV_ID_82576_QUAD_COPPER          0x10E8
  49 #define E1000_DEV_ID_82576_QUAD_COPPER_ET2      0x1526
  50 #define E1000_DEV_ID_82576_NS                   0x150A
  51 #define E1000_DEV_ID_82576_NS_SERDES            0x1518
  52 #define E1000_DEV_ID_82576_SERDES_QUAD          0x150D
  53 #define E1000_DEV_ID_82575EB_COPPER             0x10A7
  54 #define E1000_DEV_ID_82575EB_FIBER_SERDES       0x10A9
  55 #define E1000_DEV_ID_82575GB_QUAD_COPPER        0x10D6
  56 #define E1000_DEV_ID_82580_COPPER               0x150E
  57 #define E1000_DEV_ID_82580_FIBER                0x150F
  58 #define E1000_DEV_ID_82580_SERDES               0x1510
  59 #define E1000_DEV_ID_82580_SGMII                0x1511
  60 #define E1000_DEV_ID_82580_COPPER_DUAL          0x1516
  61 #define E1000_DEV_ID_I350_COPPER                0x1521
  62 
  63 #define E1000_REVISION_0 0
  64 #define E1000_REVISION_1 1
  65 #define E1000_REVISION_2 2
  66 #define E1000_REVISION_3 3
  67 #define E1000_REVISION_4 4
  68 
  69 #define E1000_FUNC_0    0
  70 #define E1000_FUNC_1    1
  71 #define E1000_FUNC_2    2
  72 #define E1000_FUNC_3    3
  73 
  74 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN0       0
  75 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN1       3
  76 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN2       6
  77 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN3       9
  78 
  79 enum e1000_mac_type {
  80         e1000_undefined = 0,
  81         e1000_82575,
  82         e1000_82576,
  83         e1000_82580,
  84         e1000_i350,
  85         e1000_num_macs  /* List is 1-based, so subtract 1 for true count. */
  86 };
  87 
  88 enum e1000_media_type {
  89         e1000_media_type_unknown = 0,
  90         e1000_media_type_copper = 1,
  91         e1000_media_type_fiber = 2,
  92         e1000_media_type_internal_serdes = 3,
  93         e1000_num_media_types
  94 };
  95 
  96 enum e1000_nvm_type {
  97         e1000_nvm_unknown = 0,
  98         e1000_nvm_none,
  99         e1000_nvm_eeprom_spi,
 100         e1000_nvm_eeprom_microwire,
 101         e1000_nvm_flash_hw,
 102         e1000_nvm_flash_sw
 103 };
 104 


 626         enum e1000_bus_speed speed;
 627         enum e1000_bus_width width;
 628 
 629         u16 func;
 630         u16 pci_cmd_word;
 631 };
 632 
 633 struct e1000_fc_info {
 634         u32 high_water;         /* Flow control high-water mark */
 635         u32 low_water;          /* Flow control low-water mark */
 636         u16 pause_time;         /* Flow control pause timer */
 637         bool send_xon;          /* Flow control send XON */
 638         bool strict_ieee;       /* Strict IEEE mode */
 639         enum e1000_fc_mode current_mode; /* FC mode in effect */
 640         enum e1000_fc_mode requested_mode; /* FC mode requested by caller */
 641 };
 642 
 643 struct e1000_dev_spec_82575 {
 644         bool sgmii_active;
 645         bool global_device_reset;
 646         int eee_disable;
 647 };
 648 
 649 struct e1000_dev_spec_vf {
 650         u32     vf_number;
 651         u32     v2p_mailbox;
 652 };
 653 
 654 struct e1000_hw {
 655         void *back;
 656 
 657         u8 *hw_addr;
 658         u8 *flash_address;
 659         unsigned long io_base;
 660 
 661         struct e1000_mac_info  mac;
 662         struct e1000_fc_info   fc;
 663         struct e1000_phy_info  phy;
 664         struct e1000_nvm_info  nvm;
 665         struct e1000_bus_info  bus;
 666         struct e1000_host_mng_dhcp_cookie mng_cookie;