2038 Add in I350 and ET2 support into igb
Reviewed by: Dan McDonald <danmcd@nexenta.com>

@@ -18,11 +18,11 @@
  *
  * CDDL HEADER END
  */
 
 /*
- * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
+ * Copyright (c) 2007-2012 Intel Corporation. All rights reserved.
  */
 
 /*
  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
  */

@@ -52,10 +52,11 @@
  * separate from the first set of RARs.
  */
 #define E1000_RAR_ENTRIES_82575         16
 #define E1000_RAR_ENTRIES_82576         24
 #define E1000_RAR_ENTRIES_82580         24
+#define E1000_RAR_ENTRIES_I350          32
 #define E1000_SW_SYNCH_MB               0x00000100
 #define E1000_STAT_DEV_RST_SET          0x00100000
 #define E1000_CTRL_DEV_RST              0x20000000
 
 #ifdef E1000_BIT_FIELDS

@@ -464,10 +465,11 @@
 /* RX packet buffer size defines */
 #define E1000_RXPBS_SIZE_MASK_82576     0x0000007F
 void e1000_vmdq_set_loopback_pf(struct e1000_hw *hw, bool enable);
 void e1000_vmdq_set_replication_pf(struct e1000_hw *hw, bool enable);
 u16 e1000_rxpbs_adjust_82580(u32 data);
+s32 e1000_set_eee_i350(struct e1000_hw *hw);
 
 #ifdef __cplusplus
 }
 #endif