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1402 ixgbe intel 10gbit driver very slow (backs out 534)

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          --- old/usr/src/uts/common/os/sunddi.c
          +++ new/usr/src/uts/common/os/sunddi.c
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7325 7325          if (waitfp == DDI_DMA_SLEEP)
7326 7326                  fp = (int (*)())KM_SLEEP;
7327 7327          else if (waitfp == DDI_DMA_DONTWAIT)
7328 7328                  fp = (int (*)())KM_NOSLEEP;
7329 7329          else
7330 7330                  fp = waitfp;
7331 7331          *handlep = impl_acc_hdl_alloc(fp, arg);
7332 7332          if (*handlep == NULL)
7333 7333                  return (DDI_FAILURE);
7334 7334  
7335      -/* SPARC mappings are always cacheable, as SPARC guarantees cache coherency. */
7336      -#ifndef __sparc
7337      -        /* Transform attributes into correct cache flags. */
7338      -        if ((flags & IOMEM_DATA_MASK) == 0) {
7339      -                switch (accattrp->devacc_attr_dataorder) {
7340      -                case DDI_STRICTORDER_ACC:
7341      -                        flags |= IOMEM_DATA_UNCACHED;
7342      -                        break;
7343      -                case DDI_MERGING_OK_ACC:
7344      -                        flags |= IOMEM_DATA_UC_WR_COMBINE;
7345      -                        break;
7346      -                default:
7347      -                        flags |= IOMEM_DATA_CACHED;
7348      -                        break;
7349      -                }
7350      -        }
7351      -#endif
7352      -
7353 7335          /* check if the cache attributes are supported */
7354 7336          if (i_ddi_check_cache_attr(flags) == B_FALSE)
7355 7337                  return (DDI_FAILURE);
7356 7338  
7357 7339          /*
7358 7340           * Transfer the meaningful bits to xfermodes.
7359 7341           * Double-check if the 3rd party driver correctly sets the bits.
7360 7342           * If not, set DDI_DMA_STREAMING to keep compatibility.
7361 7343           */
7362 7344          xfermodes = flags & (DDI_DMA_CONSISTENT | DDI_DMA_STREAMING);
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