6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved.
24 */
25
26 #ifndef _BGE_IMPL_H
27 #define _BGE_IMPL_H
28
29
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33
34 #include <sys/types.h>
35 #include <sys/stream.h>
36 #include <sys/strsun.h>
37 #include <sys/strsubr.h>
38 #include <sys/stat.h>
39 #include <sys/pci.h>
40 #include <sys/note.h>
41 #include <sys/modctl.h>
42 #include <sys/crc32.h>
43 #ifdef __sparcv9
44 #include <v9/sys/membar.h>
45 #endif /* __sparcv9 */
588 *
589 * Note: elements from <businfo> to <latency> are filled in by during
590 * the first phase of chip initialisation (see bge_chip_cfg_init()).
591 * The remaining ones are determined just after the first RESET, in
592 * bge_poll_firmware(). Thereafter, the entire structure is readonly.
593 */
594 typedef struct {
595 uint32_t asic_rev; /* masked from MHCR */
596 uint32_t businfo; /* from private reg */
597 uint16_t command; /* saved during attach */
598
599 uint16_t vendor; /* vendor-id */
600 uint16_t device; /* device-id */
601 uint16_t subven; /* subsystem-vendor-id */
602 uint16_t subdev; /* subsystem-id */
603 uint8_t revision; /* revision-id */
604 uint8_t clsize; /* cache-line-size */
605 uint8_t latency; /* latency-timer */
606
607 uint8_t flags;
608 uint16_t chip_label; /* numeric part only */
609 /* (e.g. 5703/5794/etc) */
610 uint32_t mbuf_base; /* Mbuf pool parameters */
611 uint32_t mbuf_length; /* depend on chiptype */
612 uint32_t pci_type;
613 uint32_t statistic_type;
614 uint32_t bge_dma_rwctrl;
615 uint32_t bge_mlcr_default;
616 uint32_t recv_slots; /* receive ring size */
617 enum bge_nvmem_type nvtype; /* SEEPROM or Flash */
618
619 uint16_t jumbo_slots;
620 uint16_t ethmax_size;
621 uint16_t snd_buff_size;
622 uint16_t recv_jumbo_size;
623 uint16_t std_buf_size;
624 uint32_t mbuf_hi_water;
625 uint32_t mbuf_lo_water_rmac;
626 uint32_t mbuf_lo_water_rdma;
627
628 uint32_t rx_rings; /* from bge.conf */
629 uint32_t tx_rings; /* from bge.conf */
630 uint32_t default_mtu; /* from bge.conf */
631
632 uint64_t hw_mac_addr; /* from chip register */
633 bge_mac_addr_t vendor_addr; /* transform of same */
634 boolean_t msi_enabled; /* default to true */
635
636 uint32_t rx_ticks_norm;
637 uint32_t rx_count_norm;
638 uint32_t tx_ticks_norm;
639 uint32_t tx_count_norm;
640 uint32_t mask_pci_int;
641 } chip_id_t;
642
643 #define CHIP_FLAG_SUPPORTED 0x80
644 #define CHIP_FLAG_SERDES 0x40
645 #define CHIP_FLAG_PARTIAL_CSUM 0x20
646 #define CHIP_FLAG_NO_JUMBO 0x1
647
648 /*
649 * Collection of physical-layer functions to:
650 * (re)initialise the physical layer
651 * update it to match software settings
652 * check for link status change
653 */
654 typedef struct {
655 int (*phys_restart)(struct bge *, boolean_t);
656 int (*phys_update)(struct bge *);
657 boolean_t (*phys_check)(struct bge *, boolean_t);
658 } phys_ops_t;
659
660
661 /*
662 * Actual state of the BCM570x chip
663 */
664 enum bge_chip_state {
665 BGE_CHIP_FAULT = -2, /* fault, need reset */
|
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved.
24 */
25
26 /*
27 * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
28 */
29
30 #ifndef _BGE_IMPL_H
31 #define _BGE_IMPL_H
32
33
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37
38 #include <sys/types.h>
39 #include <sys/stream.h>
40 #include <sys/strsun.h>
41 #include <sys/strsubr.h>
42 #include <sys/stat.h>
43 #include <sys/pci.h>
44 #include <sys/note.h>
45 #include <sys/modctl.h>
46 #include <sys/crc32.h>
47 #ifdef __sparcv9
48 #include <v9/sys/membar.h>
49 #endif /* __sparcv9 */
592 *
593 * Note: elements from <businfo> to <latency> are filled in by during
594 * the first phase of chip initialisation (see bge_chip_cfg_init()).
595 * The remaining ones are determined just after the first RESET, in
596 * bge_poll_firmware(). Thereafter, the entire structure is readonly.
597 */
598 typedef struct {
599 uint32_t asic_rev; /* masked from MHCR */
600 uint32_t businfo; /* from private reg */
601 uint16_t command; /* saved during attach */
602
603 uint16_t vendor; /* vendor-id */
604 uint16_t device; /* device-id */
605 uint16_t subven; /* subsystem-vendor-id */
606 uint16_t subdev; /* subsystem-id */
607 uint8_t revision; /* revision-id */
608 uint8_t clsize; /* cache-line-size */
609 uint8_t latency; /* latency-timer */
610
611 uint8_t flags;
612 uint32_t chip_type; /* see CHIP_TYPE_ in bge_hw.h */
613 uint16_t chip_label; /* numeric part only */
614 /* (e.g. 5703/5794/etc) */
615 uint32_t mbuf_base; /* Mbuf pool parameters */
616 uint32_t mbuf_length; /* depend on chiptype */
617 uint32_t pci_type;
618 uint32_t statistic_type;
619 uint32_t bge_dma_rwctrl;
620 uint32_t bge_mlcr_default;
621 uint32_t recv_slots; /* receive ring size */
622 enum bge_nvmem_type nvtype; /* SEEPROM or Flash */
623
624 uint16_t jumbo_slots;
625 uint16_t ethmax_size;
626 uint16_t snd_buff_size;
627 uint16_t recv_jumbo_size;
628 uint16_t std_buf_size;
629 uint32_t mbuf_hi_water;
630 uint32_t mbuf_lo_water_rmac;
631 uint32_t mbuf_lo_water_rdma;
632
633 uint32_t rx_rings; /* from bge.conf */
634 uint32_t tx_rings; /* from bge.conf */
635 uint32_t default_mtu; /* from bge.conf */
636
637 uint64_t hw_mac_addr; /* from chip register */
638 bge_mac_addr_t vendor_addr; /* transform of same */
639 boolean_t msi_enabled; /* default to true */
640
641 uint32_t rx_ticks_norm;
642 uint32_t rx_count_norm;
643 uint32_t tx_ticks_norm;
644 uint32_t tx_count_norm;
645 uint32_t mask_pci_int;
646 } chip_id_t;
647
648 #define CHIP_FLAG_SUPPORTED 0x80
649 #define CHIP_FLAG_SERDES 0x40
650 #define CHIP_FLAG_PARTIAL_CSUM 0x20
651 #define CHIP_FLAG_NO_CHECK_RESET 0x2
652 #define CHIP_FLAG_NO_JUMBO 0x1
653
654 /*
655 * Collection of physical-layer functions to:
656 * (re)initialise the physical layer
657 * update it to match software settings
658 * check for link status change
659 */
660 typedef struct {
661 int (*phys_restart)(struct bge *, boolean_t);
662 int (*phys_update)(struct bge *);
663 boolean_t (*phys_check)(struct bge *, boolean_t);
664 } phys_ops_t;
665
666
667 /*
668 * Actual state of the BCM570x chip
669 */
670 enum bge_chip_state {
671 BGE_CHIP_FAULT = -2, /* fault, need reset */
|