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2777 mpt_sas needs to try MUR reset at attach() time.
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          --- old/usr/src/uts/common/io/scsi/adapters/mpt_sas/mptsas.c
          +++ new/usr/src/uts/common/io/scsi/adapters/mpt_sas/mptsas.c
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  14   14   * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15   15   * If applicable, add the following below this CDDL HEADER, with the
  16   16   * fields enclosed by brackets "[]" replaced with your own identifying
  17   17   * information: Portions Copyright [yyyy] [name of copyright owner]
  18   18   *
  19   19   * CDDL HEADER END
  20   20   */
  21   21  
  22   22  /*
  23   23   * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
       24 + * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
  24   25   */
  25   26  
  26   27  /*
  27   28   * Copyright (c) 2000 to 2010, LSI Corporation.
  28   29   * All rights reserved.
  29   30   *
  30   31   * Redistribution and use in source and binary forms of all code within
  31   32   * this file that is exclusively owned by LSI, with or without
  32   33   * modification, is permitted provided that, in addition to the CDDL 1.0
  33   34   * License requirements, the following conditions are met:
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1754 1755  
1755 1756          /*
1756 1757           * Send RAID action system shutdown to sync IR.  After action, send a
1757 1758           * Message Unit Reset. Since after that DMA resource will be freed,
1758 1759           * set ioc to READY state will avoid HBA initiated DMA operation.
1759 1760           */
1760 1761          mutex_enter(&mpt->m_mutex);
1761 1762          MPTSAS_DISABLE_INTR(mpt);
1762 1763          mptsas_raid_action_system_shutdown(mpt);
1763 1764          mpt->m_softstate |= MPTSAS_SS_MSG_UNIT_RESET;
1764      -        (void) mptsas_ioc_reset(mpt);
     1765 +        (void) mptsas_ioc_reset(mpt, FALSE);
1765 1766          mutex_exit(&mpt->m_mutex);
1766 1767          mptsas_rem_intrs(mpt);
1767 1768          ddi_taskq_destroy(mpt->m_event_taskq);
1768 1769          ddi_taskq_destroy(mpt->m_dr_taskq);
1769 1770  
1770 1771          if (mpt->m_doneq_thread_n) {
1771 1772                  mutex_enter(&mpt->m_doneq_mutex);
1772 1773                  doneq_thread_num = mpt->m_doneq_thread_n;
1773 1774                  for (i = 0; i < mpt->m_doneq_thread_n; i++) {
1774 1775                          mutex_enter(&mpt->m_doneq_thread_id[i].mutex);
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12331 12332           */
12332 12333          if (ddi_get32(mpt->m_datap, &mpt->m_reg->HostDiagnostic) &
12333 12334              MPI2_DIAG_FLASH_BAD_SIG) {
12334 12335                  mptsas_log(mpt, CE_WARN, "mptsas bad flash signature!");
12335 12336                  goto fail;
12336 12337          }
12337 12338  
12338 12339          /*
12339 12340           * Reset the chip
12340 12341           */
12341      -        rval = mptsas_ioc_reset(mpt);
     12342 +        rval = mptsas_ioc_reset(mpt, first_time);
12342 12343          if (rval == MPTSAS_RESET_FAIL) {
12343 12344                  mptsas_log(mpt, CE_WARN, "hard reset failed!");
12344 12345                  goto fail;
12345 12346          }
12346 12347  
12347 12348          if ((rval == MPTSAS_SUCCESS_MUR) && (!first_time)) {
12348 12349                  goto mur;
12349 12350          }
12350 12351          /*
12351 12352           * Setup configuration space
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