4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
24 */
25
26 /*
27 * Copyright (c) 2000 to 2010, LSI Corporation.
28 * All rights reserved.
29 *
30 * Redistribution and use in source and binary forms of all code within
31 * this file that is exclusively owned by LSI, with or without
32 * modification, is permitted provided that, in addition to the CDDL 1.0
33 * License requirements, the following conditions are met:
34 *
35 * Neither the name of the author nor the names of its contributors may be
36 * used to endorse or promote products derived from this software without
37 * specific prior written permission.
38 *
39 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
40 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
41 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
42 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
43 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
1744 if (pm_raise_power(dip, 0, PM_LEVEL_D0) !=
1745 DDI_SUCCESS) {
1746 mptsas_log(mpt, CE_WARN,
1747 "mptsas%d: Raise power request failed.",
1748 mpt->m_instance);
1749 (void) pm_idle_component(dip, 0);
1750 return (DDI_FAILURE);
1751 }
1752 }
1753 }
1754
1755 /*
1756 * Send RAID action system shutdown to sync IR. After action, send a
1757 * Message Unit Reset. Since after that DMA resource will be freed,
1758 * set ioc to READY state will avoid HBA initiated DMA operation.
1759 */
1760 mutex_enter(&mpt->m_mutex);
1761 MPTSAS_DISABLE_INTR(mpt);
1762 mptsas_raid_action_system_shutdown(mpt);
1763 mpt->m_softstate |= MPTSAS_SS_MSG_UNIT_RESET;
1764 (void) mptsas_ioc_reset(mpt);
1765 mutex_exit(&mpt->m_mutex);
1766 mptsas_rem_intrs(mpt);
1767 ddi_taskq_destroy(mpt->m_event_taskq);
1768 ddi_taskq_destroy(mpt->m_dr_taskq);
1769
1770 if (mpt->m_doneq_thread_n) {
1771 mutex_enter(&mpt->m_doneq_mutex);
1772 doneq_thread_num = mpt->m_doneq_thread_n;
1773 for (i = 0; i < mpt->m_doneq_thread_n; i++) {
1774 mutex_enter(&mpt->m_doneq_thread_id[i].mutex);
1775 mpt->m_doneq_thread_id[i].flag &=
1776 (~MPTSAS_DONEQ_THREAD_ACTIVE);
1777 cv_signal(&mpt->m_doneq_thread_id[i].cv);
1778 mutex_exit(&mpt->m_doneq_thread_id[i].mutex);
1779 }
1780 while (mpt->m_doneq_thread_n) {
1781 cv_wait(&mpt->m_doneq_thread_cv,
1782 &mpt->m_doneq_mutex);
1783 }
1784 for (i = 0; i < doneq_thread_num; i++) {
12321
12322 static int
12323 mptsas_init_chip(mptsas_t *mpt, int first_time)
12324 {
12325 ddi_dma_cookie_t cookie;
12326 uint32_t i;
12327 int rval;
12328
12329 /*
12330 * Check to see if the firmware image is valid
12331 */
12332 if (ddi_get32(mpt->m_datap, &mpt->m_reg->HostDiagnostic) &
12333 MPI2_DIAG_FLASH_BAD_SIG) {
12334 mptsas_log(mpt, CE_WARN, "mptsas bad flash signature!");
12335 goto fail;
12336 }
12337
12338 /*
12339 * Reset the chip
12340 */
12341 rval = mptsas_ioc_reset(mpt);
12342 if (rval == MPTSAS_RESET_FAIL) {
12343 mptsas_log(mpt, CE_WARN, "hard reset failed!");
12344 goto fail;
12345 }
12346
12347 if ((rval == MPTSAS_SUCCESS_MUR) && (!first_time)) {
12348 goto mur;
12349 }
12350 /*
12351 * Setup configuration space
12352 */
12353 if (mptsas_config_space_init(mpt) == FALSE) {
12354 mptsas_log(mpt, CE_WARN, "mptsas_config_space_init "
12355 "failed!");
12356 goto fail;
12357 }
12358
12359 /*
12360 * IOC facts can change after a diag reset so all buffers that are
12361 * based on these numbers must be de-allocated and re-allocated. Get
|
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
24 * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
25 */
26
27 /*
28 * Copyright (c) 2000 to 2010, LSI Corporation.
29 * All rights reserved.
30 *
31 * Redistribution and use in source and binary forms of all code within
32 * this file that is exclusively owned by LSI, with or without
33 * modification, is permitted provided that, in addition to the CDDL 1.0
34 * License requirements, the following conditions are met:
35 *
36 * Neither the name of the author nor the names of its contributors may be
37 * used to endorse or promote products derived from this software without
38 * specific prior written permission.
39 *
40 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
41 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
42 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
43 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
44 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
1745 if (pm_raise_power(dip, 0, PM_LEVEL_D0) !=
1746 DDI_SUCCESS) {
1747 mptsas_log(mpt, CE_WARN,
1748 "mptsas%d: Raise power request failed.",
1749 mpt->m_instance);
1750 (void) pm_idle_component(dip, 0);
1751 return (DDI_FAILURE);
1752 }
1753 }
1754 }
1755
1756 /*
1757 * Send RAID action system shutdown to sync IR. After action, send a
1758 * Message Unit Reset. Since after that DMA resource will be freed,
1759 * set ioc to READY state will avoid HBA initiated DMA operation.
1760 */
1761 mutex_enter(&mpt->m_mutex);
1762 MPTSAS_DISABLE_INTR(mpt);
1763 mptsas_raid_action_system_shutdown(mpt);
1764 mpt->m_softstate |= MPTSAS_SS_MSG_UNIT_RESET;
1765 (void) mptsas_ioc_reset(mpt, FALSE);
1766 mutex_exit(&mpt->m_mutex);
1767 mptsas_rem_intrs(mpt);
1768 ddi_taskq_destroy(mpt->m_event_taskq);
1769 ddi_taskq_destroy(mpt->m_dr_taskq);
1770
1771 if (mpt->m_doneq_thread_n) {
1772 mutex_enter(&mpt->m_doneq_mutex);
1773 doneq_thread_num = mpt->m_doneq_thread_n;
1774 for (i = 0; i < mpt->m_doneq_thread_n; i++) {
1775 mutex_enter(&mpt->m_doneq_thread_id[i].mutex);
1776 mpt->m_doneq_thread_id[i].flag &=
1777 (~MPTSAS_DONEQ_THREAD_ACTIVE);
1778 cv_signal(&mpt->m_doneq_thread_id[i].cv);
1779 mutex_exit(&mpt->m_doneq_thread_id[i].mutex);
1780 }
1781 while (mpt->m_doneq_thread_n) {
1782 cv_wait(&mpt->m_doneq_thread_cv,
1783 &mpt->m_doneq_mutex);
1784 }
1785 for (i = 0; i < doneq_thread_num; i++) {
12322
12323 static int
12324 mptsas_init_chip(mptsas_t *mpt, int first_time)
12325 {
12326 ddi_dma_cookie_t cookie;
12327 uint32_t i;
12328 int rval;
12329
12330 /*
12331 * Check to see if the firmware image is valid
12332 */
12333 if (ddi_get32(mpt->m_datap, &mpt->m_reg->HostDiagnostic) &
12334 MPI2_DIAG_FLASH_BAD_SIG) {
12335 mptsas_log(mpt, CE_WARN, "mptsas bad flash signature!");
12336 goto fail;
12337 }
12338
12339 /*
12340 * Reset the chip
12341 */
12342 rval = mptsas_ioc_reset(mpt, first_time);
12343 if (rval == MPTSAS_RESET_FAIL) {
12344 mptsas_log(mpt, CE_WARN, "hard reset failed!");
12345 goto fail;
12346 }
12347
12348 if ((rval == MPTSAS_SUCCESS_MUR) && (!first_time)) {
12349 goto mur;
12350 }
12351 /*
12352 * Setup configuration space
12353 */
12354 if (mptsas_config_space_init(mpt) == FALSE) {
12355 mptsas_log(mpt, CE_WARN, "mptsas_config_space_init "
12356 "failed!");
12357 goto fail;
12358 }
12359
12360 /*
12361 * IOC facts can change after a diag reset so all buffers that are
12362 * based on these numbers must be de-allocated and re-allocated. Get
|