--- old/usr/src/test/os-tests/tests/xsave/data/mdb_xregs.zmm.32
          +++ new/usr/src/test/os-tests/tests/xsave/data/mdb_xregs.zmm.32

   1    1  x86 FPU with 512-bit %zmm registers
   2    2  xcr0            0xe7
   3    3  xfd             0x0
   4    4  xstate_bv       0x67
   5    5  xcomp_bv        0x0
   6    6  
   7    7  %zmm0  [511:384] 0x12900931 12900930 1290092f 1290092e
   8    8         [383:256] 0x1290092d 1290092c 1290092b 1290092a
   9    9  %ymm0  [255:128] 0x12900929 12900928 12900927 12900926
  10   10  %xmm0  [127:0]   0x12900925 12900924 12900923 12900922
  11   11  
  12   12  %zmm1  [511:384] 0x12900941 12900940 1290093f 1290093e
  13   13         [383:256] 0x1290093d 1290093c 1290093b 1290093a
  14   14  %ymm1  [255:128] 0x12900939 12900938 12900937 12900936
  15   15  %xmm1  [127:0]   0x12900935 12900934 12900933 12900932
  16   16  
  17   17  %zmm2  [511:384] 0x12900951 12900950 1290094f 1290094e
  18   18         [383:256] 0x1290094d 1290094c 1290094b 1290094a
  19   19  %ymm2  [255:128] 0x12900949 12900948 12900947 12900946
  20   20  %xmm2  [127:0]   0x12900945 12900944 12900943 12900942
  21   21  
  22   22  %zmm3  [511:384] 0x12900961 12900960 1290095f 1290095e
  23   23         [383:256] 0x1290095d 1290095c 1290095b 1290095a
  24   24  %ymm3  [255:128] 0x12900959 12900958 12900957 12900956
  25   25  %xmm3  [127:0]   0x12900955 12900954 12900953 12900952
  26   26  
  27   27  %zmm4  [511:384] 0x12900971 12900970 1290096f 1290096e
  28   28         [383:256] 0x1290096d 1290096c 1290096b 1290096a
  29   29  %ymm4  [255:128] 0x12900969 12900968 12900967 12900966
  30   30  %xmm4  [127:0]   0x12900965 12900964 12900963 12900962
  31   31  
  32   32  %zmm5  [511:384] 0x12900981 12900980 1290097f 1290097e
  33   33         [383:256] 0x1290097d 1290097c 1290097b 1290097a
  34   34  %ymm5  [255:128] 0x12900979 12900978 12900977 12900976
  35   35  %xmm5  [127:0]   0x12900975 12900974 12900973 12900972
  36   36  
  37   37  %zmm6  [511:384] 0x12900991 12900990 1290098f 1290098e
  38   38         [383:256] 0x1290098d 1290098c 1290098b 1290098a
  39   39  %ymm6  [255:128] 0x12900989 12900988 12900987 12900986
  40   40  %xmm6  [127:0]   0x12900985 12900984 12900983 12900982
  41   41  
  42   42  %zmm7  [511:384] 0x129009a1 129009a0 1290099f 1290099e
  43   43         [383:256] 0x1290099d 1290099c 1290099b 1290099a
  44   44  %ymm7  [255:128] 0x12900999 12900998 12900997 12900996
  45   45  %xmm7  [127:0]   0x12900995 12900994 12900993 12900992
  46   46  
  47   47  %k0  0x00000000129009a2         %k1  0x00000000129009a3
  48   48  %k2  0x00000000129009a6         %k3  0x00000000129009a7
  49   49  %k4  0x00000000129009aa         %k5  0x00000000129009ab
  50   50  %k6  0x00000000129009ae         %k7  0x00000000129009af
  51   51  
  52   52  387 and FP Control State
  53   53  cw     0x137f (IM|DM|ZM|OM|UM|PM|SIG64|RTN|A)
  54   54  sw     0x0000 (TOP=0t0) (0)
  55   55  xcp sw 0x0000 (0)
  56   56  
  57   57  ipoff  0
  58   58  cssel  0x43
  59   59  dtoff  0
  60   60  dtsel  0x4b
  61   61  
  62   62  %st0   0x0000.0000000000000000 = +0.0000000000000000e+00 empty
  63   63  %st1   0x0000.0000000000000000 = +0.0000000000000000e+00 empty
  64   64  %st2   0x0000.0000000000000000 = +0.0000000000000000e+00 empty
  65   65  %st3   0x0000.0000000000000000 = +0.0000000000000000e+00 empty
  66   66  %st4   0x0000.0000000000000000 = +0.0000000000000000e+00 empty
  67   67  %st5   0x0000.0000000000000000 = +0.0000000000000000e+00 empty
  68   68  %st6   0x0000.0000000000000000 = +0.0000000000000000e+00 empty
  69   69  %st7   0x0000.0000000000000000 = +0.0000000000000000e+00 empty
  70   70  
  71   71  SSE Control State
  72   72  mxcsr  0x1f80 (IM|DM|ZM|OM|UM|PM|RTN)
  73   73  xcp    0x0000 (RTN)

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