45 */
46 #define FXSAVE_ALIGN 16
47
48 /*
49 * See section 13.4 in the Intel 64 and IA-32 Architectures Software
50 * Developer’s Manual, Volume 1.
51 */
52 #define XSAVE_ALIGN 64
53
54 /*
55 * If fpu_exists is non-zero, fpu_probe will attempt to use any
56 * hardware FPU (subject to other constraints, see below). If
57 * fpu_exists is zero, fpu_probe will report that there is no
58 * FPU even if there is one.
59 */
60 int fpu_exists = 1;
61
62 int fp_kind = FP_387;
63
64 /*
65 * The kind of FPU we advertise to rtld so it knows what to do on context
66 * switch.
67 */
68 int fp_elf = AT_386_FPINFO_FXSAVE;
69
70 /*
71 * Mechanism to save FPU state.
72 */
73 int fp_save_mech = FP_FXSAVE;
74
75 /*
76 * The variable fpu_ignored is provided to allow other code to
77 * determine whether emulation is being done because there is
78 * no FPU or because of an override requested via /etc/system.
79 */
80 int fpu_ignored = 0;
81
82 /*
83 * Used by ppcopy and ppzero to determine whether or not to use the
84 * SSE-based pagecopy and pagezero routines
85 */
86 int use_sse_pagecopy = 0;
87 int use_sse_pagezero = 0;
88 int use_sse_copy = 0;
89
90 #if defined(__xpv)
91
92 /*
93 * Use of SSE or otherwise is forcibly configured for us by the hypervisor.
94 */
95
210 fxsave_insn(fx);
211 if (fx->fx_mxcsr_mask != 0) {
212 /*
213 * Override default mask initialized in fpu.c
214 */
215 sse_mxcsr_mask = fx->fx_mxcsr_mask;
216 }
217 }
218
219 setcr0(CR0_ENABLE_FPU_FLAGS(getcr0()));
220 return;
221
222 /*
223 * No FPU hardware present
224 */
225 nofpu:
226 setcr0(CR0_DISABLE_FPU_FLAGS(getcr0()));
227 DISABLE_SSE();
228 fp_kind = FP_NO;
229 fpu_exists = 0;
230 }
231
232 /*
233 * Fill in FPU information that is required by exec.
234 */
235 void
236 fpu_auxv_info(int *typep, size_t *lenp)
237 {
238 *typep = fp_elf;
239 switch (fp_save_mech) {
240 case FP_FXSAVE:
241 *lenp = sizeof (struct fxsave_state);
242 break;
243 case FP_XSAVE:
244 *lenp = cpuid_get_xsave_size();
245 break;
246 default:
247 *lenp = 0;
248 break;
249 }
250 }
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45 */
46 #define FXSAVE_ALIGN 16
47
48 /*
49 * See section 13.4 in the Intel 64 and IA-32 Architectures Software
50 * Developer’s Manual, Volume 1.
51 */
52 #define XSAVE_ALIGN 64
53
54 /*
55 * If fpu_exists is non-zero, fpu_probe will attempt to use any
56 * hardware FPU (subject to other constraints, see below). If
57 * fpu_exists is zero, fpu_probe will report that there is no
58 * FPU even if there is one.
59 */
60 int fpu_exists = 1;
61
62 int fp_kind = FP_387;
63
64 /*
65 * The variable fpu_ignored is provided to allow other code to
66 * determine whether emulation is being done because there is
67 * no FPU or because of an override requested via /etc/system.
68 */
69 int fpu_ignored = 0;
70
71 /*
72 * Used by ppcopy and ppzero to determine whether or not to use the
73 * SSE-based pagecopy and pagezero routines
74 */
75 int use_sse_pagecopy = 0;
76 int use_sse_pagezero = 0;
77 int use_sse_copy = 0;
78
79 #if defined(__xpv)
80
81 /*
82 * Use of SSE or otherwise is forcibly configured for us by the hypervisor.
83 */
84
199 fxsave_insn(fx);
200 if (fx->fx_mxcsr_mask != 0) {
201 /*
202 * Override default mask initialized in fpu.c
203 */
204 sse_mxcsr_mask = fx->fx_mxcsr_mask;
205 }
206 }
207
208 setcr0(CR0_ENABLE_FPU_FLAGS(getcr0()));
209 return;
210
211 /*
212 * No FPU hardware present
213 */
214 nofpu:
215 setcr0(CR0_DISABLE_FPU_FLAGS(getcr0()));
216 DISABLE_SSE();
217 fp_kind = FP_NO;
218 fpu_exists = 0;
219 }
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