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15254 %ymm registers not restored after signal handler
15367 x86 getfpregs() summons corrupting %xmm ghosts
15333 want x86 /proc xregs support (libc_db, libproc, mdb, etc.)
15336 want libc functions for extended ucontext_t
15334 want ps_lwphandle-specific reg routines
15328 FPU_CW_INIT mistreats reserved bit
15335 i86pc fpu_subr.c isn't really platform-specific
15332 setcontext(2) isn't actually noreturn
15331 need <sys/stdalign.h>
Change-Id: I7060aa86042dfb989f77fc3323c065ea2eafa9ad
Conflicts:
usr/src/uts/common/fs/proc/prcontrol.c
usr/src/uts/intel/os/archdep.c
usr/src/uts/intel/sys/ucontext.h
usr/src/uts/intel/syscall/getcontext.c
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--- old/usr/src/man/man3proc/ps_lgetregs.3proc
+++ new/usr/src/man/man3proc/ps_lgetregs.3proc
1 1 '\" te
2 2 .\" Copyright (c) 1998 Sun Microsystems, Inc. All Rights Reserved
3 3 .\" The contents of this file are subject to the terms of the Common Development and Distribution License (the "License"). You may not use this file except in compliance with the License.
4 4 .\" You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE or http://www.opensolaris.org/os/licensing. See the License for the specific language governing permissions and limitations under the License.
5 5 .\" When distributing Covered Code, include this CDDL HEADER in each file and include the License file at usr/src/OPENSOLARIS.LICENSE. If applicable, add the following below this CDDL HEADER, with the fields enclosed by brackets "[]" replaced with your own identifying information: Portions Copyright [yyyy] [name of copyright owner]
6 -.TH PS_LGETREGS 3PROC "September 12, 2020"
6 +.\" Copyright 2023 Oxide Computer Company
7 +.TH PS_LGETREGS 3PROC "January 23, 2023"
7 8 .SH NAME
8 9 ps_lgetregs, ps_lsetregs, ps_lgetfpregs, ps_lsetfpregs, ps_lgetxregsize,
9 10 ps_lgetxregs, ps_lsetxregs \- routines that access the target process register
10 11 in libthread_db
11 12 .SH SYNOPSIS
12 13 .nf
13 14 #include <proc_service.h>
14 15
15 16 \fBps_err_e\fR \fBps_lgetregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
16 17 \fBprgregset_t\fR \fIgregset\fR);
17 18 .fi
18 19
19 20 .LP
20 21 .nf
21 22 \fBps_err_e\fR \fBps_lsetregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
22 23 \fBstatic prgregset_t\fR \fIgregset\fR);
23 24 .fi
24 25
25 26 .LP
26 27 .nf
27 28 \fBps_err_e\fR \fBps_lgetfpregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
28 29 \fBprfpregset_t *\fR\fIfpregs\fR);
29 30 .fi
30 31
31 32 .LP
32 33 .nf
33 34 \fBps_err_e\fR \fBps_lsetfpregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
34 35 \fBstatic prfpregset_t *\fR\fIfpregs\fR);
35 36 .fi
36 37
37 38 .LP
38 39 .nf
39 40 \fBps_err_e\fR \fBps_lgetxregsize\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
40 41 \fBint *\fR\fIxregsize\fR);
41 42 .fi
42 43
43 44 .LP
44 45 .nf
45 46 \fBps_err_e\fR \fBps_lgetxregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
46 47 \fBcaddr_t\fR \fIxregset\fR);
47 48 .fi
48 49
49 50 .LP
50 51 .nf
51 52 \fBps_err_e\fR \fBps_lsetxregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
52 53 \fBcaddr_t\fR \fIxregset\fR);
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53 54 .fi
54 55
55 56 .SH DESCRIPTION
56 57 \fBps_lgetregs()\fR, \fBps_lsetregs()\fR, \fBps_lgetfpregs()\fR,
57 58 \fBps_lsetfpregs()\fR, \fBps_lgetxregsize()\fR, \fBps_lgetxregs()\fR,
58 59 \fBps_lsetxregs()\fR read and write register sets from lightweight processes
59 60 (\fBLWP\fRs) within the target process identified by \fIph\fR.
60 61 \fBps_lgetregs()\fR gets the general registers of the \fBLWP\fR identified by
61 62 \fIlid\fR, and \fBps_lsetregs()\fR sets them. \fBps_lgetfpregs()\fR gets the
62 63 \fBLWP\fR's floating point register set, while \fBps_lsetfpregs()\fR sets it.
63 -.SS "SPARC Only"
64 -\fBps_lgetxregsize()\fR, \fBps_lgetxregs()\fR, and \fBps_lsetxregs()\fR are
65 -SPARC-specific. They do not need to be defined by a controlling process on
66 -non-SPARC architecture. \fBps_lgetxregsize()\fR returns in
67 -\fB*\fR\fIxregsize\fR the size of the architecture-dependent extra state
68 -registers. \fBps_lgetxregs()\fR gets the extra state registers, and
69 -\fBps_lsetxregs()\fR sets them.
64 +.LP
65 +\fBps_lgetxregsize()\fR, \fBps_lgetxregs()\fR, and \fBps_lsetxregs()\fR are used
66 +to get and set the extended register set. Support for an extended register set
67 +depends on the instruction-set archicture. On platforms without support for
68 +these, controlling processes wlil still need to define them; however, they are
69 +allowed to simply return errors.
70 +.LP
71 +\fBps_lgetxregsize()\fR returns in \fB*\fR\fIxregsize\fR the size of the
72 +architecture-dependent extra state registers. \fBps_lgetxregs()\fR gets the
73 +extra state registers, and \fBps_lsetxregs()\fR sets them. When getting the
74 +registers, the size of \fIxregset\fR must be at least the size returned by
75 +\fBps_lgetxregsize()\fR.
70 76 .SH RETURN VALUES
71 77 .ne 2
72 78 .na
73 79 \fB\fBPS_OK\fR \fR
74 80 .ad
75 81 .RS 16n
76 82 The call returned successfully.
77 83 .RE
78 84
79 85 .sp
80 86 .ne 2
81 87 .na
82 -\fB\fBPS_NOFPREGS\fR \fR
88 +\fB\fBPS_NOFREGS\fR \fR
83 89 .ad
84 90 .RS 16n
85 91 Floating point registers are neither available for this architecture nor for
86 92 this process.
87 93 .RE
88 94
89 95 .sp
90 96 .ne 2
91 97 .na
92 98 \fB\fBPS_NOXREGS\fR \fR
93 99 .ad
94 100 .RS 16n
95 101 Extra state registers are not available on this architecture.
96 102 .RE
97 103
98 104 .sp
99 105 .ne 2
100 106 .na
101 107 \fB\fBPS_ERR\fR \fR
102 108 .ad
103 109 .RS 16n
104 110 The function did not return successfully.
105 111 .RE
106 112
107 113 .SH ATTRIBUTES
108 114 See \fBattributes\fR(7) for description of the following attributes:
109 115 .sp
110 116
111 117 .sp
112 118 .TS
113 119 box;
114 120 c | c
115 121 l | l .
116 122 ATTRIBUTE TYPE ATTRIBUTE VALUE
117 123 _
118 124 MT Level Safe
119 125 .TE
120 126
121 127 .SH SEE ALSO
122 128 .BR libc_db (3LIB),
123 129 .BR proc_service (3PROC),
124 130 .BR attributes (7),
125 131 .BR threads (7)
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