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15254 %ymm registers not restored after signal handler
15367 x86 getfpregs() summons corrupting %xmm ghosts
15333 want x86 /proc xregs support (libc_db, libproc, mdb, etc.)
15336 want libc functions for extended ucontext_t
15334 want ps_lwphandle-specific reg routines
15328 FPU_CW_INIT mistreats reserved bit
15335 i86pc fpu_subr.c isn't really platform-specific
15332 setcontext(2) isn't actually noreturn
15331 need <sys/stdalign.h>
Change-Id: I7060aa86042dfb989f77fc3323c065ea2eafa9ad
Conflicts:
    usr/src/uts/common/fs/proc/prcontrol.c
    usr/src/uts/intel/os/archdep.c
    usr/src/uts/intel/sys/ucontext.h
    usr/src/uts/intel/syscall/getcontext.c
        
@@ -1,11 +1,12 @@
 '\" te
 .\"  Copyright (c) 1998 Sun Microsystems, Inc.  All Rights Reserved
 .\" The contents of this file are subject to the terms of the Common Development and Distribution License (the "License").  You may not use this file except in compliance with the License.
 .\" You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE or http://www.opensolaris.org/os/licensing.  See the License for the specific language governing permissions and limitations under the License.
 .\" When distributing Covered Code, include this CDDL HEADER in each file and include the License file at usr/src/OPENSOLARIS.LICENSE.  If applicable, add the following below this CDDL HEADER, with the fields enclosed by brackets "[]" replaced with your own identifying information: Portions Copyright [yyyy] [name of copyright owner]
-.TH PS_LGETREGS 3PROC "September 12, 2020"
+.\" Copyright 2023 Oxide Computer Company
+.TH PS_LGETREGS 3PROC "January 23, 2023"
 .SH NAME
 ps_lgetregs, ps_lsetregs, ps_lgetfpregs, ps_lsetfpregs, ps_lgetxregsize,
 ps_lgetxregs, ps_lsetxregs \- routines that access the target process register
 in libthread_db
 .SH SYNOPSIS
@@ -58,17 +59,22 @@
 \fBps_lsetxregs()\fR read and write register sets from lightweight processes
 (\fBLWP\fRs) within the target process identified by \fIph\fR.
 \fBps_lgetregs()\fR gets the general registers of the \fBLWP\fR identified by
 \fIlid\fR, and \fBps_lsetregs()\fR sets them. \fBps_lgetfpregs()\fR gets the
 \fBLWP\fR's floating point register set, while \fBps_lsetfpregs()\fR sets it.
-.SS "SPARC Only"
-\fBps_lgetxregsize()\fR, \fBps_lgetxregs()\fR, and \fBps_lsetxregs()\fR are
-SPARC-specific. They do not need to be defined by a controlling process on
-non-SPARC architecture. \fBps_lgetxregsize()\fR returns in
-\fB*\fR\fIxregsize\fR the size of the architecture-dependent extra state
-registers. \fBps_lgetxregs()\fR gets the extra state registers, and
-\fBps_lsetxregs()\fR sets them.
+.LP
+\fBps_lgetxregsize()\fR, \fBps_lgetxregs()\fR, and \fBps_lsetxregs()\fR are used
+to get and set the extended register set. Support for an extended register set
+depends on the instruction-set archicture. On platforms without support for
+these, controlling processes wlil still need to define them; however, they are
+allowed to simply return errors.
+.LP
+\fBps_lgetxregsize()\fR returns in \fB*\fR\fIxregsize\fR the size of the
+architecture-dependent extra state registers. \fBps_lgetxregs()\fR gets the
+extra state registers, and \fBps_lsetxregs()\fR sets them. When getting the
+registers, the size of \fIxregset\fR must be at least the size returned by
+\fBps_lgetxregsize()\fR.
 .SH RETURN VALUES
 .ne 2
 .na
 \fB\fBPS_OK\fR \fR
 .ad
@@ -77,11 +83,11 @@
 .RE
 
 .sp
 .ne 2
 .na
-\fB\fBPS_NOFPREGS\fR \fR
+\fB\fBPS_NOFREGS\fR \fR
 .ad
 .RS 16n
 Floating point registers are neither available for this architecture nor for
 this process.
 .RE