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15254 %ymm registers not restored after signal handler
15367 x86 getfpregs() summons corrupting %xmm ghosts
15333 want x86 /proc xregs support (libc_db, libproc, mdb, etc.)
15336 want libc functions for extended ucontext_t
15334 want ps_lwphandle-specific reg routines
15328 FPU_CW_INIT mistreats reserved bit
15335 i86pc fpu_subr.c isn't really platform-specific
15332 setcontext(2) isn't actually noreturn
15331 need <sys/stdalign.h>
Change-Id: I7060aa86042dfb989f77fc3323c065ea2eafa9ad
Conflicts:
    usr/src/uts/common/fs/proc/prcontrol.c
    usr/src/uts/intel/os/archdep.c
    usr/src/uts/intel/sys/ucontext.h
    usr/src/uts/intel/syscall/getcontext.c
   1 '\" te
   2 .\"  Copyright (c) 1998 Sun Microsystems, Inc.  All Rights Reserved
   3 .\" The contents of this file are subject to the terms of the Common Development and Distribution License (the "License").  You may not use this file except in compliance with the License.
   4 .\" You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE or http://www.opensolaris.org/os/licensing.  See the License for the specific language governing permissions and limitations under the License.
   5 .\" When distributing Covered Code, include this CDDL HEADER in each file and include the License file at usr/src/OPENSOLARIS.LICENSE.  If applicable, add the following below this CDDL HEADER, with the fields enclosed by brackets "[]" replaced with your own identifying information: Portions Copyright [yyyy] [name of copyright owner]
   6 .TH PS_LGETREGS 3PROC "September 12, 2020"

   7 .SH NAME
   8 ps_lgetregs, ps_lsetregs, ps_lgetfpregs, ps_lsetfpregs, ps_lgetxregsize,
   9 ps_lgetxregs, ps_lsetxregs \- routines that access the target process register
  10 in libthread_db
  11 .SH SYNOPSIS
  12 .nf
  13 #include <proc_service.h>
  14 
  15 \fBps_err_e\fR \fBps_lgetregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
  16      \fBprgregset_t\fR \fIgregset\fR);
  17 .fi
  18 
  19 .LP
  20 .nf
  21 \fBps_err_e\fR \fBps_lsetregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
  22      \fBstatic prgregset_t\fR \fIgregset\fR);
  23 .fi
  24 
  25 .LP
  26 .nf


  43 .LP
  44 .nf
  45 \fBps_err_e\fR \fBps_lgetxregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
  46      \fBcaddr_t\fR \fIxregset\fR);
  47 .fi
  48 
  49 .LP
  50 .nf
  51 \fBps_err_e\fR \fBps_lsetxregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
  52      \fBcaddr_t\fR \fIxregset\fR);
  53 .fi
  54 
  55 .SH DESCRIPTION
  56 \fBps_lgetregs()\fR, \fBps_lsetregs()\fR, \fBps_lgetfpregs()\fR,
  57 \fBps_lsetfpregs()\fR, \fBps_lgetxregsize()\fR, \fBps_lgetxregs()\fR,
  58 \fBps_lsetxregs()\fR read and write register sets from lightweight processes
  59 (\fBLWP\fRs) within the target process identified by \fIph\fR.
  60 \fBps_lgetregs()\fR gets the general registers of the \fBLWP\fR identified by
  61 \fIlid\fR, and \fBps_lsetregs()\fR sets them. \fBps_lgetfpregs()\fR gets the
  62 \fBLWP\fR's floating point register set, while \fBps_lsetfpregs()\fR sets it.
  63 .SS "SPARC Only"
  64 \fBps_lgetxregsize()\fR, \fBps_lgetxregs()\fR, and \fBps_lsetxregs()\fR are
  65 SPARC-specific. They do not need to be defined by a controlling process on
  66 non-SPARC architecture. \fBps_lgetxregsize()\fR returns in
  67 \fB*\fR\fIxregsize\fR the size of the architecture-dependent extra state
  68 registers. \fBps_lgetxregs()\fR gets the extra state registers, and
  69 \fBps_lsetxregs()\fR sets them.





  70 .SH RETURN VALUES
  71 .ne 2
  72 .na
  73 \fB\fBPS_OK\fR \fR
  74 .ad
  75 .RS 16n
  76 The call returned successfully.
  77 .RE
  78 
  79 .sp
  80 .ne 2
  81 .na
  82 \fB\fBPS_NOFPREGS\fR \fR
  83 .ad
  84 .RS 16n
  85 Floating point registers are neither available for this architecture nor for
  86 this process.
  87 .RE
  88 
  89 .sp
  90 .ne 2
  91 .na
  92 \fB\fBPS_NOXREGS\fR \fR
  93 .ad
  94 .RS 16n
  95 Extra state registers are not available on this architecture.
  96 .RE
  97 
  98 .sp
  99 .ne 2
 100 .na
 101 \fB\fBPS_ERR\fR \fR
 102 .ad


   1 '\" te
   2 .\"  Copyright (c) 1998 Sun Microsystems, Inc.  All Rights Reserved
   3 .\" The contents of this file are subject to the terms of the Common Development and Distribution License (the "License").  You may not use this file except in compliance with the License.
   4 .\" You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE or http://www.opensolaris.org/os/licensing.  See the License for the specific language governing permissions and limitations under the License.
   5 .\" When distributing Covered Code, include this CDDL HEADER in each file and include the License file at usr/src/OPENSOLARIS.LICENSE.  If applicable, add the following below this CDDL HEADER, with the fields enclosed by brackets "[]" replaced with your own identifying information: Portions Copyright [yyyy] [name of copyright owner]
   6 .\" Copyright 2023 Oxide Computer Company
   7 .TH PS_LGETREGS 3PROC "January 23, 2023"
   8 .SH NAME
   9 ps_lgetregs, ps_lsetregs, ps_lgetfpregs, ps_lsetfpregs, ps_lgetxregsize,
  10 ps_lgetxregs, ps_lsetxregs \- routines that access the target process register
  11 in libthread_db
  12 .SH SYNOPSIS
  13 .nf
  14 #include <proc_service.h>
  15 
  16 \fBps_err_e\fR \fBps_lgetregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
  17      \fBprgregset_t\fR \fIgregset\fR);
  18 .fi
  19 
  20 .LP
  21 .nf
  22 \fBps_err_e\fR \fBps_lsetregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
  23      \fBstatic prgregset_t\fR \fIgregset\fR);
  24 .fi
  25 
  26 .LP
  27 .nf


  44 .LP
  45 .nf
  46 \fBps_err_e\fR \fBps_lgetxregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
  47      \fBcaddr_t\fR \fIxregset\fR);
  48 .fi
  49 
  50 .LP
  51 .nf
  52 \fBps_err_e\fR \fBps_lsetxregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
  53      \fBcaddr_t\fR \fIxregset\fR);
  54 .fi
  55 
  56 .SH DESCRIPTION
  57 \fBps_lgetregs()\fR, \fBps_lsetregs()\fR, \fBps_lgetfpregs()\fR,
  58 \fBps_lsetfpregs()\fR, \fBps_lgetxregsize()\fR, \fBps_lgetxregs()\fR,
  59 \fBps_lsetxregs()\fR read and write register sets from lightweight processes
  60 (\fBLWP\fRs) within the target process identified by \fIph\fR.
  61 \fBps_lgetregs()\fR gets the general registers of the \fBLWP\fR identified by
  62 \fIlid\fR, and \fBps_lsetregs()\fR sets them. \fBps_lgetfpregs()\fR gets the
  63 \fBLWP\fR's floating point register set, while \fBps_lsetfpregs()\fR sets it.
  64 .LP
  65 \fBps_lgetxregsize()\fR, \fBps_lgetxregs()\fR, and \fBps_lsetxregs()\fR are used
  66 to get and set the extended register set. Support for an extended register set
  67 depends on the instruction-set archicture. On platforms without support for
  68 these, controlling processes wlil still need to define them; however, they are
  69 allowed to simply return errors.
  70 .LP
  71 \fBps_lgetxregsize()\fR returns in \fB*\fR\fIxregsize\fR the size of the
  72 architecture-dependent extra state registers. \fBps_lgetxregs()\fR gets the
  73 extra state registers, and \fBps_lsetxregs()\fR sets them. When getting the
  74 registers, the size of \fIxregset\fR must be at least the size returned by
  75 \fBps_lgetxregsize()\fR.
  76 .SH RETURN VALUES
  77 .ne 2
  78 .na
  79 \fB\fBPS_OK\fR \fR
  80 .ad
  81 .RS 16n
  82 The call returned successfully.
  83 .RE
  84 
  85 .sp
  86 .ne 2
  87 .na
  88 \fB\fBPS_NOFREGS\fR \fR
  89 .ad
  90 .RS 16n
  91 Floating point registers are neither available for this architecture nor for
  92 this process.
  93 .RE
  94 
  95 .sp
  96 .ne 2
  97 .na
  98 \fB\fBPS_NOXREGS\fR \fR
  99 .ad
 100 .RS 16n
 101 Extra state registers are not available on this architecture.
 102 .RE
 103 
 104 .sp
 105 .ne 2
 106 .na
 107 \fB\fBPS_ERR\fR \fR
 108 .ad