1 '\" te
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   6 .\" Copyright 2023 Oxide Computer Company
   7 .TH PS_LGETREGS 3PROC "January 23, 2023"
   8 .SH NAME
   9 ps_lgetregs, ps_lsetregs, ps_lgetfpregs, ps_lsetfpregs, ps_lgetxregsize,
  10 ps_lgetxregs, ps_lsetxregs \- routines that access the target process register
  11 in libthread_db
  12 .SH SYNOPSIS
  13 .nf
  14 #include <proc_service.h>
  15 
  16 \fBps_err_e\fR \fBps_lgetregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
  17      \fBprgregset_t\fR \fIgregset\fR);
  18 .fi
  19 
  20 .LP
  21 .nf
  22 \fBps_err_e\fR \fBps_lsetregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
  23      \fBstatic prgregset_t\fR \fIgregset\fR);
  24 .fi
  25 
  26 .LP
  27 .nf
  28 \fBps_err_e\fR \fBps_lgetfpregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
  29      \fBprfpregset_t *\fR\fIfpregs\fR);
  30 .fi
  31 
  32 .LP
  33 .nf
  34 \fBps_err_e\fR \fBps_lsetfpregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
  35      \fBstatic prfpregset_t *\fR\fIfpregs\fR);
  36 .fi
  37 
  38 .LP
  39 .nf
  40 \fBps_err_e\fR \fBps_lgetxregsize\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
  41      \fBint *\fR\fIxregsize\fR);
  42 .fi
  43 
  44 .LP
  45 .nf
  46 \fBps_err_e\fR \fBps_lgetxregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
  47      \fBcaddr_t\fR \fIxregset\fR);
  48 .fi
  49 
  50 .LP
  51 .nf
  52 \fBps_err_e\fR \fBps_lsetxregs\fR(\fBstruct ps_prochandle *\fR\fIph\fR, \fBlwpid_t\fR \fIlid\fR,
  53      \fBcaddr_t\fR \fIxregset\fR);
  54 .fi
  55 
  56 .SH DESCRIPTION
  57 \fBps_lgetregs()\fR, \fBps_lsetregs()\fR, \fBps_lgetfpregs()\fR,
  58 \fBps_lsetfpregs()\fR, \fBps_lgetxregsize()\fR, \fBps_lgetxregs()\fR,
  59 \fBps_lsetxregs()\fR read and write register sets from lightweight processes
  60 (\fBLWP\fRs) within the target process identified by \fIph\fR.
  61 \fBps_lgetregs()\fR gets the general registers of the \fBLWP\fR identified by
  62 \fIlid\fR, and \fBps_lsetregs()\fR sets them. \fBps_lgetfpregs()\fR gets the
  63 \fBLWP\fR's floating point register set, while \fBps_lsetfpregs()\fR sets it.
  64 .LP
  65 \fBps_lgetxregsize()\fR, \fBps_lgetxregs()\fR, and \fBps_lsetxregs()\fR are used
  66 to get and set the extended register set. Support for an extended register set
  67 depends on the instruction-set archicture. On platforms without support for
  68 these, controlling processes wlil still need to define them; however, they are
  69 allowed to simply return errors.
  70 .LP
  71 \fBps_lgetxregsize()\fR returns in \fB*\fR\fIxregsize\fR the size of the
  72 architecture-dependent extra state registers. \fBps_lgetxregs()\fR gets the
  73 extra state registers, and \fBps_lsetxregs()\fR sets them. When getting the
  74 registers, the size of \fIxregset\fR must be at least the size returned by
  75 \fBps_lgetxregsize()\fR.
  76 .SH RETURN VALUES
  77 .ne 2
  78 .na
  79 \fB\fBPS_OK\fR \fR
  80 .ad
  81 .RS 16n
  82 The call returned successfully.
  83 .RE
  84 
  85 .sp
  86 .ne 2
  87 .na
  88 \fB\fBPS_NOFREGS\fR \fR
  89 .ad
  90 .RS 16n
  91 Floating point registers are neither available for this architecture nor for
  92 this process.
  93 .RE
  94 
  95 .sp
  96 .ne 2
  97 .na
  98 \fB\fBPS_NOXREGS\fR \fR
  99 .ad
 100 .RS 16n
 101 Extra state registers are not available on this architecture.
 102 .RE
 103 
 104 .sp
 105 .ne 2
 106 .na
 107 \fB\fBPS_ERR\fR \fR
 108 .ad
 109 .RS 16n
 110 The function did not return successfully.
 111 .RE
 112 
 113 .SH ATTRIBUTES
 114 See \fBattributes\fR(7) for description of the following attributes:
 115 .sp
 116 
 117 .sp
 118 .TS
 119 box;
 120 c | c
 121 l | l .
 122 ATTRIBUTE TYPE  ATTRIBUTE VALUE
 123 _
 124 MT Level        Safe
 125 .TE
 126 
 127 .SH SEE ALSO
 128 .BR libc_db (3LIB),
 129 .BR proc_service (3PROC),
 130 .BR attributes (7),
 131 .BR threads (7)