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Update i40e for new devices, prototype changes
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--- old/usr/src/uts/common/io/i40e/i40e_stats.c
+++ new/usr/src/uts/common/io/i40e/i40e_stats.c
1 1 /*
2 2 * This file and its contents are supplied under the terms of the
3 3 * Common Development and Distribution License ("CDDL"), version 1.0.
4 4 * You may only use this file in accordance with the terms of version
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4 lines elided |
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5 5 * 1.0 of the CDDL.
6 6 *
7 7 * A full copy of the text of the CDDL should have accompanied this
8 8 * source. A copy of the CDDL is also available via the Internet at
9 9 * http://www.illumos.org/license/CDDL.
10 10 */
11 11
12 12 /*
13 13 * Copyright 2015 OmniTI Computer Consulting, Inc. All rights reserved.
14 14 * Copyright 2019 Joyent, Inc.
15 + * Copyright 2021 Oxide Computer Company
15 16 */
16 17
17 18 #include "i40e_sw.h"
18 19
19 20 /*
20 21 * -------------------
21 22 * Statistics Overview
22 23 * -------------------
23 24 *
24 25 * As part of managing the driver and understanding what's going on, we keep
25 26 * track of statistics from two different sources:
26 27 *
27 28 * - Statistics from the device
28 29 * - Statistics maintained by the driver
29 30 *
30 31 * Generally, the hardware provides us traditional IETF and MIB Ethernet
31 32 * statistics, for example, the total packets in and out, various errors in
32 33 * packets, the negotiated status etc. The driver, on the other hand, primarily
33 34 * contains statistics around driver-specific issues, such as information about
34 35 * checksumming on receive and transmit and the data in and out of a specific
35 36 * ring.
36 37 *
37 38 * We export statistics in two different forms. The first form is the required
38 39 * GLDv3 endpoints, specifically:
39 40 *
40 41 * - The general GLDv3 mc_getstat interface
41 42 * - The GLDv3 ring mri_stat interface
42 43 *
43 44 * The second form that we export statistics is through kstats. kstats are
44 45 * exported in different ways. Particularly we arrange the kstats to monitor the
45 46 * layout of the device. Currently we have kstats which capture both the IEEE
46 47 * and driver-implementation specific stats. There are kstats for each of the
47 48 * following structures:
48 49 *
49 50 * - Each physical function
50 51 * - Each VSI
51 52 * - Each Queue
52 53 *
53 54 * The PF's kstat is called 'pfstats' so as not to collide with other system
54 55 * provided kstats. Thus, for instance 0, usually the first PF, the full kstat
55 56 * would be: i40e:0:pfstats:.
56 57 *
57 58 * The kstat for each VSI is called vsi_%instance. So for the first PF, which is
58 59 * instance zero and the first vsi, which has id 0, it will be named vsi_0 and
59 60 * the full kstat would be i40e:0:vsi_0:.
60 61 *
61 62 * The kstat for each queue is trqpair_tx_%queue and trqpair_rx_%queue. Note
62 63 * that these are labeled based on their local index, which may mean that
63 64 * different instances have overlapping sets of queues. This isn't a problem as
64 65 * the kstats will always use the instance number of the pf to distinguish it in
65 66 * the kstat tuple.
66 67 *
67 68 * ---------------------
68 69 * Hardware Arrangements
69 70 * ---------------------
70 71 *
71 72 * The hardware keeps statistics at each physical function/MAC (PF) and it keeps
72 73 * statistics on each virtual station interface (VSI).
73 74 *
74 75 * The hardware keeps these statistics as 32-bit and 48-bit counters. We are
75 76 * required to read them and then compute the differences between them. The
76 77 * 48-bit counters span more than one 32-bit register in the BAR. The hardware
77 78 * suggests that to read them, we perform 64-bit reads of the lower of the two
78 79 * registers that make up a 48-bit stat. The hardware guarantees that the reads
79 80 * of those two registers will be atomic and we'll get a consistent value, not a
80 81 * property it has for every read of two registers.
81 82 *
82 83 * For every kstat we have based on this, we have a corresponding uint64_t that
83 84 * we keep around as a base value in a separate structure. Whenever we read a
84 85 * value, we end up grabbing the current value, calculating a difference between
85 86 * the previously stored value and the current one, and updating the kstat with
86 87 * that difference. After which, we go through and update the base value that we
87 88 * stored. This is all encapsulated in i40e_stat_get_uint32() and
88 89 * i40e_stat_get_uint48().
89 90 *
90 91 * The only unfortunate thing here is that the hardware doesn't give us any kind
91 92 * of overflow counter. It just tries to make sure that the uint32_t and
92 93 * uint48_t counters are large enough to hopefully not overflow right away. This
93 94 * isn't the most reassuring statement and we should investigate ways of
94 95 * ensuring that if a system is active, but not actively measured, we don't lose
95 96 * data.
96 97 *
97 98 * The pf kstats data is stored in the i40e_t`i40e_pf_kstat. It is backed by the
98 99 * i40e_t`i40e_pf_stat structure. Similarly the VSI related kstats are in
99 100 * i40e_t`i40e_vsis[idx].iv_kstats and the data is backed in the
100 101 * i40e_t`i40e_vsis[idx].iv_stats. All of this data is protected by the
101 102 * i40e_stat_lock, which should be taken last, when acquiring locks.
102 103 */
103 104
104 105 static void
105 106 i40e_stat_get_uint48(i40e_t *i40e, uintptr_t reg, kstat_named_t *kstat,
106 107 uint64_t *base, boolean_t init)
107 108 {
108 109 i40e_hw_t *hw = &i40e->i40e_hw_space;
109 110 uint64_t raw, delta;
110 111
111 112 ASSERT(MUTEX_HELD(&i40e->i40e_stat_lock));
112 113
113 114 raw = ddi_get64(i40e->i40e_osdep_space.ios_reg_handle,
114 115 (uint64_t *)((uintptr_t)hw->hw_addr + reg));
115 116
116 117 if (init == B_TRUE) {
117 118 *base = raw;
118 119 return;
119 120 }
120 121
121 122 /*
122 123 * Check for wraparound, note that the counter is actually only 48-bits,
123 124 * even though it has two uint32_t regs present.
124 125 */
125 126 if (raw >= *base) {
126 127 delta = raw - *base;
127 128 } else {
128 129 delta = 0x1000000000000ULL - *base + raw;
129 130 }
130 131
131 132 kstat->value.ui64 += delta;
132 133 *base = raw;
133 134 }
134 135
135 136 static void
136 137 i40e_stat_get_uint32(i40e_t *i40e, uintptr_t reg, kstat_named_t *kstat,
137 138 uint64_t *base, boolean_t init)
138 139 {
139 140 i40e_hw_t *hw = &i40e->i40e_hw_space;
140 141 uint64_t raw, delta;
141 142
142 143 ASSERT(MUTEX_HELD(&i40e->i40e_stat_lock));
143 144
144 145 raw = ddi_get32(i40e->i40e_osdep_space.ios_reg_handle,
145 146 (uint32_t *)((uintptr_t)hw->hw_addr + reg));
146 147
147 148 if (init == B_TRUE) {
148 149 *base = raw;
149 150 return;
150 151 }
151 152
152 153 /*
153 154 * Watch out for wraparound as we only have a 32-bit counter.
154 155 */
155 156 if (raw >= *base) {
156 157 delta = raw - *base;
157 158 } else {
158 159 delta = 0x100000000ULL - *base + raw;
159 160 }
160 161
161 162 kstat->value.ui64 += delta;
162 163 *base = raw;
163 164
164 165 }
165 166
166 167 static void
167 168 i40e_stat_vsi_update(i40e_t *i40e, uint_t idx, boolean_t init)
168 169 {
169 170 i40e_vsi_stats_t *ivs;
170 171 i40e_vsi_kstats_t *ivk;
171 172 uint16_t id = i40e->i40e_vsis[idx].iv_stats_id;
172 173
173 174 ASSERT3P(i40e->i40e_vsis[idx].iv_kstats, !=, NULL);
174 175 ivs = &i40e->i40e_vsis[idx].iv_stats;
175 176 ivk = i40e->i40e_vsis[idx].iv_kstats->ks_data;
176 177
177 178 mutex_enter(&i40e->i40e_stat_lock);
178 179
179 180 i40e_stat_get_uint48(i40e, I40E_GLV_GORCL(id), &ivk->ivk_rx_bytes,
180 181 &ivs->ivs_rx_bytes, init);
181 182 i40e_stat_get_uint48(i40e, I40E_GLV_UPRCL(id), &ivk->ivk_rx_unicast,
182 183 &ivs->ivs_rx_unicast, init);
183 184 i40e_stat_get_uint48(i40e, I40E_GLV_MPRCL(id), &ivk->ivk_rx_multicast,
184 185 &ivs->ivs_rx_multicast, init);
185 186 i40e_stat_get_uint48(i40e, I40E_GLV_BPRCL(id), &ivk->ivk_rx_broadcast,
186 187 &ivs->ivs_rx_broadcast, init);
187 188
188 189 i40e_stat_get_uint32(i40e, I40E_GLV_RDPC(id), &ivk->ivk_rx_discards,
189 190 &ivs->ivs_rx_discards, init);
190 191 i40e_stat_get_uint32(i40e, I40E_GLV_RUPP(id),
191 192 &ivk->ivk_rx_unknown_protocol,
192 193 &ivs->ivs_rx_unknown_protocol,
193 194 init);
194 195
195 196 i40e_stat_get_uint48(i40e, I40E_GLV_GOTCL(id), &ivk->ivk_tx_bytes,
196 197 &ivs->ivs_tx_bytes, init);
197 198 i40e_stat_get_uint48(i40e, I40E_GLV_UPTCL(id), &ivk->ivk_tx_unicast,
198 199 &ivs->ivs_tx_unicast, init);
199 200 i40e_stat_get_uint48(i40e, I40E_GLV_MPTCL(id), &ivk->ivk_tx_multicast,
200 201 &ivs->ivs_tx_multicast, init);
201 202 i40e_stat_get_uint48(i40e, I40E_GLV_BPTCL(id), &ivk->ivk_tx_broadcast,
202 203 &ivs->ivs_tx_broadcast, init);
203 204
204 205 i40e_stat_get_uint32(i40e, I40E_GLV_TEPC(id), &ivk->ivk_tx_errors,
205 206 &ivs->ivs_tx_errors, init);
206 207
207 208 mutex_exit(&i40e->i40e_stat_lock);
208 209
209 210 /*
210 211 * We follow ixgbe's lead here and that if a kstat update didn't work
211 212 * 100% then we mark service unaffected as opposed to when fetching
212 213 * things for MAC directly.
213 214 */
214 215 if (i40e_check_acc_handle(i40e->i40e_osdep_space.ios_reg_handle) !=
215 216 DDI_FM_OK) {
216 217 ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_UNAFFECTED);
217 218 }
218 219 }
219 220
220 221 static int
221 222 i40e_stat_vsi_kstat_update(kstat_t *ksp, int rw)
222 223 {
223 224 i40e_t *i40e;
224 225
225 226 if (rw == KSTAT_WRITE)
226 227 return (EACCES);
227 228
228 229 i40e = ksp->ks_private;
229 230 for (uint_t i = 0; i < i40e->i40e_num_rx_groups; i++)
230 231 i40e_stat_vsi_update(i40e, i, B_FALSE);
231 232
232 233 return (0);
233 234 }
234 235
235 236 void
236 237 i40e_stat_vsi_fini(i40e_t *i40e, uint_t idx)
237 238 {
238 239 if (i40e->i40e_vsis[idx].iv_kstats != NULL) {
239 240 kstat_delete(i40e->i40e_vsis[idx].iv_kstats);
240 241 i40e->i40e_vsis[idx].iv_kstats = NULL;
241 242 }
242 243 }
243 244
244 245 boolean_t
245 246 i40e_stat_vsi_init(i40e_t *i40e, uint_t idx)
246 247 {
247 248 kstat_t *ksp;
248 249 i40e_vsi_kstats_t *ivk;
249 250 char buf[64];
250 251 uint16_t vsi_id = i40e->i40e_vsis[idx].iv_seid;
251 252
252 253 (void) snprintf(buf, sizeof (buf), "vsi_%u", vsi_id);
253 254
254 255 ksp = kstat_create(I40E_MODULE_NAME, ddi_get_instance(i40e->i40e_dip),
255 256 buf, "net", KSTAT_TYPE_NAMED,
256 257 sizeof (i40e_vsi_kstats_t) / sizeof (kstat_named_t), 0);
257 258
258 259 if (ksp == NULL) {
259 260 i40e_error(i40e, "Failed to create kstats for VSI %u", vsi_id);
260 261 return (B_FALSE);
261 262 }
262 263
263 264 i40e->i40e_vsis[idx].iv_kstats = ksp;
264 265 ivk = ksp->ks_data;
265 266 ksp->ks_update = i40e_stat_vsi_kstat_update;
266 267 ksp->ks_private = i40e;
267 268
268 269 kstat_named_init(&ivk->ivk_rx_bytes, "rx_bytes",
269 270 KSTAT_DATA_UINT64);
270 271 kstat_named_init(&ivk->ivk_rx_unicast, "rx_unicast",
271 272 KSTAT_DATA_UINT64);
272 273 kstat_named_init(&ivk->ivk_rx_multicast, "rx_multicast",
273 274 KSTAT_DATA_UINT64);
274 275 kstat_named_init(&ivk->ivk_rx_broadcast, "rx_broadcast",
275 276 KSTAT_DATA_UINT64);
276 277 kstat_named_init(&ivk->ivk_rx_discards, "rx_discards",
277 278 KSTAT_DATA_UINT64);
278 279 kstat_named_init(&ivk->ivk_rx_unknown_protocol, "rx_unknown_protocol",
279 280 KSTAT_DATA_UINT64);
280 281 kstat_named_init(&ivk->ivk_tx_bytes, "tx_bytes",
281 282 KSTAT_DATA_UINT64);
282 283 kstat_named_init(&ivk->ivk_tx_unicast, "tx_unicast",
283 284 KSTAT_DATA_UINT64);
284 285 kstat_named_init(&ivk->ivk_tx_multicast, "tx_multicast",
285 286 KSTAT_DATA_UINT64);
286 287 kstat_named_init(&ivk->ivk_tx_broadcast, "tx_broadcast",
287 288 KSTAT_DATA_UINT64);
288 289 kstat_named_init(&ivk->ivk_tx_errors, "tx_errors",
289 290 KSTAT_DATA_UINT64);
290 291
291 292 bzero(&i40e->i40e_vsis[idx].iv_stats, sizeof (i40e_vsi_stats_t));
292 293 i40e_stat_vsi_update(i40e, idx, B_TRUE);
293 294 kstat_install(i40e->i40e_vsis[idx].iv_kstats);
294 295
295 296 return (B_TRUE);
296 297 }
297 298
298 299 static void
299 300 i40e_stat_pf_update(i40e_t *i40e, boolean_t init)
300 301 {
301 302 i40e_pf_stats_t *ips;
302 303 i40e_pf_kstats_t *ipk;
303 304 int port = i40e->i40e_hw_space.port;
304 305 int i;
305 306
306 307 ASSERT(i40e->i40e_pf_kstat != NULL);
307 308 ips = &i40e->i40e_pf_stat;
308 309 ipk = i40e->i40e_pf_kstat->ks_data;
309 310
310 311 mutex_enter(&i40e->i40e_stat_lock);
311 312
312 313 /* 64-bit PCIe regs */
313 314 i40e_stat_get_uint48(i40e, I40E_GLPRT_GORCL(port),
314 315 &ipk->ipk_rx_bytes, &ips->ips_rx_bytes, init);
315 316 i40e_stat_get_uint48(i40e, I40E_GLPRT_UPRCL(port),
316 317 &ipk->ipk_rx_unicast, &ips->ips_rx_unicast, init);
317 318 i40e_stat_get_uint48(i40e, I40E_GLPRT_MPRCL(port),
318 319 &ipk->ipk_rx_multicast, &ips->ips_rx_multicast, init);
319 320 i40e_stat_get_uint48(i40e, I40E_GLPRT_BPRCL(port),
320 321 &ipk->ipk_rx_broadcast, &ips->ips_rx_broadcast, init);
321 322 i40e_stat_get_uint48(i40e, I40E_GLPRT_GOTCL(port),
322 323 &ipk->ipk_tx_bytes, &ips->ips_tx_bytes, init);
323 324 i40e_stat_get_uint48(i40e, I40E_GLPRT_UPTCL(port),
324 325 &ipk->ipk_tx_unicast, &ips->ips_tx_unicast, init);
325 326 i40e_stat_get_uint48(i40e, I40E_GLPRT_MPTCL(port),
326 327 &ipk->ipk_tx_multicast, &ips->ips_tx_multicast, init);
327 328 i40e_stat_get_uint48(i40e, I40E_GLPRT_BPTCL(port),
328 329 &ipk->ipk_tx_broadcast, &ips->ips_tx_broadcast, init);
329 330
330 331 i40e_stat_get_uint48(i40e, I40E_GLPRT_PRC64L(port),
331 332 &ipk->ipk_rx_size_64, &ips->ips_rx_size_64, init);
332 333 i40e_stat_get_uint48(i40e, I40E_GLPRT_PRC127L(port),
333 334 &ipk->ipk_rx_size_127, &ips->ips_rx_size_127, init);
334 335 i40e_stat_get_uint48(i40e, I40E_GLPRT_PRC255L(port),
335 336 &ipk->ipk_rx_size_255, &ips->ips_rx_size_255, init);
336 337 i40e_stat_get_uint48(i40e, I40E_GLPRT_PRC511L(port),
337 338 &ipk->ipk_rx_size_511, &ips->ips_rx_size_511, init);
338 339 i40e_stat_get_uint48(i40e, I40E_GLPRT_PRC1023L(port),
339 340 &ipk->ipk_rx_size_1023, &ips->ips_rx_size_1023, init);
340 341 i40e_stat_get_uint48(i40e, I40E_GLPRT_PRC1522L(port),
341 342 &ipk->ipk_rx_size_1522, &ips->ips_rx_size_1522, init);
342 343 i40e_stat_get_uint48(i40e, I40E_GLPRT_PRC9522L(port),
343 344 &ipk->ipk_rx_size_9522, &ips->ips_rx_size_9522, init);
344 345
345 346 i40e_stat_get_uint48(i40e, I40E_GLPRT_PTC64L(port),
346 347 &ipk->ipk_tx_size_64, &ips->ips_tx_size_64, init);
347 348 i40e_stat_get_uint48(i40e, I40E_GLPRT_PTC127L(port),
348 349 &ipk->ipk_tx_size_127, &ips->ips_tx_size_127, init);
349 350 i40e_stat_get_uint48(i40e, I40E_GLPRT_PTC255L(port),
350 351 &ipk->ipk_tx_size_255, &ips->ips_tx_size_255, init);
351 352 i40e_stat_get_uint48(i40e, I40E_GLPRT_PTC511L(port),
352 353 &ipk->ipk_tx_size_511, &ips->ips_tx_size_511, init);
353 354 i40e_stat_get_uint48(i40e, I40E_GLPRT_PTC1023L(port),
354 355 &ipk->ipk_tx_size_1023, &ips->ips_tx_size_1023, init);
355 356 i40e_stat_get_uint48(i40e, I40E_GLPRT_PTC1522L(port),
356 357 &ipk->ipk_tx_size_1522, &ips->ips_tx_size_1522, init);
357 358 i40e_stat_get_uint48(i40e, I40E_GLPRT_PTC9522L(port),
358 359 &ipk->ipk_tx_size_9522, &ips->ips_tx_size_9522, init);
359 360
360 361 /* 32-bit PCIe regs */
361 362 i40e_stat_get_uint32(i40e, I40E_GLPRT_LXONRXC(port),
362 363 &ipk->ipk_link_xon_rx, &ips->ips_link_xon_rx, init);
363 364 i40e_stat_get_uint32(i40e, I40E_GLPRT_LXOFFRXC(port),
364 365 &ipk->ipk_link_xoff_rx, &ips->ips_link_xoff_rx, init);
365 366 i40e_stat_get_uint32(i40e, I40E_GLPRT_LXONTXC(port),
366 367 &ipk->ipk_link_xon_tx, &ips->ips_link_xon_tx, init);
367 368 i40e_stat_get_uint32(i40e, I40E_GLPRT_LXOFFTXC(port),
368 369 &ipk->ipk_link_xoff_tx, &ips->ips_link_xoff_tx, init);
369 370
370 371 for (i = 0; i < 8; i++) {
371 372 i40e_stat_get_uint32(i40e, I40E_GLPRT_PXONRXC(port, i),
372 373 &ipk->ipk_priority_xon_rx[i], &ips->ips_priority_xon_rx[i],
373 374 init);
374 375 i40e_stat_get_uint32(i40e, I40E_GLPRT_PXOFFRXC(port, i),
375 376 &ipk->ipk_priority_xoff_rx[i],
376 377 &ips->ips_priority_xoff_rx[i],
377 378 init);
378 379 i40e_stat_get_uint32(i40e, I40E_GLPRT_PXONTXC(port, i),
379 380 &ipk->ipk_priority_xon_tx[i], &ips->ips_priority_xon_tx[i],
380 381 init);
381 382 i40e_stat_get_uint32(i40e, I40E_GLPRT_PXOFFTXC(port, i),
382 383 &ipk->ipk_priority_xoff_tx[i],
383 384 &ips->ips_priority_xoff_tx[i],
384 385 init);
385 386 i40e_stat_get_uint32(i40e, I40E_GLPRT_RXON2OFFCNT(port, i),
386 387 &ipk->ipk_priority_xon_2_xoff[i],
387 388 &ips->ips_priority_xon_2_xoff[i],
388 389 init);
389 390 }
390 391
391 392 i40e_stat_get_uint32(i40e, I40E_GLPRT_CRCERRS(port),
392 393 &ipk->ipk_crc_errors, &ips->ips_crc_errors, init);
393 394 i40e_stat_get_uint32(i40e, I40E_GLPRT_ILLERRC(port),
394 395 &ipk->ipk_illegal_bytes, &ips->ips_illegal_bytes, init);
395 396 i40e_stat_get_uint32(i40e, I40E_GLPRT_MLFC(port),
396 397 &ipk->ipk_mac_local_faults, &ips->ips_mac_local_faults, init);
397 398 i40e_stat_get_uint32(i40e, I40E_GLPRT_MRFC(port),
398 399 &ipk->ipk_mac_remote_faults, &ips->ips_mac_remote_faults, init);
399 400 i40e_stat_get_uint32(i40e, I40E_GLPRT_RLEC(port),
400 401 &ipk->ipk_rx_length_errors, &ips->ips_rx_length_errors, init);
401 402 i40e_stat_get_uint32(i40e, I40E_GLPRT_RUC(port),
402 403 &ipk->ipk_rx_undersize, &ips->ips_rx_undersize, init);
403 404 i40e_stat_get_uint32(i40e, I40E_GLPRT_RFC(port),
404 405 &ipk->ipk_rx_fragments, &ips->ips_rx_fragments, init);
405 406 i40e_stat_get_uint32(i40e, I40E_GLPRT_ROC(port),
406 407 &ipk->ipk_rx_oversize, &ips->ips_rx_oversize, init);
407 408 i40e_stat_get_uint32(i40e, I40E_GLPRT_RJC(port),
408 409 &ipk->ipk_rx_jabber, &ips->ips_rx_jabber, init);
409 410 i40e_stat_get_uint32(i40e, I40E_GLPRT_RDPC(port),
410 411 &ipk->ipk_rx_discards, &ips->ips_rx_discards, init);
411 412 i40e_stat_get_uint32(i40e, I40E_GLPRT_LDPC(port),
412 413 &ipk->ipk_rx_vm_discards, &ips->ips_rx_vm_discards, init);
413 414 i40e_stat_get_uint32(i40e, I40E_GLPRT_MSPDC(port),
414 415 &ipk->ipk_rx_short_discards, &ips->ips_rx_short_discards, init);
415 416 i40e_stat_get_uint32(i40e, I40E_GLPRT_TDOLD(port),
416 417 &ipk->ipk_tx_dropped_link_down, &ips->ips_tx_dropped_link_down,
417 418 init);
418 419 i40e_stat_get_uint32(i40e, I40E_GLPRT_RUPP(port),
419 420 &ipk->ipk_rx_unknown_protocol, &ips->ips_rx_unknown_protocol, init);
420 421
421 422 /* 64-bit */
422 423 i40e_stat_get_uint48(i40e, I40E_GL_RXERR1_L(port), &ipk->ipk_rx_err1,
423 424 &ips->ips_rx_err1, init);
424 425 i40e_stat_get_uint48(i40e, I40E_GL_RXERR2_L(port), &ipk->ipk_rx_err2,
425 426 &ips->ips_rx_err2, init);
426 427
427 428 mutex_exit(&i40e->i40e_stat_lock);
428 429
429 430 /*
430 431 * We follow ixgbe's lead here and that if a kstat update didn't work
431 432 * 100% then we mark service unaffected as opposed to when fetching
432 433 * things for MAC directly.
433 434 */
434 435 if (i40e_check_acc_handle(i40e->i40e_osdep_space.ios_reg_handle) !=
435 436 DDI_FM_OK) {
436 437 ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_UNAFFECTED);
437 438 }
438 439 }
439 440
440 441 static int
441 442 i40e_stat_pf_kstat_update(kstat_t *ksp, int rw)
442 443 {
443 444 i40e_t *i40e;
444 445
445 446 if (rw == KSTAT_WRITE)
446 447 return (EACCES);
447 448
448 449 i40e = ksp->ks_private;
449 450 i40e_stat_pf_update(i40e, B_FALSE);
450 451 return (0);
451 452 }
452 453
453 454
454 455 static boolean_t
455 456 i40e_stat_pf_init(i40e_t *i40e)
456 457 {
457 458 kstat_t *ksp;
458 459 i40e_pf_kstats_t *ipk;
459 460
460 461 ksp = kstat_create(I40E_MODULE_NAME, ddi_get_instance(i40e->i40e_dip),
461 462 "pfstats", "net", KSTAT_TYPE_NAMED,
462 463 sizeof (i40e_pf_kstats_t) / sizeof (kstat_named_t), 0);
463 464 if (ksp == NULL) {
464 465 i40e_error(i40e, "Could not create kernel statistics.");
465 466 return (B_FALSE);
466 467 }
467 468
468 469 i40e->i40e_pf_kstat = ksp;
469 470 ipk = ksp->ks_data;
470 471 ksp->ks_update = i40e_stat_pf_kstat_update;
471 472 ksp->ks_private = i40e;
472 473
473 474 kstat_named_init(&ipk->ipk_rx_bytes, "rx_bytes",
474 475 KSTAT_DATA_UINT64);
475 476 kstat_named_init(&ipk->ipk_rx_unicast, "rx_unicast",
476 477 KSTAT_DATA_UINT64);
477 478 kstat_named_init(&ipk->ipk_rx_multicast, "rx_multicast",
478 479 KSTAT_DATA_UINT64);
479 480 kstat_named_init(&ipk->ipk_rx_broadcast, "rx_broadcast",
480 481 KSTAT_DATA_UINT64);
481 482 kstat_named_init(&ipk->ipk_tx_bytes, "tx_bytes",
482 483 KSTAT_DATA_UINT64);
483 484 kstat_named_init(&ipk->ipk_tx_unicast, "tx_unicast",
484 485 KSTAT_DATA_UINT64);
485 486 kstat_named_init(&ipk->ipk_tx_multicast, "tx_multicast",
486 487 KSTAT_DATA_UINT64);
487 488 kstat_named_init(&ipk->ipk_tx_broadcast, "tx_broadcast",
488 489 KSTAT_DATA_UINT64);
489 490
490 491 kstat_named_init(&ipk->ipk_rx_size_64, "rx_size_64",
491 492 KSTAT_DATA_UINT64);
492 493 kstat_named_init(&ipk->ipk_rx_size_127, "rx_size_127",
493 494 KSTAT_DATA_UINT64);
494 495 kstat_named_init(&ipk->ipk_rx_size_255, "rx_size_255",
495 496 KSTAT_DATA_UINT64);
496 497 kstat_named_init(&ipk->ipk_rx_size_511, "rx_size_511",
497 498 KSTAT_DATA_UINT64);
498 499 kstat_named_init(&ipk->ipk_rx_size_1023, "rx_size_1023",
499 500 KSTAT_DATA_UINT64);
500 501 kstat_named_init(&ipk->ipk_rx_size_1522, "rx_size_1522",
501 502 KSTAT_DATA_UINT64);
502 503 kstat_named_init(&ipk->ipk_rx_size_9522, "rx_size_9522",
503 504 KSTAT_DATA_UINT64);
504 505
505 506 kstat_named_init(&ipk->ipk_tx_size_64, "tx_size_64",
506 507 KSTAT_DATA_UINT64);
507 508 kstat_named_init(&ipk->ipk_tx_size_127, "tx_size_127",
508 509 KSTAT_DATA_UINT64);
509 510 kstat_named_init(&ipk->ipk_tx_size_255, "tx_size_255",
510 511 KSTAT_DATA_UINT64);
511 512 kstat_named_init(&ipk->ipk_tx_size_511, "tx_size_511",
512 513 KSTAT_DATA_UINT64);
513 514 kstat_named_init(&ipk->ipk_tx_size_1023, "tx_size_1023",
514 515 KSTAT_DATA_UINT64);
515 516 kstat_named_init(&ipk->ipk_tx_size_1522, "tx_size_1522",
516 517 KSTAT_DATA_UINT64);
517 518 kstat_named_init(&ipk->ipk_tx_size_9522, "tx_size_9522",
518 519 KSTAT_DATA_UINT64);
519 520
520 521 kstat_named_init(&ipk->ipk_link_xon_rx, "link_xon_rx",
521 522 KSTAT_DATA_UINT64);
522 523 kstat_named_init(&ipk->ipk_link_xoff_rx, "link_xoff_rx",
523 524 KSTAT_DATA_UINT64);
524 525 kstat_named_init(&ipk->ipk_link_xon_tx, "link_xon_tx",
525 526 KSTAT_DATA_UINT64);
526 527 kstat_named_init(&ipk->ipk_link_xoff_tx, "link_xoff_tx",
527 528 KSTAT_DATA_UINT64);
528 529
529 530 kstat_named_init(&ipk->ipk_priority_xon_rx[0], "priority_xon_rx[0]",
530 531 KSTAT_DATA_UINT64);
531 532 kstat_named_init(&ipk->ipk_priority_xoff_rx[0], "priority_xoff_rx[0]",
532 533 KSTAT_DATA_UINT64);
533 534 kstat_named_init(&ipk->ipk_priority_xon_tx[0], "priority_xon_tx[0]",
534 535 KSTAT_DATA_UINT64);
535 536 kstat_named_init(&ipk->ipk_priority_xoff_tx[0], "priority_xoff_tx[0]",
536 537 KSTAT_DATA_UINT64);
537 538 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[0],
538 539 "priority_xon_2_xoff[0]",
539 540 KSTAT_DATA_UINT64);
540 541
541 542 kstat_named_init(&ipk->ipk_priority_xon_rx[1], "priority_xon_rx[1]",
542 543 KSTAT_DATA_UINT64);
543 544 kstat_named_init(&ipk->ipk_priority_xoff_rx[1], "priority_xoff_rx[1]",
544 545 KSTAT_DATA_UINT64);
545 546 kstat_named_init(&ipk->ipk_priority_xon_tx[1], "priority_xon_tx[1]",
546 547 KSTAT_DATA_UINT64);
547 548 kstat_named_init(&ipk->ipk_priority_xoff_tx[1], "priority_xoff_tx[1]",
548 549 KSTAT_DATA_UINT64);
549 550 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[1],
550 551 "priority_xon_2_xoff[1]",
551 552 KSTAT_DATA_UINT64);
552 553
553 554 kstat_named_init(&ipk->ipk_priority_xon_rx[2], "priority_xon_rx[2]",
554 555 KSTAT_DATA_UINT64);
555 556 kstat_named_init(&ipk->ipk_priority_xoff_rx[2], "priority_xoff_rx[2]",
556 557 KSTAT_DATA_UINT64);
557 558 kstat_named_init(&ipk->ipk_priority_xon_tx[2], "priority_xon_tx[2]",
558 559 KSTAT_DATA_UINT64);
559 560 kstat_named_init(&ipk->ipk_priority_xoff_tx[2], "priority_xoff_tx[2]",
560 561 KSTAT_DATA_UINT64);
561 562 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[2],
562 563 "priority_xon_2_xoff[2]",
563 564 KSTAT_DATA_UINT64);
564 565
565 566 kstat_named_init(&ipk->ipk_priority_xon_rx[3], "priority_xon_rx[3]",
566 567 KSTAT_DATA_UINT64);
567 568 kstat_named_init(&ipk->ipk_priority_xoff_rx[3], "priority_xoff_rx[3]",
568 569 KSTAT_DATA_UINT64);
569 570 kstat_named_init(&ipk->ipk_priority_xon_tx[3], "priority_xon_tx[3]",
570 571 KSTAT_DATA_UINT64);
571 572 kstat_named_init(&ipk->ipk_priority_xoff_tx[3], "priority_xoff_tx[3]",
572 573 KSTAT_DATA_UINT64);
573 574 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[3],
574 575 "priority_xon_2_xoff[3]",
575 576 KSTAT_DATA_UINT64);
576 577
577 578 kstat_named_init(&ipk->ipk_priority_xon_rx[4], "priority_xon_rx[4]",
578 579 KSTAT_DATA_UINT64);
579 580 kstat_named_init(&ipk->ipk_priority_xoff_rx[4], "priority_xoff_rx[4]",
580 581 KSTAT_DATA_UINT64);
581 582 kstat_named_init(&ipk->ipk_priority_xon_tx[4], "priority_xon_tx[4]",
582 583 KSTAT_DATA_UINT64);
583 584 kstat_named_init(&ipk->ipk_priority_xoff_tx[4], "priority_xoff_tx[4]",
584 585 KSTAT_DATA_UINT64);
585 586 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[4],
586 587 "priority_xon_2_xoff[4]",
587 588 KSTAT_DATA_UINT64);
588 589
589 590 kstat_named_init(&ipk->ipk_priority_xon_rx[5], "priority_xon_rx[5]",
590 591 KSTAT_DATA_UINT64);
591 592 kstat_named_init(&ipk->ipk_priority_xoff_rx[5], "priority_xoff_rx[5]",
592 593 KSTAT_DATA_UINT64);
593 594 kstat_named_init(&ipk->ipk_priority_xon_tx[5], "priority_xon_tx[5]",
594 595 KSTAT_DATA_UINT64);
595 596 kstat_named_init(&ipk->ipk_priority_xoff_tx[5], "priority_xoff_tx[5]",
596 597 KSTAT_DATA_UINT64);
597 598 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[5],
598 599 "priority_xon_2_xoff[5]",
599 600 KSTAT_DATA_UINT64);
600 601
601 602 kstat_named_init(&ipk->ipk_priority_xon_rx[6], "priority_xon_rx[6]",
602 603 KSTAT_DATA_UINT64);
603 604 kstat_named_init(&ipk->ipk_priority_xoff_rx[6], "priority_xoff_rx[6]",
604 605 KSTAT_DATA_UINT64);
605 606 kstat_named_init(&ipk->ipk_priority_xon_tx[6], "priority_xon_tx[6]",
606 607 KSTAT_DATA_UINT64);
607 608 kstat_named_init(&ipk->ipk_priority_xoff_tx[6], "priority_xoff_tx[6]",
608 609 KSTAT_DATA_UINT64);
609 610 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[6],
610 611 "priority_xon_2_xoff[6]",
611 612 KSTAT_DATA_UINT64);
612 613
613 614 kstat_named_init(&ipk->ipk_priority_xon_rx[7], "priority_xon_rx[7]",
614 615 KSTAT_DATA_UINT64);
615 616 kstat_named_init(&ipk->ipk_priority_xoff_rx[7], "priority_xoff_rx[7]",
616 617 KSTAT_DATA_UINT64);
617 618 kstat_named_init(&ipk->ipk_priority_xon_tx[7], "priority_xon_tx[7]",
618 619 KSTAT_DATA_UINT64);
619 620 kstat_named_init(&ipk->ipk_priority_xoff_tx[7], "priority_xoff_tx[7]",
620 621 KSTAT_DATA_UINT64);
621 622 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[7],
622 623 "priority_xon_2_xoff[7]",
623 624 KSTAT_DATA_UINT64);
624 625
625 626 kstat_named_init(&ipk->ipk_crc_errors, "crc_errors",
626 627 KSTAT_DATA_UINT64);
627 628 kstat_named_init(&ipk->ipk_illegal_bytes, "illegal_bytes",
628 629 KSTAT_DATA_UINT64);
629 630 kstat_named_init(&ipk->ipk_mac_local_faults, "mac_local_faults",
630 631 KSTAT_DATA_UINT64);
631 632 kstat_named_init(&ipk->ipk_mac_remote_faults, "mac_remote_faults",
632 633 KSTAT_DATA_UINT64);
633 634 kstat_named_init(&ipk->ipk_rx_length_errors, "rx_length_errors",
634 635 KSTAT_DATA_UINT64);
635 636 kstat_named_init(&ipk->ipk_rx_undersize, "rx_undersize",
636 637 KSTAT_DATA_UINT64);
637 638 kstat_named_init(&ipk->ipk_rx_fragments, "rx_fragments",
638 639 KSTAT_DATA_UINT64);
639 640 kstat_named_init(&ipk->ipk_rx_oversize, "rx_oversize",
640 641 KSTAT_DATA_UINT64);
641 642 kstat_named_init(&ipk->ipk_rx_jabber, "rx_jabber",
642 643 KSTAT_DATA_UINT64);
643 644 kstat_named_init(&ipk->ipk_rx_discards, "rx_discards",
644 645 KSTAT_DATA_UINT64);
645 646 kstat_named_init(&ipk->ipk_rx_vm_discards, "rx_vm_discards",
646 647 KSTAT_DATA_UINT64);
647 648 kstat_named_init(&ipk->ipk_rx_short_discards, "rx_short_discards",
648 649 KSTAT_DATA_UINT64);
649 650 kstat_named_init(&ipk->ipk_tx_dropped_link_down, "tx_dropped_link_down",
650 651 KSTAT_DATA_UINT64);
651 652 kstat_named_init(&ipk->ipk_rx_unknown_protocol, "rx_unknown_protocol",
652 653 KSTAT_DATA_UINT64);
653 654 kstat_named_init(&ipk->ipk_rx_err1, "rx_err1",
654 655 KSTAT_DATA_UINT64);
655 656 kstat_named_init(&ipk->ipk_rx_err2, "rx_err2",
656 657 KSTAT_DATA_UINT64);
657 658
658 659
659 660 bzero(&i40e->i40e_pf_stat, sizeof (i40e_pf_stats_t));
660 661 i40e_stat_pf_update(i40e, B_TRUE);
661 662
662 663 kstat_install(i40e->i40e_pf_kstat);
663 664
664 665 return (B_TRUE);
665 666 }
666 667
667 668 void
668 669 i40e_stats_fini(i40e_t *i40e)
669 670 {
670 671 #ifdef DEBUG
671 672 for (uint_t i = 0; i < i40e->i40e_num_rx_groups; i++) {
672 673 ASSERT3P(i40e->i40e_vsis[i].iv_kstats, ==, NULL);
673 674 }
674 675 #endif
675 676
676 677 if (i40e->i40e_pf_kstat != NULL) {
677 678 kstat_delete(i40e->i40e_pf_kstat);
678 679 i40e->i40e_pf_kstat = NULL;
679 680 }
680 681
681 682 mutex_destroy(&i40e->i40e_stat_lock);
682 683 }
683 684
684 685 boolean_t
685 686 i40e_stats_init(i40e_t *i40e)
686 687 {
687 688 mutex_init(&i40e->i40e_stat_lock, NULL, MUTEX_DRIVER, NULL);
688 689 if (i40e_stat_pf_init(i40e) == B_FALSE) {
689 690 mutex_destroy(&i40e->i40e_stat_lock);
690 691 return (B_FALSE);
691 692 }
692 693
693 694 return (B_TRUE);
694 695 }
695 696
696 697 /*
697 698 * For Nemo/GLDv3.
698 699 */
699 700 int
700 701 i40e_m_stat(void *arg, uint_t stat, uint64_t *val)
701 702 {
702 703 i40e_t *i40e = (i40e_t *)arg;
703 704 i40e_hw_t *hw = &i40e->i40e_hw_space;
704 705 int port = i40e->i40e_hw_space.port;
705 706 i40e_pf_stats_t *ips;
706 707 i40e_pf_kstats_t *ipk;
707 708
708 709
709 710 ASSERT(i40e->i40e_pf_kstat != NULL);
710 711 ips = &i40e->i40e_pf_stat;
711 712 ipk = i40e->i40e_pf_kstat->ks_data;
712 713
713 714 /*
714 715 * We need both locks, as various stats are protected by different
715 716 * things here.
716 717 */
717 718 mutex_enter(&i40e->i40e_general_lock);
718 719
719 720 if (i40e->i40e_state & I40E_SUSPENDED) {
720 721 mutex_exit(&i40e->i40e_general_lock);
721 722 return (ECANCELED);
722 723 }
723 724
724 725 mutex_enter(&i40e->i40e_stat_lock);
725 726
726 727 /*
727 728 * Unfortunately the GLDv3 conflates two rather different things here.
728 729 * We're combining statistics about the physical port represented by
729 730 * this instance with statistics that describe the properties of the
730 731 * logical interface. As such, we're going to use the various aspects of
731 732 * the port to describe these stats as they represent what the physical
732 733 * instance is doing, even though that that means some tools may be
733 734 * confused and that to see the logical traffic on the interface itself
734 735 * sans VNICs and the like will require more work.
735 736 *
736 737 * Stats which are not listed in this switch statement are unimplemented
737 738 * at this time in hardware or don't currently apply to the device.
738 739 */
739 740 switch (stat) {
740 741 /* MIB-II stats (RFC 1213 and RFC 1573) */
741 742 case MAC_STAT_IFSPEED:
742 743 *val = i40e->i40e_link_speed * 1000000ull;
743 744 break;
744 745 case MAC_STAT_MULTIRCV:
745 746 i40e_stat_get_uint48(i40e, I40E_GLPRT_MPRCL(port),
746 747 &ipk->ipk_rx_multicast, &ips->ips_rx_multicast, B_FALSE);
747 748 *val = ipk->ipk_rx_multicast.value.ui64;
748 749 break;
749 750 case MAC_STAT_BRDCSTRCV:
750 751 i40e_stat_get_uint48(i40e, I40E_GLPRT_BPRCL(port),
751 752 &ipk->ipk_rx_broadcast, &ips->ips_rx_broadcast, B_FALSE);
752 753 *val = ipk->ipk_rx_broadcast.value.ui64;
753 754 break;
754 755 case MAC_STAT_MULTIXMT:
755 756 i40e_stat_get_uint48(i40e, I40E_GLPRT_MPTCL(port),
756 757 &ipk->ipk_tx_multicast, &ips->ips_tx_multicast, B_FALSE);
757 758 *val = ipk->ipk_tx_multicast.value.ui64;
758 759 break;
759 760 case MAC_STAT_BRDCSTXMT:
760 761 i40e_stat_get_uint48(i40e, I40E_GLPRT_BPTCL(port),
761 762 &ipk->ipk_tx_broadcast, &ips->ips_tx_broadcast, B_FALSE);
762 763 *val = ipk->ipk_tx_broadcast.value.ui64;
763 764 break;
764 765 case MAC_STAT_NORCVBUF:
765 766 i40e_stat_get_uint32(i40e, I40E_GLPRT_RDPC(port),
766 767 &ipk->ipk_rx_discards, &ips->ips_rx_discards, B_FALSE);
767 768 i40e_stat_get_uint32(i40e, I40E_GLPRT_LDPC(port),
768 769 &ipk->ipk_rx_vm_discards, &ips->ips_rx_vm_discards,
769 770 B_FALSE);
770 771 *val = ipk->ipk_rx_discards.value.ui64 +
771 772 ipk->ipk_rx_vm_discards.value.ui64;
772 773 break;
773 774 /*
774 775 * Note, that some RXERR2 stats are also duplicated by the switch filter
775 776 * stats; however, since we're not using those at this time, it seems
776 777 * reasonable to include them.
777 778 */
778 779 case MAC_STAT_IERRORS:
779 780 i40e_stat_get_uint32(i40e, I40E_GLPRT_CRCERRS(port),
780 781 &ipk->ipk_crc_errors, &ips->ips_crc_errors, B_FALSE);
781 782 i40e_stat_get_uint32(i40e, I40E_GLPRT_ILLERRC(port),
782 783 &ipk->ipk_illegal_bytes, &ips->ips_illegal_bytes, B_FALSE);
783 784 i40e_stat_get_uint32(i40e, I40E_GLPRT_RLEC(port),
784 785 &ipk->ipk_rx_length_errors, &ips->ips_rx_length_errors,
785 786 B_FALSE);
786 787 i40e_stat_get_uint48(i40e, I40E_GL_RXERR1_L(port),
787 788 &ipk->ipk_rx_err1, &ips->ips_rx_err1, B_FALSE);
788 789 i40e_stat_get_uint48(i40e, I40E_GL_RXERR2_L(port),
789 790 &ipk->ipk_rx_err2, &ips->ips_rx_err2, B_FALSE);
790 791
791 792 *val = ipk->ipk_crc_errors.value.ui64 +
792 793 ipk->ipk_illegal_bytes.value.ui64 +
793 794 ipk->ipk_rx_length_errors.value.ui64 +
794 795 ipk->ipk_rx_err1.value.ui64 +
795 796 ipk->ipk_rx_err2.value.ui64;
796 797 break;
797 798 case MAC_STAT_UNKNOWNS:
798 799 i40e_stat_get_uint32(i40e, I40E_GLPRT_RUPP(port),
799 800 &ipk->ipk_rx_unknown_protocol,
800 801 &ips->ips_rx_unknown_protocol,
801 802 B_FALSE);
802 803 *val = ipk->ipk_rx_unknown_protocol.value.ui64;
803 804 break;
804 805 case MAC_STAT_RBYTES:
805 806 i40e_stat_get_uint48(i40e, I40E_GLPRT_GORCL(port),
806 807 &ipk->ipk_rx_bytes, &ips->ips_rx_bytes, B_FALSE);
807 808 *val = ipk->ipk_rx_bytes.value.ui64;
808 809 break;
809 810 case MAC_STAT_IPACKETS:
810 811 i40e_stat_get_uint48(i40e, I40E_GLPRT_UPRCL(port),
811 812 &ipk->ipk_rx_unicast, &ips->ips_rx_unicast, B_FALSE);
812 813 i40e_stat_get_uint48(i40e, I40E_GLPRT_MPRCL(port),
813 814 &ipk->ipk_rx_multicast, &ips->ips_rx_multicast, B_FALSE);
814 815 i40e_stat_get_uint48(i40e, I40E_GLPRT_BPRCL(port),
815 816 &ipk->ipk_rx_broadcast, &ips->ips_rx_broadcast, B_FALSE);
816 817 *val = ipk->ipk_rx_unicast.value.ui64 +
817 818 ipk->ipk_rx_multicast.value.ui64 +
818 819 ipk->ipk_rx_broadcast.value.ui64;
819 820 break;
820 821 case MAC_STAT_OBYTES:
821 822 i40e_stat_get_uint48(i40e, I40E_GLPRT_GOTCL(port),
822 823 &ipk->ipk_tx_bytes, &ips->ips_tx_bytes, B_FALSE);
823 824 *val = ipk->ipk_tx_bytes.value.ui64;
824 825 break;
825 826 case MAC_STAT_OPACKETS:
826 827 i40e_stat_get_uint48(i40e, I40E_GLPRT_UPTCL(port),
827 828 &ipk->ipk_tx_unicast, &ips->ips_tx_unicast, B_FALSE);
828 829 i40e_stat_get_uint48(i40e, I40E_GLPRT_MPTCL(port),
829 830 &ipk->ipk_tx_multicast, &ips->ips_tx_multicast, B_FALSE);
830 831 i40e_stat_get_uint48(i40e, I40E_GLPRT_BPTCL(port),
831 832 &ipk->ipk_tx_broadcast, &ips->ips_tx_broadcast, B_FALSE);
832 833 *val = ipk->ipk_tx_unicast.value.ui64 +
833 834 ipk->ipk_tx_multicast.value.ui64 +
834 835 ipk->ipk_tx_broadcast.value.ui64;
835 836 break;
836 837 case MAC_STAT_UNDERFLOWS:
837 838 i40e_stat_get_uint32(i40e, I40E_GLPRT_RUC(port),
838 839 &ipk->ipk_rx_undersize, &ips->ips_rx_undersize, B_FALSE);
839 840 i40e_stat_get_uint32(i40e, I40E_GLPRT_RFC(port),
840 841 &ipk->ipk_rx_fragments, &ips->ips_rx_fragments, B_FALSE);
841 842 i40e_stat_get_uint32(i40e, I40E_GLPRT_MSPDC(port),
842 843 &ipk->ipk_rx_short_discards, &ips->ips_rx_short_discards,
843 844 B_FALSE);
844 845 *val = ipk->ipk_rx_undersize.value.ui64 +
845 846 ipk->ipk_rx_fragments.value.ui64 +
846 847 ipk->ipk_rx_short_discards.value.ui64;
847 848 break;
848 849 case MAC_STAT_OVERFLOWS:
849 850 i40e_stat_get_uint32(i40e, I40E_GLPRT_ROC(port),
850 851 &ipk->ipk_rx_oversize, &ips->ips_rx_oversize, B_FALSE);
851 852 i40e_stat_get_uint32(i40e, I40E_GLPRT_RJC(port),
852 853 &ipk->ipk_rx_jabber, &ips->ips_rx_jabber, B_FALSE);
853 854 *val = ipk->ipk_rx_oversize.value.ui64 +
854 855 ipk->ipk_rx_fragments.value.ui64;
855 856 break;
856 857
857 858 /* RFC 1643 stats */
858 859 case ETHER_STAT_FCS_ERRORS:
859 860 i40e_stat_get_uint32(i40e, I40E_GLPRT_CRCERRS(port),
860 861 &ipk->ipk_crc_errors, &ips->ips_crc_errors, B_FALSE);
861 862 *val = ipk->ipk_crc_errors.value.ui64;
862 863 break;
863 864 case ETHER_STAT_TOOLONG_ERRORS:
864 865 i40e_stat_get_uint32(i40e, I40E_GLPRT_ROC(port),
865 866 &ipk->ipk_rx_oversize, &ips->ips_rx_oversize, B_FALSE);
866 867 *val = ipk->ipk_rx_oversize.value.ui64;
867 868 break;
868 869 case ETHER_STAT_MACRCV_ERRORS:
869 870 i40e_stat_get_uint32(i40e, I40E_GLPRT_ILLERRC(port),
870 871 &ipk->ipk_illegal_bytes, &ips->ips_illegal_bytes, B_FALSE);
871 872 i40e_stat_get_uint32(i40e, I40E_GLPRT_RLEC(port),
872 873 &ipk->ipk_rx_length_errors, &ips->ips_rx_length_errors,
873 874 B_FALSE);
874 875 i40e_stat_get_uint32(i40e, I40E_GLPRT_RFC(port),
875 876 &ipk->ipk_rx_fragments, &ips->ips_rx_fragments, B_FALSE);
876 877 *val = ipk->ipk_illegal_bytes.value.ui64 +
877 878 ipk->ipk_rx_length_errors.value.ui64 +
878 879 ipk->ipk_rx_fragments.value.ui64;
879 880 break;
880 881 /* MII/GMII stats */
881 882
882 883 /*
883 884 * The receiver address is apparently the same as the port number.
884 885 */
885 886 case ETHER_STAT_XCVR_ADDR:
886 887 /* The Receiver address is apparently the same as the port */
887 888 *val = i40e->i40e_hw_space.port;
888 889 break;
889 890 case ETHER_STAT_XCVR_ID:
890 891 switch (hw->phy.media_type) {
891 892 case I40E_MEDIA_TYPE_BASET:
892 893 /*
893 894 * Transform the data here into the ID. Note, generally
894 895 * the revision is left out.
895 896 */
896 897 *val = i40e->i40e_phy.phy_id[3] << 24 |
897 898 i40e->i40e_phy.phy_id[2] << 16 |
898 899 i40e->i40e_phy.phy_id[1] << 8;
899 900 break;
900 901 case I40E_MEDIA_TYPE_FIBER:
901 902 case I40E_MEDIA_TYPE_BACKPLANE:
902 903 case I40E_MEDIA_TYPE_CX4:
903 904 case I40E_MEDIA_TYPE_DA:
904 905 case I40E_MEDIA_TYPE_VIRTUAL:
905 906 *val = i40e->i40e_phy.phy_id[0] |
906 907 i40e->i40e_phy.phy_id[1] << 8 |
907 908 i40e->i40e_phy.phy_id[2] << 16;
908 909 break;
909 910 case I40E_MEDIA_TYPE_UNKNOWN:
910 911 default:
911 912 goto unimpl;
912 913 }
913 914 break;
914 915 case ETHER_STAT_XCVR_INUSE:
915 916 switch (hw->phy.link_info.phy_type) {
916 917 case I40E_PHY_TYPE_100BASE_TX:
917 918 *val = XCVR_100T2;
918 919 break;
919 920 case I40E_PHY_TYPE_1000BASE_T:
920 921 *val = XCVR_1000T;
921 922 break;
922 923 default:
923 924 *val = XCVR_UNDEFINED;
924 925 break;
925 926 }
926 927 break;
927 928
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928 929 /*
929 930 * This group answers the question of do we support a given speed in
930 931 * theory.
931 932 */
932 933 case ETHER_STAT_CAP_100FDX:
933 934 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_100MB) != 0;
934 935 break;
935 936 case ETHER_STAT_CAP_1000FDX:
936 937 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_1GB) != 0;
937 938 break;
939 + case ETHER_STAT_CAP_2500FDX:
940 + *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_2_5GB) != 0;
941 + break;
942 + case ETHER_STAT_CAP_5000FDX:
943 + *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_5GB) != 0;
944 + break;
938 945 case ETHER_STAT_CAP_10GFDX:
939 946 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_10GB) != 0;
940 947 break;
941 948 case ETHER_STAT_CAP_25GFDX:
942 949 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_25GB) != 0;
943 950 break;
944 951 case ETHER_STAT_CAP_40GFDX:
945 952 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_40GB) != 0;
946 953 break;
947 954
948 955 /*
949 956 * These ask are we currently advertising these speeds and abilities.
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950 957 * Until we support setting these because we're working with a copper
951 958 * PHY, then the only things we advertise are based on the link PHY
952 959 * speeds. In other words, we advertise everything we support.
953 960 */
954 961 case ETHER_STAT_ADV_CAP_100FDX:
955 962 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_100MB) != 0;
956 963 break;
957 964 case ETHER_STAT_ADV_CAP_1000FDX:
958 965 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_1GB) != 0;
959 966 break;
967 + case ETHER_STAT_ADV_CAP_2500FDX:
968 + *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_2_5GB) != 0;
969 + break;
970 + case ETHER_STAT_ADV_CAP_5000FDX:
971 + *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_5GB) != 0;
972 + break;
960 973 case ETHER_STAT_ADV_CAP_10GFDX:
961 974 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_10GB) != 0;
962 975 break;
963 976 case ETHER_STAT_ADV_CAP_25GFDX:
964 977 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_25GB) != 0;
965 978 break;
966 979 case ETHER_STAT_ADV_CAP_40GFDX:
967 980 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_40GB) != 0;
968 981 break;
969 982
970 983 /*
971 984 * These ask if the peer supports these speeds, e.g. what did they tell
972 985 * us in auto-negotiation. Unfortunately, hardware doesn't appear to
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973 986 * give us a way to determine whether or not they actually support
974 987 * something, only what they have enabled. This means that all we can
975 988 * tell the user is the speed that we're currently at, unfortunately.
976 989 */
977 990 case ETHER_STAT_LP_CAP_100FDX:
978 991 *val = i40e->i40e_link_speed == 100;
979 992 break;
980 993 case ETHER_STAT_LP_CAP_1000FDX:
981 994 *val = i40e->i40e_link_speed == 1000;
982 995 break;
996 + case ETHER_STAT_LP_CAP_2500FDX:
997 + *val = i40e->i40e_link_speed == 2500;
998 + break;
999 + case ETHER_STAT_LP_CAP_5000FDX:
1000 + *val = i40e->i40e_link_speed == 5000;
1001 + break;
983 1002 case ETHER_STAT_LP_CAP_10GFDX:
984 1003 *val = i40e->i40e_link_speed == 10000;
985 1004 break;
986 1005 case ETHER_STAT_LP_CAP_25GFDX:
987 1006 *val = i40e->i40e_link_speed == 25000;
988 1007 break;
989 1008 case ETHER_STAT_LP_CAP_40GFDX:
990 1009 *val = i40e->i40e_link_speed == 40000;
991 1010 break;
992 1011
993 1012 /*
994 1013 * Statistics for unsupported speeds. Note that these often have the
995 1014 * same constraints as the other ones. For example, we can't answer the
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996 1015 * question of the ETHER_STAT_LP_CAP family because hardware doesn't
997 1016 * give us any way of knowing whether or not it does.
998 1017 */
999 1018 case ETHER_STAT_CAP_100HDX:
1000 1019 case ETHER_STAT_CAP_1000HDX:
1001 1020 case ETHER_STAT_CAP_10FDX:
1002 1021 case ETHER_STAT_CAP_10HDX:
1003 1022 case ETHER_STAT_CAP_100T4:
1004 1023 case ETHER_STAT_CAP_100GFDX:
1005 1024 case ETHER_STAT_CAP_50GFDX:
1006 - case ETHER_STAT_CAP_2500FDX:
1007 - case ETHER_STAT_CAP_5000FDX:
1008 1025 case ETHER_STAT_ADV_CAP_1000HDX:
1009 1026 case ETHER_STAT_ADV_CAP_100HDX:
1010 1027 case ETHER_STAT_ADV_CAP_10FDX:
1011 1028 case ETHER_STAT_ADV_CAP_10HDX:
1012 1029 case ETHER_STAT_ADV_CAP_100T4:
1013 1030 case ETHER_STAT_ADV_CAP_100GFDX:
1014 1031 case ETHER_STAT_ADV_CAP_50GFDX:
1015 - case ETHER_STAT_ADV_CAP_2500FDX:
1016 - case ETHER_STAT_ADV_CAP_5000FDX:
1017 1032 case ETHER_STAT_LP_CAP_1000HDX:
1018 1033 case ETHER_STAT_LP_CAP_100HDX:
1019 1034 case ETHER_STAT_LP_CAP_10FDX:
1020 1035 case ETHER_STAT_LP_CAP_10HDX:
1021 1036 case ETHER_STAT_LP_CAP_100T4:
1022 1037 case ETHER_STAT_LP_CAP_100GFDX:
1023 1038 case ETHER_STAT_LP_CAP_50GFDX:
1024 - case ETHER_STAT_LP_CAP_2500FDX:
1025 - case ETHER_STAT_LP_CAP_5000FDX:
1026 1039 *val = 0;
1027 1040 break;
1028 1041
1029 1042 case ETHER_STAT_LINK_DUPLEX:
1030 1043 *val = i40e->i40e_link_duplex;
1031 1044 break;
1032 1045 case ETHER_STAT_TOOSHORT_ERRORS:
1033 1046 i40e_stat_get_uint32(i40e, I40E_GLPRT_RUC(port),
1034 1047 &ipk->ipk_rx_undersize, &ips->ips_rx_undersize, B_FALSE);
1035 1048
1036 1049 i40e_stat_get_uint32(i40e, I40E_GLPRT_MSPDC(port),
1037 1050 &ipk->ipk_rx_short_discards, &ips->ips_rx_short_discards,
1038 1051 B_FALSE);
1039 1052 *val = ipk->ipk_rx_undersize.value.ui64 +
1040 1053 ipk->ipk_rx_short_discards.value.ui64;
1041 1054 break;
1042 1055 case ETHER_STAT_JABBER_ERRORS:
1043 1056 i40e_stat_get_uint32(i40e, I40E_GLPRT_RJC(port),
1044 1057 &ipk->ipk_rx_jabber, &ips->ips_rx_jabber, B_FALSE);
1045 1058 *val = ipk->ipk_rx_jabber.value.ui64;
1046 1059 break;
1047 1060
1048 1061 /*
1049 1062 * Non-Link speed related capabilities.
1050 1063 */
1051 1064 case ETHER_STAT_CAP_AUTONEG:
1052 1065 *val = 1;
1053 1066 break;
1054 1067
1055 1068 case ETHER_STAT_ADV_CAP_AUTONEG:
1056 1069 *val = 1;
1057 1070 break;
1058 1071
1059 1072 case ETHER_STAT_LP_CAP_AUTONEG:
1060 1073 *val = (hw->phy.link_info.an_info & I40E_AQ_LP_AN_ABILITY) != 0;
1061 1074 break;
1062 1075
1063 1076 case ETHER_STAT_LINK_AUTONEG:
1064 1077 *val = 1;
1065 1078 break;
1066 1079
1067 1080 /*
1068 1081 * Note that while the hardware does support the pause functionality, at
1069 1082 * this time we do not use it at all and effectively disable it.
1070 1083 */
1071 1084 case ETHER_STAT_CAP_ASMPAUSE:
1072 1085 *val = (i40e->i40e_phy.abilities &
1073 1086 I40E_AQ_PHY_FLAG_PAUSE_RX) != 0;
1074 1087 break;
1075 1088 case ETHER_STAT_CAP_PAUSE:
1076 1089 *val = (i40e->i40e_phy.abilities &
1077 1090 I40E_AQ_PHY_FLAG_PAUSE_TX) != 0;
1078 1091 break;
1079 1092
1080 1093 /*
1081 1094 * Because we don't support these at this time, they are always
1082 1095 * hard-coded to zero.
1083 1096 */
1084 1097 case ETHER_STAT_ADV_CAP_ASMPAUSE:
1085 1098 case ETHER_STAT_ADV_CAP_PAUSE:
1086 1099 *val = 0;
1087 1100 break;
1088 1101
1089 1102 /*
1090 1103 * Like the other LP fields, we can only answer the question have we
1091 1104 * enabled it, not whether the other end actually supports it.
1092 1105 */
1093 1106 case ETHER_STAT_LP_CAP_ASMPAUSE:
1094 1107 case ETHER_STAT_LINK_ASMPAUSE:
1095 1108 *val = (hw->phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX) != 0;
1096 1109 break;
1097 1110 case ETHER_STAT_LP_CAP_PAUSE:
1098 1111 case ETHER_STAT_LINK_PAUSE:
1099 1112 *val = (hw->phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) != 0;
1100 1113 break;
1101 1114
1102 1115 default:
1103 1116 unimpl:
1104 1117 mutex_exit(&i40e->i40e_stat_lock);
1105 1118 mutex_exit(&i40e->i40e_general_lock);
1106 1119 return (ENOTSUP);
1107 1120 }
1108 1121
1109 1122 mutex_exit(&i40e->i40e_stat_lock);
1110 1123 mutex_exit(&i40e->i40e_general_lock);
1111 1124
1112 1125 if (i40e_check_acc_handle(i40e->i40e_osdep_space.ios_reg_handle) !=
1113 1126 DDI_FM_OK) {
1114 1127 ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_DEGRADED);
1115 1128 return (EIO);
1116 1129 }
1117 1130
1118 1131 return (0);
1119 1132 }
1120 1133
1121 1134 int
1122 1135 i40e_rx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
1123 1136 {
1124 1137 i40e_trqpair_t *itrq = (i40e_trqpair_t *)rh;
1125 1138 i40e_t *i40e = itrq->itrq_i40e;
1126 1139
1127 1140 if (i40e->i40e_state & I40E_SUSPENDED) {
1128 1141 return (ECANCELED);
1129 1142 }
1130 1143
1131 1144 switch (stat) {
1132 1145 case MAC_STAT_RBYTES:
1133 1146 *val = itrq->itrq_rxstat.irxs_bytes.value.ui64;
1134 1147 break;
1135 1148 case MAC_STAT_IPACKETS:
1136 1149 *val = itrq->itrq_rxstat.irxs_packets.value.ui64;
1137 1150 break;
1138 1151 default:
1139 1152 *val = 0;
1140 1153 return (ENOTSUP);
1141 1154 }
1142 1155
1143 1156 return (0);
1144 1157 }
1145 1158
1146 1159 int
1147 1160 i40e_tx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
1148 1161 {
1149 1162 i40e_trqpair_t *itrq = (i40e_trqpair_t *)rh;
1150 1163 i40e_t *i40e = itrq->itrq_i40e;
1151 1164
1152 1165 if (i40e->i40e_state & I40E_SUSPENDED) {
1153 1166 return (ECANCELED);
1154 1167 }
1155 1168
1156 1169 switch (stat) {
1157 1170 case MAC_STAT_OBYTES:
1158 1171 *val = itrq->itrq_txstat.itxs_bytes.value.ui64;
1159 1172 break;
1160 1173 case MAC_STAT_OPACKETS:
1161 1174 *val = itrq->itrq_txstat.itxs_packets.value.ui64;
1162 1175 break;
1163 1176 default:
1164 1177 *val = 0;
1165 1178 return (ENOTSUP);
1166 1179 }
1167 1180
1168 1181 return (0);
1169 1182 }
1170 1183
1171 1184 /*
1172 1185 * When we end up refactoring all off the queue assignments and have non-static
1173 1186 * queue to VSI mappings, then we may need to revisit the general locking
1174 1187 * strategy that we employ and have the kstat creation / deletion be part of the
1175 1188 * ring start and stop routines.
1176 1189 */
1177 1190 void
1178 1191 i40e_stats_trqpair_fini(i40e_trqpair_t *itrq)
1179 1192 {
1180 1193 if (itrq->itrq_txkstat != NULL) {
1181 1194 kstat_delete(itrq->itrq_txkstat);
1182 1195 itrq->itrq_txkstat = NULL;
1183 1196 }
1184 1197
1185 1198 if (itrq->itrq_rxkstat != NULL) {
1186 1199 kstat_delete(itrq->itrq_rxkstat);
1187 1200 itrq->itrq_rxkstat = NULL;
1188 1201 }
1189 1202 }
1190 1203
1191 1204 boolean_t
1192 1205 i40e_stats_trqpair_init(i40e_trqpair_t *itrq)
1193 1206 {
1194 1207 char buf[128];
1195 1208 i40e_t *i40e = itrq->itrq_i40e;
1196 1209 i40e_txq_stat_t *tsp = &itrq->itrq_txstat;
1197 1210 i40e_rxq_stat_t *rsp = &itrq->itrq_rxstat;
1198 1211
1199 1212 (void) snprintf(buf, sizeof (buf), "trqpair_tx_%d", itrq->itrq_index);
1200 1213 itrq->itrq_txkstat = kstat_create(I40E_MODULE_NAME,
1201 1214 ddi_get_instance(i40e->i40e_dip), buf, "net", KSTAT_TYPE_NAMED,
1202 1215 sizeof (i40e_txq_stat_t) / sizeof (kstat_named_t),
1203 1216 KSTAT_FLAG_VIRTUAL);
1204 1217
1205 1218 if (itrq->itrq_txkstat == NULL)
1206 1219 return (B_FALSE);
1207 1220
1208 1221 (void) snprintf(buf, sizeof (buf), "trqpair_rx_%d", itrq->itrq_index);
1209 1222 itrq->itrq_rxkstat = kstat_create(I40E_MODULE_NAME,
1210 1223 ddi_get_instance(i40e->i40e_dip), buf, "net", KSTAT_TYPE_NAMED,
1211 1224 sizeof (i40e_rxq_stat_t) / sizeof (kstat_named_t),
1212 1225 KSTAT_FLAG_VIRTUAL);
1213 1226
1214 1227 if (itrq->itrq_rxkstat == NULL) {
1215 1228 kstat_delete(itrq->itrq_txkstat);
1216 1229 itrq->itrq_txkstat = NULL;
1217 1230 return (B_FALSE);
1218 1231 }
1219 1232
1220 1233 itrq->itrq_txkstat->ks_data = &itrq->itrq_txstat;
1221 1234 itrq->itrq_rxkstat->ks_data = &itrq->itrq_rxstat;
1222 1235
1223 1236 kstat_named_init(&tsp->itxs_bytes, "tx_bytes",
1224 1237 KSTAT_DATA_UINT64);
1225 1238 tsp->itxs_bytes.value.ui64 = 0;
1226 1239 kstat_named_init(&tsp->itxs_packets, "tx_packets",
1227 1240 KSTAT_DATA_UINT64);
1228 1241 tsp->itxs_packets.value.ui64 = 0;
1229 1242 kstat_named_init(&tsp->itxs_descriptors, "tx_descriptors",
1230 1243 KSTAT_DATA_UINT64);
1231 1244 tsp->itxs_descriptors.value.ui64 = 0;
1232 1245 kstat_named_init(&tsp->itxs_recycled, "tx_recycled",
1233 1246 KSTAT_DATA_UINT64);
1234 1247 tsp->itxs_recycled.value.ui64 = 0;
1235 1248 kstat_named_init(&tsp->itxs_force_copy, "tx_force_copy",
1236 1249 KSTAT_DATA_UINT64);
1237 1250 tsp->itxs_force_copy.value.ui64 = 0;
1238 1251 kstat_named_init(&tsp->itxs_tso_force_copy, "tx_tso_force_copy",
1239 1252 KSTAT_DATA_UINT64);
1240 1253 tsp->itxs_tso_force_copy.value.ui64 = 0;
1241 1254
1242 1255 kstat_named_init(&tsp->itxs_hck_meoifail, "tx_hck_meoifail",
1243 1256 KSTAT_DATA_UINT64);
1244 1257 tsp->itxs_hck_meoifail.value.ui64 = 0;
1245 1258 kstat_named_init(&tsp->itxs_hck_nol2info, "tx_hck_nol2info",
1246 1259 KSTAT_DATA_UINT64);
1247 1260 tsp->itxs_hck_nol2info.value.ui64 = 0;
1248 1261 kstat_named_init(&tsp->itxs_hck_nol3info, "tx_hck_nol3info",
1249 1262 KSTAT_DATA_UINT64);
1250 1263 tsp->itxs_hck_nol3info.value.ui64 = 0;
1251 1264 kstat_named_init(&tsp->itxs_hck_nol4info, "tx_hck_nol4info",
1252 1265 KSTAT_DATA_UINT64);
1253 1266 tsp->itxs_hck_nol4info.value.ui64 = 0;
1254 1267 kstat_named_init(&tsp->itxs_hck_badl3, "tx_hck_badl3",
1255 1268 KSTAT_DATA_UINT64);
1256 1269 tsp->itxs_hck_badl3.value.ui64 = 0;
1257 1270 kstat_named_init(&tsp->itxs_hck_badl4, "tx_hck_badl4",
1258 1271 KSTAT_DATA_UINT64);
1259 1272 tsp->itxs_hck_badl4.value.ui64 = 0;
1260 1273 kstat_named_init(&tsp->itxs_lso_nohck, "tx_lso_nohck",
1261 1274 KSTAT_DATA_UINT64);
1262 1275 tsp->itxs_lso_nohck.value.ui64 = 0;
1263 1276 kstat_named_init(&tsp->itxs_bind_fails, "tx_bind_fails",
1264 1277 KSTAT_DATA_UINT64);
1265 1278 tsp->itxs_bind_fails.value.ui64 = 0;
1266 1279 kstat_named_init(&tsp->itxs_tx_short, "tx_short",
1267 1280 KSTAT_DATA_UINT64);
1268 1281 tsp->itxs_tx_short.value.ui64 = 0;
1269 1282 kstat_named_init(&tsp->itxs_err_notcb, "tx_err_notcb",
1270 1283 KSTAT_DATA_UINT64);
1271 1284 tsp->itxs_err_notcb.value.ui64 = 0;
1272 1285 kstat_named_init(&tsp->itxs_err_nodescs, "tx_err_nodescs",
1273 1286 KSTAT_DATA_UINT64);
1274 1287 tsp->itxs_err_nodescs.value.ui64 = 0;
1275 1288 kstat_named_init(&tsp->itxs_err_context, "tx_err_context",
1276 1289 KSTAT_DATA_UINT64);
1277 1290 tsp->itxs_err_context.value.ui64 = 0;
1278 1291 kstat_named_init(&tsp->itxs_num_unblocked, "tx_num_unblocked",
1279 1292 KSTAT_DATA_UINT64);
1280 1293 tsp->itxs_num_unblocked.value.ui64 = 0;
1281 1294
1282 1295
1283 1296 kstat_named_init(&rsp->irxs_bytes, "rx_bytes",
1284 1297 KSTAT_DATA_UINT64);
1285 1298 rsp->irxs_bytes.value.ui64 = 0;
1286 1299 kstat_named_init(&rsp->irxs_packets, "rx_packets",
1287 1300 KSTAT_DATA_UINT64);
1288 1301 rsp->irxs_packets.value.ui64 = 0;
1289 1302 kstat_named_init(&rsp->irxs_rx_desc_error, "rx_desc_error",
1290 1303 KSTAT_DATA_UINT64);
1291 1304 rsp->irxs_rx_desc_error.value.ui64 = 0;
1292 1305 kstat_named_init(&rsp->irxs_rx_intr_limit, "rx_intr_limit",
1293 1306 KSTAT_DATA_UINT64);
1294 1307 rsp->irxs_rx_intr_limit.value.ui64 = 0;
1295 1308 kstat_named_init(&rsp->irxs_rx_bind_norcb, "rx_bind_norcb",
1296 1309 KSTAT_DATA_UINT64);
1297 1310 rsp->irxs_rx_bind_norcb.value.ui64 = 0;
1298 1311 kstat_named_init(&rsp->irxs_rx_bind_nomp, "rx_bind_nomp",
1299 1312 KSTAT_DATA_UINT64);
1300 1313 rsp->irxs_rx_bind_nomp.value.ui64 = 0;
1301 1314 kstat_named_init(&rsp->irxs_rx_copy_nomem, "rx_copy_nomem",
1302 1315 KSTAT_DATA_UINT64);
1303 1316 rsp->irxs_rx_copy_nomem.value.ui64 = 0;
1304 1317 kstat_named_init(&rsp->irxs_hck_v4hdrok, "rx_hck_v4hdrok",
1305 1318 KSTAT_DATA_UINT64);
1306 1319 rsp->irxs_hck_v4hdrok.value.ui64 = 0;
1307 1320 kstat_named_init(&rsp->irxs_hck_l4hdrok, "rx_hck_l4hdrok",
1308 1321 KSTAT_DATA_UINT64);
1309 1322 rsp->irxs_hck_l4hdrok.value.ui64 = 0;
1310 1323 kstat_named_init(&rsp->irxs_hck_unknown, "rx_hck_unknown",
1311 1324 KSTAT_DATA_UINT64);
1312 1325 rsp->irxs_hck_unknown.value.ui64 = 0;
1313 1326 kstat_named_init(&rsp->irxs_hck_nol3l4p, "rx_hck_nol3l4p",
1314 1327 KSTAT_DATA_UINT64);
1315 1328 rsp->irxs_hck_nol3l4p.value.ui64 = 0;
1316 1329 kstat_named_init(&rsp->irxs_hck_iperr, "rx_hck_iperr",
1317 1330 KSTAT_DATA_UINT64);
1318 1331 rsp->irxs_hck_iperr.value.ui64 = 0;
1319 1332 kstat_named_init(&rsp->irxs_hck_eiperr, "rx_hck_eiperr",
1320 1333 KSTAT_DATA_UINT64);
1321 1334 rsp->irxs_hck_eiperr.value.ui64 = 0;
1322 1335 kstat_named_init(&rsp->irxs_hck_l4err, "rx_hck_l4err",
1323 1336 KSTAT_DATA_UINT64);
1324 1337 rsp->irxs_hck_l4err.value.ui64 = 0;
1325 1338 kstat_named_init(&rsp->irxs_hck_v6skip, "rx_hck_v6skip",
1326 1339 KSTAT_DATA_UINT64);
1327 1340 rsp->irxs_hck_v6skip.value.ui64 = 0;
1328 1341 kstat_named_init(&rsp->irxs_hck_set, "rx_hck_set",
1329 1342 KSTAT_DATA_UINT64);
1330 1343 rsp->irxs_hck_set.value.ui64 = 0;
1331 1344 kstat_named_init(&rsp->irxs_hck_miss, "rx_hck_miss",
1332 1345 KSTAT_DATA_UINT64);
1333 1346 rsp->irxs_hck_miss.value.ui64 = 0;
1334 1347
1335 1348 kstat_install(itrq->itrq_txkstat);
1336 1349 kstat_install(itrq->itrq_rxkstat);
1337 1350
1338 1351 return (B_TRUE);
1339 1352 }
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