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NEX-18463 Parallel dump produces corrupted dump file
Reviewed by: Yuri Pankov <yuri.pankov@nexenta.com>
Reviewed by: Rick McNeal <rick.mcneal@nexenta.com>
NEX-5177 backport illumos 6345 remove xhat support
Reviewed by: Kevin Crowe <kevin.crowe@nexenta.com>
6345 remove xhat support
Reviewed by: Dan McDonald <danmcd@omniti.com>
Reviewed by: Garrett D'Amore <garrett@damore.org>
Approved by: Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org>
NEX-5164 backport illumos 6514 AS_* lock macros simplification
Reviewed by: Kevin Crowe <kevin.crowe@nexenta.com>
6514 AS_* lock macros simplification
Reviewed by: Piotr Jasiukajtis <estibi@me.com>
Reviewed by: Yuri Pankov <yuri.pankov@nexenta.com>
Reviewed by: Albert Lee <trisk@omniti.com>
Approved by: Dan McDonald <danmcd@omniti.com>
re #13613 rb4516 Tunables needs volatile keyword
*** 20,30 ****
*/
/*
* Copyright (c) 1993, 2010, Oracle and/or its affiliates. All rights reserved.
*/
/*
! * Copyright 2011 Nexenta Systems, Inc. All rights reserved.
* Copyright 2016 Gary Mills
*/
/*
* VM - Hardware Address Translation management for Spitfire MMU.
--- 20,30 ----
*/
/*
* Copyright (c) 1993, 2010, Oracle and/or its affiliates. All rights reserved.
*/
/*
! * Copyright 2018 Nexenta Systems, Inc. All rights reserved.
* Copyright 2016 Gary Mills
*/
/*
* VM - Hardware Address Translation management for Spitfire MMU.
*** 658,675 ****
#define TSB_OK_SHRINK() \
(tsb_alloc_bytes > tsb_alloc_hiwater || freemem < desfree)
#define TSB_OK_GROW() \
(tsb_alloc_bytes < tsb_alloc_hiwater && freemem > desfree)
! int enable_tsb_rss_sizing = 1;
! int tsb_rss_factor = (int)TSB_RSS_FACTOR;
/* which TSB size code to use for new address spaces or if rss sizing off */
! int default_tsb_size = TSB_8K_SZCODE;
static uint64_t tsb_alloc_hiwater; /* limit TSB reserved memory */
! uint64_t tsb_alloc_hiwater_factor; /* tsb_alloc_hiwater = physmem / this */
#define TSB_ALLOC_HIWATER_FACTOR_DEFAULT 32
#ifdef DEBUG
static int tsb_random_size = 0; /* set to 1 to test random tsb sizes on alloc */
static int tsb_grow_stress = 0; /* if set to 1, keep replacing TSB w/ random */
--- 658,676 ----
#define TSB_OK_SHRINK() \
(tsb_alloc_bytes > tsb_alloc_hiwater || freemem < desfree)
#define TSB_OK_GROW() \
(tsb_alloc_bytes < tsb_alloc_hiwater && freemem > desfree)
! volatile int enable_tsb_rss_sizing = 1;
! volatile int tsb_rss_factor = (int)TSB_RSS_FACTOR;
/* which TSB size code to use for new address spaces or if rss sizing off */
! volatile int default_tsb_size = TSB_8K_SZCODE;
static uint64_t tsb_alloc_hiwater; /* limit TSB reserved memory */
! volatile uint64_t tsb_alloc_hiwater_factor; /* tsb_alloc_hiwater = */
! /* physmem / this */
#define TSB_ALLOC_HIWATER_FACTOR_DEFAULT 32
#ifdef DEBUG
static int tsb_random_size = 0; /* set to 1 to test random tsb sizes on alloc */
static int tsb_grow_stress = 0; /* if set to 1, keep replacing TSB w/ random */
*** 6185,6213 ****
}
return (addr);
}
/*
! * Invalidate a virtual address range for the local CPU.
! * For best performance ensure that the va range is completely
! * mapped, otherwise the entire TLB will be flushed.
*/
void
! hat_flush_range(struct hat *sfmmup, caddr_t va, size_t size)
{
- ssize_t sz;
- caddr_t endva = va + size;
-
- while (va < endva) {
- sz = hat_getpagesize(sfmmup, va);
- if (sz < 0) {
vtag_flushall();
- break;
- }
- vtag_flushpage(va, (uint64_t)sfmmup);
- va += sz;
- }
}
/*
* Synchronize all the mappings in the range [addr..addr+len).
* Can be called with clearflag having two states:
--- 6186,6202 ----
}
return (addr);
}
/*
! * Flush the TLB for the local CPU
! * Invoked from a slave CPU during panic() dumps.
*/
void
! hat_flush(void)
{
vtag_flushall();
}
/*
* Synchronize all the mappings in the range [addr..addr+len).
* Can be called with clearflag having two states: