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NEX-16819 loader UEFI support
Includes work by Toomas Soome <tsoome@me.com>
Upstream commits:
    loader: pxe receive cleanup
    9475 libefi: Do not return only if ReceiveFilter
    installboot: should support efi system partition
    8931 boot1.efi: scan all display modes rather than
    loader: spinconsole updates
    loader: gfx experiment to try GOP Blt() function.
    sha1 build test
    loader: add sha1 hash calculation
    common/sha1: update for loader build
    loader: biosdisk rework
    uts: 32-bit kernel FB needs mapping in low memory
    uts: add diag-device
    uts: boot console mirror with diag-device
    uts: enable very early console on ttya
    kmdb: add diag-device as input/output device
    uts: test VGA memory exclusion from mapping
    uts: clear boot mapping and protect boot pages test
    uts: add dboot map debug printf
    uts: need to release FB pages in release_bootstrap()
    uts: add screenmap ioctl
    uts: update sys/queue.h
    loader: add illumos uts/common to include path
    loader: tem/gfx font cleanup
    loader: vbe checks
    uts: gfx_private set KD_TEXT when KD_RESETTEXT is
    uts: gfx 8-bit update
    loader: gfx 8-bit fix
    loader: always set media size from partition.
    uts: MB2 support for 32-bit kernel
    loader: x86 should have tem 80x25
    uts: x86 should have tem 80x25
    uts: font update
    loader: font update
    uts: tem attributes
    loader: tem.c comment added
    uts: use font module
    loader: add font module
    loader: build rules for new font setup
    uts: gfx_private update for new font structure
    uts: early boot update for new font structure
    uts: font update
    uts: font build rules update for new fonts
    uts: tem update to new font structure
    loader: module.c needs to include tem_impl.h
    uts: gfx_private 8x16 font rework
    uts: make font_lookup public
    loader: font rework
    uts: font rework
    9259 libefi: efi_alloc_and_read should check for PMBR
    uts: tem utf-8 support
    loader: implement tem utf-8 support
    loader: tem should be able to display UTF-8
    7784 uts: console input should support utf-8
    7796 uts: ldterm default to utf-8
    uts: do not reset serial console
    uts: set up colors even if tem is not console
    uts: add type for early boot properties
    uts: gfx_private experiment with drm and vga
    uts: gfx_private should use setmode drm callback.
    uts: identify FB types and set up gfx_private based
    loader: replace gop and vesa with framebuffer
    uts: boot needs simple tem to support mdb
    uts: boot_keyboard should emit esc sequences for
    uts: gfx_private FB showuld be written by line
    kmdb: set terminal window size
    uts: gfx_private needs to keep track of early boot FB
    pnglite: move pnglite to usr/src/common
    loader: gfx_fb
    ficl-sys: add gfx primitives
    loader: add illumos.png logo
    ficl: add fb-putimage
    loader: add png support
    loader: add alpha blending for gfx_fb
    loader: use term-drawrect for menu frame
    ficl: add simple gfx words
    uts: provide fb_info via fbgattr dev_specific array.
    uts: gfx_private add alpha blending
    uts: update sys/ascii.h
    uts: tem OSC support (incomplete)
    uts: implement env module support and use data from
    uts: tem get colors from early boot data
    loader: use crc32 from libstand (libz)
    loader: optimize for size
    loader: pass tem info to the environment
    loader: import tem for loader console
    loader: UEFI loader needs to set ISADIR based on
    loader: need UEFI32 support
    8918 loader.efi: add vesa edid support
    uts: tem_safe_pix_clear_prom_output() should only
    uts: tem_safe_pix_clear_entire_screen() should use
    uts: tem_safe_check_first_time() should query cursor
    uts: tem implement cls callback & visual_io v4
    uts: gfx_vgatext use block cursor for vgatext
    uts: gfx_private implement cls callback & visual_io
    uts: gfx_private bitmap framebuffer implementation
    uts: early start frame buffer console support
    uts: font functions should check the input char
    uts: font rendering should support 16/24/32bit depths
    uts: use smallest font as fallback default.
    uts: update terminal dimensions based on selected
    7834 uts: vgatext should use gfx_private
    uts: add spacing property to 8859-1.bdf
    terminfo: add underline for sun-color
    terminfo: sun-color has 16 colors
    uts: add font load callback type
    loader: do not repeat int13 calls with error 0x20 and
    8905 loader: add skein/edonr support
    8904 common/crypto: make skein and edonr loader
Reviewed by: Yuri Pankov <yuri.pankov@nexenta.com>
Reviewed by: Sanjay Nadkarni <sanjay.nadkarni@nexenta.com>
Reviewed by: Evan Layton <evan.layton@nexenta.com>
Revert "NEX-16819 loader UEFI support"
This reverts commit ec06b9fc617b99234e538bf2e7e4d02a24993e0c.
Reverting due to failures in the zfs-tests and the sharefs-tests
NEX-16819 loader UEFI support
Includes work by Toomas Soome <tsoome@me.com>
Upstream commits:
    loader: pxe receive cleanup
    9475 libefi: Do not return only if ReceiveFilter
    installboot: should support efi system partition
    8931 boot1.efi: scan all display modes rather than
    loader: spinconsole updates
    loader: gfx experiment to try GOP Blt() function.
    sha1 build test
    loader: add sha1 hash calculation
    common/sha1: update for loader build
    loader: biosdisk rework
    uts: 32-bit kernel FB needs mapping in low memory
    uts: add diag-device
    uts: boot console mirror with diag-device
    uts: enable very early console on ttya
    kmdb: add diag-device as input/output device
    uts: test VGA memory exclusion from mapping
    uts: clear boot mapping and protect boot pages test
    uts: add dboot map debug printf
    uts: need to release FB pages in release_bootstrap()
    uts: add screenmap ioctl
    uts: update sys/queue.h
    loader: add illumos uts/common to include path
    loader: tem/gfx font cleanup
    loader: vbe checks
    uts: gfx_private set KD_TEXT when KD_RESETTEXT is
    uts: gfx 8-bit update
    loader: gfx 8-bit fix
    loader: always set media size from partition.
    uts: MB2 support for 32-bit kernel
    loader: x86 should have tem 80x25
    uts: x86 should have tem 80x25
    uts: font update
    loader: font update
    uts: tem attributes
    loader: tem.c comment added
    uts: use font module
    loader: add font module
    loader: build rules for new font setup
    uts: gfx_private update for new font structure
    uts: early boot update for new font structure
    uts: font update
    uts: font build rules update for new fonts
    uts: tem update to new font structure
    loader: module.c needs to include tem_impl.h
    uts: gfx_private 8x16 font rework
    uts: make font_lookup public
    loader: font rework
    uts: font rework
    libefi: efi_alloc_and_read should check for PMBR
    uts: tem utf-8 support
    loader: implement tem utf-8 support
    loader: tem should be able to display UTF-8
    7784 uts: console input should support utf-8
    7796 uts: ldterm default to utf-8
    uts: do not reset serial console
    uts: set up colors even if tem is not console
    uts: add type for early boot properties
    uts: gfx_private experiment with drm and vga
    uts: gfx_private should use setmode drm callback.
    uts: identify FB types and set up gfx_private based
    loader: replace gop and vesa with framebuffer
    uts: boot needs simple tem to support mdb
    uts: boot_keyboard should emit esc sequences for
    uts: gfx_private FB showuld be written by line
    kmdb: set terminal window size
    uts: gfx_private needs to keep track of early boot FB
    pnglite: move pnglite to usr/src/common
    loader: gfx_fb
    ficl-sys: add gfx primitives
    loader: add illumos.png logo
    ficl: add fb-putimage
    loader: add png support
    loader: add alpha blending for gfx_fb
    loader: use term-drawrect for menu frame
    ficl: add simple gfx words
    uts: provide fb_info via fbgattr dev_specific array.
    uts: gfx_private add alpha blending
    uts: update sys/ascii.h
    uts: tem OSC support (incomplete)
    uts: implement env module support and use data from
    uts: tem get colors from early boot data
    loader: use crc32 from libstand (libz)
    loader: optimize for size
    loader: pass tem info to the environment
    loader: import tem for loader console
    loader: UEFI loader needs to set ISADIR based on
    loader: need UEFI32 support
    8918 loader.efi: add vesa edid support
    uts: tem_safe_pix_clear_prom_output() should only
    uts: tem_safe_pix_clear_entire_screen() should use
    uts: tem_safe_check_first_time() should query cursor
    uts: tem implement cls callback & visual_io v4
    uts: gfx_vgatext use block cursor for vgatext
    uts: gfx_private implement cls callback & visual_io
    uts: gfx_private bitmap framebuffer implementation
    uts: early start frame buffer console support
    uts: font functions should check the input char
    uts: font rendering should support 16/24/32bit depths
    uts: use smallest font as fallback default.
    uts: update terminal dimensions based on selected
    7834 uts: vgatext should use gfx_private
    uts: add spacing property to 8859-1.bdf
    terminfo: add underline for sun-color
    terminfo: sun-color has 16 colors
    uts: add font load callback type
    loader: do not repeat int13 calls with error 0x20 and
    8905 loader: add skein/edonr support
    8904 common/crypto: make skein and edonr loader
Reviewed by: Yuri Pankov <yuri.pankov@nexenta.com>
Reviewed by: Sanjay Nadkarni <sanjay.nadkarni@nexenta.com>
Reviewed by: Evan Layton <evan.layton@nexenta.com>


  10  * or http://www.opensolaris.org/os/licensing.
  11  * See the License for the specific language governing permissions
  12  * and limitations under the License.
  13  *
  14  * When distributing Covered Code, include this CDDL HEADER in each
  15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  16  * If applicable, add the following below this CDDL HEADER, with the
  17  * fields enclosed by brackets "[]" replaced with your own identifying
  18  * information: Portions Copyright [yyyy] [name of copyright owner]
  19  *
  20  * CDDL HEADER END
  21  */
  22 /*
  23  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
  24  * Use is subject to license terms.
  25  */
  26 
  27 #ifndef _SYS_VGAREG_H
  28 #define _SYS_VGAREG_H
  29 
  30 #pragma ident   "%Z%%M% %I%     %E% SMI"
  31 
  32 #ifdef  __cplusplus
  33 extern "C" {
  34 #endif
  35 
  36 /*
  37  * VGA frame buffer hardware definitions.
  38  */
  39 
  40 #define VGA8_DEPTH              8
  41 #define VGA8_CMAP_ENTRIES       256
  42 #define VGA_TEXT_CMAP_ENTRIES   64
  43 
  44 /*
  45  * General VGA registers
  46  * These are relative to their register set, which
  47  * the 3c0-3df set.
  48  */
  49 #define VGA_ATR_AD      0x00
  50 #define VGA_ATR_DATA    0x01
  51 #define VGA_MISC_W      0x02


  65 #define CGA_STAT        0x1a
  66 
  67 /*
  68  * Attribute controller index bits
  69  */
  70 #define VGA_ATR_ENB_PLT 0x20
  71 
  72 /*
  73  * Miscellaneous output bits
  74  */
  75 #define VGA_MISC_IOA_SEL        0x01
  76 #define VGA_MISC_ENB_RAM        0x02
  77 #define VGA_MISC_VCLK           0x0c
  78 #define         VGA_MISC_VCLK0          0x00
  79 #define         VGA_MISC_VCLK1          0x04
  80 #define         VGA_MISC_VCLK2          0x08
  81 #define         VGA_MISC_VCLK3          0x0c
  82 #define VGA_MISC_PGSL           0x20
  83 #define VGA_MISC_HSP            0x40
  84 #define VGA_MISC_VSP            0x80


  85 
  86 /*
  87  * CRT Controller registers
  88  */
  89 #define VGA_CRTC_H_TOTAL        0x00
  90 #define VGA_CRTC_H_D_END        0x01
  91 #define VGA_CRTC_S_H_BLNK       0x02
  92 #define VGA_CRTC_E_H_BLNK       0x03
  93 #define         VGA_CRTC_E_H_BLNK_PUT_EHB(n) \
  94                         ((n)&0x1f)
  95 #define VGA_CRTC_S_H_SY_P       0x04
  96 #define VGA_CRTC_E_H_SY_P       0x05
  97 #define         VGA_CRTC_E_H_SY_P_HOR_SKW_SHIFT 5
  98 #define         VGA_CRTC_E_H_SY_P_HOR_SKW       0x60
  99 #define         VGA_CRTC_E_H_SY_P_EHB5          7
 100 #define         VGA_CRTC_E_H_SY_P_PUT_HOR_SKW(skew) \
 101                         ((skew)<<VGA_CRTC_E_H_SY_P_HOR_SKW_SHIFT)
 102 #define         VGA_CRTC_E_H_SY_P_PUT_EHB(n) \
 103                         ((((n)>>5)&1)<<VGA_CRTC_E_H_SY_P_EHB5)
 104 #define         VGA_CRTC_E_H_SY_P_PUT_EHS(n) \


 156 #define         VGA_CRTC_CRT_MD_4BK_HGC         0x02
 157 #define         VGA_CRTC_CRT_MD_VT_X2           0x04
 158 #define         VGA_CRTC_CRT_MD_WRD_MODE        0x08
 159 #define         VGA_CRTC_CRT_MD_ADW_16K         0x20
 160 #define         VGA_CRTC_CRT_MD_BYTE_MODE       0x40
 161 #define         VGA_CRTC_CRT_MD_NO_RESET        0x80
 162 #define VGA_CRTC_LCM            0x18
 163 
 164 /*
 165  * Sequencer registers
 166  */
 167 #define VGA_SEQ_RST_SYN         0x00
 168 #define         VGA_SEQ_RST_SYN_ASYNC_RESET     0x00
 169 #define         VGA_SEQ_RST_SYN_NO_ASYNC_RESET  0x01
 170 #define         VGA_SEQ_RST_SYN_SYNC_RESET      0x00
 171 #define         VGA_SEQ_RST_SYN_NO_SYNC_RESET   0x02
 172 #define VGA_SEQ_CLK_MODE        0x01
 173 #define         VGA_SEQ_CLK_MODE_8DC            0x01
 174 #define VGA_SEQ_EN_WT_PL        0x02
 175 #define         VGA_SEQ_EN_WT_PL_ALL            0x0f





 176 #define VGA_SEQ_MEM_MODE        0x04
 177 #define         VGA_SEQ_MEM_MODE_EXT_MEM        0x02
 178 #define         VGA_SEQ_MEM_MODE_SEQ_MODE       0x04
 179 #define         VGA_SEQ_MEM_MODE_CHN_4M         0x08
 180 
 181 /*
 182  * Graphics Controller
 183  */
 184 #define VGA_GRC_SET_RST_DT      0x00
 185 #define VGA_GRC_EN_S_R_DT       0x01
 186 #define VGA_GRC_COLOR_CMP       0x02
 187 #define VGA_GRC_WT_ROP_RTC      0x03
 188 #define VGA_GRC_RD_PL_SL        0x04
 189 #define VGA_GRC_GRP_MODE        0x05
 190 #define         VGA_GRC_GRP_MODE_SHF_MODE_256   0x40
 191 #define VGA_GRC_MISC_GM         0x06
 192 #define         VGA_GRC_MISC_GM_GRAPH           0x01
 193 #define         VGA_GRC_MISC_GM_MEM_MAP_1       0x04
 194 #define VGA_GRC_CMP_DNTC        0x07
 195 #define         VGA_GRC_CMP_DNTC_ALL            0x0f
 196 #define VGA_GRC_BIT_MASK        0x08
 197 
 198 /*
 199  * Attribute controller registers
 200  */
 201 #define VGA_ATR_PLT_REG         0x00
 202 #define VGA_ATR_NUM_PLT         0x10
 203 #define VGA_ATR_MODE            0x10
 204 #define         VGA_ATR_MODE_GRAPH      0x01
 205 #define         VGA_ATR_MODE_9WIDE      0x04
 206 #define         VGA_ATR_MODE_BLINK      0x08
 207 #define         VGA_ATR_MODE_256CLR     0x40




 208 #define VGA_ATR_BDR_CLR         0x11
 209 #define VGA_ATR_DISP_PLN        0x12
 210 #define         VGA_ATR_DISP_PLN_ALL    0x0f
 211 #define VGA_ATR_H_PX_PAN        0x13
 212 #define VGA_ATR_PX_PADD         0x14
 213 
 214 /*
 215  * Low-memory frame buffer definitions.  These are relative to the
 216  * A0000 register set.
 217  */
 218 #define VGA_MONO_BASE           0x10000 /* Base of monochrome text */
 219 #define VGA_COLOR_BASE          0x18000 /* Base of color text */
 220 #define VGA_TEXT_SIZE           0x8000  /* Size of text frame buffer */
 221 
 222 #ifdef  __cplusplus
 223 }
 224 #endif
 225 
 226 #endif /* _SYS_VGAREG_H */


  10  * or http://www.opensolaris.org/os/licensing.
  11  * See the License for the specific language governing permissions
  12  * and limitations under the License.
  13  *
  14  * When distributing Covered Code, include this CDDL HEADER in each
  15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  16  * If applicable, add the following below this CDDL HEADER, with the
  17  * fields enclosed by brackets "[]" replaced with your own identifying
  18  * information: Portions Copyright [yyyy] [name of copyright owner]
  19  *
  20  * CDDL HEADER END
  21  */
  22 /*
  23  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
  24  * Use is subject to license terms.
  25  */
  26 
  27 #ifndef _SYS_VGAREG_H
  28 #define _SYS_VGAREG_H
  29 


  30 #ifdef  __cplusplus
  31 extern "C" {
  32 #endif
  33 
  34 /*
  35  * VGA frame buffer hardware definitions.
  36  */
  37 
  38 #define VGA8_DEPTH              8
  39 #define VGA8_CMAP_ENTRIES       256
  40 #define VGA_TEXT_CMAP_ENTRIES   64
  41 
  42 /*
  43  * General VGA registers
  44  * These are relative to their register set, which
  45  * the 3c0-3df set.
  46  */
  47 #define VGA_ATR_AD      0x00
  48 #define VGA_ATR_DATA    0x01
  49 #define VGA_MISC_W      0x02


  63 #define CGA_STAT        0x1a
  64 
  65 /*
  66  * Attribute controller index bits
  67  */
  68 #define VGA_ATR_ENB_PLT 0x20
  69 
  70 /*
  71  * Miscellaneous output bits
  72  */
  73 #define VGA_MISC_IOA_SEL        0x01
  74 #define VGA_MISC_ENB_RAM        0x02
  75 #define VGA_MISC_VCLK           0x0c
  76 #define         VGA_MISC_VCLK0          0x00
  77 #define         VGA_MISC_VCLK1          0x04
  78 #define         VGA_MISC_VCLK2          0x08
  79 #define         VGA_MISC_VCLK3          0x0c
  80 #define VGA_MISC_PGSL           0x20
  81 #define VGA_MISC_HSP            0x40
  82 #define VGA_MISC_VSP            0x80
  83 #define VGA_MISC_IS1_VR         0x08    /* Vertical Retrace */
  84 #define VGA_MISC_IS1_DD         0x01    /* Display Disabled */
  85 
  86 /*
  87  * CRT Controller registers
  88  */
  89 #define VGA_CRTC_H_TOTAL        0x00
  90 #define VGA_CRTC_H_D_END        0x01
  91 #define VGA_CRTC_S_H_BLNK       0x02
  92 #define VGA_CRTC_E_H_BLNK       0x03
  93 #define         VGA_CRTC_E_H_BLNK_PUT_EHB(n) \
  94                         ((n)&0x1f)
  95 #define VGA_CRTC_S_H_SY_P       0x04
  96 #define VGA_CRTC_E_H_SY_P       0x05
  97 #define         VGA_CRTC_E_H_SY_P_HOR_SKW_SHIFT 5
  98 #define         VGA_CRTC_E_H_SY_P_HOR_SKW       0x60
  99 #define         VGA_CRTC_E_H_SY_P_EHB5          7
 100 #define         VGA_CRTC_E_H_SY_P_PUT_HOR_SKW(skew) \
 101                         ((skew)<<VGA_CRTC_E_H_SY_P_HOR_SKW_SHIFT)
 102 #define         VGA_CRTC_E_H_SY_P_PUT_EHB(n) \
 103                         ((((n)>>5)&1)<<VGA_CRTC_E_H_SY_P_EHB5)
 104 #define         VGA_CRTC_E_H_SY_P_PUT_EHS(n) \


 156 #define         VGA_CRTC_CRT_MD_4BK_HGC         0x02
 157 #define         VGA_CRTC_CRT_MD_VT_X2           0x04
 158 #define         VGA_CRTC_CRT_MD_WRD_MODE        0x08
 159 #define         VGA_CRTC_CRT_MD_ADW_16K         0x20
 160 #define         VGA_CRTC_CRT_MD_BYTE_MODE       0x40
 161 #define         VGA_CRTC_CRT_MD_NO_RESET        0x80
 162 #define VGA_CRTC_LCM            0x18
 163 
 164 /*
 165  * Sequencer registers
 166  */
 167 #define VGA_SEQ_RST_SYN         0x00
 168 #define         VGA_SEQ_RST_SYN_ASYNC_RESET     0x00
 169 #define         VGA_SEQ_RST_SYN_NO_ASYNC_RESET  0x01
 170 #define         VGA_SEQ_RST_SYN_SYNC_RESET      0x00
 171 #define         VGA_SEQ_RST_SYN_NO_SYNC_RESET   0x02
 172 #define VGA_SEQ_CLK_MODE        0x01
 173 #define         VGA_SEQ_CLK_MODE_8DC            0x01
 174 #define VGA_SEQ_EN_WT_PL        0x02
 175 #define         VGA_SEQ_EN_WT_PL_ALL            0x0f
 176 #define VGA_SEQ_CMS             0x03            /* Char Map Select */
 177 #define         VGA_SEQ_CMS_SAH         0x20    /* Char. A (bit 2) */
 178 #define         VGA_SEQ_CMS_SBH         0x10    /* Char. B (bit 2) */
 179 #define         VGA_SEQ_CMS_SA          0x0C    /* Char. A (bit 0+1) */
 180 #define         VGA_SEQ_CMS_SB          0x03    /* Char. B (bit 0+1) */
 181 #define VGA_SEQ_MEM_MODE        0x04
 182 #define         VGA_SEQ_MEM_MODE_EXT_MEM        0x02
 183 #define         VGA_SEQ_MEM_MODE_SEQ_MODE       0x04
 184 #define         VGA_SEQ_MEM_MODE_CHN_4M         0x08
 185 
 186 /*
 187  * Graphics Controller
 188  */
 189 #define VGA_GRC_SET_RST_DT      0x00
 190 #define VGA_GRC_EN_S_R_DT       0x01
 191 #define VGA_GRC_COLOR_CMP       0x02
 192 #define VGA_GRC_WT_ROP_RTC      0x03
 193 #define VGA_GRC_RD_PL_SL        0x04
 194 #define VGA_GRC_GRP_MODE        0x05
 195 #define         VGA_GRC_GRP_MODE_SHF_MODE_256   0x40
 196 #define VGA_GRC_MISC_GM         0x06
 197 #define         VGA_GRC_MISC_GM_GRAPH           0x01
 198 #define         VGA_GRC_MISC_GM_MEM_MAP_1       0x04
 199 #define VGA_GRC_CMP_DNTC        0x07
 200 #define         VGA_GRC_CMP_DNTC_ALL            0x0f
 201 #define VGA_GRC_BIT_MASK        0x08
 202 
 203 /*
 204  * Attribute controller registers
 205  */
 206 #define VGA_ATR_PAS                     0x20    /* Palette Address Source */
 207 #define VGA_ATR_PLT_REG         0x00            /* Palette Register */
 208 #define VGA_ATR_NUM_PLT         0x10            /* Palette Register count */
 209 #define VGA_ATR_MODE            0x10            /* Attribute mode control */
 210 #define         VGA_ATR_MODE_GRAPH      0x01    /* Graphics enable */
 211 #define         VGA_ATR_MODE_MONO       0x02    /* Monochrome emulation */
 212 #define         VGA_ATR_MODE_9WIDE      0x04    /* Line Graphics enable */
 213 #define         VGA_ATR_MODE_BLINK      0x08    /* Blink enable */
 214 #define         VGA_ATR_MODE_PPM        0x20    /* Pixel panning mode */
 215 #define         VGA_ATR_MODE_256CLR     0x40    /* 8-bit color enable */
 216 #define         VGA_ATR_MODE_P54S       0x80    /* Palette bits 4-5 select */
 217 #define VGA_ATR_BDR_CLR         0x11
 218 #define VGA_ATR_DISP_PLN        0x12
 219 #define         VGA_ATR_DISP_PLN_ALL    0x0f
 220 #define VGA_ATR_H_PX_PAN        0x13
 221 #define VGA_ATR_PX_PADD         0x14
 222 
 223 /*
 224  * Low-memory frame buffer definitions.  These are relative to the
 225  * A0000 register set.
 226  */
 227 #define VGA_MONO_BASE           0x10000 /* Base of monochrome text */
 228 #define VGA_COLOR_BASE          0x18000 /* Base of color text */
 229 #define VGA_TEXT_SIZE           0x8000  /* Size of text frame buffer */
 230 
 231 #ifdef  __cplusplus
 232 }
 233 #endif
 234 
 235 #endif /* _SYS_VGAREG_H */