1 /*-
2 * Copyright (c) 2013 LSI Corp.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the author nor the names of any co-contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 /*
31 * Copyright (c) 2000-2013 LSI Corporation.
32 *
33 *
34 * Name: mpi2.h
35 * Title: MPI Message independent structures and definitions
36 * including System Interface Register Set and
37 * scatter/gather formats.
38 * Creation Date: June 21, 2006
39 *
40 * mpi2.h Version: 02.00.33
41 *
42 * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
43 * prefix are for use only on MPI v2.5 products, and must not be used
44 * with MPI v2.0 products. Unless otherwise noted, names beginning with
45 * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
46 *
47 * Version History
48 * ---------------
49 *
50 * Date Version Description
51 * -------- -------- ------------------------------------------------------
52 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
53 * 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT.
54 * 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT.
55 * 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT.
56 * Moved ReplyPostHostIndex register to offset 0x6C of the
57 * MPI2_SYSTEM_INTERFACE_REGS and modified the define for
58 * MPI2_REPLY_POST_HOST_INDEX_OFFSET.
59 * Added union of request descriptors.
60 * Added union of reply descriptors.
61 * 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT.
62 * Added define for MPI2_VERSION_02_00.
63 * Fixed the size of the FunctionDependent5 field in the
64 * MPI2_DEFAULT_REPLY structure.
65 * 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT.
66 * Removed the MPI-defined Fault Codes and extended the
67 * product specific codes up to 0xEFFF.
68 * Added a sixth key value for the WriteSequence register
69 * and changed the flush value to 0x0.
70 * Added message function codes for Diagnostic Buffer Post
71 * and Diagnsotic Release.
72 * New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED
73 * Moved MPI2_VERSION_UNION from mpi2_ioc.h.
74 * 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT.
75 * 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT.
76 * 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT.
77 * Added #defines for marking a reply descriptor as unused.
78 * 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT.
79 * 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT.
80 * Moved LUN field defines from mpi2_init.h.
81 * 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT.
82 * 05-06-09 02.00.12 Bumped MPI2_HEADER_VERSION_UNIT.
83 * In all request and reply descriptors, replaced VF_ID
84 * field with MSIxIndex field.
85 * Removed DevHandle field from
86 * MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those
87 * bytes reserved.
88 * Added RAID Accelerator functionality.
89 * 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT.
90 * 10-28-09 02.00.14 Bumped MPI2_HEADER_VERSION_UNIT.
91 * Added MSI-x index mask and shift for Reply Post Host
92 * Index register.
93 * Added function code for Host Based Discovery Action.
94 * 02-10-10 02.00.15 Bumped MPI2_HEADER_VERSION_UNIT.
95 * Added define for MPI2_FUNCTION_PWR_MGMT_CONTROL.
96 * Added defines for product-specific range of message
97 * function codes, 0xF0 to 0xFF.
98 * 05-12-10 02.00.16 Bumped MPI2_HEADER_VERSION_UNIT.
99 * Added alternative defines for the SGE Direction bit.
100 * 08-11-10 02.00.17 Bumped MPI2_HEADER_VERSION_UNIT.
101 * 11-10-10 02.00.18 Bumped MPI2_HEADER_VERSION_UNIT.
102 * Added MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR define.
103 * 02-23-11 02.00.19 Bumped MPI2_HEADER_VERSION_UNIT.
104 * Added MPI2_FUNCTION_SEND_HOST_MESSAGE.
105 * 03-09-11 02.00.20 Bumped MPI2_HEADER_VERSION_UNIT.
106 * 05-25-11 02.00.21 Bumped MPI2_HEADER_VERSION_UNIT.
107 * 08-24-11 02.00.22 Bumped MPI2_HEADER_VERSION_UNIT.
108 * 11-18-11 02.00.23 Bumped MPI2_HEADER_VERSION_UNIT.
109 * Incorporating additions for MPI v2.5.
110 * 02-06-12 02.00.24 Bumped MPI2_HEADER_VERSION_UNIT.
111 * 03-29-12 02.00.25 Bumped MPI2_HEADER_VERSION_UNIT.
112 * Added Hard Reset delay timings.
113 * 07-10-12 02.00.26 Bumped MPI2_HEADER_VERSION_UNIT.
114 * 07-26-12 02.00.27 Bumped MPI2_HEADER_VERSION_UNIT.
115 * 11-27-12 02.00.28 Bumped MPI2_HEADER_VERSION_UNIT.
116 * 12-20-12 02.00.29 Bumped MPI2_HEADER_VERSION_UNIT.
117 * Added MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET.
118 * 04-09-13 02.00.30 Bumped MPI2_HEADER_VERSION_UNIT.
119 * 04-17-13 02.00.31 Bumped MPI2_HEADER_VERSION_UNIT.
120 * 08-19-13 02.00.32 Bumped MPI2_HEADER_VERSION_UNIT.
121 * 12-05-13 02.00.33 Bumped MPI2_HEADER_VERSION_UNIT.
122 * --------------------------------------------------------------------------
123 */
124
125 #ifndef MPI2_H
126 #define MPI2_H
127
128
129 /*****************************************************************************
130 *
131 * MPI Version Definitions
132 *
133 *****************************************************************************/
134
135 #define MPI2_VERSION_MAJOR_MASK (0xFF00)
136 #define MPI2_VERSION_MAJOR_SHIFT (8)
137 #define MPI2_VERSION_MINOR_MASK (0x00FF)
138 #define MPI2_VERSION_MINOR_SHIFT (0)
139
140 /* major version for all MPI v2.x */
141 #define MPI2_VERSION_MAJOR (0x02)
142
143 /* minor version for MPI v2.0 compatible products */
144 #define MPI2_VERSION_MINOR (0x00)
145 #define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \
146 MPI2_VERSION_MINOR)
147 #define MPI2_VERSION_02_00 (0x0200)
148
149
150 /* minor version for MPI v2.5 compatible products */
151 #define MPI25_VERSION_MINOR (0x05)
152 #define MPI25_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \
153 MPI25_VERSION_MINOR)
154 #define MPI2_VERSION_02_05 (0x0205)
155
156
157 /* Unit and Dev versioning for this MPI header set */
158 #define MPI2_HEADER_VERSION_UNIT (0x21)
159 #define MPI2_HEADER_VERSION_DEV (0x00)
160 #define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00)
161 #define MPI2_HEADER_VERSION_UNIT_SHIFT (8)
162 #define MPI2_HEADER_VERSION_DEV_MASK (0x00FF)
163 #define MPI2_HEADER_VERSION_DEV_SHIFT (0)
164 #define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV)
165
166
167 /*****************************************************************************
168 *
169 * IOC State Definitions
170 *
171 *****************************************************************************/
172
173 #define MPI2_IOC_STATE_RESET (0x00000000)
174 #define MPI2_IOC_STATE_READY (0x10000000)
175 #define MPI2_IOC_STATE_OPERATIONAL (0x20000000)
176 #define MPI2_IOC_STATE_FAULT (0x40000000)
177
178 #define MPI2_IOC_STATE_MASK (0xF0000000)
179 #define MPI2_IOC_STATE_SHIFT (28)
180
181 /* Fault state range for prodcut specific codes */
182 #define MPI2_FAULT_PRODUCT_SPECIFIC_MIN (0x0000)
183 #define MPI2_FAULT_PRODUCT_SPECIFIC_MAX (0xEFFF)
184
185
186 /*****************************************************************************
187 *
188 * System Interface Register Definitions
189 *
190 *****************************************************************************/
191
192 typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS
193 {
194 U32 Doorbell; /* 0x00 */
195 U32 WriteSequence; /* 0x04 */
196 U32 HostDiagnostic; /* 0x08 */
197 U32 Reserved1; /* 0x0C */
198 U32 DiagRWData; /* 0x10 */
199 U32 DiagRWAddressLow; /* 0x14 */
200 U32 DiagRWAddressHigh; /* 0x18 */
201 U32 Reserved2[5]; /* 0x1C */
202 U32 HostInterruptStatus; /* 0x30 */
203 U32 HostInterruptMask; /* 0x34 */
204 U32 DCRData; /* 0x38 */
205 U32 DCRAddress; /* 0x3C */
206 U32 Reserved3[2]; /* 0x40 */
207 U32 ReplyFreeHostIndex; /* 0x48 */
208 U32 Reserved4[8]; /* 0x4C */
209 U32 ReplyPostHostIndex; /* 0x6C */
210 U32 Reserved5; /* 0x70 */
211 U32 HCBSize; /* 0x74 */
212 U32 HCBAddressLow; /* 0x78 */
213 U32 HCBAddressHigh; /* 0x7C */
214 U32 Reserved6[16]; /* 0x80 */
215 U32 RequestDescriptorPostLow; /* 0xC0 */
216 U32 RequestDescriptorPostHigh; /* 0xC4 */
217 U32 Reserved7[14]; /* 0xC8 */
218 } MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS,
219 Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t;
220
221 /*
222 * Defines for working with the Doorbell register.
223 */
224 #define MPI2_DOORBELL_OFFSET (0x00000000)
225
226 /* IOC --> System values */
227 #define MPI2_DOORBELL_USED (0x08000000)
228 #define MPI2_DOORBELL_WHO_INIT_MASK (0x07000000)
229 #define MPI2_DOORBELL_WHO_INIT_SHIFT (24)
230 #define MPI2_DOORBELL_FAULT_CODE_MASK (0x0000FFFF)
231 #define MPI2_DOORBELL_DATA_MASK (0x0000FFFF)
232
233 /* System --> IOC values */
234 #define MPI2_DOORBELL_FUNCTION_MASK (0xFF000000)
235 #define MPI2_DOORBELL_FUNCTION_SHIFT (24)
236 #define MPI2_DOORBELL_ADD_DWORDS_MASK (0x00FF0000)
237 #define MPI2_DOORBELL_ADD_DWORDS_SHIFT (16)
238
239
240 /*
241 * Defines for the WriteSequence register
242 */
243 #define MPI2_WRITE_SEQUENCE_OFFSET (0x00000004)
244 #define MPI2_WRSEQ_KEY_VALUE_MASK (0x0000000F)
245 #define MPI2_WRSEQ_FLUSH_KEY_VALUE (0x0)
246 #define MPI2_WRSEQ_1ST_KEY_VALUE (0xF)
247 #define MPI2_WRSEQ_2ND_KEY_VALUE (0x4)
248 #define MPI2_WRSEQ_3RD_KEY_VALUE (0xB)
249 #define MPI2_WRSEQ_4TH_KEY_VALUE (0x2)
250 #define MPI2_WRSEQ_5TH_KEY_VALUE (0x7)
251 #define MPI2_WRSEQ_6TH_KEY_VALUE (0xD)
252
253 /*
254 * Defines for the HostDiagnostic register
255 */
256 #define MPI2_HOST_DIAGNOSTIC_OFFSET (0x00000008)
257
258 #define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK (0x00001800)
259 #define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT (0x00000000)
260 #define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW (0x00000800)
261
262 #define MPI2_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400)
263 #define MPI2_DIAG_FORCE_HCB_ON_RESET (0x00000200)
264 #define MPI2_DIAG_HCB_MODE (0x00000100)
265 #define MPI2_DIAG_DIAG_WRITE_ENABLE (0x00000080)
266 #define MPI2_DIAG_FLASH_BAD_SIG (0x00000040)
267 #define MPI2_DIAG_RESET_HISTORY (0x00000020)
268 #define MPI2_DIAG_DIAG_RW_ENABLE (0x00000010)
269 #define MPI2_DIAG_RESET_ADAPTER (0x00000004)
270 #define MPI2_DIAG_HOLD_IOC_RESET (0x00000002)
271
272 /*
273 * Offsets for DiagRWData and address
274 */
275 #define MPI2_DIAG_RW_DATA_OFFSET (0x00000010)
276 #define MPI2_DIAG_RW_ADDRESS_LOW_OFFSET (0x00000014)
277 #define MPI2_DIAG_RW_ADDRESS_HIGH_OFFSET (0x00000018)
278
279 /*
280 * Defines for the HostInterruptStatus register
281 */
282 #define MPI2_HOST_INTERRUPT_STATUS_OFFSET (0x00000030)
283 #define MPI2_HIS_SYS2IOC_DB_STATUS (0x80000000)
284 #define MPI2_HIS_IOP_DOORBELL_STATUS MPI2_HIS_SYS2IOC_DB_STATUS
285 #define MPI2_HIS_RESET_IRQ_STATUS (0x40000000)
286 #define MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT (0x00000008)
287 #define MPI2_HIS_IOC2SYS_DB_STATUS (0x00000001)
288 #define MPI2_HIS_DOORBELL_INTERRUPT MPI2_HIS_IOC2SYS_DB_STATUS
289
290 /*
291 * Defines for the HostInterruptMask register
292 */
293 #define MPI2_HOST_INTERRUPT_MASK_OFFSET (0x00000034)
294 #define MPI2_HIM_RESET_IRQ_MASK (0x40000000)
295 #define MPI2_HIM_REPLY_INT_MASK (0x00000008)
296 #define MPI2_HIM_RIM MPI2_HIM_REPLY_INT_MASK
297 #define MPI2_HIM_IOC2SYS_DB_MASK (0x00000001)
298 #define MPI2_HIM_DIM MPI2_HIM_IOC2SYS_DB_MASK
299
300 /*
301 * Offsets for DCRData and address
302 */
303 #define MPI2_DCR_DATA_OFFSET (0x00000038)
304 #define MPI2_DCR_ADDRESS_OFFSET (0x0000003C)
305
306 /*
307 * Offset for the Reply Free Queue
308 */
309 #define MPI2_REPLY_FREE_HOST_INDEX_OFFSET (0x00000048)
310
311 /*
312 * Defines for the Reply Descriptor Post Queue
313 */
314 #define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C)
315 #define MPI2_REPLY_POST_HOST_INDEX_MASK (0x00FFFFFF)
316 #define MPI2_RPHI_MSIX_INDEX_MASK (0xFF000000)
317 #define MPI2_RPHI_MSIX_INDEX_SHIFT (24)
318 #define MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET (0x0000030C) /* MPI v2.5 only */
319
320
321 /*
322 * Defines for the HCBSize and address
323 */
324 #define MPI2_HCB_SIZE_OFFSET (0x00000074)
325 #define MPI2_HCB_SIZE_SIZE_MASK (0xFFFFF000)
326 #define MPI2_HCB_SIZE_HCB_ENABLE (0x00000001)
327
328 #define MPI2_HCB_ADDRESS_LOW_OFFSET (0x00000078)
329 #define MPI2_HCB_ADDRESS_HIGH_OFFSET (0x0000007C)
330
331 /*
332 * Offsets for the Request Queue
333 */
334 #define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0)
335 #define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4)
336
337
338 /* Hard Reset delay timings */
339 #define MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC (50000)
340 #define MPI2_HARD_RESET_PCIE_RESET_READ_WINDOW_MICRO_SEC (255000)
341 #define MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC (256000)
342
343 /*****************************************************************************
344 *
345 * Message Descriptors
346 *
347 *****************************************************************************/
348
349 /* Request Descriptors */
350
351 /* Default Request Descriptor */
352 typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR
353 {
354 U8 RequestFlags; /* 0x00 */
355 U8 MSIxIndex; /* 0x01 */
356 U16 SMID; /* 0x02 */
357 U16 LMID; /* 0x04 */
358 U16 DescriptorTypeDependent; /* 0x06 */
359 } MPI2_DEFAULT_REQUEST_DESCRIPTOR,
360 MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR,
361 Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t;
362
363 /* defines for the RequestFlags field */
364 #define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E)
365 #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00)
366 #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02)
367 #define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06)
368 #define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE (0x08)
369 #define MPI2_REQ_DESCRIPT_FLAGS_RAID_ACCELERATOR (0x0A)
370 #define MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO (0x0C)
371
372 #define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01)
373
374
375 /* High Priority Request Descriptor */
376 typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR
377 {
378 U8 RequestFlags; /* 0x00 */
379 U8 MSIxIndex; /* 0x01 */
380 U16 SMID; /* 0x02 */
381 U16 LMID; /* 0x04 */
382 U16 Reserved1; /* 0x06 */
383 } MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
384 MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
385 Mpi2HighPriorityRequestDescriptor_t,
386 MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t;
387
388
389 /* SCSI IO Request Descriptor */
390 typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR
391 {
392 U8 RequestFlags; /* 0x00 */
393 U8 MSIxIndex; /* 0x01 */
394 U16 SMID; /* 0x02 */
395 U16 LMID; /* 0x04 */
396 U16 DevHandle; /* 0x06 */
397 } MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
398 MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
399 Mpi2SCSIIORequestDescriptor_t, MPI2_POINTER pMpi2SCSIIORequestDescriptor_t;
400
401
402 /* SCSI Target Request Descriptor */
403 typedef struct _MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR
404 {
405 U8 RequestFlags; /* 0x00 */
406 U8 MSIxIndex; /* 0x01 */
407 U16 SMID; /* 0x02 */
408 U16 LMID; /* 0x04 */
409 U16 IoIndex; /* 0x06 */
410 } MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
411 MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
412 Mpi2SCSITargetRequestDescriptor_t,
413 MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t;
414
415
416 /* RAID Accelerator Request Descriptor */
417 typedef struct _MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR
418 {
419 U8 RequestFlags; /* 0x00 */
420 U8 MSIxIndex; /* 0x01 */
421 U16 SMID; /* 0x02 */
422 U16 LMID; /* 0x04 */
423 U16 Reserved; /* 0x06 */
424 } MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
425 MPI2_POINTER PTR_MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
426 Mpi2RAIDAcceleratorRequestDescriptor_t,
427 MPI2_POINTER pMpi2RAIDAcceleratorRequestDescriptor_t;
428
429
430 /* Fast Path SCSI IO Request Descriptor */
431 typedef MPI2_SCSI_IO_REQUEST_DESCRIPTOR
432 MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR,
433 MPI2_POINTER PTR_MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR,
434 Mpi25FastPathSCSIIORequestDescriptor_t,
435 MPI2_POINTER pMpi25FastPathSCSIIORequestDescriptor_t;
436
437
438 /* union of Request Descriptors */
439 typedef union _MPI2_REQUEST_DESCRIPTOR_UNION
440 {
441 MPI2_DEFAULT_REQUEST_DESCRIPTOR Default;
442 MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority;
443 MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO;
444 MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget;
445 MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR RAIDAccelerator;
446 MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR FastPathSCSIIO;
447 U64 Words;
448 } MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION,
449 Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t;
450
451
452 /* Reply Descriptors */
453
454 /* Default Reply Descriptor */
455 typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR
456 {
457 U8 ReplyFlags; /* 0x00 */
458 U8 MSIxIndex; /* 0x01 */
459 U16 DescriptorTypeDependent1; /* 0x02 */
460 U32 DescriptorTypeDependent2; /* 0x04 */
461 } MPI2_DEFAULT_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR,
462 Mpi2DefaultReplyDescriptor_t, MPI2_POINTER pMpi2DefaultReplyDescriptor_t;
463
464 /* defines for the ReplyFlags field */
465 #define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK (0x0F)
466 #define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00)
467 #define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY (0x01)
468 #define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS (0x02)
469 #define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER (0x03)
470 #define MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS (0x05)
471 #define MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS (0x06)
472 #define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F)
473
474 /* values for marking a reply descriptor as unused */
475 #define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK (0xFFFFFFFF)
476 #define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK (0xFFFFFFFF)
477
478 /* Address Reply Descriptor */
479 typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR
480 {
481 U8 ReplyFlags; /* 0x00 */
482 U8 MSIxIndex; /* 0x01 */
483 U16 SMID; /* 0x02 */
484 U32 ReplyFrameAddress; /* 0x04 */
485 } MPI2_ADDRESS_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR,
486 Mpi2AddressReplyDescriptor_t, MPI2_POINTER pMpi2AddressReplyDescriptor_t;
487
488 #define MPI2_ADDRESS_REPLY_SMID_INVALID (0x00)
489
490
491 /* SCSI IO Success Reply Descriptor */
492 typedef struct _MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR
493 {
494 U8 ReplyFlags; /* 0x00 */
495 U8 MSIxIndex; /* 0x01 */
496 U16 SMID; /* 0x02 */
497 U16 TaskTag; /* 0x04 */
498 U16 Reserved1; /* 0x06 */
499 } MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
500 MPI2_POINTER PTR_MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
501 Mpi2SCSIIOSuccessReplyDescriptor_t,
502 MPI2_POINTER pMpi2SCSIIOSuccessReplyDescriptor_t;
503
504
505 /* TargetAssist Success Reply Descriptor */
506 typedef struct _MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR
507 {
508 U8 ReplyFlags; /* 0x00 */
509 U8 MSIxIndex; /* 0x01 */
510 U16 SMID; /* 0x02 */
511 U8 SequenceNumber; /* 0x04 */
512 U8 Reserved1; /* 0x05 */
513 U16 IoIndex; /* 0x06 */
514 } MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
515 MPI2_POINTER PTR_MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
516 Mpi2TargetAssistSuccessReplyDescriptor_t,
517 MPI2_POINTER pMpi2TargetAssistSuccessReplyDescriptor_t;
518
519
520 /* Target Command Buffer Reply Descriptor */
521 typedef struct _MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR
522 {
523 U8 ReplyFlags; /* 0x00 */
524 U8 MSIxIndex; /* 0x01 */
525 U8 VP_ID; /* 0x02 */
526 U8 Flags; /* 0x03 */
527 U16 InitiatorDevHandle; /* 0x04 */
528 U16 IoIndex; /* 0x06 */
529 } MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
530 MPI2_POINTER PTR_MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
531 Mpi2TargetCommandBufferReplyDescriptor_t,
532 MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t;
533
534 /* defines for Flags field */
535 #define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK (0x3F)
536
537
538 /* RAID Accelerator Success Reply Descriptor */
539 typedef struct _MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR
540 {
541 U8 ReplyFlags; /* 0x00 */
542 U8 MSIxIndex; /* 0x01 */
543 U16 SMID; /* 0x02 */
544 U32 Reserved; /* 0x04 */
545 } MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
546 MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
547 Mpi2RAIDAcceleratorSuccessReplyDescriptor_t,
548 MPI2_POINTER pMpi2RAIDAcceleratorSuccessReplyDescriptor_t;
549
550
551 /* Fast Path SCSI IO Success Reply Descriptor */
552 typedef MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR
553 MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
554 MPI2_POINTER PTR_MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
555 Mpi25FastPathSCSIIOSuccessReplyDescriptor_t,
556 MPI2_POINTER pMpi25FastPathSCSIIOSuccessReplyDescriptor_t;
557
558
559 /* union of Reply Descriptors */
560 typedef union _MPI2_REPLY_DESCRIPTORS_UNION
561 {
562 MPI2_DEFAULT_REPLY_DESCRIPTOR Default;
563 MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply;
564 MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess;
565 MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess;
566 MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer;
567 MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR RAIDAcceleratorSuccess;
568 MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR FastPathSCSIIOSuccess;
569 U64 Words;
570 } MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION,
571 Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t;
572
573
574
575 /*****************************************************************************
576 *
577 * Message Functions
578 *
579 *****************************************************************************/
580
581 #define MPI2_FUNCTION_SCSI_IO_REQUEST (0x00) /* SCSI IO */
582 #define MPI2_FUNCTION_SCSI_TASK_MGMT (0x01) /* SCSI Task Management */
583 #define MPI2_FUNCTION_IOC_INIT (0x02) /* IOC Init */
584 #define MPI2_FUNCTION_IOC_FACTS (0x03) /* IOC Facts */
585 #define MPI2_FUNCTION_CONFIG (0x04) /* Configuration */
586 #define MPI2_FUNCTION_PORT_FACTS (0x05) /* Port Facts */
587 #define MPI2_FUNCTION_PORT_ENABLE (0x06) /* Port Enable */
588 #define MPI2_FUNCTION_EVENT_NOTIFICATION (0x07) /* Event Notification */
589 #define MPI2_FUNCTION_EVENT_ACK (0x08) /* Event Acknowledge */
590 #define MPI2_FUNCTION_FW_DOWNLOAD (0x09) /* FW Download */
591 #define MPI2_FUNCTION_TARGET_ASSIST (0x0B) /* Target Assist */
592 #define MPI2_FUNCTION_TARGET_STATUS_SEND (0x0C) /* Target Status Send */
593 #define MPI2_FUNCTION_TARGET_MODE_ABORT (0x0D) /* Target Mode Abort */
594 #define MPI2_FUNCTION_FW_UPLOAD (0x12) /* FW Upload */
595 #define MPI2_FUNCTION_RAID_ACTION (0x15) /* RAID Action */
596 #define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16) /* SCSI IO RAID Passthrough */
597 #define MPI2_FUNCTION_TOOLBOX (0x17) /* Toolbox */
598 #define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18) /* SCSI Enclosure Processor */
599 #define MPI2_FUNCTION_SMP_PASSTHROUGH (0x1A) /* SMP Passthrough */
600 #define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */
601 #define MPI2_FUNCTION_SATA_PASSTHROUGH (0x1C) /* SATA Passthrough */
602 #define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D) /* Diagnostic Buffer Post */
603 #define MPI2_FUNCTION_DIAG_RELEASE (0x1E) /* Diagnostic Release */
604 #define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */
605 #define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */
606 #define MPI2_FUNCTION_RAID_ACCELERATOR (0x2C) /* RAID Accelerator */
607 #define MPI2_FUNCTION_HOST_BASED_DISCOVERY_ACTION (0x2F) /* Host Based Discovery Action */
608 #define MPI2_FUNCTION_PWR_MGMT_CONTROL (0x30) /* Power Management Control */
609 #define MPI2_FUNCTION_SEND_HOST_MESSAGE (0x31) /* Send Host Message */
610 #define MPI2_FUNCTION_MIN_PRODUCT_SPECIFIC (0xF0) /* beginning of product-specific range */
611 #define MPI2_FUNCTION_MAX_PRODUCT_SPECIFIC (0xFF) /* end of product-specific range */
612
613
614
615 /* Doorbell functions */
616 #define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40)
617 #define MPI2_FUNCTION_HANDSHAKE (0x42)
618
619
620 /*****************************************************************************
621 *
622 * IOC Status Values
623 *
624 *****************************************************************************/
625
626 /* mask for IOCStatus status value */
627 #define MPI2_IOCSTATUS_MASK (0x7FFF)
628
629 /****************************************************************************
630 * Common IOCStatus values for all replies
631 ****************************************************************************/
632
633 #define MPI2_IOCSTATUS_SUCCESS (0x0000)
634 #define MPI2_IOCSTATUS_INVALID_FUNCTION (0x0001)
635 #define MPI2_IOCSTATUS_BUSY (0x0002)
636 #define MPI2_IOCSTATUS_INVALID_SGL (0x0003)
637 #define MPI2_IOCSTATUS_INTERNAL_ERROR (0x0004)
638 #define MPI2_IOCSTATUS_INVALID_VPID (0x0005)
639 #define MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006)
640 #define MPI2_IOCSTATUS_INVALID_FIELD (0x0007)
641 #define MPI2_IOCSTATUS_INVALID_STATE (0x0008)
642 #define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009)
643
644 /****************************************************************************
645 * Config IOCStatus values
646 ****************************************************************************/
647
648 #define MPI2_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
649 #define MPI2_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
650 #define MPI2_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
651 #define MPI2_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
652 #define MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
653 #define MPI2_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
654
655 /****************************************************************************
656 * SCSI IO Reply
657 ****************************************************************************/
658
659 #define MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040)
660 #define MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE (0x0042)
661 #define MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043)
662 #define MPI2_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044)
663 #define MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045)
664 #define MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046)
665 #define MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047)
666 #define MPI2_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048)
667 #define MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049)
668 #define MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A)
669 #define MPI2_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B)
670 #define MPI2_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C)
671
672 /****************************************************************************
673 * For use by SCSI Initiator and SCSI Target end-to-end data protection
674 ****************************************************************************/
675
676 #define MPI2_IOCSTATUS_EEDP_GUARD_ERROR (0x004D)
677 #define MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E)
678 #define MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F)
679
680 /****************************************************************************
681 * SCSI Target values
682 ****************************************************************************/
683
684 #define MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062)
685 #define MPI2_IOCSTATUS_TARGET_ABORTED (0x0063)
686 #define MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064)
687 #define MPI2_IOCSTATUS_TARGET_NO_CONNECTION (0x0065)
688 #define MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
689 #define MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D)
690 #define MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E)
691 #define MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F)
692 #define MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT (0x0070)
693 #define MPI2_IOCSTATUS_TARGET_NAK_RECEIVED (0x0071)
694
695 /****************************************************************************
696 * Serial Attached SCSI values
697 ****************************************************************************/
698
699 #define MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090)
700 #define MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091)
701
702 /****************************************************************************
703 * Diagnostic Buffer Post / Diagnostic Release values
704 ****************************************************************************/
705
706 #define MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0)
707
708 /****************************************************************************
709 * RAID Accelerator values
710 ****************************************************************************/
711
712 #define MPI2_IOCSTATUS_RAID_ACCEL_ERROR (0x00B0)
713
714 /****************************************************************************
715 * IOCStatus flag to indicate that log info is available
716 ****************************************************************************/
717
718 #define MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000)
719
720 /****************************************************************************
721 * IOCLogInfo Types
722 ****************************************************************************/
723
724 #define MPI2_IOCLOGINFO_TYPE_MASK (0xF0000000)
725 #define MPI2_IOCLOGINFO_TYPE_SHIFT (28)
726 #define MPI2_IOCLOGINFO_TYPE_NONE (0x0)
727 #define MPI2_IOCLOGINFO_TYPE_SCSI (0x1)
728 #define MPI2_IOCLOGINFO_TYPE_FC (0x2)
729 #define MPI2_IOCLOGINFO_TYPE_SAS (0x3)
730 #define MPI2_IOCLOGINFO_TYPE_ISCSI (0x4)
731 #define MPI2_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF)
732
733
734 /*****************************************************************************
735 *
736 * Standard Message Structures
737 *
738 *****************************************************************************/
739
740 /****************************************************************************
741 * Request Message Header for all request messages
742 ****************************************************************************/
743
744 typedef struct _MPI2_REQUEST_HEADER
745 {
746 U16 FunctionDependent1; /* 0x00 */
747 U8 ChainOffset; /* 0x02 */
748 U8 Function; /* 0x03 */
749 U16 FunctionDependent2; /* 0x04 */
750 U8 FunctionDependent3; /* 0x06 */
751 U8 MsgFlags; /* 0x07 */
752 U8 VP_ID; /* 0x08 */
753 U8 VF_ID; /* 0x09 */
754 U16 Reserved1; /* 0x0A */
755 } MPI2_REQUEST_HEADER, MPI2_POINTER PTR_MPI2_REQUEST_HEADER,
756 MPI2RequestHeader_t, MPI2_POINTER pMPI2RequestHeader_t;
757
758
759 /****************************************************************************
760 * Default Reply
761 ****************************************************************************/
762
763 typedef struct _MPI2_DEFAULT_REPLY
764 {
765 U16 FunctionDependent1; /* 0x00 */
766 U8 MsgLength; /* 0x02 */
767 U8 Function; /* 0x03 */
768 U16 FunctionDependent2; /* 0x04 */
769 U8 FunctionDependent3; /* 0x06 */
770 U8 MsgFlags; /* 0x07 */
771 U8 VP_ID; /* 0x08 */
772 U8 VF_ID; /* 0x09 */
773 U16 Reserved1; /* 0x0A */
774 U16 FunctionDependent5; /* 0x0C */
775 U16 IOCStatus; /* 0x0E */
776 U32 IOCLogInfo; /* 0x10 */
777 } MPI2_DEFAULT_REPLY, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY,
778 MPI2DefaultReply_t, MPI2_POINTER pMPI2DefaultReply_t;
779
780
781 /* common version structure/union used in messages and configuration pages */
782
783 typedef struct _MPI2_VERSION_STRUCT
784 {
785 U8 Dev; /* 0x00 */
786 U8 Unit; /* 0x01 */
787 U8 Minor; /* 0x02 */
788 U8 Major; /* 0x03 */
789 } MPI2_VERSION_STRUCT;
790
791 typedef union _MPI2_VERSION_UNION
792 {
793 MPI2_VERSION_STRUCT Struct;
794 U32 Word;
795 } MPI2_VERSION_UNION;
796
797
798 /* LUN field defines, common to many structures */
799 #define MPI2_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
800 #define MPI2_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
801 #define MPI2_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
802 #define MPI2_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
803 #define MPI2_LUN_LEVEL_1_WORD (0xFF00)
804 #define MPI2_LUN_LEVEL_1_DWORD (0x0000FF00)
805
806
807 /*****************************************************************************
808 *
809 * Fusion-MPT MPI Scatter Gather Elements
810 *
811 *****************************************************************************/
812
813 /****************************************************************************
814 * MPI Simple Element structures
815 ****************************************************************************/
816
817 typedef struct _MPI2_SGE_SIMPLE32
818 {
819 U32 FlagsLength;
820 U32 Address;
821 } MPI2_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_SGE_SIMPLE32,
822 Mpi2SGESimple32_t, MPI2_POINTER pMpi2SGESimple32_t;
823
824 typedef struct _MPI2_SGE_SIMPLE64
825 {
826 U32 FlagsLength;
827 U64 Address;
828 } MPI2_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64,
829 Mpi2SGESimple64_t, MPI2_POINTER pMpi2SGESimple64_t;
830
831 typedef struct _MPI2_SGE_SIMPLE_UNION
832 {
833 U32 FlagsLength;
834 union
835 {
836 U32 Address32;
837 U64 Address64;
838 } u;
839 } MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION,
840 Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t;
841
842
843 /****************************************************************************
844 * MPI Chain Element structures - for MPI v2.0 products only
845 ****************************************************************************/
846
847 typedef struct _MPI2_SGE_CHAIN32
848 {
849 U16 Length;
850 U8 NextChainOffset;
851 U8 Flags;
852 U32 Address;
853 } MPI2_SGE_CHAIN32, MPI2_POINTER PTR_MPI2_SGE_CHAIN32,
854 Mpi2SGEChain32_t, MPI2_POINTER pMpi2SGEChain32_t;
855
856 typedef struct _MPI2_SGE_CHAIN64
857 {
858 U16 Length;
859 U8 NextChainOffset;
860 U8 Flags;
861 U64 Address;
862 } MPI2_SGE_CHAIN64, MPI2_POINTER PTR_MPI2_SGE_CHAIN64,
863 Mpi2SGEChain64_t, MPI2_POINTER pMpi2SGEChain64_t;
864
865 typedef struct _MPI2_SGE_CHAIN_UNION
866 {
867 U16 Length;
868 U8 NextChainOffset;
869 U8 Flags;
870 union
871 {
872 U32 Address32;
873 U64 Address64;
874 } u;
875 } MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION,
876 Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t;
877
878
879 /****************************************************************************
880 * MPI Transaction Context Element structures - for MPI v2.0 products only
881 ****************************************************************************/
882
883 typedef struct _MPI2_SGE_TRANSACTION32
884 {
885 U8 Reserved;
886 U8 ContextSize;
887 U8 DetailsLength;
888 U8 Flags;
889 U32 TransactionContext[1];
890 U32 TransactionDetails[1];
891 } MPI2_SGE_TRANSACTION32, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32,
892 Mpi2SGETransaction32_t, MPI2_POINTER pMpi2SGETransaction32_t;
893
894 typedef struct _MPI2_SGE_TRANSACTION64
895 {
896 U8 Reserved;
897 U8 ContextSize;
898 U8 DetailsLength;
899 U8 Flags;
900 U32 TransactionContext[2];
901 U32 TransactionDetails[1];
902 } MPI2_SGE_TRANSACTION64, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION64,
903 Mpi2SGETransaction64_t, MPI2_POINTER pMpi2SGETransaction64_t;
904
905 typedef struct _MPI2_SGE_TRANSACTION96
906 {
907 U8 Reserved;
908 U8 ContextSize;
909 U8 DetailsLength;
910 U8 Flags;
911 U32 TransactionContext[3];
912 U32 TransactionDetails[1];
913 } MPI2_SGE_TRANSACTION96, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION96,
914 Mpi2SGETransaction96_t, MPI2_POINTER pMpi2SGETransaction96_t;
915
916 typedef struct _MPI2_SGE_TRANSACTION128
917 {
918 U8 Reserved;
919 U8 ContextSize;
920 U8 DetailsLength;
921 U8 Flags;
922 U32 TransactionContext[4];
923 U32 TransactionDetails[1];
924 } MPI2_SGE_TRANSACTION128, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION128,
925 Mpi2SGETransaction_t128, MPI2_POINTER pMpi2SGETransaction_t128;
926
927 typedef struct _MPI2_SGE_TRANSACTION_UNION
928 {
929 U8 Reserved;
930 U8 ContextSize;
931 U8 DetailsLength;
932 U8 Flags;
933 union
934 {
935 U32 TransactionContext32[1];
936 U32 TransactionContext64[2];
937 U32 TransactionContext96[3];
938 U32 TransactionContext128[4];
939 } u;
940 U32 TransactionDetails[1];
941 } MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION,
942 Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t;
943
944
945 /****************************************************************************
946 * MPI SGE union for IO SGL's - for MPI v2.0 products only
947 ****************************************************************************/
948
949 typedef struct _MPI2_MPI_SGE_IO_UNION
950 {
951 union
952 {
953 MPI2_SGE_SIMPLE_UNION Simple;
954 MPI2_SGE_CHAIN_UNION Chain;
955 } u;
956 } MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION,
957 Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t;
958
959
960 /****************************************************************************
961 * MPI SGE union for SGL's with Simple and Transaction elements - for MPI v2.0 products only
962 ****************************************************************************/
963
964 typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION
965 {
966 union
967 {
968 MPI2_SGE_SIMPLE_UNION Simple;
969 MPI2_SGE_TRANSACTION_UNION Transaction;
970 } u;
971 } MPI2_SGE_TRANS_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION,
972 Mpi2SGETransSimpleUnion_t, MPI2_POINTER pMpi2SGETransSimpleUnion_t;
973
974
975 /****************************************************************************
976 * All MPI SGE types union
977 ****************************************************************************/
978
979 typedef struct _MPI2_MPI_SGE_UNION
980 {
981 union
982 {
983 MPI2_SGE_SIMPLE_UNION Simple;
984 MPI2_SGE_CHAIN_UNION Chain;
985 MPI2_SGE_TRANSACTION_UNION Transaction;
986 } u;
987 } MPI2_MPI_SGE_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_UNION,
988 Mpi2MpiSgeUnion_t, MPI2_POINTER pMpi2MpiSgeUnion_t;
989
990
991 /****************************************************************************
992 * MPI SGE field definition and masks
993 ****************************************************************************/
994
995 /* Flags field bit definitions */
996
997 #define MPI2_SGE_FLAGS_LAST_ELEMENT (0x80)
998 #define MPI2_SGE_FLAGS_END_OF_BUFFER (0x40)
999 #define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30)
1000 #define MPI2_SGE_FLAGS_LOCAL_ADDRESS (0x08)
1001 #define MPI2_SGE_FLAGS_DIRECTION (0x04)
1002 #define MPI2_SGE_FLAGS_ADDRESS_SIZE (0x02)
1003 #define MPI2_SGE_FLAGS_END_OF_LIST (0x01)
1004
1005 #define MPI2_SGE_FLAGS_SHIFT (24)
1006
1007 #define MPI2_SGE_LENGTH_MASK (0x00FFFFFF)
1008 #define MPI2_SGE_CHAIN_LENGTH_MASK (0x0000FFFF)
1009
1010 /* Element Type */
1011
1012 #define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT (0x00) /* for MPI v2.0 products only */
1013 #define MPI2_SGE_FLAGS_SIMPLE_ELEMENT (0x10)
1014 #define MPI2_SGE_FLAGS_CHAIN_ELEMENT (0x30) /* for MPI v2.0 products only */
1015 #define MPI2_SGE_FLAGS_ELEMENT_MASK (0x30)
1016
1017 /* Address location */
1018
1019 #define MPI2_SGE_FLAGS_SYSTEM_ADDRESS (0x00)
1020
1021 /* Direction */
1022
1023 #define MPI2_SGE_FLAGS_IOC_TO_HOST (0x00)
1024 #define MPI2_SGE_FLAGS_HOST_TO_IOC (0x04)
1025
1026 #define MPI2_SGE_FLAGS_DEST (MPI2_SGE_FLAGS_IOC_TO_HOST)
1027 #define MPI2_SGE_FLAGS_SOURCE (MPI2_SGE_FLAGS_HOST_TO_IOC)
1028
1029 /* Address Size */
1030
1031 #define MPI2_SGE_FLAGS_32_BIT_ADDRESSING (0x00)
1032 #define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
1033
1034 /* Context Size */
1035
1036 #define MPI2_SGE_FLAGS_32_BIT_CONTEXT (0x00)
1037 #define MPI2_SGE_FLAGS_64_BIT_CONTEXT (0x02)
1038 #define MPI2_SGE_FLAGS_96_BIT_CONTEXT (0x04)
1039 #define MPI2_SGE_FLAGS_128_BIT_CONTEXT (0x06)
1040
1041 #define MPI2_SGE_CHAIN_OFFSET_MASK (0x00FF0000)
1042 #define MPI2_SGE_CHAIN_OFFSET_SHIFT (16)
1043
1044 /****************************************************************************
1045 * MPI SGE operation Macros
1046 ****************************************************************************/
1047
1048 /* SIMPLE FlagsLength manipulations... */
1049 #define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT)
1050 #define MPI2_SGE_GET_FLAGS(f) (((f) & ~MPI2_SGE_LENGTH_MASK) >> MPI2_SGE_FLAGS_SHIFT)
1051 #define MPI2_SGE_LENGTH(f) ((f) & MPI2_SGE_LENGTH_MASK)
1052 #define MPI2_SGE_CHAIN_LENGTH(f) ((f) & MPI2_SGE_CHAIN_LENGTH_MASK)
1053
1054 #define MPI2_SGE_SET_FLAGS_LENGTH(f,l) (MPI2_SGE_SET_FLAGS(f) | MPI2_SGE_LENGTH(l))
1055
1056 #define MPI2_pSGE_GET_FLAGS(psg) MPI2_SGE_GET_FLAGS((psg)->FlagsLength)
1057 #define MPI2_pSGE_GET_LENGTH(psg) MPI2_SGE_LENGTH((psg)->FlagsLength)
1058 #define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l)
1059
1060 /* CAUTION - The following are READ-MODIFY-WRITE! */
1061 #define MPI2_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f)
1062 #define MPI2_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_SGE_LENGTH(l)
1063
1064 #define MPI2_GET_CHAIN_OFFSET(x) ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT)
1065
1066
1067 /*****************************************************************************
1068 *
1069 * Fusion-MPT IEEE Scatter Gather Elements
1070 *
1071 *****************************************************************************/
1072
1073 /****************************************************************************
1074 * IEEE Simple Element structures
1075 ****************************************************************************/
1076
1077 /* MPI2_IEEE_SGE_SIMPLE32 is for MPI v2.0 products only */
1078 typedef struct _MPI2_IEEE_SGE_SIMPLE32
1079 {
1080 U32 Address;
1081 U32 FlagsLength;
1082 } MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32,
1083 Mpi2IeeeSgeSimple32_t, MPI2_POINTER pMpi2IeeeSgeSimple32_t;
1084
1085 typedef struct _MPI2_IEEE_SGE_SIMPLE64
1086 {
1087 U64 Address;
1088 U32 Length;
1089 U16 Reserved1;
1090 U8 Reserved2;
1091 U8 Flags;
1092 } MPI2_IEEE_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64,
1093 Mpi2IeeeSgeSimple64_t, MPI2_POINTER pMpi2IeeeSgeSimple64_t;
1094
1095 typedef union _MPI2_IEEE_SGE_SIMPLE_UNION
1096 {
1097 MPI2_IEEE_SGE_SIMPLE32 Simple32;
1098 MPI2_IEEE_SGE_SIMPLE64 Simple64;
1099 } MPI2_IEEE_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION,
1100 Mpi2IeeeSgeSimpleUnion_t, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t;
1101
1102
1103 /****************************************************************************
1104 * IEEE Chain Element structures
1105 ****************************************************************************/
1106
1107 /* MPI2_IEEE_SGE_CHAIN32 is for MPI v2.0 products only */
1108 typedef MPI2_IEEE_SGE_SIMPLE32 MPI2_IEEE_SGE_CHAIN32;
1109
1110 /* MPI2_IEEE_SGE_CHAIN64 is for MPI v2.0 products only */
1111 typedef MPI2_IEEE_SGE_SIMPLE64 MPI2_IEEE_SGE_CHAIN64;
1112
1113 typedef union _MPI2_IEEE_SGE_CHAIN_UNION
1114 {
1115 MPI2_IEEE_SGE_CHAIN32 Chain32;
1116 MPI2_IEEE_SGE_CHAIN64 Chain64;
1117 } MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION,
1118 Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t;
1119
1120 /* MPI25_IEEE_SGE_CHAIN64 is for MPI v2.5 products only */
1121 typedef struct _MPI25_IEEE_SGE_CHAIN64
1122 {
1123 U64 Address;
1124 U32 Length;
1125 U16 Reserved1;
1126 U8 NextChainOffset;
1127 U8 Flags;
1128 } MPI25_IEEE_SGE_CHAIN64, MPI2_POINTER PTR_MPI25_IEEE_SGE_CHAIN64,
1129 Mpi25IeeeSgeChain64_t, MPI2_POINTER pMpi25IeeeSgeChain64_t;
1130
1131
1132 /****************************************************************************
1133 * All IEEE SGE types union
1134 ****************************************************************************/
1135
1136 /* MPI2_IEEE_SGE_UNION is for MPI v2.0 products only */
1137 typedef struct _MPI2_IEEE_SGE_UNION
1138 {
1139 union
1140 {
1141 MPI2_IEEE_SGE_SIMPLE_UNION Simple;
1142 MPI2_IEEE_SGE_CHAIN_UNION Chain;
1143 } u;
1144 } MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION,
1145 Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t;
1146
1147
1148 /****************************************************************************
1149 * IEEE SGE union for IO SGL's
1150 ****************************************************************************/
1151
1152 typedef union _MPI25_SGE_IO_UNION
1153 {
1154 MPI2_IEEE_SGE_SIMPLE64 IeeeSimple;
1155 MPI25_IEEE_SGE_CHAIN64 IeeeChain;
1156 } MPI25_SGE_IO_UNION, MPI2_POINTER PTR_MPI25_SGE_IO_UNION,
1157 Mpi25SGEIOUnion_t, MPI2_POINTER pMpi25SGEIOUnion_t;
1158
1159
1160 /****************************************************************************
1161 * IEEE SGE field definitions and masks
1162 ****************************************************************************/
1163
1164 /* Flags field bit definitions */
1165
1166 #define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK (0x80)
1167 #define MPI25_IEEE_SGE_FLAGS_END_OF_LIST (0x40)
1168
1169 #define MPI2_IEEE32_SGE_FLAGS_SHIFT (24)
1170
1171 #define MPI2_IEEE32_SGE_LENGTH_MASK (0x00FFFFFF)
1172
1173 /* Element Type */
1174
1175 #define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT (0x00)
1176 #define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80)
1177
1178 /* Data Location Address Space */
1179
1180 #define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03)
1181 #define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00) /* for MPI v2.0, use in IEEE Simple Element only; for MPI v2.5, use in IEEE Simple or Chain element */
1182 #define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01) /* use in IEEE Simple Element only */
1183 #define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02)
1184 #define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03) /* for MPI v2.0, use in IEEE Simple Element only; for MPI v2.5, use in IEEE Simple or Chain element */
1185 #define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR (0x03) /* use in MPI v2.0 IEEE Chain Element only */
1186 #define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR (MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR) /* typo in name */
1187
1188 /****************************************************************************
1189 * IEEE SGE operation Macros
1190 ****************************************************************************/
1191
1192 /* SIMPLE FlagsLength manipulations... */
1193 #define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT)
1194 #define MPI2_IEEE32_SGE_GET_FLAGS(f) (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT)
1195 #define MPI2_IEEE32_SGE_LENGTH(f) ((f) & MPI2_IEEE32_SGE_LENGTH_MASK)
1196
1197 #define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l) (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l))
1198
1199 #define MPI2_IEEE32_pSGE_GET_FLAGS(psg) MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength)
1200 #define MPI2_IEEE32_pSGE_GET_LENGTH(psg) MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength)
1201 #define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l)
1202
1203 /* CAUTION - The following are READ-MODIFY-WRITE! */
1204 #define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f)
1205 #define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l)
1206
1207
1208
1209 /*****************************************************************************
1210 *
1211 * Fusion-MPT MPI/IEEE Scatter Gather Unions
1212 *
1213 *****************************************************************************/
1214
1215 typedef union _MPI2_SIMPLE_SGE_UNION
1216 {
1217 MPI2_SGE_SIMPLE_UNION MpiSimple;
1218 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
1219 } MPI2_SIMPLE_SGE_UNION, MPI2_POINTER PTR_MPI2_SIMPLE_SGE_UNION,
1220 Mpi2SimpleSgeUntion_t, MPI2_POINTER pMpi2SimpleSgeUntion_t;
1221
1222
1223 typedef union _MPI2_SGE_IO_UNION
1224 {
1225 MPI2_SGE_SIMPLE_UNION MpiSimple;
1226 MPI2_SGE_CHAIN_UNION MpiChain;
1227 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
1228 MPI2_IEEE_SGE_CHAIN_UNION IeeeChain;
1229 } MPI2_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_SGE_IO_UNION,
1230 Mpi2SGEIOUnion_t, MPI2_POINTER pMpi2SGEIOUnion_t;
1231
1232
1233 /****************************************************************************
1234 *
1235 * Values for SGLFlags field, used in many request messages with an SGL
1236 *
1237 ****************************************************************************/
1238
1239 /* values for MPI SGL Data Location Address Space subfield */
1240 #define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK (0x0C)
1241 #define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE (0x00)
1242 #define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE (0x04)
1243 #define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08)
1244 #define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C)
1245 /* values for SGL Type subfield */
1246 #define MPI2_SGLFLAGS_SGL_TYPE_MASK (0x03)
1247 #define MPI2_SGLFLAGS_SGL_TYPE_MPI (0x00)
1248 #define MPI2_SGLFLAGS_SGL_TYPE_IEEE32 (0x01) /* MPI v2.0 products only */
1249 #define MPI2_SGLFLAGS_SGL_TYPE_IEEE64 (0x02)
1250
1251
1252 #endif
1253