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NEX-5717 import QLogic 16G FC drivers
Reviewed by: Steve Peng <steve.peng@nexenta.com>
Reviewed by: Josef 'Jeff' Sipek <josef.sipek@nexenta.com>
Reviewed by: Yuri Pankov <yuri.pankov@nexenta.com>
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--- old/usr/src/uts/common/sys/fibre-channel/fca/qlc/exioct.h
+++ new/usr/src/uts/common/sys/fibre-channel/fca/qlc/exioct.h
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
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13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21
22 22 /*
23 - * Copyright 2010 QLogic Corporation. All rights reserved.
23 + * Copyright 2015 QLogic Corporation. All rights reserved.
24 24 * Use is subject to license terms.
25 25 */
26 26
27 27 /*
28 28 * File Name: exioct.h
29 29 *
30 30 * San/Device Management Ioctl Header
31 31 * File is created to adhere to Solaris requirement using 8-space tabs.
32 32 *
33 33 * !!!!! PLEASE DO NOT REMOVE THE TABS !!!!!
34 34 * !!!!! PLEASE NO SINGLE LINE COMMENTS: // !!!!!
35 35 * !!!!! PLEASE NO MORE THAN 80 CHARS PER LINE !!!!!
36 36 *
37 37 * ***********************************************************************
38 38 * * **
39 39 * * NOTICE **
40 - * * COPYRIGHT (C) 2000-2010 QLOGIC CORPORATION **
40 + * * COPYRIGHT (C) 2000-2015 QLOGIC CORPORATION **
41 41 * * ALL RIGHTS RESERVED **
42 42 * * **
43 43 * ***********************************************************************
44 44 */
45 45
46 46 #ifndef _EXIOCT_H
47 47 #define _EXIOCT_H
48 48
49 49 #ifdef __cplusplus
50 50 extern "C" {
51 51 #endif
52 52
53 53 #include <exioctso.h>
54 54
55 55 /*
56 56 * NOTE: the following version defines must be updated each time the
57 57 * changes made may affect the backward compatibility of the
58 58 * input/output relations of the SDM IOCTL functions.
59 59 */
60 60 #define EXT_VERSION 5
61 61
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62 62 /*
63 63 * OS independent General definitions
64 64 */
65 65 #define EXT_DEF_SIGNATURE_SIZE 8
66 66 #define EXT_DEF_WWN_NAME_SIZE 8
67 67 #define EXT_DEF_WWP_NAME_SIZE 8
68 68 #define EXT_DEF_SERIAL_NUM_SIZE 4
69 69 #define EXT_DEF_PORTID_SIZE 4
70 70 #define EXT_DEF_PORTID_SIZE_ACTUAL 3
71 71 #define EXT_DEF_MAX_STR_SIZE 128
72 -#define EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH 12
72 +#define EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH 16
73 73 #define EXT_DEF_MAC_ADDRESS_SIZE 6
74 74
75 75 #define EXT_DEF_ADDR_MODE_32 1
76 76 #define EXT_DEF_ADDR_MODE_64 2
77 77
78 78 /*
79 79 * ***********************************************************************
80 80 * OS dependent General configuration defines
81 81 * ***********************************************************************
82 82 */
83 83 #define EXT_DEF_MAX_HBA EXT_DEF_MAX_HBA_OS
84 84 #define EXT_DEF_MAX_BUS EXT_DEF_MAX_BUS_OS
85 85 #define EXT_DEF_MAX_TARGET EXT_DEF_MAX_TARGET_OS
86 86 #define EXT_DEF_MAX_LUN EXT_DEF_MAX_LUN_OS
87 87 #define EXT_DEF_NON_SCSI3_MAX_LUN EXT_DEF_NON_SCSI3_MAX_LUN_OS
88 88
89 89 /*
90 90 * ***********************************************************************
91 91 * Common header struct definitions for San/Device Mgmt
92 92 * ***********************************************************************
93 93 */
94 94 typedef struct {
95 95 UINT64 Signature; /* 8 chars string */
96 96 UINT64 RequestAdr; /* 8 */
97 97 UINT64 ResponseAdr; /* 8 */
98 98 UINT64 VendorSpecificData; /* 8 chars string */
99 99 UINT32 Status; /* 4 */
100 100 UINT32 DetailStatus; /* 4 */
101 101 UINT32 Reserved1; /* 4 */
102 102 UINT32 RequestLen; /* 4 */
103 103 UINT32 ResponseLen; /* 4 */
104 104 UINT16 AddrMode; /* 2 */
105 105 UINT16 Version; /* 2 */
106 106 UINT16 SubCode; /* 2 */
107 107 UINT16 Instance; /* 2 */
108 108 UINT16 HbaSelect; /* 2 */
109 109 UINT16 VendorSpecificStatus[11]; /* 22 */
110 110 } EXT_IOCTL, *PEXT_IOCTL; /* size = 84 / 0x54 */
111 111
112 112 typedef union _ext_signature {
113 113 UINT64 Signature;
114 114 char bytes[EXT_DEF_SIGNATURE_SIZE];
115 115 } ext_sig_t;
116 116
117 117 /*
118 118 * Addressing mode used by the user application
119 119 */
120 120 #define EXT_ADDR_MODE EXT_ADDR_MODE_OS
121 121
122 122 /*
123 123 * Status. These macros are being used for setting Status field in
124 124 * EXT_IOCTL structure.
125 125 */
126 126 #define EXT_STATUS_OK 0
127 127 #define EXT_STATUS_ERR 1
128 128 #define EXT_STATUS_BUSY 2
129 129 #define EXT_STATUS_PENDING 3
130 130 #define EXT_STATUS_SUSPENDED 4
131 131 #define EXT_STATUS_RETRY_PENDING 5
132 132 #define EXT_STATUS_INVALID_PARAM 6
133 133 #define EXT_STATUS_DATA_OVERRUN 7
134 134 #define EXT_STATUS_DATA_UNDERRUN 8
135 135 #define EXT_STATUS_DEV_NOT_FOUND 9
136 136 #define EXT_STATUS_COPY_ERR 10
137 137 #define EXT_STATUS_MAILBOX 11
138 138 #define EXT_STATUS_UNSUPPORTED_SUBCODE 12
139 139 #define EXT_STATUS_UNSUPPORTED_VERSION 13
140 140 #define EXT_STATUS_MS_NO_RESPONSE 14
141 141 #define EXT_STATUS_SCSI_STATUS 15
142 142 #define EXT_STATUS_BUFFER_TOO_SMALL 16
143 143 #define EXT_STATUS_NO_MEMORY 17
144 144 #define EXT_STATUS_UNKNOWN 18
145 145 #define EXT_STATUS_UNKNOWN_DSTATUS 19
146 146 #define EXT_STATUS_INVALID_REQUEST 20
147 147 #define EXT_STATUS_DEVICE_NOT_READY 21
148 148 #define EXT_STATUS_DEVICE_OFFLINE 22
149 149 #define EXT_STATUS_HBA_NOT_READY 23
150 150 #define EXT_STATUS_HBA_QUEUE_FULL 24
151 151 #define EXT_STATUS_INVALID_VPINDEX 25
152 152
153 153 /*
154 154 * Detail Status contains the SCSI bus status codes.
155 155 */
156 156
157 157 #define EXT_DSTATUS_GOOD 0x00
158 158 #define EXT_DSTATUS_CHECK_CONDITION 0x02
159 159 #define EXT_DSTATUS_CONDITION_MET 0x04
160 160 #define EXT_DSTATUS_BUSY 0x08
161 161 #define EXT_DSTATUS_INTERMEDIATE 0x10
162 162 #define EXT_DSTATUS_INTERMEDIATE_COND_MET 0x14
163 163 #define EXT_DSTATUS_RESERVATION_CONFLICT 0x18
164 164 #define EXT_DSTATUS_COMMAND_TERMINATED 0x22
165 165 #define EXT_DSTATUS_QUEUE_FULL 0x28
166 166
167 167 /*
168 168 * Detail Status contains the needed Response buffer space(bytes)
169 169 * when Status = EXT_STATUS_BUFFER_TOO_SMALL
170 170 */
171 171
172 172
173 173 /*
174 174 * Detail Status contains one of the following codes
175 175 * when Status = EXT_STATUS_INVALID_PARAM or
176 176 * = EXT_STATUS_DEV_NOT_FOUND
177 177 */
178 178 #define EXT_DSTATUS_NOADNL_INFO 0x00
179 179 #define EXT_DSTATUS_HBA_INST 0x01
180 180 #define EXT_DSTATUS_TARGET 0x02
181 181 #define EXT_DSTATUS_LUN 0x03
182 182 #define EXT_DSTATUS_REQUEST_LEN 0x04
183 183 #define EXT_DSTATUS_PATH_INDEX 0x05
184 184
185 185 /*
186 186 * Currently supported DeviceControl / ioctl command codes
187 187 */
188 188 #define EXT_CC_QUERY EXT_CC_QUERY_OS
189 189 #define EXT_CC_SEND_FCCT_PASSTHRU EXT_CC_SEND_FCCT_PASSTHRU_OS
190 190 #define EXT_CC_REG_AEN EXT_CC_REG_AEN_OS
191 191 #define EXT_CC_GET_AEN EXT_CC_GET_AEN_OS
192 192 #define EXT_CC_SEND_ELS_RNID EXT_CC_SEND_ELS_RNID_OS
193 193 #define EXT_CC_SEND_SCSI_PASSTHRU EXT_CC_SCSI_PASSTHRU_OS
194 194 #define EXT_CC_READ_HOST_PARAMS EXT_CC_READ_HOST_PARAMS_OS
195 195 #define EXT_CC_READ_RISC_PARAMS EXT_CC_READ_RISC_PARAMS_OS
196 196 #define EXT_CC_UPDATE_HOST_PARAMS EXT_CC_UPDATE_HOST_PARAMS_OS
197 197 #define EXT_CC_UPDATE_RISC_PARAMS EXT_CC_UPDATE_RISC_PARAMS_OS
198 198 #define EXT_CC_READ_NVRAM EXT_CC_READ_NVRAM_OS
199 199 #define EXT_CC_UPDATE_NVRAM EXT_CC_UPDATE_NVRAM_OS
200 200 #define EXT_CC_HOST_IDX EXT_CC_HOST_IDX_OS
201 201 #define EXT_CC_LOOPBACK EXT_CC_LOOPBACK_OS
202 202 #define EXT_CC_READ_OPTION_ROM EXT_CC_READ_OPTION_ROM_OS
203 203 #define EXT_CC_READ_OPTION_ROM_EX EXT_CC_READ_OPTION_ROM_EX_OS
204 204 #define EXT_CC_UPDATE_OPTION_ROM EXT_CC_UPDATE_OPTION_ROM_OS
205 205 #define EXT_CC_UPDATE_OPTION_ROM_EX EXT_CC_UPDATE_OPTION_ROM_EX_OS
206 206 #define EXT_CC_GET_VPD EXT_CC_GET_VPD_OS
207 207 #define EXT_CC_SET_VPD EXT_CC_SET_VPD_OS
208 208 #define EXT_CC_GET_FCACHE EXT_CC_GET_FCACHE_OS
209 209 #define EXT_CC_GET_FCACHE_EX EXT_CC_GET_FCACHE_EX_OS
210 210 #define EXT_CC_HOST_DRVNAME EXT_CC_HOST_DRVNAME_OS
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211 211 #define EXT_CC_GET_SFP_DATA EXT_CC_GET_SFP_DATA_OS
212 212 #define EXT_CC_WWPN_TO_SCSIADDR EXT_CC_WWPN_TO_SCSIADDR_OS
213 213 #define EXT_CC_PORT_PARAM EXT_CC_PORT_PARAM_OS
214 214 #define EXT_CC_GET_PCI_DATA EXT_CC_GET_PCI_DATA_OS
215 215 #define EXT_CC_GET_FWEXTTRACE EXT_CC_GET_FWEXTTRACE_OS
216 216 #define EXT_CC_GET_FWFCETRACE EXT_CC_GET_FWFCETRACE_OS
217 217 #define EXT_CC_GET_VP_CNT_ID EXT_CC_GET_VP_CNT_ID_OS
218 218 #define EXT_CC_VPORT_CMD EXT_CC_VPORT_CMD_OS
219 219 #define EXT_CC_ACCESS_FLASH EXT_CC_ACCESS_FLASH_OS
220 220 #define EXT_CC_RESET_FW EXT_CC_RESET_FW_OS
221 -
221 +#define EXT_CC_I2C_DATA EXT_CC_I2C_DATA_OS
222 +#define EXT_CC_DUMP EXT_CC_DUMP_OS
223 +#define EXT_CC_SERDES_REG_OP EXT_CC_SERDES_REG_OP_OS
224 +#define EXT_CC_VF_STATE EXT_CC_VF_STATE_OS
225 +#define EXT_CC_SERDES_REG_OP_EX EXT_CC_SERDES_REG_OP_EX_OS
226 +#define EXT_CC_SEND_ELS_PASSTHRU EXT_CC_ELS_PASSTHRU_OS
227 +#define EXT_CC_FLASH_UPDATE_CAPS EXT_CC_FLASH_UPDATE_CAPS_OS
228 +#define EXT_CC_GET_BBCR_DATA EXT_CC_GET_BBCR_DATA_OS
222 229 /*
223 230 * HBA port operations
224 231 */
225 232 #define EXT_CC_GET_DATA EXT_CC_GET_DATA_OS
226 233 #define EXT_CC_SET_DATA EXT_CC_SET_DATA_OS
227 234
228 235 /*
229 236 * The following DeviceControl / ioctl command codes currently are not
230 237 * supported.
231 238 */
232 239 #define EXT_CC_SEND_ELS_RTIN EXT_CC_SEND_ELS_RTIN_OS
233 240
234 241
235 242 /*
236 243 * ***********************************************************************
237 244 * EXT_IOCTL SubCode definition.
238 245 * These macros are being used for setting SubCode field in EXT_IOCTL
239 246 * structure.
240 247 * ***********************************************************************
241 248 */
242 249
243 250 /*
244 251 * Query.
245 252 * Uses with EXT_QUERY as the ioctl code.
246 253 */
247 254 #define EXT_SC_QUERY_HBA_NODE 1
248 255 #define EXT_SC_QUERY_HBA_PORT 2
249 256 #define EXT_SC_QUERY_DISC_PORT 3
250 257 #define EXT_SC_QUERY_DISC_TGT 4
251 258 #define EXT_SC_QUERY_DISC_LUN 5 /* Currently Not Supported */
252 259 #define EXT_SC_QUERY_DRIVER 6
253 260 #define EXT_SC_QUERY_FW 7
254 261 #define EXT_SC_QUERY_CHIP 8
255 262 #define EXT_SC_QUERY_CNA_PORT 9
256 263 #define EXT_SC_QUERY_ADAPTER_VERSIONS 10
257 264
258 265 /*
259 266 * Get.
260 267 * Uses with EXT_GET_DATA as the ioctl code
261 268 */
262 269 /* 1 - 99 Common */
263 270 #define EXT_SC_GET_SCSI_ADDR 1 /* Currently Not Supported */
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264 271 #define EXT_SC_GET_ERR_DETECTIONS 2 /* Currently Not Supported */
265 272 #define EXT_SC_GET_STATISTICS 3
266 273 #define EXT_SC_GET_BUS_MODE 4 /* Currently Not Supported */
267 274 #define EXT_SC_GET_DR_DUMP_BUF 5 /* Currently Not Supported */
268 275 #define EXT_SC_GET_RISC_CODE 6
269 276 #define EXT_SC_GET_FLASH_RAM 7
270 277 #define EXT_SC_GET_BEACON_STATE 8
271 278 #define EXT_SC_GET_DCBX_PARAM 9
272 279 #define EXT_SC_GET_FCF_LIST 10
273 280 #define EXT_SC_GET_RESOURCE_CNTS 11
281 +#define EXT_SC_GET_PRIV_STATS 12
274 282
275 283 /* 100 - 199 FC_INTF_TYPE */
276 284 #define EXT_SC_GET_LINK_STATUS 101 /* Currently Not Supported */
277 285 #define EXT_SC_GET_LOOP_ID 102 /* Currently Not Supported */
278 286 #define EXT_SC_GET_LUN_BITMASK 103
279 287 #define EXT_SC_GET_PORT_DATABASE 104 /* Currently Not Supported */
280 288 #define EXT_SC_GET_PORT_DATABASE_MEM 105 /* Currently Not Supported */
281 289 #define EXT_SC_GET_PORT_SUMMARY 106
282 290 #define EXT_SC_GET_POSITION_MAP 107
283 291 #define EXT_SC_GET_RETRY_CNT 108 /* Currently Not Supported */
284 292 #define EXT_SC_GET_RNID 109
285 293 #define EXT_SC_GET_RTIN 110 /* Currently Not Supported */
286 294 #define EXT_SC_GET_FC_LUN_BITMASK 111
287 295 #define EXT_SC_GET_FC_STATISTICS 112
288 296 #define EXT_SC_GET_FC4_STATISTICS 113
289 297 #define EXT_SC_GET_TARGET_ID 114
290 298
291 299
292 300 /* 200 - 299 SCSI_INTF_TYPE */
293 301 #define EXT_SC_GET_SEL_TIMEOUT 201 /* Currently Not Supported */
294 302
295 303 #define EXT_DEF_DCBX_PARAM_BUF_SIZE 4096 /* Bytes */
296 304
297 305 /*
298 306 * Set.
299 307 * Uses with EXT_SET_DATA as the ioctl code
300 308 */
301 309 /* 1 - 99 Common */
302 310 #define EXT_SC_RST_STATISTICS 3
303 311 #define EXT_SC_SET_BUS_MODE 4 /* Currently Not Supported */
304 312 #define EXT_SC_SET_DR_DUMP_BUF 5 /* Currently Not Supported */
305 313 #define EXT_SC_SET_RISC_CODE 6
306 314 #define EXT_SC_SET_FLASH_RAM 7
307 315 #define EXT_SC_SET_BEACON_STATE 8
308 316
309 317 /* special types (non snia) */
310 318 #define EXT_SC_SET_PARMS 99 /* dpb */
311 319
312 320 /* 100 - 199 FC_INTF_TYPE */
313 321 #define EXT_SC_SET_LUN_BITMASK 103
314 322 #define EXT_SC_SET_RETRY_CNT 108 /* Currently Not Supported */
315 323 #define EXT_SC_SET_RNID 109
316 324 #define EXT_SC_SET_RTIN 110 /* Currently Not Supported */
317 325 #define EXT_SC_SET_FC_LUN_BITMASK 111
318 326 #define EXT_SC_ADD_TARGET_DEVICE 112
319 327 #define EXT_SC_SWAP_TARGET_DEVICE 113
320 328
321 329 /* 200 - 299 SCSI_INTF_TYPE */
322 330 #define EXT_SC_SET_SEL_TIMEOUT 201 /* Currently Not Supported */
323 331
324 332 /* SCSI passthrough */
325 333 #define EXT_SC_SEND_SCSI_PASSTHRU 0
326 334 #define EXT_SC_SEND_FC_SCSI_PASSTHRU 1
327 335
328 336 /* NVRAM */
329 337 #define EXT_SC_NVRAM_HARDWARE 0 /* Save */
330 338 #define EXT_SC_NVRAM_DRIVER 1 /* Driver (Apply) */
331 339 #define EXT_SC_NVRAM_ALL 2 /* NVRAM/Driver (Save+Apply) */
332 340
333 341 /*
334 342 * Vport functions
335 343 * Used with EXT_CC_VPORT_CMD as the ioctl code.
336 344 */
337 345 #define EXT_VF_SC_VPORT_GETINFO 1
338 346 #define EXT_VF_SC_VPORT_DELETE 2
339 347 #define EXT_VF_SC_VPORT_MODIFY 3
340 348 #define EXT_VF_SC_VPORT_CREATE 4
341 349
342 350 /*
343 351 * Flash access sub codes
344 352 * Used with EXT_CC_ACCESS_FLASH as the ioctl code.
345 353 */
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346 354 #define EXT_SC_FLASH_READ 0
347 355 #define EXT_SC_FLASH_WRITE 1
348 356
349 357 /*
350 358 * Reset FW subcodes for Schultz
351 359 * Used with EXT_CC_RESET_FW as the ioctl code.
352 360 */
353 361 #define EXT_SC_RESET_FC_FW 1
354 362 #define EXT_SC_RESET_MPI_FW 2
355 363
364 +/*
365 + * Thermal temp adapter subcodes
366 + * Used with EXT_CC_I2C_DATA as the ioctl code.
367 + */
368 +#define EXT_SC_GET_BOARD_TEMP 1
369 +
370 +/*
371 + * Dump sub codes
372 + * Used with EXT_CC_DUMP_OP as the ioctl code.
373 + */
374 +#define EXT_SC_DUMP_SIZE 1
375 +#define EXT_SC_DUMP_READ 2
376 +#define EXT_SC_DUMP_TRIGGER 3
377 +
378 +/*
379 + * SerDes Register subcodes
380 + * Used with EXT_CC_SERDES_REG_OP and EXT_CC_SERDES_REG_OP_EX
381 + * as the ioctl code.
382 + */
383 +#define EXT_SC_READ_SERDES_REG 1
384 +#define EXT_SC_WRITE_SERDES_REG 2
385 +
386 +/* Flash update capabilities subcommands */
387 +#define EXT_SC_GET_FLASH_UPDATE_CAPS 1
388 +#define EXT_SC_SET_FLASH_UPDATE_CAPS 2
389 +
356 390 /* Read */
357 391
358 392 /* Write */
359 393
360 394 /* Reset */
361 395
362 396 /* Request struct */
363 397
364 398
365 399 /*
366 400 * Response struct
367 401 */
368 402 typedef struct _EXT_HBA_NODE {
369 403 UINT32 DriverAttr; /* 4 */
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370 404 UINT32 FWAttr; /* 4 */
371 405 UINT16 PortCount; /* 2; 1 */
372 406 UINT16 InterfaceType; /* 2; FC/SCSI */
373 407 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */
374 408 UINT8 Manufacturer[EXT_DEF_MAX_STR_SIZE]; /* 128; "QLOGIC" */
375 409 UINT8 Model[EXT_DEF_MAX_STR_SIZE]; /* 128; "QLA2200" */
376 410 UINT8 SerialNum[EXT_DEF_SERIAL_NUM_SIZE]; /* 4; 123 */
377 411 UINT8 DriverVersion[EXT_DEF_MAX_STR_SIZE]; /* 128; "7.4.3" */
378 412 UINT8 FWVersion[EXT_DEF_MAX_STR_SIZE]; /* 128; "2.1.6" */
379 413 UINT8 OptRomVersion[EXT_DEF_MAX_STR_SIZE]; /* 128; "1.44" */
380 - UINT8 Reserved[32]; /* 32 */
414 + UINT8 MpiVersion[4]; /* 4 */
415 + UINT8 PepFwVersion[4]; /* 4 */
416 + UINT8 Reserved[24]; /* 24 */
381 417 } EXT_HBA_NODE, *PEXT_HBA_NODE; /* 696 */
382 418
383 419 /* HBA node query interface type */
384 420 #define EXT_DEF_FC_INTF_TYPE 1
385 421 #define EXT_DEF_SCSI_INTF_TYPE 2
386 422 #define EXT_DEF_VIRTUAL_FC_INTF_TYPE 3
387 423
388 424 typedef struct _EXT_HBA_PORT {
389 425 UINT64 Target; /* 8 */
390 426 UINT32 PortSupportedSpeed; /* 4 */
391 427 UINT32 PortSpeed; /* 4 */
392 428 UINT16 Type; /* 2; Port Type */
393 429 UINT16 State; /* 2; Port State */
394 430 UINT16 Mode; /* 2 */
395 431 UINT16 DiscPortCount; /* 2 */
396 432 UINT16 DiscPortNameType; /* 2; USE_NODE_NAME or */
397 433 /* USE_PORT_NAME */
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398 434 UINT16 DiscTargetCount; /* 2 */
399 435 UINT16 Bus; /* 2 */
400 436 UINT16 Lun; /* 2 */
401 437 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */
402 438 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4; 3 bytes valid Port Id. */
403 439 UINT8 PortSupportedFC4Types; /* 1 */
404 440 UINT8 PortActiveFC4Types; /* 1 */
405 441 UINT8 FabricName[EXT_DEF_WWN_NAME_SIZE]; /* 8 */
406 442 UINT16 LinkState2; /* 2; sfp status */
407 443 UINT16 LinkState3; /* 2; reserved field */
408 - UINT8 Reserved[6]; /* 6 */
444 + UINT16 LinkState1; /* 2; sfp status */
445 + UINT16 LinkState6; /* 2; sfp status */
446 + UINT8 Reserved[2]; /* 2 */
409 447 } EXT_HBA_PORT, *PEXT_HBA_PORT; /* 64 */
410 448
411 449 /* FC-4 Instrumentation */
412 450 typedef struct _EXT_HBA_FC4Statistics {
413 451 INT64 InputRequests; /* 8 */
414 452 INT64 OutputRequests; /* 8 */
415 453 INT64 ControlRequests; /* 8 */
416 454 INT64 InputMegabytes; /* 8 */
417 455 INT64 OutputMegabytes; /* 8 */
418 456 UINT64 Reserved[6]; /* 48 */
419 457 } EXT_HBA_FC4STATISTICS, *PEXT_HBA_FC4STATISTICS; /* 88 */
420 458
421 459 typedef struct _EXT_LOOPBACK_REQ {
422 460 UINT32 TransferCount;
423 461 UINT32 IterationCount;
424 462 UINT32 BufferAddress;
425 463 UINT32 BufferLength;
426 464 UINT16 Options;
427 465 UINT8 Reserved[18];
428 466 } EXT_LOOPBACK_REQ, *PEXT_LOOPBACK_REQ;
429 467
430 468 typedef struct _EXT_LOOPBACK_RSP {
431 469 UINT64 BufferAddress;
432 470 UINT32 BufferLength;
433 471 UINT32 IterationCountLastError;
434 472 UINT16 CompletionStatus;
435 473 UINT16 CrcErrorCount;
436 474 UINT16 DisparityErrorCount;
437 475 UINT16 FrameLengthErrorCount;
438 476 UINT8 CommandSent;
439 477 UINT8 Reserved[15];
440 478 } EXT_LOOPBACK_RSP, *PEXT_LOOPBACK_RSP;
441 479
442 480 /* used with loopback response CommandSent */
443 481 #define INT_DEF_LB_LOOPBACK_CMD 0
444 482 #define INT_DEF_LB_ECHO_CMD 1
445 483
446 484 /* definition for interpreting CompletionStatus values */
447 485 #define EXT_DEF_LB_COMPLETE 0x4000
448 486 #define EXT_DEF_LB_PARAM_ERR 0x4006
449 487 #define EXT_DEF_LB_LOOP_DOWN 0x400b
450 488 #define EXT_DEF_LB_CMD_ERROR 0x400c
451 489
452 490 /* port type */
453 491 #define EXT_DEF_INITIATOR_DEV 0x1
454 492 #define EXT_DEF_TARGET_DEV 0x2
455 493 #define EXT_DEF_TAPE_DEV 0x4
456 494 #define EXT_DEF_FABRIC_DEV 0x8
457 495
458 496
459 497 /* HBA port state */
460 498 #define EXT_DEF_HBA_OK 0
461 499 #define EXT_DEF_HBA_SUSPENDED 1
462 500 #define EXT_DEF_HBA_LOOP_DOWN 2
463 501
464 502 /* Connection mode */
465 503 #define EXT_DEF_UNKNOWN_MODE 0
466 504 #define EXT_DEF_P2P_MODE 1
467 505 #define EXT_DEF_LOOP_MODE 2
468 506 #define EXT_DEF_FL_MODE 3
469 507 #define EXT_DEF_N_MODE 4
470 508
471 509 /* Valid name type for Disc. port/target */
472 510 #define EXT_DEF_USE_NODE_NAME 1
473 511 #define EXT_DEF_USE_PORT_NAME 2
474 512
475 513 /* FC4 type values */
476 514 #define EXT_DEF_FC4_TYPE_SCSI 0x1
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477 515 #define EXT_DEF_FC4_TYPE_IP 0x2
478 516 #define EXT_DEF_FC4_TYPE_SCTP 0x4
479 517 #define EXT_DEF_FC4_TYPE_VI 0x8
480 518
481 519 /* IIDMA rate values */
482 520 #define IIDMA_RATE_1GB 0x0
483 521 #define IIDMA_RATE_2GB 0x1
484 522 #define IIDMA_RATE_4GB 0x3
485 523 #define IIDMA_RATE_8GB 0x4
486 524 #define IIDMA_RATE_10GB 0x13
525 +#define IIDMA_RATE_16GB 0x5
526 +#define IIDMA_RATE_32GB 0x6
487 527 #define IIDMA_RATE_UNKNOWN 0xffff
488 528
489 529 /* IIDMA Mode values */
490 530 #define IIDMA_MODE_0 0
491 531 #define IIDMA_MODE_1 1
492 532 #define IIDMA_MODE_2 2
493 533 #define IIDMA_MODE_3 3
494 534
495 535 /* Port Speed values */
496 -#define EXT_DEF_PORTSPEED_UNKNOWN 0x0
536 +#define EXT_DEF_PORTSPEED_UNKNOWN 0x0
497 537 #define EXT_DEF_PORTSPEED_1GBIT 0x1
498 538 #define EXT_DEF_PORTSPEED_2GBIT 0x2
499 539 #define EXT_DEF_PORTSPEED_4GBIT 0x4
500 540 #define EXT_DEF_PORTSPEED_8GBIT 0x8
501 541 #define EXT_DEF_PORTSPEED_10GBIT 0x10
542 +#define EXT_DEF_PORTSPEED_16GBIT 0x20
543 +#define EXT_DEF_PORTSPEED_32GBIT 0x40
502 544 #define EXT_PORTSPEED_NOT_NEGOTIATED (1<<15) /* Speed not established */
503 545
504 546 typedef struct _EXT_DISC_PORT {
505 547 UINT64 TargetId; /* 8 */
506 548 UINT16 Type; /* 2; Port Type */
507 549 UINT16 Status; /* 2; Port Status */
508 550 UINT16 Bus; /* 2; n/a for Solaris */
509 551 UINT16 LoopID; /* 2; Loop ID */
510 552 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */
511 553 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */
512 554 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4; 3 bytes used big endian */
513 555 UINT8 Local; /* 1; Local or Remote */
514 556 UINT8 Reserved[27]; /* 27 */
515 557 } EXT_DISC_PORT, *PEXT_DISC_PORT; /* 64 */
516 558
517 559 typedef struct _EXT_DISC_TARGET {
518 560 UINT64 TargetId; /* 8 */
519 561 UINT16 Type; /* 2; Target Type */
520 562 UINT16 Status; /* 2; Target Status */
521 563 UINT16 Bus; /* 2; n/a for Solaris */
522 564 UINT16 LunCount; /* 2; n/a for nt */
523 565 UINT16 LoopID; /* 2; Loop ID */
524 566 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */
525 567 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */
526 568 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4; 3 bytes used big endian */
527 569 UINT8 Local; /* 1; Local or Remote */
528 570 UINT8 Reserved[25]; /* 25 */
529 571 } EXT_DISC_TARGET, *PEXT_DISC_TARGET; /* 64 */
530 572
531 573 /* The following command is not supported */
532 574 typedef struct _EXT_DISC_LUN { /* n/a for nt */
533 575 UINT16 Id; /* 2 */
534 576 UINT16 State; /* 2 */
535 577 UINT16 IoCount; /* 2 */
536 578 UINT8 Reserved[30]; /* 30 */
537 579 } EXT_DISC_LUN, *PEXT_DISC_LUN; /* 36 */
538 580
539 581
540 582 /* SCSI address */
541 583 typedef struct _EXT_SCSI_ADDR {
542 584 UINT64 Target; /* 8 */
543 585 UINT16 Bus; /* 2 */
544 586 UINT16 Lun; /* 2 */
545 587 UINT8 Padding[12]; /* 12 */
546 588 } EXT_SCSI_ADDR, *PEXT_SCSI_ADDR; /* 24 */
547 589
548 590
549 591 /* Fibre Channel address */
550 592 typedef struct _EXT_FC_ADDR {
551 593 UINT16 Type; /* 2 */
552 594 union {
553 595 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */
554 596 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */
555 597 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4 */
556 598 } FcAddr;
557 599 UINT8 Padding[4]; /* 4 */
558 600 } EXT_FC_ADDR, *PEXT_FC_ADDR; /* 14 */
559 601
560 602 #define EXT_DEF_TYPE_WWNN 1
561 603 #define EXT_DEF_TYPE_WWPN 2
562 604 #define EXT_DEF_TYPE_PORTID 3
563 605 #define EXT_DEF_TYPE_FABRIC 4
564 606
565 607 /* Destination address */
566 608 typedef struct _EXT_DEST_ADDR {
567 609 union {
568 610 struct {
569 611 UINT64 Target; /* 8 */
570 612 UINT16 Bus; /* 2 */
571 613 UINT8 pad[6]; /* 6 */
572 614 } ScsiAddr;
573 615 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */
574 616 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */
575 617 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4 */
576 618 } DestAddr;
577 619 UINT16 DestType; /* 2 */
578 620 UINT16 Lun; /* 2 */
579 621 UINT8 Padding[4]; /* 4 */
580 622 } EXT_DEST_ADDR, *PEXT_DEST_ADDR; /* 24 */
581 623
582 624
583 625 #define EXT_DEF_DESTTYPE_WWNN 1
584 626 #define EXT_DEF_DESTTYPE_WWPN 2
585 627 #define EXT_DEF_DESTTYPE_PORTID 3
586 628 #define EXT_DEF_DESTTYPE_FABRIC 4
587 629 #define EXT_DEF_DESTTYPE_SCSI 5
588 630
589 631 /* Statistic */
590 632 typedef struct _EXT_HBA_PORT_STAT {
591 633 UINT32 ControllerErrorCount; /* 4 */
592 634 UINT32 DeviceErrorCount; /* 4 */
593 635 UINT32 IoCount; /* 4 */
594 636 UINT32 MBytesCount; /* 4; MB of data processed */
595 637 UINT32 LipResetCount; /* 4; Total no. of LIP Reset */
596 638 UINT32 InterruptCount; /* 4; Total no. of Interrupts */
597 639 UINT32 LinkFailureCount; /* 4 */
598 640 UINT32 LossOfSyncCount; /* 4 */
599 641 UINT32 LossOfSignalsCount; /* 4 */
600 642 UINT32 PrimitiveSeqProtocolErrorCount; /* 4 */
601 643 UINT32 InvalidTransmissionWordCount; /* 4 */
602 644 UINT32 InvalidCRCCount; /* 4 */
603 645 UINT8 Reserved[64]; /* 64 */
604 646 } EXT_HBA_PORT_STAT, *PEXT_HBA_PORT_STAT; /* 112 */
605 647
606 648
607 649 /* Driver property */
608 650 typedef struct _EXT_DRIVER {
609 651 UINT32 MaxTransferLen; /* 4 */
610 652 UINT32 MaxDataSegments; /* 4 */
611 653 UINT32 Attrib; /* 4 */
612 654 UINT32 InternalFlags[4]; /* 16 */
613 655 UINT16 NumOfBus; /* 2; Port Type */
614 656 UINT16 TargetsPerBus; /* 2; Port Status */
615 657 UINT16 LunsPerTarget; /* 2 */
616 658 UINT16 DmaBitAddresses; /* 2 */
617 659 UINT16 IoMapType; /* 2 */
618 660 UINT8 Version[EXT_DEF_MAX_STR_SIZE]; /* 128 */
619 661 UINT8 Reserved[32]; /* 32 */
620 662 } EXT_DRIVER, *PEXT_DRIVER; /* 198 */
621 663
622 664
623 665 /* Firmware property */
624 666 typedef struct _EXT_FW {
625 667 UINT32 Attrib; /* 4 */
626 668 UINT8 Version[EXT_DEF_MAX_STR_SIZE]; /* 128 */
627 669 UINT8 Reserved[66]; /* 66 */
628 670 } EXT_FW, *PEXT_FW; /* 198 */
629 671
630 672 /* ISP/Chip property */
631 673 typedef struct _EXT_CHIP {
632 674 UINT32 IoAddr; /* 4 */
633 675 UINT32 IoAddrLen; /* 4 */
634 676 UINT32 MemAddr; /* 4 */
635 677 UINT32 MemAddrLen; /* 4 */
636 678 UINT16 VendorId; /* 2 */
637 679 UINT16 DeviceId; /* 2 */
638 680 UINT16 SubVendorId; /* 2 */
639 681 UINT16 SubSystemId; /* 2 */
640 682 UINT16 PciBusNumber; /* 2 */
641 683 UINT16 PciSlotNumber; /* 2 */
642 684 UINT16 ChipType; /* 2 */
643 685 UINT16 InterruptLevel; /* 2 */
644 686 UINT16 OutMbx[8]; /* 16 */
645 687 UINT16 FuncNo; /* 2 */
646 688 UINT8 Reserved[29]; /* 29 */
647 689 UINT8 ChipRevID; /* 1 */
648 690 } EXT_CHIP, *PEXT_CHIP; /* 80 */
649 691
650 692 /* CNA properties */
651 693 typedef struct _EXT_CNA_PORT {
652 694 UINT16 VLanId; /* 2 */
653 695 UINT8 VNPortMACAddress[EXT_DEF_MAC_ADDRESS_SIZE]; /* 6 */
654 696 UINT16 FabricParam; /* 2 */
655 697 UINT16 Reserved0; /* 2 */
656 698 UINT32 Reserved[29]; /* 116 */
657 699 } EXT_CNA_PORT, *PEXT_CNA_PORT; /* 128 */
658 700
659 701 /* Fabric Parameters */
660 702 #define EXT_DEF_MAC_ADDR_MODE_FPMA 0x8000
661 703
662 704 #define NO_OF_VERSIONS 2
663 705 #define FLASH_VERSION 0
664 706 #define RUNNING_VERSION 1
665 707 #define EXT_OPT_ROM_REGION_MPI_RISC_FW 0x40
666 708 #define EXT_OPT_ROM_REGION_EDC_PHY_FW 0x45
667 709
668 710 typedef struct _EXT_REGIONVERSION {
669 711 UINT16 Region;
670 712 UINT16 SubRegion; /* If all boot codes are under region 0x7 */
671 713 UINT16 Location; /* 0: Flash, 1: Running */
672 714 UINT16 VersionLength;
673 715 UINT8 Version[8];
674 716 UINT8 Reserved[8];
675 717 } EXT_REGIONVERSION, *PEXT_REGIONVERSION;
676 718
677 719 typedef struct _EXT_ADAPTERREGIONVERSION {
678 720 UINT32 Length; /* number of struct REGIONVERSION */
679 721 UINT32 Reserved;
680 722 EXT_REGIONVERSION RegionVersion[1]; /* variable length */
681 723 } EXT_ADAPTERREGIONVERSION, *PEXT_ADAPTERREGIONVERSION;
682 724
683 725 /* Request Buffer for RNID */
684 726 typedef struct _EXT_RNID_REQ {
685 727 EXT_FC_ADDR Addr; /* 14 */
686 728 UINT8 DataFormat; /* 1 */
687 729 UINT8 Pad; /* 1 */
688 730 UINT8 OptWWN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */
689 731 UINT8 OptPortId[EXT_DEF_PORTID_SIZE]; /* 4 */
690 732 UINT8 Reserved[51]; /* 51 */
691 733 } EXT_RNID_REQ, *PEXT_RNID_REQ; /* 79 */
692 734
693 735 #define EXT_DEF_RNID_DFORMAT_NONE 0
694 736 #define EXT_DEF_RNID_DFORMAT_TOPO_DISC 0xDF
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695 737
696 738 /* Request Buffer for Set RNID */
697 739 typedef struct _EXT_SET_RNID_REQ {
698 740 UINT8 IPVersion[2]; /* 2 */
699 741 UINT8 UDPPortNumber[2]; /* 2 */
700 742 UINT8 IPAddress[16]; /* 16 */
701 743 UINT8 Reserved[64]; /* 64 */
702 744 } EXT_SET_RNID_REQ, *PEXT_SET_RNID_REQ; /* 84 */
703 745
704 746 /* RNID definition and data struct */
705 -#define SEND_RNID_RSP_SIZE 72
747 +#define SEND_RNID_RSP_SIZE 72
706 748
707 749 typedef struct _RNID_DATA
708 750 {
709 751 UINT32 UnitType; /* 4 */
710 752 UINT32 NumOfAttachedNodes; /* 4 */
711 753 UINT16 TopoDiscFlags; /* 2 */
712 754 UINT16 Reserved; /* 2 */
713 755 UINT8 WWN[16]; /* 16 */
714 756 UINT8 PortId[4]; /* 4 */
715 757 UINT8 IPVersion[2]; /* 2 */
716 758 UINT8 UDPPortNumber[2]; /* 2 */
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717 759 UINT8 IPAddress[16]; /* 16 */
718 760 } EXT_RNID_DATA, *PEXT_RNID_DATA; /* 52 */
719 761
720 762
721 763 /* SCSI pass-through */
722 764 typedef struct _EXT_SCSI_PASSTHRU {
723 765 EXT_SCSI_ADDR TargetAddr;
724 766 UINT8 Direction;
725 767 UINT8 CdbLength;
726 768 UINT8 Cdb[EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH];
727 - UINT8 Reserved[66];
769 + UINT8 Reserved[62];
728 770 UINT8 SenseData[256];
729 771 } EXT_SCSI_PASSTHRU, *PEXT_SCSI_PASSTHRU;
730 772
731 773 /* FC SCSI pass-through */
732 774 typedef struct _EXT_FC_SCSI_PASSTHRU {
733 775 EXT_DEST_ADDR FCScsiAddr;
734 776 UINT8 Direction;
735 777 UINT8 CdbLength;
736 778 UINT8 Cdb[EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH];
737 - UINT8 Reserved[64];
779 + UINT8 Reserved[60];
738 780 UINT8 SenseData[256];
739 781 } EXT_FC_SCSI_PASSTHRU, *PEXT_FC_SCSI_PASSTHRU;
740 782
741 783 /* SCSI pass-through direction */
742 784 #define EXT_DEF_SCSI_PASSTHRU_DATA_IN 1
743 785 #define EXT_DEF_SCSI_PASSTHRU_DATA_OUT 2
744 786
745 787
746 788 /* EXT_REG_AEN Request struct */
747 789 typedef struct _EXT_REG_AEN {
748 790 UINT32 Enable; /* 4; non-0 to enable, 0 to disable. */
749 791 UINT8 Reserved[4]; /* 4 */
750 792 } EXT_REG_AEN, *PEXT_REG_AEN; /* 8 */
751 793
752 794 /* EXT_GET_AEN Response struct */
753 795 typedef struct _EXT_ASYNC_EVENT {
754 796 UINT32 AsyncEventCode; /* 4 */
755 797 union {
756 798 struct {
757 799 UINT8 RSCNInfo[EXT_DEF_PORTID_SIZE_ACTUAL]; /* 3 BE */
758 800 UINT8 AddrFormat; /* 1 */
759 801 UINT8 Rsvd_1[8]; /* 8 */
760 802 } RSCN;
761 803
762 804 UINT8 Reserved[12]; /* 12 */
763 805 } Payload;
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764 806 } EXT_ASYNC_EVENT, *PEXT_ASYNC_EVENT; /* 16 */
765 807
766 808
767 809 /* Asynchronous Event Codes */
768 810 #define EXT_DEF_LIP_OCCURRED 0x8010
769 811 #define EXT_DEF_LINK_UP 0x8011
770 812 #define EXT_DEF_LINK_DOWN 0x8012
771 813 #define EXT_DEF_LIP_RESET 0x8013
772 814 #define EXT_DEF_RSCN 0x8015
773 815 #define EXT_DEF_DEVICE_UPDATE 0x8014
816 +#define EXT_DEF_DPORT_DIAGS 0x8080
774 817
775 818 /* LED state information */
776 819 #define EXT_DEF_GRN_BLINK_OFF 0x00
777 820 #define EXT_DEF_GRN_BLINK_ON 0x01
778 821
779 822 typedef struct _EXT_BEACON_CONTROL {
780 823 UINT32 State; /* 4 */
781 824 UINT8 Reserved[12]; /* 12 */
782 825 } EXT_BEACON_CONTROL, *PEXT_BEACON_CONTROL; /* 16 */
783 826
784 827 /* Required # of entries in the queue buffer allocated. */
785 828 #define EXT_DEF_MAX_AEN_QUEUE EXT_DEF_MAX_AEN_QUEUE_OS
786 829
787 830 /*
788 831 * LUN BitMask structure definition, array of 8bit bytes,
789 832 * 1 bit per lun. When bit == 1, the lun is masked.
790 833 * Most significant bit of mask[0] is lun 0.
791 834 * Least significant bit of mask[0] is lun 7.
792 835 */
793 836 typedef struct _EXT_LUN_BIT_MASK {
794 837 #if ((EXT_DEF_NON_SCSI3_MAX_LUN & 0x7) == 0)
795 838 UINT8 mask[EXT_DEF_NON_SCSI3_MAX_LUN >> 3];
796 839 #else
797 840 UINT8 mask[(EXT_DEF_NON_SCSI3_MAX_LUN + 8) >> 3 ];
798 841 #endif
799 842 } EXT_LUN_BIT_MASK, *PEXT_LUN_BIT_MASK;
800 843
801 844 /* Device type to get for EXT_SC_GET_PORT_SUMMARY */
802 845 #define EXT_DEF_GET_KNOWN_DEVICE 0x1
803 846 #define EXT_DEF_GET_VISIBLE_DEVICE 0x2
804 847 #define EXT_DEF_GET_HIDDEN_DEVICE 0x4
805 848 #define EXT_DEF_GET_FABRIC_DEVICE 0x8
806 849 #define EXT_DEF_GET_LOOP_DEVICE 0x10
807 850
808 851 /* Each entry in device database */
809 852 typedef struct _EXT_DEVICEDATAENTRY
810 853 {
811 854 EXT_SCSI_ADDR TargetAddress; /* scsi address */
812 855 UINT32 DeviceFlags; /* Flags for device */
813 856 UINT16 LoopID; /* Loop ID */
814 857 UINT16 BaseLunNumber;
815 858 UINT8 NodeWWN[8]; /* Node World Wide Name for device */
816 859 UINT8 PortWWN[8]; /* Port World Wide Name for device */
817 860 UINT8 PortID[3]; /* Current PortId for device */
818 861 UINT8 ControlFlags; /* Control flag */
819 862 UINT8 Reserved[132];
820 863 } EXT_DEVICEDATAENTRY, *PEXT_DEVICEDATAENTRY;
821 864
822 865 #define EXT_DEF_EXTERNAL_LUN_COUNT 2048
823 866 #define EXT_DEF_EXTERNAL_LUN_BITMASK_BYTES (EXT_DEF_EXTERNAL_LUN_COUNT / 8)
824 867
825 868 /* Structure as used in the IOCTL. */
826 869
827 870 typedef struct _EXT_EXTERNAL_LUN_BITMASK_ENTRY
828 871 {
829 872 UINT8 NodeName[EXT_DEF_WWN_NAME_SIZE];
830 873 UINT8 PortName[EXT_DEF_WWN_NAME_SIZE];
831 874 UINT8 Reserved1[16]; /* Pad to 32-byte header */
832 875 UINT8 Bitmask[EXT_DEF_EXTERNAL_LUN_BITMASK_BYTES];
833 876 } EXT_EXTERNAL_LUN_BITMASK_ENTRY, *PEXT_EXTERNAL_LUN_BITMASK_ENTRY;
834 877
835 878
836 879 /* Structure as it is stored in the NT registry */
837 880
838 881 typedef struct _LUN_BITMASK_LIST
839 882 {
840 883 UINT16 Version; /* Should be LUN_BITMASK_REGISTRY_VERSION */
841 884 UINT16 EntryCount; /* Count of variable entries following */
842 885 UINT8 Reserved[28]; /* Pad to 32-byte header */
843 886
844 887 EXT_EXTERNAL_LUN_BITMASK_ENTRY
845 888 BitmaskEntry[1]; /* Var-length data */
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846 889 } EXT_LUN_BITMASK_LIST, *PEXT_LUN_BITMASK_LIST;
847 890
848 891
849 892 /* Device database information */
850 893 typedef struct _EXT_DEVICEDATA
851 894 {
852 895 UINT32 TotalDevices; /* Set to total number of device */
853 896 UINT32 ReturnListEntryCount; /* Set to number of device entries */
854 897 /* returned in list. */
855 898
856 - EXT_DEVICEDATAENTRY EntryList[1]; /* Variable length */
899 + EXT_DEVICEDATAENTRY EntryList[1]; /* Variable length */
857 900 } EXT_DEVICEDATA, *PEXT_DEVICEDATA;
858 901
859 902
860 903 /* Swap Target Device Data structure */
861 904 typedef struct _EXT_SWAPTARGETDEVICE
862 905 {
863 906 EXT_DEVICEDATAENTRY CurrentExistDevice;
864 907 EXT_DEVICEDATAENTRY NewDevice;
865 908 } EXT_SWAPTARGETDEVICE, *PEXT_SWAPTARGETDEVICE;
866 909
867 910 #define EXT_DEF_LUN_BITMASK_LIST_MIN_ENTRIES 1
868 911 #define EXT_DEF_LUN_BITMASK_LIST_MAX_ENTRIES 256
869 912
870 913 #ifdef _WIN64
871 914 #define EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE 32
872 915 #else
873 916 #define EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE \
874 917 offsetof(LUN_BITMASK_LIST_BUFFER, asBitmaskEntry)
875 918 #endif
876 919
877 -#define EXT_DEF_LUN_BITMASK_LIST_MIN_SIZE \
920 +#define EXT_DEF_LUN_BITMASK_LIST_MIN_SIZE \
878 921 (EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE + \
879 922 (sizeof (EXT_EXTERNAL_LUN_BITMASK_ENTRY) * \
880 923 EXT_DEF_LUN_BITMASK_LIST_MIN_ENTRIES))
881 -#define EXT_DEF_LUN_BITMASK_LIST_MAX_SIZE \
924 +#define EXT_DEF_LUN_BITMASK_LIST_MAX_SIZE \
882 925 (EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE + \
883 926 (sizeof (EXT_EXTERNAL_LUN_BITMASK_ENTRY) * \
884 927 EXT_DEF_LUN_BITMASK_LIST_MAX_ENTRIES))
885 928 /*
886 929 * LUN mask bit manipulation macros
887 930 *
888 931 * P = Pointer to an EXT_LUN_BIT_MASK union.
889 932 * L = LUN number.
890 933 */
891 934 #define EXT_IS_LUN_BIT_SET(P, L) \
892 935 (((P)->mask[L / 8] & (0x80 >> (L % 8))) ? 1 : 0)
893 936
894 937 #define EXT_SET_LUN_BIT(P, L) \
895 938 ((P)->mask[L / 8] |= (0x80 >> (L % 8)))
896 939
897 940 #define EXT_CLR_LUN_BIT(P, L) \
898 941 ((P)->mask[L / 8] &= ~(0x80 >> (L % 8)))
899 942
900 943 typedef struct _EXT_PORT_PARAM {
901 944 EXT_DEST_ADDR FCScsiAddr;
902 945 UINT16 Mode;
903 946 UINT16 Speed;
904 947 } EXT_PORT_PARAM, *PEXT_PORT_PARAM;
905 948
906 949 #define EXT_IIDMA_MODE_GET 0
907 950 #define EXT_IIDMA_MODE_SET 1
908 951
909 952 /*
910 953 * PCI header structure definitions.
911 954 */
912 955
913 956 typedef struct _PCI_HEADER_T {
914 957 UINT8 signature[2];
915 958 UINT8 reserved[0x16];
916 959 UINT8 dataoffset[2];
917 960 UINT8 pad[6];
918 961 } PCI_HEADER_T, *PPCI_HEADER_T;
919 962
920 963 /*
921 964 * PCI data structure definitions.
922 965 */
923 966 typedef struct _PCI_DATA_T {
924 967 UINT8 signature[4];
925 968 UINT8 vid[2];
926 969 UINT8 did[2];
927 970 UINT8 reserved0[2];
928 971 UINT8 pcidatalen[2];
929 972 UINT8 pcidatarev;
930 973 UINT8 classcode[3];
931 974 UINT8 imagelength[2]; /* In sectors */
932 975 UINT8 revisionlevel[2];
933 976 UINT8 codetype;
934 977 UINT8 indicator;
935 978 UINT8 reserved1[2];
936 979 UINT8 pad[8];
937 980 } PCI_DATA_T, *PPCI_DATA_T;
938 981
939 982 /*
940 983 * Mercury/Menlo
941 984 */
942 985
943 986 #define MENLO_RESET_FLAG_ENABLE_DIAG_FW 1
944 987
945 988 typedef struct _EXT_MENLO_RESET {
946 989 UINT16 Flags;
947 990 UINT16 Reserved;
948 991 } EXT_MENLO_RESET, *PEXT_MENLO_RESET;
949 992
950 993 typedef struct _EXT_MENLO_GET_FW_VERSION {
951 994 UINT32 FwVersion;
952 995 } EXT_MENLO_GET_FW_VERSION, *PEXT_MENLO_GET_FW_VERSION;
953 996
954 997 #define MENLO_UPDATE_FW_FLAG_DIAG_FW 0x0008 /* if flag is cleared then */
955 998 /* it must be an fw op */
956 999 typedef struct _EXT_MENLO_UPDATE_FW {
957 1000 UINT64 pFwDataBytes;
958 1001 UINT32 TotalByteCount;
959 1002 UINT16 Flags;
960 1003 UINT16 Reserved;
961 1004 } EXT_MENLO_UPDATE_FW, *PEXT_MENLO_UPDATE_FW;
962 1005
963 1006 #define CONFIG_PARAM_ID_RESERVED 1
964 1007 #define CONFIG_PARAM_ID_UIF 2
965 1008 #define CONFIG_PARAM_ID_FCOE_COS 3
966 1009 #define CONFIG_PARAM_ID_PAUSE_TYPE 4
967 1010 #define CONFIG_PARAM_ID_TIMEOUTS 5
968 1011
969 1012 #define INFO_DATA_TYPE_CONFIG_LOG_DATA 1 /* Fetch Config Log Data */
970 1013 #define INFO_DATA_TYPE_LOG_DATA 2 /* Fetch Log Data */
971 1014 #define INFO_DATA_TYPE_PORT_STATISTICS 3 /* Fetch Port Statistics */
972 1015 #define INFO_DATA_TYPE_LIF_STATISTICS 4 /* Fetch LIF Statistics */
973 1016 #define INFO_DATA_TYPE_ASIC_STATISTICS 5 /* Fetch ASIC Statistics */
974 1017 #define INFO_DATA_TYPE_CONFIG_PARAMETERS 6 /* Fetch Config Parameters */
975 1018 #define INFO_DATA_TYPE_PANIC_LOG 7 /* Fetch Panic Log */
976 1019
977 1020 /*
978 1021 * InfoContext defines for INFO_DATA_TYPE_LOG_DATA
979 1022 */
980 1023 #define IC_LOG_DATA_LOG_ID_DEBUG_LOG 0
981 1024 #define IC_LOG_DATA_LOG_ID_LEARN_LOG 1
982 1025 #define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG 2
983 1026 #define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG 3
984 1027 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG 4
985 1028 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG 5
986 1029 #define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG 6
987 1030 #define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG 7
988 1031 #define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG 8
989 1032 #define IC_LOG_DATA_LOG_ID_DCX_LOG 9
990 1033
991 1034 /*
992 1035 * InfoContext defines for INFO_DATA_TYPE_PORT_STATISTICS
993 1036 */
994 1037 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0 0
995 1038 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1 1
996 1039 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0 2
997 1040 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1 3
998 1041 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0 4
999 1042 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1 5
1000 1043
1001 1044 /*
1002 1045 * InfoContext defines for INFO_DATA_TYPE_LIF_STATISTICS
1003 1046 */
1004 1047 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0 0
1005 1048 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1 1
1006 1049 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0 2
1007 1050 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1 3
1008 1051 #define IC_LIF_STATISTICS_LIF_NUMBER_CPU 6
1009 1052
1010 1053 typedef struct _EXT_MENLO_ACCESS_PARAMETERS {
1011 1054 union {
1012 1055 struct {
1013 1056 UINT32 StartingAddr;
1014 1057 UINT32 Reserved2;
1015 1058 UINT32 Reserved3;
1016 1059 } MenloMemory; /* For Read & Write Menlo Memory */
1017 1060
1018 1061 struct {
1019 1062 UINT32 ConfigParamID;
1020 1063 UINT32 ConfigParamData0;
1021 1064 UINT32 ConfigParamData1;
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1022 1065 } MenloConfig; /* For change Configuration */
1023 1066
1024 1067 struct {
1025 1068 UINT32 InfoDataType;
1026 1069 UINT32 InfoContext;
1027 1070 UINT32 Reserved;
1028 1071 } MenloInfo; /* For fetch Menlo Info */
1029 1072 } ap;
1030 1073 } EXT_MENLO_ACCESS_PARAMETERS, *PEXT_MENLO_ACCESS_PARAMETERS;
1031 1074
1032 -#define INFO_DATA_TYPE_LOG_CONFIG_TBC ((10*7)+1)*4
1075 +#define INFO_DATA_TYPE_LOG_CONFIG_TBC ((10 * 7) + 1) * 4
1033 1076 #define INFO_DATA_TYPE_PORT_STAT_ETH_TBC 0x194
1034 1077 #define INFO_DATA_TYPE_PORT_STAT_FC_TBC 0xC0
1035 1078 #define INFO_DATA_TYPE_LIF_STAT_TBC 0x40
1036 1079 #define INFO_DATA_TYPE_ASIC_STAT_TBC 0x5F8
1037 1080 #define INFO_DATA_TYPE_CONFIG_TBC 0x140
1038 1081
1039 1082 #define MENLO_OP_READ_MEM 0 /* Read Menlo Memory */
1040 1083 #define MENLO_OP_WRITE_MEM 1 /* Write Menlo Memory */
1041 1084 #define MENLO_OP_CHANGE_CONFIG 2 /* Change Configuration */
1042 1085 #define MENLO_OP_GET_INFO 3 /* Fetch Menlo Info (Logs, & */
1043 1086 /* Statistics, Configuration) */
1044 1087
1045 1088 typedef struct _EXT_MENLO_MANAGE_INFO {
1046 1089 UINT64 pDataBytes;
1047 1090 EXT_MENLO_ACCESS_PARAMETERS Parameters;
1048 1091 UINT32 TotalByteCount;
1049 1092 UINT16 Operation;
1050 1093 UINT16 Reserved;
1051 1094 } EXT_MENLO_MANAGE_INFO, *PEXT_MENLO_MANAGE_INFO;
1052 1095
1053 1096 #define MENLO_FC_CHECKSUM_FAILURE 0x01
1054 1097 #define MENLO_FC_INVALID_LENGTH 0x02
1055 1098 #define MENLO_FC_INVALID_ADDRESS 0x04
1056 1099 #define MENLO_FC_INVALID_CONFIG_ID_TYPE 0x05
1057 1100 #define MENLO_FC_INVALID_CONFIG_DATA 0x06
1058 1101 #define MENLO_FC_INVALID_INFO_CONTEXT 0x07
1059 1102
1060 1103 typedef struct _EXT_MENLO_MGT {
1061 1104 union {
1062 1105 EXT_MENLO_RESET MenloReset;
1063 1106 EXT_MENLO_GET_FW_VERSION MenloGetFwVer;
1064 1107 EXT_MENLO_UPDATE_FW MenloUpdateFw;
1065 1108 EXT_MENLO_MANAGE_INFO MenloManageInfo;
1066 1109 } sp;
1067 1110 } EXT_MENLO_MGT, *PEXT_MENLO_MGT;
1068 1111
1069 1112 /*
1070 1113 * vport enum definations
1071 1114 */
1072 1115 typedef enum vport_options {
1073 1116 EXT_VPO_LOGIN_RETRY_ENABLE = 0,
1074 1117 EXT_VPO_PERSISTENT = 1,
1075 1118 EXT_VPO_QOS_BW = 2,
1076 1119 EXT_VPO_VFABRIC_ENABLE = 3
1077 1120 } vport_options_t;
1078 1121
1079 1122 /*
1080 1123 * vport struct definations
1081 1124 */
1082 1125 #define MAX_DEV_PATH 256
1083 1126 #define MAX_VP_ID 256
1084 1127 #define EXT_OLD_VPORT_ID_CNT_SIZE 260
1085 1128 typedef struct _EXT_VPORT_ID_CNT {
1086 1129 UINT32 VpCnt;
1087 1130 UINT8 VpId[MAX_VP_ID];
1088 1131 UINT8 vp_path[MAX_VP_ID][MAX_DEV_PATH];
1089 1132 INT32 VpDrvInst[MAX_VP_ID];
1090 1133 } EXT_VPORT_ID_CNT, *PEXT_VPORT_ID_CNT;
1091 1134
1092 1135 typedef struct _EXT_VPORT_PARAMS {
1093 1136 UINT32 vp_id;
1094 1137 vport_options_t options;
1095 1138 UINT8 wwpn[EXT_DEF_WWN_NAME_SIZE];
1096 1139 UINT8 wwnn[EXT_DEF_WWN_NAME_SIZE];
1097 1140 } EXT_VPORT_PARAMS, *PEXT_VPORT_PARAMS;
1098 1141
1099 1142 typedef struct _EXT_VPORT_INFO {
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1100 1143 UINT32 free;
1101 1144 UINT32 used;
1102 1145 UINT32 id;
1103 1146 UINT32 state;
1104 1147 UINT32 bound;
1105 1148 UINT8 wwnn[EXT_DEF_WWN_NAME_SIZE];
1106 1149 UINT8 wwpn[EXT_DEF_WWN_NAME_SIZE];
1107 1150 UINT8 reserved[220];
1108 1151 } EXT_VPORT_INFO, *PEXT_VPORT_INFO;
1109 1152
1153 +typedef struct _EXT_BOARD_TEMP {
1154 + UINT16 IntTemp;
1155 + UINT16 FracTemp;
1156 + UINT8 Reserved[60];
1157 +} EXT_BOARD_TEMP, *PEXT_BOARD_TEMP;
1158 +
1159 +/* ASIC TEMPERATURE defines */
1160 +#define EXT_DEF_ASIC_TEMP_COMMAND_COMPLETE 0x4000
1161 +#define EXT_DEF_ASIC_TEMP_HOST_INT_ERR 0x4002
1162 +#define EXT_DEF_ASIC_TEMP_COMMAND_ERR 0x4005
1163 +#define EXT_DEF_ASIC_TEMP_COMMAND_PARAM_ERR 0x4006
1164 +
1165 +typedef struct _EXT_SERDES_REG {
1166 + UINT16 addr;
1167 + UINT16 val;
1168 +} EXT_SERDES_REG, *PEXT_SERDES_REG;
1169 +
1170 +typedef struct _EXT_VF_STATE {
1171 + UINT32 NoOfVFConfigured;
1172 + UINT32 NoOfVFActive;
1173 +} EXT_VF_STATE, *PEXT_VF_STATE;
1174 +
1175 +typedef struct _EXT_SERDES_REG_EX {
1176 + UINT32 addr;
1177 + UINT32 val;
1178 +} EXT_SERDES_REG_EX, *PEXT_SERDES_REG_EX;
1179 +
1110 1180 #define EXT_DEF_FCF_LIST_SIZE 4096 /* Bytes */
1111 1181 #define FCF_INFO_RETURN_ALL 0
1112 1182 #define FCF_INFO_RETURN_ONE 1
1113 1183
1114 1184 typedef struct _EXT_FCF_INFO {
1115 1185 UINT16 CntrlFlags; /* 2 */
1116 1186 UINT16 FcfId; /* 2 */
1117 1187 UINT16 VlanId; /* 2 */
1118 1188 UINT16 FcfFlags; /* 2 */
1119 1189 UINT16 FcfAdvertPri; /* 2 */
1120 1190 UINT16 FcfMacAddr1; /* 2 */
1121 1191 UINT16 FcfMacAddr2; /* 2 */
1122 1192 UINT16 FcfMacAddr3; /* 2 */
1123 1193 UINT16 FcfMapHi; /* 2 */
1124 1194 UINT16 FcfMapLow; /* 2 */
1125 1195 UINT8 SwitchName[8]; /* 8 */
1126 1196 UINT8 FabricName[8]; /* 8 */
1127 1197 UINT8 Reserved1[8]; /* 8 */
1128 1198 UINT16 CommFeatures; /* 2 */
1129 1199 UINT16 Reserved2; /* 2 */
1130 1200 UINT32 RATovVal; /* 4 */
1131 1201 UINT32 EDTovVal; /* 4 */
1132 1202 UINT8 Reserved3[8]; /* 8 */
1133 1203 } EXT_FCF_INFO, *PEXT_FCF_INFO;
1134 1204
1135 1205 typedef struct _EXT_FCF_LIST {
1136 1206 UINT32 Options;
1137 1207 UINT32 FcfIndex;
1138 1208 UINT32 BufSize;
1139 1209 EXT_FCF_INFO pFcfInfo[1];
1140 1210 } EXT_FCF_LIST, *PEXT_FCF_LIST;
1141 1211
1142 1212 typedef struct _EXT_RESOURCE_CNTS {
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1143 1213 UINT32 OrgTgtXchgCtrlCnt; /* 4 */
1144 1214 UINT32 CurTgtXchgCtrlCnt; /* 4 */
1145 1215 UINT32 CurXchgCtrlCnt; /* 4 */
1146 1216 UINT32 OrgXchgCtrlCnt; /* 4 */
1147 1217 UINT32 CurIocbBufCnt; /* 4 */
1148 1218 UINT32 OrgIocbBufCnt; /* 4 */
1149 1219 UINT32 NoOfSupVPs; /* 4 */
1150 1220 UINT32 NoOfSupFCFs; /* 4 */
1151 1221 } EXT_RESOURCE_CNTS, *PEXT_RESOURCE_CNTS;
1152 1222
1223 +#define FW_FCE_SIZE (0x4000 * 4) /* bytes - 16kb multiples */
1224 +
1225 +typedef struct _EXT_FW_FCE_TRACE {
1226 + UINT16 Registers[32];
1227 + UINT8 TraceData[FW_FCE_SIZE]; /* Variable length */
1228 +} EXT_FW_FCE_TRACE, *PEXT_FW_FCE_TRACE;
1229 +
1230 +/* Request Buffer for ELS PT */
1231 +#define EXT_DEF_WWPN_VALID 1
1232 +#define EXT_DEF_WWNN_VALID 2
1233 +#define EXT_DEF_PID_VALID 4
1234 +
1235 +typedef struct _EXT_ELS_PT_REQ {
1236 + UINT16 ValidMask;
1237 + UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE];
1238 + UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE];
1239 + UINT8 Id[EXT_DEF_PORTID_SIZE];
1240 + UINT8 Reserved[10];
1241 +} EXT_ELS_PT_REQ, *PEXT_ELS_PT_REQ;
1242 +
1243 +typedef struct _EXT_FLASH_UPDATE_CAPS {
1244 + UINT64 Capabilities;
1245 + UINT32 OutageDuration;
1246 + UINT8 Reserved[20];
1247 +} EXT_FLASH_UPDATE_CAPS, *PEXT_FLASH_UPDATE_CAPS;
1248 +
1249 +/* BB_CR Status */
1250 +#define EXT_DEF_BBCR_STATUS_DISABLED 0
1251 +#define EXT_DEF_BBCR_STATUS_ENABLED 1
1252 +#define EXT_DEF_BBCR_STATUS_UNKNOWN 2
1253 +
1254 +/* BB_CR State */
1255 +#define EXT_DEF_BBCR_STATE_OFFLINE 0
1256 +#define EXT_DEF_BBCR_STATE_ONLINE 1
1257 +
1258 +/* BB_CR Offline Reason Code */
1259 +#define EXT_DEF_BBCR_REASON_PORT_SPEED 1
1260 +#define EXT_DEF_BBCR_REASON_PEER_PORT 2
1261 +#define EXT_DEF_BBCR_REASON_SWITCH 3
1262 +#define EXT_DEF_BBCR_REASON_LOGIN_REJECT 4
1263 +
1264 +typedef struct _EXT_BBCR_DATA {
1265 + UINT8 Status; /* 1 - enabled, 0 - Disabled */
1266 + UINT8 State; /* 1 - online, 0 - offline */
1267 + UINT8 ConfiguredBBSCN; /* 0-15 */
1268 + UINT8 NegotiatedBBSCN; /* 0-15 */
1269 + UINT8 OfflineReasonCode;
1270 + UINT16 mbx1; /* Port State */
1271 + UINT8 Reserved[9];
1272 +} EXT_BBCR_DATA, *PEXT_BBCR_DATA;
1273 +
1153 1274 #ifdef __cplusplus
1154 1275 }
1155 1276 #endif
1156 1277
1157 1278 #endif /* _EXIOCT_H */
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