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NEX-8705 Drivers for ATTO Celerity FC-162E Gen 5 and Celerity FC-162P Gen 6 16GB FC cards support
Reviewed by: Dan Fields <dan.fields@nexenta.com>
Reviewed by: Rick McNeal <rick.mcneal@nexenta.com>
NEX-1878 update emlxs from source provided by Emulex


 459 #define ASYNC_EVENT_FC_LINK_ATT         1
 460 #define ASYNC_EVENT_FC_SHARED_LINK_ATT  2
 461 
 462 /* LINK_STATE - link_status defines */
 463 #define ASYNC_EVENT_PHYS_LINK_DOWN      0
 464 #define ASYNC_EVENT_PHYS_LINK_UP        1
 465 #define ASYNC_EVENT_LOGICAL_LINK_DOWN   2
 466 #define ASYNC_EVENT_LOGICAL_LINK_UP     3
 467 
 468 /* FCOE_FIP - evt_type defines */
 469 #define ASYNC_EVENT_NEW_FCF_DISC        1
 470 #define ASYNC_EVENT_FCF_TABLE_FULL      2
 471 #define ASYNC_EVENT_FCF_DEAD            3
 472 #define ASYNC_EVENT_VIRT_LINK_CLEAR     4
 473 #define ASYNC_EVENT_FCF_MODIFIED        5
 474 
 475 /* GRP_5 - evt_type defines */
 476 #define ASYNC_EVENT_QOS_SPEED           1
 477 
 478 /* PORT - evt_type defines */


 479 #define ASYNC_EVENT_MISCONFIG_PORT      9
 480 
 481 typedef struct CQE_MBOX
 482 {
 483 #ifdef EMLXS_BIG_ENDIAN
 484         uint16_t        extend_status;  /* Word 0 */
 485         uint16_t        cmpl_status;
 486 
 487         uint32_t        tag_low;        /* Word 1 */
 488         uint32_t        tag_high;       /* Word 2 */
 489 
 490         uint32_t        valid: 1;       /* Word 3 */
 491         uint32_t        async_evt: 1;
 492         uint32_t        hpi: 1;
 493         uint32_t        completed: 1;
 494         uint32_t        consumed: 1;
 495         uint32_t        Rsvd1: 27;
 496 #endif
 497 #ifdef EMLXS_LITTLE_ENDIAN
 498         uint16_t        cmpl_status;




 459 #define ASYNC_EVENT_FC_LINK_ATT         1
 460 #define ASYNC_EVENT_FC_SHARED_LINK_ATT  2
 461 
 462 /* LINK_STATE - link_status defines */
 463 #define ASYNC_EVENT_PHYS_LINK_DOWN      0
 464 #define ASYNC_EVENT_PHYS_LINK_UP        1
 465 #define ASYNC_EVENT_LOGICAL_LINK_DOWN   2
 466 #define ASYNC_EVENT_LOGICAL_LINK_UP     3
 467 
 468 /* FCOE_FIP - evt_type defines */
 469 #define ASYNC_EVENT_NEW_FCF_DISC        1
 470 #define ASYNC_EVENT_FCF_TABLE_FULL      2
 471 #define ASYNC_EVENT_FCF_DEAD            3
 472 #define ASYNC_EVENT_VIRT_LINK_CLEAR     4
 473 #define ASYNC_EVENT_FCF_MODIFIED        5
 474 
 475 /* GRP_5 - evt_type defines */
 476 #define ASYNC_EVENT_QOS_SPEED           1
 477 
 478 /* PORT - evt_type defines */
 479 #define ASYNC_EVENT_PORT_OTEMP          2
 480 #define ASYNC_EVENT_PORT_NTEMP          3
 481 #define ASYNC_EVENT_MISCONFIG_PORT      9
 482 
 483 typedef struct CQE_MBOX
 484 {
 485 #ifdef EMLXS_BIG_ENDIAN
 486         uint16_t        extend_status;  /* Word 0 */
 487         uint16_t        cmpl_status;
 488 
 489         uint32_t        tag_low;        /* Word 1 */
 490         uint32_t        tag_high;       /* Word 2 */
 491 
 492         uint32_t        valid: 1;       /* Word 3 */
 493         uint32_t        async_evt: 1;
 494         uint32_t        hpi: 1;
 495         uint32_t        completed: 1;
 496         uint32_t        consumed: 1;
 497         uint32_t        Rsvd1: 27;
 498 #endif
 499 #ifdef EMLXS_LITTLE_ENDIAN
 500         uint16_t        cmpl_status;