NEX-8705 Drivers for ATTO Celerity FC-162E Gen 5 and Celerity FC-162P Gen 6 16GB FC cards support
Reviewed by: Dan Fields <dan.fields@nexenta.com>
Reviewed by: Rick McNeal <rick.mcneal@nexenta.com>
NEX-1878 update emlxs from source provided by Emulex

@@ -1570,10 +1570,11 @@
 #define LA_2GHZ_LINK   0x08     /* lnkSpeed */
 #define LA_4GHZ_LINK   0x10     /* lnkSpeed */
 #define LA_8GHZ_LINK   0x20     /* lnkSpeed */
 #define LA_10GHZ_LINK  0x40     /* lnkSpeed */
 #define LA_16GHZ_LINK  0x80     /* lnkSpeed */
+#define LA_32GHZ_LINK  0x90     /* lnkSpeed */
 } READ_LA_VAR;
 
 
 /* Structure for MB Command CLEAR_LA (22) */
 

@@ -2723,10 +2724,11 @@
 #define EMLXS_MAX_NONEMBED_SIZE         (1024 * 64)
 
 /* SLI_CONFIG Mailbox commands */
 
 #define IOCTL_SUBSYSTEM_COMMON                  0x01
+#define IOCTL_SUBSYSTEM_LOWLEVEL                0x0B
 #define IOCTL_SUBSYSTEM_FCOE                    0x0C
 #define IOCTL_SUBSYSTEM_DCBX                    0x10
 
 #define COMMON_OPCODE_READ_FLASHROM             0x06
 #define COMMON_OPCODE_WRITE_FLASHROM            0x07

@@ -2771,10 +2773,12 @@
 #define COMMON_OPCODE_WRITE_OBJ                 0xAC
 #define COMMON_OPCODE_READ_OBJ_LIST             0xAD
 #define COMMON_OPCODE_DELETE_OBJ                0xAE
 #define COMMON_OPCODE_GET_SLI4_PARAMS           0xB5
 
+#define LOWLEVEL_OPCODE_GPIO_RDWR               0x30
+
 #define FCOE_OPCODE_WQ_CREATE                   0x01
 #define FCOE_OPCODE_CFG_POST_SGL_PAGES          0x03
 #define FCOE_OPCODE_RQ_CREATE                   0x05
 #define FCOE_OPCODE_READ_FCF_TABLE              0x08
 #define FCOE_OPCODE_ADD_FCF_TABLE               0x09

@@ -3157,12 +3161,38 @@
 
         }       params;
 
 } IOCTL_COMMON_QUERY_FIRMWARE_CONFIG;
 
+/* IOCTL_LOWLEVEL_GPIO_RDWR */
+typedef struct _IOCTL_LOWLEVEL_GPIO_RDWR
+{
+        union
+        {
+                struct
+                {
+                        uint32_t        GpioAction;
+#define LOWLEVEL_GPIO_ACT_READ          0
+#define LOWLEVEL_GPIO_ACT_WRITE 1
+#define LOWLEVEL_GPIO_ACT_RDSENSE       2
+#define LOWLEVEL_GPIO_ACT_STSENSE       3
 
+                        uint32_t        LogicalPin;
+                        uint32_t        PinValue;
+#define LOWLEVEL_GPIO_STSENSE_IN        0
+#define LOWLEVEL_GPIO_STSENSE_OUT       1
 
+                        uint32_t        OutputValue;
+                } request;
+
+                struct
+                {
+                        uint32_t        PinValue;
+                } response;
+        } params;
+} IOCTL_LOWLEVEL_GPIO_RDWR;
+
 /* IOCTL_FCOE_READ_FCF_TABLE */
 typedef struct
 {
         uint32_t        max_recv_size;
         uint32_t        fka_adv_period;