580 for (i = 0; i != 2; i++) {
581 char tmp[KSTAT_STRLEN];
582
583 (void) snprintf(tmp, KSTAT_STRLEN - 1, "Ant %d power", i);
584 kstat_named_init(&sc->sc_txpower->txchain[i].power,
585 tmp, KSTAT_DATA_LONG);
586
587 (void) snprintf(tmp, KSTAT_STRLEN - 1, "Ant %d gain", i);
588 kstat_named_init(&sc->sc_txpower->txchain[i].gain,
589 tmp, KSTAT_DATA_LONG);
590
591 (void) snprintf(tmp, KSTAT_STRLEN - 1, "Ant %d temperature", i);
592 kstat_named_init(&sc->sc_txpower->txchain[i].temp,
593 tmp, KSTAT_DATA_LONG);
594
595 (void) snprintf(tmp, KSTAT_STRLEN - 1,
596 "Ant %d temperature compensation", i);
597 kstat_named_init(&sc->sc_txpower->txchain[i].tcomp,
598 tmp, KSTAT_DATA_LONG);
599
600 for (r = 0; r != IWN_RIDX_MAX; r++) {
601 (void) snprintf(tmp, KSTAT_STRLEN - 1,
602 "Ant %d Rate %d RF gain", i, r);
603 kstat_named_init(
604 &sc->sc_txpower->txchain[i].rate[r].rf_gain,
605 tmp, KSTAT_DATA_LONG);
606
607 (void) snprintf(tmp, KSTAT_STRLEN - 1,
608 "Ant %d Rate %d DSP gain", i, r);
609 kstat_named_init(
610 &sc->sc_txpower->txchain[0].rate[0].dsp_gain,
611 tmp, KSTAT_DATA_LONG);
612 }
613 }
614 }
615
616 static void
617 iwn_kstat_init_6000(struct iwn_softc *sc)
618 {
619 if (sc->sc_ks_toff != NULL)
620 sc->sc_ks_toff->ks_lock = &sc->sc_mtx;
2032 return 0;
2033
2034 fail: iwn_free_tx_ring(sc, ring);
2035 return error;
2036 }
2037
2038 static void
2039 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2040 {
2041 int i;
2042
2043 if (ring->qid < 4)
2044 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2045 struct iwn_tx_data *data = &ring->data[i];
2046
2047 (void) ddi_dma_sync(data->dma_data.dma_hdl, 0, 0,
2048 DDI_DMA_SYNC_FORDEV);
2049 }
2050
2051 /* Clear TX descriptors. */
2052 memset(ring->desc, 0, ring->desc_dma.size);
2053 (void) ddi_dma_sync(ring->desc_dma.dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV);
2054 sc->qfullmsk &= ~(1 << ring->qid);
2055 ring->queued = 0;
2056 ring->cur = 0;
2057 }
2058
2059 static void
2060 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2061 {
2062 _NOTE(ARGUNUSED(sc));
2063 int i;
2064
2065 iwn_dma_contig_free(&ring->desc_dma);
2066 iwn_dma_contig_free(&ring->cmd_dma);
2067
2068 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2069 struct iwn_tx_data *data = &ring->data[i];
2070
2071 if (data->dma_data.dma_hdl)
2072 iwn_dma_contig_free(&data->dma_data);
2073 }
2074 }
2075
2076 static void
2077 iwn5000_ict_reset(struct iwn_softc *sc)
2078 {
2079 /* Disable interrupts. */
2080 IWN_WRITE(sc, IWN_INT_MASK, 0);
2081
2082 /* Reset ICT table. */
2083 memset(sc->ict, 0, IWN_ICT_SIZE);
2084 sc->ict_cur = 0;
2085
2086 /* Set physical address of ICT table (4KB aligned). */
2087 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
2088 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
2089
2090 /* Enable periodic RX interrupt. */
2091 sc->int_mask |= IWN_INT_RX_PERIODIC;
2092 /* Switch to ICT interrupt mode in driver. */
2093 sc->sc_flags |= IWN_FLAG_USE_ICT;
2094
2095 /* Re-enable interrupts. */
2096 IWN_WRITE(sc, IWN_INT, 0xffffffff);
2097 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2098 }
2099
2100 static int
2101 iwn_read_eeprom(struct iwn_softc *sc)
2102 {
2103 struct iwn_ops *ops = &sc->ops;
2359 sc->maxpwr[chan] = channels[i].maxpwr;
2360
2361 IWN_DBG("adding chan %d flags=0x%x maxpwr=%d",
2362 chan, channels[i].flags, sc->maxpwr[chan]);
2363 }
2364 }
2365
2366 static void
2367 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
2368 {
2369 struct iwn_eeprom_enhinfo enhinfo[35];
2370 uint16_t val, base;
2371 int8_t maxpwr;
2372 int i;
2373
2374 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2375 base = le16toh(val);
2376 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
2377 enhinfo, sizeof enhinfo);
2378
2379 memset(sc->enh_maxpwr, 0, sizeof sc->enh_maxpwr);
2380 for (i = 0; i < __arraycount(enhinfo); i++) {
2381 if (enhinfo[i].chan == 0 || enhinfo[i].reserved != 0)
2382 continue; /* Skip invalid entries. */
2383
2384 maxpwr = 0;
2385 if (sc->txchainmask & IWN_ANT_A)
2386 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
2387 if (sc->txchainmask & IWN_ANT_B)
2388 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
2389 if (sc->txchainmask & IWN_ANT_C)
2390 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
2391 if (sc->ntxchains == 2)
2392 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
2393 else if (sc->ntxchains == 3)
2394 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
2395 maxpwr /= 2; /* Convert half-dBm to dBm. */
2396
2397 IWN_DBG("enhinfo %d, maxpwr=%d", i, maxpwr);
2398 sc->enh_maxpwr[i] = maxpwr;
2399 }
2618
2619 mutex_exit(&sc->sc_mtx);
2620 }
2621
2622 /*
2623 * Process an RX_PHY firmware notification. This is usually immediately
2624 * followed by an MPDU_RX_DONE notification.
2625 */
2626 static void
2627 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2628 struct iwn_rx_data *data)
2629 {
2630 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
2631
2632 (void) ddi_dma_sync(data->dma_data.dma_hdl, sizeof (*desc),
2633 sizeof (*stat), DDI_DMA_SYNC_FORKERNEL);
2634
2635 DTRACE_PROBE1(rx__phy, struct iwn_rx_stat *, stat);
2636
2637 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
2638 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
2639 sc->last_rx_valid = 1;
2640 }
2641
2642 /*
2643 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
2644 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
2645 */
2646 static void
2647 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2648 struct iwn_rx_data *data)
2649 {
2650 struct iwn_ops *ops = &sc->ops;
2651 struct ieee80211com *ic = &sc->sc_ic;
2652 struct iwn_rx_ring *ring = &sc->rxq;
2653 struct ieee80211_frame *wh;
2654 struct ieee80211_node *ni;
2655 mblk_t *m;
2656 struct iwn_rx_stat *stat;
2657 char *head;
2658 uint32_t flags;
2801 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
2802 if (sc->hw_type < IWN_HW_REV_TYPE_6000 &&
2803 sc->hw_type != IWN_HW_REV_TYPE_5150)
2804 idx = 3;
2805 break;
2806 case IWN5000_PHY_CALIB_BASE_BAND:
2807 idx = 4;
2808 break;
2809 }
2810 if (idx == -1) /* Ignore other results. */
2811 return;
2812
2813 /* Save calibration result. */
2814 if (sc->calibcmd[idx].buf != NULL)
2815 kmem_free(sc->calibcmd[idx].buf, sc->calibcmd[idx].len);
2816 sc->calibcmd[idx].buf = kmem_zalloc(len, KM_NOSLEEP);
2817 if (sc->calibcmd[idx].buf == NULL) {
2818 return;
2819 }
2820 sc->calibcmd[idx].len = len;
2821 memcpy(sc->calibcmd[idx].buf, calib, len);
2822 }
2823
2824 /*
2825 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
2826 * The latter is sent by the firmware after each received beacon.
2827 */
2828 static void
2829 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2830 struct iwn_rx_data *data)
2831 {
2832 struct iwn_ops *ops = &sc->ops;
2833 struct ieee80211com *ic = &sc->sc_ic;
2834 struct iwn_calib_state *calib = &sc->calib;
2835 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
2836 int temp = 0;
2837
2838 /* Ignore statistics received during a scan. */
2839 if (ic->ic_state != IEEE80211_S_RUN)
2840 return;
2841
3071 break;
3072 }
3073 case IWN_UC_READY:
3074 {
3075 struct iwn_ucode_info *uc =
3076 (struct iwn_ucode_info *)(desc + 1);
3077
3078 /* The microcontroller is ready. */
3079 (void) ddi_dma_sync(data->dma_data.dma_hdl,
3080 sizeof (*desc), sizeof (*uc),
3081 DDI_DMA_SYNC_FORKERNEL);
3082 DTRACE_PROBE1(uc__ready, struct iwn_ucode_info *, uc)
3083
3084 if (le32toh(uc->valid) != 1) {
3085 dev_err(sc->sc_dip, CE_WARN,
3086 "!microcontroller initialization failed");
3087 break;
3088 }
3089 if (uc->subtype == IWN_UCODE_INIT) {
3090 /* Save microcontroller report. */
3091 memcpy(&sc->ucode_info, uc, sizeof (*uc));
3092 }
3093 /* Save the address of the error log in SRAM. */
3094 sc->errptr = le32toh(uc->errptr);
3095 break;
3096 }
3097 case IWN_STATE_CHANGED:
3098 {
3099 /*LINTED: E_PTR_BAD_CAST_ALIGN*/
3100 uint32_t *status = (uint32_t *)(desc + 1);
3101
3102 /* Enabled/disabled notification. */
3103 (void) ddi_dma_sync(data->dma_data.dma_hdl,
3104 sizeof (*desc), sizeof (*status),
3105 DDI_DMA_SYNC_FORKERNEL);
3106 DTRACE_PROBE1(state__changed, uint32_t, *status);
3107
3108 if (le32toh(*status) & 1) {
3109 /* The radio button has to be pushed. */
3110 dev_err(sc->sc_dip, CE_WARN,
3111 "!Radio transmitter is off");
3913 tx->data_ntries = 15;
3914 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
3915 tx->plcp = rinfo->plcp;
3916 tx->rflags = rinfo->flags;
3917 if (tx->id == sc->broadcast_id) {
3918 /* Group or management frame. */
3919 tx->linkq = 0;
3920 /* XXX Alternate between antenna A and B? */
3921 txant = IWN_LSB(sc->txchainmask);
3922 tx->rflags |= IWN_RFLAG_ANT(txant);
3923 } else {
3924 tx->linkq = in->in_rates.ir_nrates - in->in_txrate - 1;
3925 flags |= IWN_TX_LINKQ; /* enable MRR */
3926 }
3927 /* Set physical address of "scratch area". */
3928 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
3929 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
3930
3931 /* Copy 802.11 header in TX command. */
3932 /* XXX NetBSD changed this in rev 1.20 */
3933 memcpy(((uint8_t *)tx) + sizeof(*tx), wh, hdrlen);
3934 mp->b_rptr += hdrlen;
3935
3936 bcopy(mp->b_rptr, data->dma_data.vaddr, totlen - hdrlen);
3937 tx->security = 0;
3938 tx->flags = htole32(flags);
3939
3940 data->ni = in;
3941
3942 DTRACE_PROBE4(tx, int, ring->qid, int, ring->cur, size_t, MBLKL(mp),
3943 int, data->dma_data.ncookies);
3944
3945 /* Fill TX descriptor. */
3946 desc->nsegs = 1 + data->dma_data.ncookies;
3947 /* First DMA segment is used by the TX command. */
3948 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
3949 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
3950 (4 + sizeof (*tx) + hdrlen + pad) << 4);
3951
3952 /* Other DMA segments are for data payload. */
3953 cookie = data->dma_data.cookie;
4414 data = &ring->data[ring->cur];
4415 totlen = 4 + size;
4416
4417 if (size > sizeof (cmd->data)) {
4418 /* Command is too large to fit in a descriptor. */
4419 if (iwn_dma_contig_alloc(sc, &data->cmd_dma, totlen,
4420 DDI_DMA_CONSISTENT | DDI_DMA_RDWR, (void **)&cmd,
4421 &iwn_dma_accattr, 1) != DDI_SUCCESS)
4422 return ENOBUFS;
4423 paddr = data->cmd_dma.paddr;
4424 } else {
4425 cmd = &ring->cmd[ring->cur];
4426 paddr = data->cmd_paddr;
4427 }
4428
4429 cmd->code = code;
4430 cmd->flags = 0;
4431 cmd->qid = ring->qid;
4432 cmd->idx = ring->cur;
4433 bzero(cmd->data, size);
4434 memcpy(cmd->data, buf, size);
4435
4436 bzero(desc, sizeof(*desc));
4437 desc->nsegs = 1;
4438 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
4439 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
4440
4441 if (size > sizeof cmd->data) {
4442 (void) ddi_dma_sync(data->cmd_dma.dma_hdl, 0, totlen,
4443 DDI_DMA_SYNC_FORDEV);
4444 } else {
4445 (void) ddi_dma_sync(ring->cmd_dma.dma_hdl,
4446 ring->cur * sizeof (*cmd),
4447 totlen, DDI_DMA_SYNC_FORDEV);
4448 }
4449 (void) ddi_dma_sync(ring->desc_dma.dma_hdl,
4450 ring->cur * sizeof (*desc),
4451 sizeof (*desc), DDI_DMA_SYNC_FORDEV);
4452
4453 /* Update TX scheduler. */
4454 sc->ops.update_sched(sc, ring->qid, ring->cur, 0, 0);
4468
4469 ret = (sc->sc_cmd_flag == SC_CMD_FLG_DONE) ? IWN_SUCCESS : IWN_FAIL;
4470 sc->sc_cmd_flag = SC_CMD_FLG_NONE;
4471
4472 return (ret);
4473 }
4474
4475 static int
4476 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
4477 {
4478 struct iwn4965_node_info hnode;
4479 char *src, *dst;
4480
4481 /*
4482 * We use the node structure for 5000 Series internally (it is
4483 * a superset of the one for 4965AGN). We thus copy the common
4484 * fields before sending the command.
4485 */
4486 src = (char *)node;
4487 dst = (char *)&hnode;
4488 memcpy(dst, src, 48);
4489 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
4490 memcpy(dst + 48, src + 72, 20);
4491 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
4492 }
4493
4494 static int
4495 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
4496 {
4497 /* Direct mapping. */
4498 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
4499 }
4500
4501 static int
4502 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)
4503 {
4504 struct iwn_node *wn = (void *)ni;
4505 struct ieee80211_rateset *rs = &ni->in_rates;
4506 struct iwn_cmd_link_quality linkq;
4507 const struct iwn_rate *rinfo;
4508 uint8_t txant;
4509 int i, txrate;
4510
4511 /* Use the first valid TX antenna. */
4512 txant = IWN_LSB(sc->txchainmask);
4513
4514 memset(&linkq, 0, sizeof linkq);
4515 linkq.id = wn->id;
4516 linkq.antmsk_1stream = txant;
4517 linkq.antmsk_2stream = IWN_ANT_AB;
4518 linkq.ampdu_max = 31;
4519 linkq.ampdu_threshold = 3;
4520 linkq.ampdu_limit = htole16(4000); /* 4ms */
4521
4522 /* Start at highest available bit-rate. */
4523 txrate = rs->ir_nrates - 1;
4524 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
4525 rinfo = &iwn_rates[wn->ridx[txrate]];
4526 linkq.retry[i].plcp = rinfo->plcp;
4527 linkq.retry[i].rflags = rinfo->flags;
4528 linkq.retry[i].rflags |= IWN_RFLAG_ANT(txant);
4529 /* Next retry at immediate lower bit-rate. */
4530 if (txrate > 0)
4531 txrate--;
4532 }
4533 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);
4534 }
4535
4536 /*
4537 * Broadcast node is used to send group-addressed and management frames.
4538 */
4539 static int
4540 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
4541 {
4542 struct iwn_ops *ops = &sc->ops;
4543 struct iwn_node_info node;
4544 struct iwn_cmd_link_quality linkq;
4545 const struct iwn_rate *rinfo;
4546 uint8_t txant;
4547 int i, error;
4548
4549 memset(&node, 0, sizeof node);
4550 IEEE80211_ADDR_COPY(node.macaddr, etherbroadcastaddr);
4551 node.id = sc->broadcast_id;
4552 DTRACE_PROBE(add__broadcast__node);
4553 if ((error = ops->add_node(sc, &node, async)) != 0)
4554 return error;
4555
4556 /* Use the first valid TX antenna. */
4557 txant = IWN_LSB(sc->txchainmask);
4558
4559 memset(&linkq, 0, sizeof linkq);
4560 linkq.id = sc->broadcast_id;
4561 linkq.antmsk_1stream = txant;
4562 linkq.antmsk_2stream = IWN_ANT_AB;
4563 linkq.ampdu_max = 64;
4564 linkq.ampdu_threshold = 3;
4565 linkq.ampdu_limit = htole16(4000); /* 4ms */
4566
4567 /* Use lowest mandatory bit-rate. */
4568 rinfo = (sc->sc_ic.ic_curmode != IEEE80211_MODE_11A) ?
4569 &iwn_rates[IWN_RIDX_CCK1] : &iwn_rates[IWN_RIDX_OFDM6];
4570 linkq.retry[0].plcp = rinfo->plcp;
4571 linkq.retry[0].rflags = rinfo->flags;
4572 linkq.retry[0].rflags |= IWN_RFLAG_ANT(txant);
4573 /* Use same bit-rate for all TX retries. */
4574 for (i = 1; i < IWN_MAX_TX_RETRIES; i++) {
4575 linkq.retry[i].plcp = linkq.retry[0].plcp;
4576 linkq.retry[i].rflags = linkq.retry[0].rflags;
4577 }
4578 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
4579 }
4600 * Set the critical temperature at which the firmware will stop the radio
4601 * and notify us.
4602 */
4603 static int
4604 iwn_set_critical_temp(struct iwn_softc *sc)
4605 {
4606 struct iwn_critical_temp crit;
4607 int32_t temp;
4608
4609 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
4610
4611 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
4612 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
4613 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
4614 temp = IWN_CTOK(110);
4615 else
4616 temp = 110;
4617
4618 sc->sc_misc->crit_temp.value.ul = temp;
4619
4620 memset(&crit, 0, sizeof crit);
4621 crit.tempR = htole32(temp);
4622 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
4623 }
4624
4625 static int
4626 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
4627 {
4628 struct iwn_cmd_timing cmd;
4629 uint64_t val, mod;
4630
4631 memset(&cmd, 0, sizeof cmd);
4632 memcpy(&cmd.tstamp, ni->in_tstamp.data, sizeof (uint64_t));
4633 cmd.bintval = htole16(ni->in_intval);
4634 cmd.lintval = htole16(10);
4635
4636 /* Compute remaining time until next beacon. */
4637 val = (uint64_t)ni->in_intval * 1024; /* msecs -> usecs */
4638 mod = le64toh(cmd.tstamp) % val;
4639 cmd.binitval = htole32((uint32_t)(val - mod));
4640
4641 sc->sc_timing->bintval.value.ul = ni->in_intval;
4642 sc->sc_timing->tstamp.value.ul = ni->in_tstamp.tsf;
4643 sc->sc_timing->init.value.ul = (uint32_t)(val - mod);
4644
4645 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
4646 }
4647
4648 static void
4649 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
4650 {
4651 /* Adjust TX power if need be (delta >= 3 degC). */
4652 IWN_DBG("temperature %d->%d", sc->temp, temp);
4671 /* Linear interpolation. */
4672 #define interpolate(x, x1, y1, x2, y2, n) \
4673 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
4674
4675 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
4676 struct ieee80211com *ic = &sc->sc_ic;
4677 struct iwn_ucode_info *uc = &sc->ucode_info;
4678 struct ieee80211_channel *ch;
4679 struct iwn4965_cmd_txpower cmd;
4680 struct iwn4965_eeprom_chan_samples *chans;
4681 const uint8_t *rf_gain, *dsp_gain;
4682 int32_t vdiff, tdiff;
4683 int i, c, grp, maxpwr;
4684 uint8_t chan;
4685
4686 /* Retrieve current channel from last RXON. */
4687 chan = sc->rxon.chan;
4688 sc->sc_txpower->chan.value.l = chan;
4689 ch = &ic->ic_sup_channels[chan];
4690
4691 memset(&cmd, 0, sizeof cmd);
4692 cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
4693 cmd.chan = chan;
4694
4695 if (IEEE80211_IS_CHAN_5GHZ(ch)) {
4696 maxpwr = sc->maxpwr5GHz;
4697 rf_gain = iwn4965_rf_gain_5ghz;
4698 dsp_gain = iwn4965_dsp_gain_5ghz;
4699 } else {
4700 maxpwr = sc->maxpwr2GHz;
4701 rf_gain = iwn4965_rf_gain_2ghz;
4702 dsp_gain = iwn4965_dsp_gain_2ghz;
4703 }
4704
4705 /* Compute voltage compensation. */
4706 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
4707 if (vdiff > 0)
4708 vdiff *= 2;
4709 if (abs(vdiff) > 2)
4710 vdiff = 0;
4711 sc->sc_txpower->vdiff.value.l = vdiff;
4796 sc->sc_txpower->txchain[c].rate[ridx].dsp_gain.value.l =
4797 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
4798 }
4799 }
4800
4801 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
4802
4803 #undef interpolate
4804 #undef fdivround
4805 }
4806
4807 static int
4808 iwn5000_set_txpower(struct iwn_softc *sc, int async)
4809 {
4810 struct iwn5000_cmd_txpower cmd;
4811
4812 /*
4813 * TX power calibration is handled automatically by the firmware
4814 * for 5000 Series.
4815 */
4816 memset(&cmd, 0, sizeof cmd);
4817 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
4818 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
4819 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
4820 return iwn_cmd(sc, IWN_CMD_TXPOWER_DBM, &cmd, sizeof cmd, async);
4821 }
4822
4823 /*
4824 * Retrieve the maximum RSSI (in dBm) among receivers.
4825 */
4826 static int
4827 iwn4965_get_rssi(const struct iwn_rx_stat *stat)
4828 {
4829 const struct iwn4965_rx_phystat *phy = (const void *)stat->phybuf;
4830 uint8_t mask, agc;
4831 int rssi;
4832
4833 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
4834 agc = (le16toh(phy->agc) >> 7) & 0x7f;
4835
4836 rssi = 0;
4918 temp = le32toh(sc->rawtemp);
4919 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
4920 temp = (temp / -5) + sc->temp_off;
4921 temp = IWN_KTOC(temp);
4922 }
4923 return temp;
4924 }
4925
4926 /*
4927 * Initialize sensitivity calibration state machine.
4928 */
4929 static int
4930 iwn_init_sensitivity(struct iwn_softc *sc)
4931 {
4932 struct iwn_ops *ops = &sc->ops;
4933 struct iwn_calib_state *calib = &sc->calib;
4934 uint32_t flags;
4935 int error;
4936
4937 /* Reset calibration state machine. */
4938 memset(calib, 0, sizeof (*calib));
4939 calib->state = IWN_CALIB_STATE_INIT;
4940 calib->cck_state = IWN_CCK_STATE_HIFA;
4941 /* Set initial correlation values. */
4942 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
4943 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
4944 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
4945 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
4946 calib->cck_x4 = 125;
4947 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
4948 calib->energy_cck = sc->limits->energy_cck;
4949
4950 /* Write initial sensitivity. */
4951 if ((error = iwn_send_sensitivity(sc)) != 0)
4952 return error;
4953
4954 /* Write initial gains. */
4955 if ((error = ops->init_gains(sc)) != 0)
4956 return error;
4957
4958 /* Request statistics at each beacon interval. */
5002 (void)ops->set_gains(sc);
5003 calib->state = IWN_CALIB_STATE_RUN;
5004
5005 #ifdef notyet
5006 /* XXX Disable RX chains with no antennas connected. */
5007 sc->rxon.rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
5008 DTRACE_PROBE2(rxon, struct iwn_rxon *, &sc->rxon, int, sc->rxonsz);
5009 (void)iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, sc->rxonsz, 1);
5010 #endif
5011
5012 /* Enable power-saving mode if requested by user. */
5013 if (sc->sc_ic.ic_flags & IEEE80211_F_PMGTON)
5014 (void)iwn_set_pslevel(sc, 0, 3, 1);
5015 }
5016
5017 static int
5018 iwn4965_init_gains(struct iwn_softc *sc)
5019 {
5020 struct iwn_phy_calib_gain cmd;
5021
5022 memset(&cmd, 0, sizeof cmd);
5023 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5024 /* Differential gains initially set to 0 for all 3 antennas. */
5025 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5026 }
5027
5028 static int
5029 iwn5000_init_gains(struct iwn_softc *sc)
5030 {
5031 struct iwn_phy_calib cmd;
5032
5033 memset(&cmd, 0, sizeof cmd);
5034 cmd.code = sc->reset_noise_gain;
5035 cmd.ngroups = 1;
5036 cmd.isvalid = 1;
5037 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5038 }
5039
5040 static int
5041 iwn4965_set_gains(struct iwn_softc *sc)
5042 {
5043 struct iwn_calib_state *calib = &sc->calib;
5044 struct iwn_phy_calib_gain cmd;
5045 int i, delta, noise;
5046
5047 /* Get minimal noise among connected antennas. */
5048 noise = INT_MAX; /* NB: There's at least one antenna. */
5049 for (i = 0; i < 3; i++)
5050 if (sc->chainmask & (1 << i))
5051 noise = MIN(calib->noise[i], noise);
5052
5053 memset(&cmd, 0, sizeof cmd);
5054 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5055 /* Set differential gains for connected antennas. */
5056 for (i = 0; i < 3; i++) {
5057 if (sc->chainmask & (1 << i)) {
5058 /* Compute attenuation (in unit of 1.5dB). */
5059 delta = (noise - calib->noise[i]) / 30;
5060 /* NB: delta <= 0 */
5061 /* Limit to [-4.5dB,0]. */
5062 cmd.gain[i] = (uint8_t)MIN(abs(delta), 3);
5063 if (delta < 0)
5064 cmd.gain[i] |= 1 << 2; /* sign bit */
5065 sc->sc_ant->gain[i].value.ul = cmd.gain[i];
5066 }
5067 }
5068 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5069 }
5070
5071 static int
5072 iwn5000_set_gains(struct iwn_softc *sc)
5073 {
5074 struct iwn_calib_state *calib = &sc->calib;
5075 struct iwn_phy_calib_gain cmd;
5076 int i, ant, div, delta;
5077
5078 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
5079 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
5080
5081 memset(&cmd, 0, sizeof cmd);
5082 cmd.code = sc->noise_gain;
5083 cmd.ngroups = 1;
5084 cmd.isvalid = 1;
5085 /* Get first available RX antenna as referential. */
5086 ant = IWN_LSB(sc->rxchainmask);
5087 /* Set differential gains for other antennas. */
5088 for (i = ant + 1; i < 3; i++) {
5089 if (sc->chainmask & (1 << i)) {
5090 /* The delta is relative to antenna "ant". */
5091 delta = (calib->noise[ant] - calib->noise[i]) / div;
5092 /* Limit to [-4.5dB,+4.5dB]. */
5093 cmd.gain[i - 1] = (uint8_t)MIN(abs(delta), 3);
5094 if (delta < 0)
5095 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
5096 sc->sc_ant->gain[i - 1].value.ul
5097 = cmd.gain[i - 1];
5098 }
5099 }
5100 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5101 }
5240 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
5241 /* Previous interval had many false alarms. */
5242 dec(calib->energy_cck, 8, energy_min);
5243 }
5244 calib->cck_state = IWN_CCK_STATE_INIT;
5245 }
5246
5247 if (needs_update)
5248 (void)iwn_send_sensitivity(sc);
5249 #undef dec
5250 #undef inc
5251 }
5252
5253 static int
5254 iwn_send_sensitivity(struct iwn_softc *sc)
5255 {
5256 struct iwn_calib_state *calib = &sc->calib;
5257 struct iwn_enhanced_sensitivity_cmd cmd;
5258 int len;
5259
5260 memset(&cmd, 0, sizeof cmd);
5261 len = sizeof (struct iwn_sensitivity_cmd);
5262 cmd.which = IWN_SENSITIVITY_WORKTBL;
5263 /* OFDM modulation. */
5264 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
5265 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
5266 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
5267 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
5268 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
5269 cmd.energy_ofdm_th = htole16(62);
5270 /* CCK modulation. */
5271 cmd.corr_cck_x4 = htole16(calib->cck_x4);
5272 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
5273 cmd.energy_cck = htole16(calib->energy_cck);
5274 /* Barker modulation: use default values. */
5275 cmd.corr_barker = htole16(190);
5276 cmd.corr_barker_mrc = htole16(390);
5277 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))
5278 goto send;
5279 /* Enhanced sensitivity settings. */
5280 len = sizeof (struct iwn_enhanced_sensitivity_cmd);
5303 * Set STA mode power saving level (between 0 and 5).
5304 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
5305 */
5306 static int
5307 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
5308 {
5309 struct iwn_pmgt_cmd cmd;
5310 const struct iwn_pmgt *pmgt;
5311 uint32_t maxp, skip_dtim;
5312 uint32_t reg;
5313 int i;
5314
5315 /* Select which PS parameters to use. */
5316 if (dtim <= 2)
5317 pmgt = &iwn_pmgt[0][level];
5318 else if (dtim <= 10)
5319 pmgt = &iwn_pmgt[1][level];
5320 else
5321 pmgt = &iwn_pmgt[2][level];
5322
5323 memset(&cmd, 0, sizeof cmd);
5324 if (level != 0) /* not CAM */
5325 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
5326 if (level == 5)
5327 cmd.flags |= htole16(IWN_PS_FAST_PD);
5328 /* Retrieve PCIe Active State Power Management (ASPM). */
5329 reg = pci_config_get32(sc->sc_pcih,
5330 sc->sc_cap_off + PCIE_LINKCTL);
5331 if (!(reg & PCIE_LINKCTL_ASPM_CTL_L0S)) /* L0s Entry disabled. */
5332 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
5333 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
5334 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
5335
5336 if (dtim == 0) {
5337 dtim = 1;
5338 skip_dtim = 0;
5339 } else
5340 skip_dtim = pmgt->skip_dtim;
5341 if (skip_dtim != 0) {
5342 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
5343 maxp = pmgt->intval[4];
5344 if (maxp == (uint32_t)-1)
5345 maxp = dtim * (skip_dtim + 1);
5346 else if (maxp > dtim)
5347 maxp = (maxp / dtim) * dtim;
5348 } else
5349 maxp = dtim;
5350 for (i = 0; i < 5; i++)
5351 cmd.intval[i] = htole32(MIN(maxp, pmgt->intval[i]));
5352
5353 sc->sc_misc->pslevel.value.ul = level;
5354 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
5355 }
5356
5357 int
5358 iwn5000_runtime_calib(struct iwn_softc *sc)
5359 {
5360 struct iwn5000_calib_config cmd;
5361
5362 memset(&cmd, 0, sizeof cmd);
5363 cmd.ucode.once.enable = 0xffffffff;
5364 cmd.ucode.once.start = IWN5000_CALIB_DC;
5365 return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0);
5366 }
5367
5368 static int
5369 iwn_config_bt_coex_bluetooth(struct iwn_softc *sc)
5370 {
5371 struct iwn_bluetooth bluetooth;
5372
5373 memset(&bluetooth, 0, sizeof bluetooth);
5374 bluetooth.flags = IWN_BT_COEX_ENABLE;
5375 bluetooth.lead_time = IWN_BT_LEAD_TIME_DEF;
5376 bluetooth.max_kill = IWN_BT_MAX_KILL_DEF;
5377
5378 return iwn_cmd(sc, IWN_CMD_BT_COEX, &bluetooth, sizeof bluetooth, 0);
5379 }
5380
5381 static int
5382 iwn_config_bt_coex_prio_table(struct iwn_softc *sc)
5383 {
5384 uint8_t prio_table[16];
5385
5386 memset(&prio_table, 0, sizeof prio_table);
5387 prio_table[ 0] = 6; /* init calibration 1 */
5388 prio_table[ 1] = 7; /* init calibration 2 */
5389 prio_table[ 2] = 2; /* periodic calib low 1 */
5390 prio_table[ 3] = 3; /* periodic calib low 2 */
5391 prio_table[ 4] = 4; /* periodic calib high 1 */
5392 prio_table[ 5] = 5; /* periodic calib high 2 */
5393 prio_table[ 6] = 6; /* dtim */
5394 prio_table[ 7] = 8; /* scan52 */
5395 prio_table[ 8] = 10; /* scan24 */
5396
5397 return iwn_cmd(sc, IWN_CMD_BT_COEX_PRIO_TABLE,
5398 &prio_table, sizeof prio_table, 0);
5399 }
5400
5401 static int
5402 iwn_config_bt_coex_adv_config(struct iwn_softc *sc, struct iwn_bt_basic *basic,
5403 size_t len)
5404 {
5405 struct iwn_btcoex_prot btprot;
5406 int error;
5426 basic->bt3_lookup_table[10] = htole32(0xf0005000);
5427 basic->bt3_lookup_table[11] = htole32(0xf0005000);
5428 basic->reduce_txpower = 0; /* as not implemented */
5429 basic->valid = IWN_BT_ALL_VALID_MASK;
5430
5431 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &basic, len, 0);
5432 if (error != 0) {
5433 dev_err(sc->sc_dip, CE_WARN,
5434 "!could not configure advanced bluetooth coexistence");
5435 return error;
5436 }
5437
5438 error = iwn_config_bt_coex_prio_table(sc);
5439 if (error != 0) {
5440 dev_err(sc->sc_dip, CE_WARN,
5441 "!could not configure send BT priority table");
5442 return error;
5443 }
5444
5445 /* Force BT state machine change */
5446 memset(&btprot, 0, sizeof btprot);
5447 btprot.open = 1;
5448 btprot.type = 1;
5449 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof btprot, 1);
5450 if (error != 0) {
5451 dev_err(sc->sc_dip, CE_WARN, "!could not open BT protcol");
5452 return error;
5453 }
5454
5455 btprot.open = 0;
5456 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof btprot, 1);
5457 if (error != 0) {
5458 dev_err(sc->sc_dip, CE_WARN, "!could not close BT protcol");
5459 return error;
5460 }
5461 return 0;
5462 }
5463
5464 static int
5465 iwn_config_bt_coex_adv1(struct iwn_softc *sc)
5466 {
5467 struct iwn_bt_adv1 d;
5468
5469 memset(&d, 0, sizeof d);
5470 d.prio_boost = IWN_BT_PRIO_BOOST_DEF;
5471 d.tx_prio_boost = 0;
5472 d.rx_prio_boost = 0;
5473 return iwn_config_bt_coex_adv_config(sc, &d.basic, sizeof d);
5474 }
5475
5476 static int
5477 iwn_config_bt_coex_adv2(struct iwn_softc *sc)
5478 {
5479 struct iwn_bt_adv2 d;
5480
5481 memset(&d, 0, sizeof d);
5482 d.prio_boost = IWN_BT_PRIO_BOOST_DEF;
5483 d.tx_prio_boost = 0;
5484 d.rx_prio_boost = 0;
5485 return iwn_config_bt_coex_adv_config(sc, &d.basic, sizeof d);
5486 }
5487
5488 static int
5489 iwn_config(struct iwn_softc *sc)
5490 {
5491 struct iwn_ops *ops = &sc->ops;
5492 struct ieee80211com *ic = &sc->sc_ic;
5493 uint32_t txmask;
5494 uint16_t rxchain;
5495 int error;
5496
5497 error = ops->config_bt_coex(sc);
5498 if (error != 0) {
5499 dev_err(sc->sc_dip, CE_WARN,
5500 "!could not configure bluetooth coexistence");
5501 return error;
5530 if (error != 0) {
5531 dev_err(sc->sc_dip, CE_WARN,
5532 "!could not configure runtime calibration");
5533 return error;
5534 }
5535 }
5536
5537 /* Configure valid TX chains for 5000 Series. */
5538 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
5539 txmask = htole32(sc->txchainmask);
5540 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
5541 sizeof txmask, 0);
5542 if (error != 0) {
5543 dev_err(sc->sc_dip, CE_WARN,
5544 "!could not configure valid TX chains");
5545 return error;
5546 }
5547 }
5548
5549 /* Set mode, channel, RX filter and enable RX. */
5550 memset(&sc->rxon, 0, sizeof (struct iwn_rxon));
5551 IEEE80211_ADDR_COPY(sc->rxon.myaddr, ic->ic_macaddr);
5552 IEEE80211_ADDR_COPY(sc->rxon.wlap, ic->ic_macaddr);
5553 sc->rxon.chan = ieee80211_chan2ieee(ic, ic->ic_ibss_chan);
5554 sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
5555 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_ibss_chan))
5556 sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
5557 switch (ic->ic_opmode) {
5558 case IEEE80211_M_IBSS:
5559 sc->rxon.mode = IWN_MODE_IBSS;
5560 sc->rxon.filter = htole32(IWN_FILTER_MULTICAST);
5561 break;
5562 case IEEE80211_M_STA:
5563 sc->rxon.mode = IWN_MODE_STA;
5564 sc->rxon.filter = htole32(IWN_FILTER_MULTICAST);
5565 break;
5566 case IEEE80211_M_MONITOR:
5567 sc->rxon.mode = IWN_MODE_MONITOR;
5568 sc->rxon.filter = htole32(IWN_FILTER_MULTICAST |
5569 IWN_FILTER_CTL | IWN_FILTER_PROMISC);
5570 break;
5741 tx->plcp = iwn_rates[IWN_RIDX_CCK1].plcp;
5742 tx->rflags = IWN_RFLAG_CCK;
5743 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
5744 }
5745
5746 hdr->crc_threshold = 0xffff;
5747
5748 /* Use the first valid TX antenna. */
5749 txant = IWN_LSB(sc->txchainmask);
5750 tx->rflags |= IWN_RFLAG_ANT(txant);
5751
5752 /*
5753 * Only do active scanning if we're announcing a probe request
5754 * for a given SSID (or more, if we ever add it to the driver.)
5755 */
5756 is_active = 0;
5757
5758 essid = (struct iwn_scan_essid *)(tx + 1);
5759 if (ic->ic_des_esslen != 0) {
5760 char essidstr[IEEE80211_NWID_LEN+1];
5761 memcpy(essidstr, ic->ic_des_essid, ic->ic_des_esslen);
5762 essidstr[ic->ic_des_esslen] = '\0';
5763
5764 DTRACE_PROBE1(scan__direct, char *, essidstr);
5765
5766 essid[0].id = IEEE80211_ELEMID_SSID;
5767 essid[0].len = ic->ic_des_esslen;
5768 memcpy(essid[0].data, ic->ic_des_essid, ic->ic_des_esslen);
5769
5770 is_active = 1;
5771 /* hdr->crc_threshold = 0x1; */
5772 hdr->scan_flags = htole32(IWN_SCAN_PASSIVE2ACTIVE);
5773 }
5774 /*
5775 * Build a probe request frame. Most of the following code is a
5776 * copy & paste of what is done in net80211.
5777 */
5778 wh = (struct ieee80211_frame *)(essid + 20);
5779 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
5780 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
5781 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
5782 IEEE80211_ADDR_COPY(wh->i_addr1, etherbroadcastaddr);
5783 IEEE80211_ADDR_COPY(wh->i_addr2, ic->ic_macaddr);
5784 IEEE80211_ADDR_COPY(wh->i_addr3, etherbroadcastaddr);
5785 wh->i_dur[0] = wh->i_dur[1] = 0; /* filled by HW */
5786 wh->i_seq[0] = wh->i_seq[1] = 0; /* filled by HW */
5787
5788 frm = (uint8_t *)(wh + 1);
6022 DTRACE_PROBE2(rxon, struct iwn_rxon *, &sc->rxon, int, sc->rxonsz);
6023 error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, sc->rxonsz, 1);
6024 if (error != 0) {
6025 dev_err(sc->sc_dip, CE_WARN,
6026 "!could not update configuration");
6027 return error;
6028 }
6029
6030 /* Configuration has changed, set TX power accordingly. */
6031 if ((error = ops->set_txpower(sc, 1)) != 0) {
6032 dev_err(sc->sc_dip, CE_WARN,
6033 "!could not set TX power");
6034 return error;
6035 }
6036
6037 /* Fake a join to initialize the TX rate. */
6038 ((struct iwn_node *)ni)->id = IWN_ID_BSS;
6039 iwn_newassoc(ni, 1);
6040
6041 /* Add BSS node. */
6042 memset(&node, 0, sizeof node);
6043 IEEE80211_ADDR_COPY(node.macaddr, ni->in_macaddr);
6044 node.id = IWN_ID_BSS;
6045 #ifdef notyet
6046 node.htflags = htole32(IWN_AMDPU_SIZE_FACTOR(3) |
6047 IWN_AMDPU_DENSITY(5)); /* 2us */
6048 #endif
6049 error = ops->add_node(sc, &node, 1);
6050 if (error != 0) {
6051 dev_err(sc->sc_dip, CE_WARN,
6052 "!could not add BSS node");
6053 return error;
6054 }
6055 if ((error = iwn_set_link_quality(sc, ni)) != 0) {
6056 dev_err(sc->sc_dip, CE_WARN,
6057 "!could not setup link quality for node %d", node.id);
6058 return error;
6059 }
6060
6061 if ((error = iwn_init_sensitivity(sc)) != 0) {
6062 dev_err(sc->sc_dip, CE_WARN,
6087 * HW support for TKIP really sucks. We should let TKIP die anyway.
6088 */
6089 static int
6090 iwn_set_key(struct ieee80211com *ic, struct ieee80211_node *ni,
6091 struct ieee80211_key *k)
6092 {
6093 struct iwn_softc *sc = ic->ic_softc;
6094 struct iwn_ops *ops = &sc->ops;
6095 struct iwn_node *wn = (void *)ni;
6096 struct iwn_node_info node;
6097 uint16_t kflags;
6098
6099 if ((k->k_flags & IEEE80211_KEY_GROUP) ||
6100 k->k_cipher != IEEE80211_CIPHER_CCMP)
6101 return ieee80211_set_key(ic, ni, k);
6102
6103 kflags = IWN_KFLAG_CCMP | IWN_KFLAG_MAP | IWN_KFLAG_KID(k->k_id);
6104 if (k->k_flags & IEEE80211_KEY_GROUP)
6105 kflags |= IWN_KFLAG_GROUP;
6106
6107 memset(&node, 0, sizeof node);
6108 node.id = (k->k_flags & IEEE80211_KEY_GROUP) ?
6109 sc->broadcast_id : wn->id;
6110 node.control = IWN_NODE_UPDATE;
6111 node.flags = IWN_FLAG_SET_KEY;
6112 node.kflags = htole16(kflags);
6113 node.kid = k->k_id;
6114 memcpy(node.key, k->k_key, k->k_len);
6115 DTRACE_PROBE2(set__key, int, k->k_id, int, node.id);
6116 return ops->add_node(sc, &node, 1);
6117 }
6118
6119 static void
6120 iwn_delete_key(struct ieee80211com *ic, struct ieee80211_node *ni,
6121 struct ieee80211_key *k)
6122 {
6123 struct iwn_softc *sc = ic->ic_softc;
6124 struct iwn_ops *ops = &sc->ops;
6125 struct iwn_node *wn = (void *)ni;
6126 struct iwn_node_info node;
6127
6128 if ((k->k_flags & IEEE80211_KEY_GROUP) ||
6129 k->k_cipher != IEEE80211_CIPHER_CCMP) {
6130 /* See comment about other ciphers above. */
6131 ieee80211_delete_key(ic, ni, k);
6132 return;
6133 }
6134 if (ic->ic_state != IEEE80211_S_RUN)
6135 return; /* Nothing to do. */
6136 memset(&node, 0, sizeof node);
6137 node.id = (k->k_flags & IEEE80211_KEY_GROUP) ?
6138 sc->broadcast_id : wn->id;
6139 node.control = IWN_NODE_UPDATE;
6140 node.flags = IWN_FLAG_SET_KEY;
6141 node.kflags = htole16(IWN_KFLAG_INVALID);
6142 node.kid = 0xff;
6143 DTRACE_PROBE1(del__key, int, node.id);
6144 (void)ops->add_node(sc, &node, 1);
6145 }
6146 #endif
6147
6148 #ifndef IEEE80211_NO_HT
6149 /*
6150 * This function is called by upper layer when an ADDBA request is received
6151 * from another STA and before the ADDBA response is sent.
6152 */
6153 static int
6154 iwn_ampdu_rx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
6155 uint8_t tid)
6156 {
6157 struct ieee80211_rx_ba *ba = &ni->in_rx_ba[tid];
6158 struct iwn_softc *sc = ic->ic_softc;
6159 struct iwn_ops *ops = &sc->ops;
6160 struct iwn_node *wn = (void *)ni;
6161 struct iwn_node_info node;
6162
6163 memset(&node, 0, sizeof node);
6164 node.id = wn->id;
6165 node.control = IWN_NODE_UPDATE;
6166 node.flags = IWN_FLAG_SET_ADDBA;
6167 node.addba_tid = tid;
6168 node.addba_ssn = htole16(ba->ba_winstart);
6169 DTRACE_PROBE3(addba, uint8_t, wn->id, uint8_t, tid, int, ba->ba_winstart);
6170 return ops->add_node(sc, &node, 1);
6171 }
6172
6173 /*
6174 * This function is called by upper layer on teardown of an HT-immediate
6175 * Block Ack agreement (eg. uppon receipt of a DELBA frame).
6176 */
6177 static void
6178 iwn_ampdu_rx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
6179 uint8_t tid)
6180 {
6181 struct iwn_softc *sc = ic->ic_softc;
6182 struct iwn_ops *ops = &sc->ops;
6183 struct iwn_node *wn = (void *)ni;
6184 struct iwn_node_info node;
6185
6186 memset(&node, 0, sizeof node);
6187 node.id = wn->id;
6188 node.control = IWN_NODE_UPDATE;
6189 node.flags = IWN_FLAG_SET_DELBA;
6190 node.delba_tid = tid;
6191 DTRACE_PROBE2(delba, uint8_t, wn->id, uint8_t, tid);
6192 (void)ops->add_node(sc, &node, 1);
6193 }
6194
6195 /*
6196 * This function is called by upper layer when an ADDBA response is received
6197 * from another STA.
6198 */
6199 static int
6200 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
6201 uint8_t tid)
6202 {
6203 struct ieee80211_tx_ba *ba = &ni->in_tx_ba[tid];
6204 struct iwn_softc *sc = ic->ic_softc;
6205 struct iwn_ops *ops = &sc->ops;
6206 struct iwn_node *wn = (void *)ni;
6207 struct iwn_node_info node;
6208 int error;
6209
6210 /* Enable TX for the specified RA/TID. */
6211 wn->disable_tid &= ~(1 << tid);
6212 memset(&node, 0, sizeof node);
6213 node.id = wn->id;
6214 node.control = IWN_NODE_UPDATE;
6215 node.flags = IWN_FLAG_SET_DISABLE_TID;
6216 node.disable_tid = htole16(wn->disable_tid);
6217 error = ops->add_node(sc, &node, 1);
6218 if (error != 0)
6219 return error;
6220
6221 if ((error = iwn_nic_lock(sc)) != 0)
6222 return error;
6223 ops->ampdu_tx_start(sc, ni, tid, ba->ba_winstart);
6224 iwn_nic_unlock(sc);
6225 return 0;
6226 }
6227
6228 static void
6229 iwn_ampdu_tx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
6230 uint8_t tid)
6231 {
6232 struct ieee80211_tx_ba *ba = &ni->in_tx_ba[tid];
6356
6357 /* Mark the queue as inactive. */
6358 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
6359 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
6360 }
6361 #endif /* !IEEE80211_NO_HT */
6362
6363 /*
6364 * Query calibration tables from the initialization firmware. We do this
6365 * only once at first boot. Called from a process context.
6366 */
6367 static int
6368 iwn5000_query_calibration(struct iwn_softc *sc)
6369 {
6370 struct iwn5000_calib_config cmd;
6371 int error;
6372 clock_t clk;
6373
6374 ASSERT(mutex_owned(&sc->sc_mtx));
6375
6376 memset(&cmd, 0, sizeof cmd);
6377 cmd.ucode.once.enable = 0xffffffff;
6378 cmd.ucode.once.start = 0xffffffff;
6379 cmd.ucode.once.send = 0xffffffff;
6380 cmd.ucode.flags = 0xffffffff;
6381 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
6382 if (error != 0)
6383 return error;
6384
6385 /* Wait at most two seconds for calibration to complete. */
6386 clk = ddi_get_lbolt() + drv_usectohz(2000000);
6387 while (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))
6388 if (cv_timedwait(&sc->sc_calib_cv, &sc->sc_mtx, clk) < 0)
6389 return (IWN_FAIL);
6390
6391 return (IWN_SUCCESS);
6392 }
6393
6394 /*
6395 * Send calibration results to the runtime firmware. These results were
6396 * obtained on first boot from the initialization firmware.
6410 "!could not send calibration result");
6411 return error;
6412 }
6413 }
6414 return 0;
6415 }
6416
6417 static int
6418 iwn5000_send_wimax_coex(struct iwn_softc *sc)
6419 {
6420 struct iwn5000_wimax_coex wimax;
6421
6422 #ifdef notyet
6423 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
6424 /* Enable WiMAX coexistence for combo adapters. */
6425 wimax.flags =
6426 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
6427 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
6428 IWN_WIMAX_COEX_STA_TABLE_VALID |
6429 IWN_WIMAX_COEX_ENABLE;
6430 memcpy(wimax.events, iwn6050_wimax_events,
6431 sizeof iwn6050_wimax_events);
6432 } else
6433 #endif
6434 {
6435 /* Disable WiMAX coexistence. */
6436 wimax.flags = 0;
6437 memset(wimax.events, 0, sizeof wimax.events);
6438 }
6439 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
6440 }
6441
6442 static int
6443 iwn6000_temp_offset_calib(struct iwn_softc *sc)
6444 {
6445 struct iwn6000_phy_calib_temp_offset cmd;
6446
6447 memset(&cmd, 0, sizeof cmd);
6448 cmd.code = IWN6000_PHY_CALIB_TEMP_OFFSET;
6449 cmd.ngroups = 1;
6450 cmd.isvalid = 1;
6451 if (sc->eeprom_temp != 0)
6452 cmd.offset = htole16(sc->eeprom_temp);
6453 else
6454 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
6455 sc->sc_toff.t6000->toff.value.l = le16toh(cmd.offset);
6456 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
6457 }
6458
6459 static int
6460 iwn2000_temp_offset_calib(struct iwn_softc *sc)
6461 {
6462 struct iwn2000_phy_calib_temp_offset cmd;
6463
6464 memset(&cmd, 0, sizeof cmd);
6465 cmd.code = IWN2000_PHY_CALIB_TEMP_OFFSET;
6466 cmd.ngroups = 1;
6467 cmd.isvalid = 1;
6468 if (sc->eeprom_rawtemp != 0) {
6469 cmd.offset_low = htole16(sc->eeprom_rawtemp);
6470 cmd.offset_high = htole16(sc->eeprom_temp);
6471 } else {
6472 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET);
6473 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET);
6474 }
6475 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);
6476 sc->sc_toff.t2000->toff_lo.value.l = le16toh(cmd.offset_low);
6477 sc->sc_toff.t2000->toff_hi.value.l = le16toh(cmd.offset_high);
6478 sc->sc_toff.t2000->volt.value.l = le16toh(cmd.burnt_voltage_ref);
6479
6480 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
6481 }
6482
6483 /*
6484 * This function is called after the runtime firmware notifies us of its
6581
6582 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
6583 for (qid = 0; qid < 7; qid++) {
6584 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
6585 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
6586 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
6587 }
6588 iwn_nic_unlock(sc);
6589
6590 /* Configure WiMAX coexistence for combo adapters. */
6591 error = iwn5000_send_wimax_coex(sc);
6592 if (error != 0) {
6593 dev_err(sc->sc_dip, CE_WARN,
6594 "!could not configure WiMAX coexistence");
6595 return error;
6596 }
6597 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
6598 struct iwn5000_phy_calib_crystal cmd;
6599
6600 /* Perform crystal calibration. */
6601 memset(&cmd, 0, sizeof cmd);
6602 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
6603 cmd.ngroups = 1;
6604 cmd.isvalid = 1;
6605 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
6606 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
6607 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
6608 if (error != 0) {
6609 dev_err(sc->sc_dip, CE_WARN,
6610 "!crystal calibration failed");
6611 return error;
6612 }
6613 }
6614 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
6615 /* Query calibration from the initialization firmware. */
6616 if ((error = iwn5000_query_calibration(sc)) != 0) {
6617 dev_err(sc->sc_dip, CE_WARN,
6618 "!could not query calibration");
6619 return error;
6620 }
6621 /*
6672 }
6673
6674 /* Enable boot after power up. */
6675 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
6676
6677 iwn_nic_unlock(sc);
6678 return 0;
6679 }
6680
6681 static int
6682 iwn4965_load_firmware(struct iwn_softc *sc)
6683 {
6684 struct iwn_fw_info *fw = &sc->fw;
6685 struct iwn_dma_info *dma = &sc->fw_dma;
6686 int error;
6687 clock_t clk;
6688
6689 ASSERT(mutex_owned(&sc->sc_mtx));
6690
6691 /* Copy initialization sections into pre-allocated DMA-safe memory. */
6692 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
6693 memcpy((char *)dma->vaddr + IWN4965_FW_DATA_MAXSZ,
6694 fw->init.text, fw->init.textsz);
6695 (void) ddi_dma_sync(dma->dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV);
6696
6697 /* Tell adapter where to find initialization sections. */
6698 if ((error = iwn_nic_lock(sc)) != 0)
6699 return error;
6700 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
6701 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
6702 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
6703 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
6704 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
6705 iwn_nic_unlock(sc);
6706
6707 /* Load firmware boot code. */
6708 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
6709 if (error != 0) {
6710 dev_err(sc->sc_dip, CE_WARN,
6711 "!could not load boot firmware");
6712 return error;
6713 }
6714 /* Now press "execute". */
6715 IWN_WRITE(sc, IWN_RESET, 0);
6716
6717 /* Wait at most one second for first alive notification. */
6718 clk = ddi_get_lbolt() + drv_usectohz(1000000);
6719 while ((sc->sc_flags & IWN_FLAG_FW_ALIVE) == 0) {
6720 if (cv_timedwait(&sc->sc_alive_cv, &sc->sc_mtx, clk) < 0) {
6721 dev_err(sc->sc_dip, CE_WARN,
6722 "!timeout waiting for adapter to initialize");
6723 return (IWN_FAIL);
6724 }
6725 }
6726
6727 /* Retrieve current temperature for initial TX power calibration. */
6728 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
6729 sc->temp = iwn4965_get_temperature(sc);
6730 sc->sc_misc->temp.value.ul = sc->temp;
6731
6732 /* Copy runtime sections into pre-allocated DMA-safe memory. */
6733 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
6734 memcpy((char *)dma->vaddr + IWN4965_FW_DATA_MAXSZ,
6735 fw->main.text, fw->main.textsz);
6736 (void) ddi_dma_sync(dma->dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV);
6737
6738 /* Tell adapter where to find runtime sections. */
6739 if ((error = iwn_nic_lock(sc)) != 0)
6740 return error;
6741 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
6742 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
6743 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
6744 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
6745 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
6746 IWN_FW_UPDATED | fw->main.textsz);
6747 iwn_nic_unlock(sc);
6748
6749 return 0;
6750 }
6751
6752 static int
6753 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
6754 const uint8_t *section, int size)
6755 {
6756 struct iwn_dma_info *dma = &sc->fw_dma;
6757 int error;
6758 clock_t clk;
6759
6760 ASSERT(mutex_owned(&sc->sc_mtx));
6761
6762 /* Copy firmware section into pre-allocated DMA-safe memory. */
6763 memcpy(dma->vaddr, section, size);
6764 (void) ddi_dma_sync(dma->dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV);
6765
6766 if ((error = iwn_nic_lock(sc)) != 0)
6767 return error;
6768
6769 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
6770 IWN_FH_TX_CONFIG_DMA_PAUSE);
6771
6772 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
6773 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
6774 IWN_LOADDR(dma->paddr));
6775 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
6776 IWN_HIADDR(dma->paddr) << 28 | size);
6777 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
6778 IWN_FH_TXBUF_STATUS_TBNUM(1) |
6779 IWN_FH_TXBUF_STATUS_TBIDX(1) |
6780 IWN_FH_TXBUF_STATUS_TFBD_VALID);
6781
6782 /* Kick Flow Handler to start DMA transfer. */
6783 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
|
580 for (i = 0; i != 2; i++) {
581 char tmp[KSTAT_STRLEN];
582
583 (void) snprintf(tmp, KSTAT_STRLEN - 1, "Ant %d power", i);
584 kstat_named_init(&sc->sc_txpower->txchain[i].power,
585 tmp, KSTAT_DATA_LONG);
586
587 (void) snprintf(tmp, KSTAT_STRLEN - 1, "Ant %d gain", i);
588 kstat_named_init(&sc->sc_txpower->txchain[i].gain,
589 tmp, KSTAT_DATA_LONG);
590
591 (void) snprintf(tmp, KSTAT_STRLEN - 1, "Ant %d temperature", i);
592 kstat_named_init(&sc->sc_txpower->txchain[i].temp,
593 tmp, KSTAT_DATA_LONG);
594
595 (void) snprintf(tmp, KSTAT_STRLEN - 1,
596 "Ant %d temperature compensation", i);
597 kstat_named_init(&sc->sc_txpower->txchain[i].tcomp,
598 tmp, KSTAT_DATA_LONG);
599
600 for (r = 0; r <= IWN_RIDX_MAX; r++) {
601 (void) snprintf(tmp, KSTAT_STRLEN - 1,
602 "Ant %d Rate %d RF gain", i, r);
603 kstat_named_init(
604 &sc->sc_txpower->txchain[i].rate[r].rf_gain,
605 tmp, KSTAT_DATA_LONG);
606
607 (void) snprintf(tmp, KSTAT_STRLEN - 1,
608 "Ant %d Rate %d DSP gain", i, r);
609 kstat_named_init(
610 &sc->sc_txpower->txchain[0].rate[0].dsp_gain,
611 tmp, KSTAT_DATA_LONG);
612 }
613 }
614 }
615
616 static void
617 iwn_kstat_init_6000(struct iwn_softc *sc)
618 {
619 if (sc->sc_ks_toff != NULL)
620 sc->sc_ks_toff->ks_lock = &sc->sc_mtx;
2032 return 0;
2033
2034 fail: iwn_free_tx_ring(sc, ring);
2035 return error;
2036 }
2037
2038 static void
2039 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2040 {
2041 int i;
2042
2043 if (ring->qid < 4)
2044 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2045 struct iwn_tx_data *data = &ring->data[i];
2046
2047 (void) ddi_dma_sync(data->dma_data.dma_hdl, 0, 0,
2048 DDI_DMA_SYNC_FORDEV);
2049 }
2050
2051 /* Clear TX descriptors. */
2052 (void) memset(ring->desc, 0, ring->desc_dma.size);
2053 (void) ddi_dma_sync(ring->desc_dma.dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV);
2054 sc->qfullmsk &= ~(1 << ring->qid);
2055 ring->queued = 0;
2056 ring->cur = 0;
2057 }
2058
2059 static void
2060 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2061 {
2062 _NOTE(ARGUNUSED(sc));
2063 int i;
2064
2065 iwn_dma_contig_free(&ring->desc_dma);
2066 iwn_dma_contig_free(&ring->cmd_dma);
2067
2068 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2069 struct iwn_tx_data *data = &ring->data[i];
2070
2071 if (data->dma_data.dma_hdl)
2072 iwn_dma_contig_free(&data->dma_data);
2073 }
2074 }
2075
2076 static void
2077 iwn5000_ict_reset(struct iwn_softc *sc)
2078 {
2079 /* Disable interrupts. */
2080 IWN_WRITE(sc, IWN_INT_MASK, 0);
2081
2082 /* Reset ICT table. */
2083 (void) memset(sc->ict, 0, IWN_ICT_SIZE);
2084 sc->ict_cur = 0;
2085
2086 /* Set physical address of ICT table (4KB aligned). */
2087 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
2088 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
2089
2090 /* Enable periodic RX interrupt. */
2091 sc->int_mask |= IWN_INT_RX_PERIODIC;
2092 /* Switch to ICT interrupt mode in driver. */
2093 sc->sc_flags |= IWN_FLAG_USE_ICT;
2094
2095 /* Re-enable interrupts. */
2096 IWN_WRITE(sc, IWN_INT, 0xffffffff);
2097 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2098 }
2099
2100 static int
2101 iwn_read_eeprom(struct iwn_softc *sc)
2102 {
2103 struct iwn_ops *ops = &sc->ops;
2359 sc->maxpwr[chan] = channels[i].maxpwr;
2360
2361 IWN_DBG("adding chan %d flags=0x%x maxpwr=%d",
2362 chan, channels[i].flags, sc->maxpwr[chan]);
2363 }
2364 }
2365
2366 static void
2367 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
2368 {
2369 struct iwn_eeprom_enhinfo enhinfo[35];
2370 uint16_t val, base;
2371 int8_t maxpwr;
2372 int i;
2373
2374 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2375 base = le16toh(val);
2376 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
2377 enhinfo, sizeof enhinfo);
2378
2379 (void) memset(sc->enh_maxpwr, 0, sizeof sc->enh_maxpwr);
2380 for (i = 0; i < __arraycount(enhinfo); i++) {
2381 if (enhinfo[i].chan == 0 || enhinfo[i].reserved != 0)
2382 continue; /* Skip invalid entries. */
2383
2384 maxpwr = 0;
2385 if (sc->txchainmask & IWN_ANT_A)
2386 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
2387 if (sc->txchainmask & IWN_ANT_B)
2388 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
2389 if (sc->txchainmask & IWN_ANT_C)
2390 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
2391 if (sc->ntxchains == 2)
2392 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
2393 else if (sc->ntxchains == 3)
2394 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
2395 maxpwr /= 2; /* Convert half-dBm to dBm. */
2396
2397 IWN_DBG("enhinfo %d, maxpwr=%d", i, maxpwr);
2398 sc->enh_maxpwr[i] = maxpwr;
2399 }
2618
2619 mutex_exit(&sc->sc_mtx);
2620 }
2621
2622 /*
2623 * Process an RX_PHY firmware notification. This is usually immediately
2624 * followed by an MPDU_RX_DONE notification.
2625 */
2626 static void
2627 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2628 struct iwn_rx_data *data)
2629 {
2630 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
2631
2632 (void) ddi_dma_sync(data->dma_data.dma_hdl, sizeof (*desc),
2633 sizeof (*stat), DDI_DMA_SYNC_FORKERNEL);
2634
2635 DTRACE_PROBE1(rx__phy, struct iwn_rx_stat *, stat);
2636
2637 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
2638 (void) memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
2639 sc->last_rx_valid = 1;
2640 }
2641
2642 /*
2643 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
2644 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
2645 */
2646 static void
2647 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2648 struct iwn_rx_data *data)
2649 {
2650 struct iwn_ops *ops = &sc->ops;
2651 struct ieee80211com *ic = &sc->sc_ic;
2652 struct iwn_rx_ring *ring = &sc->rxq;
2653 struct ieee80211_frame *wh;
2654 struct ieee80211_node *ni;
2655 mblk_t *m;
2656 struct iwn_rx_stat *stat;
2657 char *head;
2658 uint32_t flags;
2801 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
2802 if (sc->hw_type < IWN_HW_REV_TYPE_6000 &&
2803 sc->hw_type != IWN_HW_REV_TYPE_5150)
2804 idx = 3;
2805 break;
2806 case IWN5000_PHY_CALIB_BASE_BAND:
2807 idx = 4;
2808 break;
2809 }
2810 if (idx == -1) /* Ignore other results. */
2811 return;
2812
2813 /* Save calibration result. */
2814 if (sc->calibcmd[idx].buf != NULL)
2815 kmem_free(sc->calibcmd[idx].buf, sc->calibcmd[idx].len);
2816 sc->calibcmd[idx].buf = kmem_zalloc(len, KM_NOSLEEP);
2817 if (sc->calibcmd[idx].buf == NULL) {
2818 return;
2819 }
2820 sc->calibcmd[idx].len = len;
2821 (void) memcpy(sc->calibcmd[idx].buf, calib, len);
2822 }
2823
2824 /*
2825 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
2826 * The latter is sent by the firmware after each received beacon.
2827 */
2828 static void
2829 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2830 struct iwn_rx_data *data)
2831 {
2832 struct iwn_ops *ops = &sc->ops;
2833 struct ieee80211com *ic = &sc->sc_ic;
2834 struct iwn_calib_state *calib = &sc->calib;
2835 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
2836 int temp = 0;
2837
2838 /* Ignore statistics received during a scan. */
2839 if (ic->ic_state != IEEE80211_S_RUN)
2840 return;
2841
3071 break;
3072 }
3073 case IWN_UC_READY:
3074 {
3075 struct iwn_ucode_info *uc =
3076 (struct iwn_ucode_info *)(desc + 1);
3077
3078 /* The microcontroller is ready. */
3079 (void) ddi_dma_sync(data->dma_data.dma_hdl,
3080 sizeof (*desc), sizeof (*uc),
3081 DDI_DMA_SYNC_FORKERNEL);
3082 DTRACE_PROBE1(uc__ready, struct iwn_ucode_info *, uc)
3083
3084 if (le32toh(uc->valid) != 1) {
3085 dev_err(sc->sc_dip, CE_WARN,
3086 "!microcontroller initialization failed");
3087 break;
3088 }
3089 if (uc->subtype == IWN_UCODE_INIT) {
3090 /* Save microcontroller report. */
3091 (void) memcpy(&sc->ucode_info, uc, sizeof (*uc));
3092 }
3093 /* Save the address of the error log in SRAM. */
3094 sc->errptr = le32toh(uc->errptr);
3095 break;
3096 }
3097 case IWN_STATE_CHANGED:
3098 {
3099 /*LINTED: E_PTR_BAD_CAST_ALIGN*/
3100 uint32_t *status = (uint32_t *)(desc + 1);
3101
3102 /* Enabled/disabled notification. */
3103 (void) ddi_dma_sync(data->dma_data.dma_hdl,
3104 sizeof (*desc), sizeof (*status),
3105 DDI_DMA_SYNC_FORKERNEL);
3106 DTRACE_PROBE1(state__changed, uint32_t, *status);
3107
3108 if (le32toh(*status) & 1) {
3109 /* The radio button has to be pushed. */
3110 dev_err(sc->sc_dip, CE_WARN,
3111 "!Radio transmitter is off");
3913 tx->data_ntries = 15;
3914 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
3915 tx->plcp = rinfo->plcp;
3916 tx->rflags = rinfo->flags;
3917 if (tx->id == sc->broadcast_id) {
3918 /* Group or management frame. */
3919 tx->linkq = 0;
3920 /* XXX Alternate between antenna A and B? */
3921 txant = IWN_LSB(sc->txchainmask);
3922 tx->rflags |= IWN_RFLAG_ANT(txant);
3923 } else {
3924 tx->linkq = in->in_rates.ir_nrates - in->in_txrate - 1;
3925 flags |= IWN_TX_LINKQ; /* enable MRR */
3926 }
3927 /* Set physical address of "scratch area". */
3928 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
3929 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
3930
3931 /* Copy 802.11 header in TX command. */
3932 /* XXX NetBSD changed this in rev 1.20 */
3933 (void) memcpy(((uint8_t *)tx) + sizeof(*tx), wh, hdrlen);
3934 mp->b_rptr += hdrlen;
3935
3936 bcopy(mp->b_rptr, data->dma_data.vaddr, totlen - hdrlen);
3937 tx->security = 0;
3938 tx->flags = htole32(flags);
3939
3940 data->ni = in;
3941
3942 DTRACE_PROBE4(tx, int, ring->qid, int, ring->cur, size_t, MBLKL(mp),
3943 int, data->dma_data.ncookies);
3944
3945 /* Fill TX descriptor. */
3946 desc->nsegs = 1 + data->dma_data.ncookies;
3947 /* First DMA segment is used by the TX command. */
3948 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
3949 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
3950 (4 + sizeof (*tx) + hdrlen + pad) << 4);
3951
3952 /* Other DMA segments are for data payload. */
3953 cookie = data->dma_data.cookie;
4414 data = &ring->data[ring->cur];
4415 totlen = 4 + size;
4416
4417 if (size > sizeof (cmd->data)) {
4418 /* Command is too large to fit in a descriptor. */
4419 if (iwn_dma_contig_alloc(sc, &data->cmd_dma, totlen,
4420 DDI_DMA_CONSISTENT | DDI_DMA_RDWR, (void **)&cmd,
4421 &iwn_dma_accattr, 1) != DDI_SUCCESS)
4422 return ENOBUFS;
4423 paddr = data->cmd_dma.paddr;
4424 } else {
4425 cmd = &ring->cmd[ring->cur];
4426 paddr = data->cmd_paddr;
4427 }
4428
4429 cmd->code = code;
4430 cmd->flags = 0;
4431 cmd->qid = ring->qid;
4432 cmd->idx = ring->cur;
4433 bzero(cmd->data, size);
4434 (void) memcpy(cmd->data, buf, size);
4435
4436 bzero(desc, sizeof(*desc));
4437 desc->nsegs = 1;
4438 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
4439 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
4440
4441 if (size > sizeof cmd->data) {
4442 (void) ddi_dma_sync(data->cmd_dma.dma_hdl, 0, totlen,
4443 DDI_DMA_SYNC_FORDEV);
4444 } else {
4445 (void) ddi_dma_sync(ring->cmd_dma.dma_hdl,
4446 ring->cur * sizeof (*cmd),
4447 totlen, DDI_DMA_SYNC_FORDEV);
4448 }
4449 (void) ddi_dma_sync(ring->desc_dma.dma_hdl,
4450 ring->cur * sizeof (*desc),
4451 sizeof (*desc), DDI_DMA_SYNC_FORDEV);
4452
4453 /* Update TX scheduler. */
4454 sc->ops.update_sched(sc, ring->qid, ring->cur, 0, 0);
4468
4469 ret = (sc->sc_cmd_flag == SC_CMD_FLG_DONE) ? IWN_SUCCESS : IWN_FAIL;
4470 sc->sc_cmd_flag = SC_CMD_FLG_NONE;
4471
4472 return (ret);
4473 }
4474
4475 static int
4476 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
4477 {
4478 struct iwn4965_node_info hnode;
4479 char *src, *dst;
4480
4481 /*
4482 * We use the node structure for 5000 Series internally (it is
4483 * a superset of the one for 4965AGN). We thus copy the common
4484 * fields before sending the command.
4485 */
4486 src = (char *)node;
4487 dst = (char *)&hnode;
4488 (void) memcpy(dst, src, 48);
4489 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
4490 (void) memcpy(dst + 48, src + 72, 20);
4491 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
4492 }
4493
4494 static int
4495 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
4496 {
4497 /* Direct mapping. */
4498 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
4499 }
4500
4501 static int
4502 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)
4503 {
4504 struct iwn_node *wn = (void *)ni;
4505 struct ieee80211_rateset *rs = &ni->in_rates;
4506 struct iwn_cmd_link_quality linkq;
4507 const struct iwn_rate *rinfo;
4508 uint8_t txant;
4509 int i, txrate;
4510
4511 /* Use the first valid TX antenna. */
4512 txant = IWN_LSB(sc->txchainmask);
4513
4514 (void) memset(&linkq, 0, sizeof linkq);
4515 linkq.id = wn->id;
4516 linkq.antmsk_1stream = txant;
4517 linkq.antmsk_2stream = IWN_ANT_AB;
4518 linkq.ampdu_max = 31;
4519 linkq.ampdu_threshold = 3;
4520 linkq.ampdu_limit = htole16(4000); /* 4ms */
4521
4522 /* Start at highest available bit-rate. */
4523 txrate = rs->ir_nrates - 1;
4524 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
4525 rinfo = &iwn_rates[wn->ridx[txrate]];
4526 linkq.retry[i].plcp = rinfo->plcp;
4527 linkq.retry[i].rflags = rinfo->flags;
4528 linkq.retry[i].rflags |= IWN_RFLAG_ANT(txant);
4529 /* Next retry at immediate lower bit-rate. */
4530 if (txrate > 0)
4531 txrate--;
4532 }
4533 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);
4534 }
4535
4536 /*
4537 * Broadcast node is used to send group-addressed and management frames.
4538 */
4539 static int
4540 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
4541 {
4542 struct iwn_ops *ops = &sc->ops;
4543 struct iwn_node_info node;
4544 struct iwn_cmd_link_quality linkq;
4545 const struct iwn_rate *rinfo;
4546 uint8_t txant;
4547 int i, error;
4548
4549 (void) memset(&node, 0, sizeof node);
4550 IEEE80211_ADDR_COPY(node.macaddr, etherbroadcastaddr);
4551 node.id = sc->broadcast_id;
4552 DTRACE_PROBE(add__broadcast__node);
4553 if ((error = ops->add_node(sc, &node, async)) != 0)
4554 return error;
4555
4556 /* Use the first valid TX antenna. */
4557 txant = IWN_LSB(sc->txchainmask);
4558
4559 (void) memset(&linkq, 0, sizeof linkq);
4560 linkq.id = sc->broadcast_id;
4561 linkq.antmsk_1stream = txant;
4562 linkq.antmsk_2stream = IWN_ANT_AB;
4563 linkq.ampdu_max = 64;
4564 linkq.ampdu_threshold = 3;
4565 linkq.ampdu_limit = htole16(4000); /* 4ms */
4566
4567 /* Use lowest mandatory bit-rate. */
4568 rinfo = (sc->sc_ic.ic_curmode != IEEE80211_MODE_11A) ?
4569 &iwn_rates[IWN_RIDX_CCK1] : &iwn_rates[IWN_RIDX_OFDM6];
4570 linkq.retry[0].plcp = rinfo->plcp;
4571 linkq.retry[0].rflags = rinfo->flags;
4572 linkq.retry[0].rflags |= IWN_RFLAG_ANT(txant);
4573 /* Use same bit-rate for all TX retries. */
4574 for (i = 1; i < IWN_MAX_TX_RETRIES; i++) {
4575 linkq.retry[i].plcp = linkq.retry[0].plcp;
4576 linkq.retry[i].rflags = linkq.retry[0].rflags;
4577 }
4578 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
4579 }
4600 * Set the critical temperature at which the firmware will stop the radio
4601 * and notify us.
4602 */
4603 static int
4604 iwn_set_critical_temp(struct iwn_softc *sc)
4605 {
4606 struct iwn_critical_temp crit;
4607 int32_t temp;
4608
4609 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
4610
4611 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
4612 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
4613 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
4614 temp = IWN_CTOK(110);
4615 else
4616 temp = 110;
4617
4618 sc->sc_misc->crit_temp.value.ul = temp;
4619
4620 (void) memset(&crit, 0, sizeof crit);
4621 crit.tempR = htole32(temp);
4622 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
4623 }
4624
4625 static int
4626 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
4627 {
4628 struct iwn_cmd_timing cmd;
4629 uint64_t val, mod;
4630
4631 (void) memset(&cmd, 0, sizeof cmd);
4632 (void) memcpy(&cmd.tstamp, ni->in_tstamp.data, sizeof (uint64_t));
4633 cmd.bintval = htole16(ni->in_intval);
4634 cmd.lintval = htole16(10);
4635
4636 /* Compute remaining time until next beacon. */
4637 val = (uint64_t)ni->in_intval * 1024; /* msecs -> usecs */
4638 mod = le64toh(cmd.tstamp) % val;
4639 cmd.binitval = htole32((uint32_t)(val - mod));
4640
4641 sc->sc_timing->bintval.value.ul = ni->in_intval;
4642 sc->sc_timing->tstamp.value.ul = ni->in_tstamp.tsf;
4643 sc->sc_timing->init.value.ul = (uint32_t)(val - mod);
4644
4645 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
4646 }
4647
4648 static void
4649 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
4650 {
4651 /* Adjust TX power if need be (delta >= 3 degC). */
4652 IWN_DBG("temperature %d->%d", sc->temp, temp);
4671 /* Linear interpolation. */
4672 #define interpolate(x, x1, y1, x2, y2, n) \
4673 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
4674
4675 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
4676 struct ieee80211com *ic = &sc->sc_ic;
4677 struct iwn_ucode_info *uc = &sc->ucode_info;
4678 struct ieee80211_channel *ch;
4679 struct iwn4965_cmd_txpower cmd;
4680 struct iwn4965_eeprom_chan_samples *chans;
4681 const uint8_t *rf_gain, *dsp_gain;
4682 int32_t vdiff, tdiff;
4683 int i, c, grp, maxpwr;
4684 uint8_t chan;
4685
4686 /* Retrieve current channel from last RXON. */
4687 chan = sc->rxon.chan;
4688 sc->sc_txpower->chan.value.l = chan;
4689 ch = &ic->ic_sup_channels[chan];
4690
4691 (void) memset(&cmd, 0, sizeof cmd);
4692 cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
4693 cmd.chan = chan;
4694
4695 if (IEEE80211_IS_CHAN_5GHZ(ch)) {
4696 maxpwr = sc->maxpwr5GHz;
4697 rf_gain = iwn4965_rf_gain_5ghz;
4698 dsp_gain = iwn4965_dsp_gain_5ghz;
4699 } else {
4700 maxpwr = sc->maxpwr2GHz;
4701 rf_gain = iwn4965_rf_gain_2ghz;
4702 dsp_gain = iwn4965_dsp_gain_2ghz;
4703 }
4704
4705 /* Compute voltage compensation. */
4706 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
4707 if (vdiff > 0)
4708 vdiff *= 2;
4709 if (abs(vdiff) > 2)
4710 vdiff = 0;
4711 sc->sc_txpower->vdiff.value.l = vdiff;
4796 sc->sc_txpower->txchain[c].rate[ridx].dsp_gain.value.l =
4797 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
4798 }
4799 }
4800
4801 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
4802
4803 #undef interpolate
4804 #undef fdivround
4805 }
4806
4807 static int
4808 iwn5000_set_txpower(struct iwn_softc *sc, int async)
4809 {
4810 struct iwn5000_cmd_txpower cmd;
4811
4812 /*
4813 * TX power calibration is handled automatically by the firmware
4814 * for 5000 Series.
4815 */
4816 (void) memset(&cmd, 0, sizeof cmd);
4817 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
4818 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
4819 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
4820 return iwn_cmd(sc, IWN_CMD_TXPOWER_DBM, &cmd, sizeof cmd, async);
4821 }
4822
4823 /*
4824 * Retrieve the maximum RSSI (in dBm) among receivers.
4825 */
4826 static int
4827 iwn4965_get_rssi(const struct iwn_rx_stat *stat)
4828 {
4829 const struct iwn4965_rx_phystat *phy = (const void *)stat->phybuf;
4830 uint8_t mask, agc;
4831 int rssi;
4832
4833 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
4834 agc = (le16toh(phy->agc) >> 7) & 0x7f;
4835
4836 rssi = 0;
4918 temp = le32toh(sc->rawtemp);
4919 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
4920 temp = (temp / -5) + sc->temp_off;
4921 temp = IWN_KTOC(temp);
4922 }
4923 return temp;
4924 }
4925
4926 /*
4927 * Initialize sensitivity calibration state machine.
4928 */
4929 static int
4930 iwn_init_sensitivity(struct iwn_softc *sc)
4931 {
4932 struct iwn_ops *ops = &sc->ops;
4933 struct iwn_calib_state *calib = &sc->calib;
4934 uint32_t flags;
4935 int error;
4936
4937 /* Reset calibration state machine. */
4938 (void) memset(calib, 0, sizeof (*calib));
4939 calib->state = IWN_CALIB_STATE_INIT;
4940 calib->cck_state = IWN_CCK_STATE_HIFA;
4941 /* Set initial correlation values. */
4942 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
4943 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
4944 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
4945 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
4946 calib->cck_x4 = 125;
4947 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
4948 calib->energy_cck = sc->limits->energy_cck;
4949
4950 /* Write initial sensitivity. */
4951 if ((error = iwn_send_sensitivity(sc)) != 0)
4952 return error;
4953
4954 /* Write initial gains. */
4955 if ((error = ops->init_gains(sc)) != 0)
4956 return error;
4957
4958 /* Request statistics at each beacon interval. */
5002 (void)ops->set_gains(sc);
5003 calib->state = IWN_CALIB_STATE_RUN;
5004
5005 #ifdef notyet
5006 /* XXX Disable RX chains with no antennas connected. */
5007 sc->rxon.rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
5008 DTRACE_PROBE2(rxon, struct iwn_rxon *, &sc->rxon, int, sc->rxonsz);
5009 (void)iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, sc->rxonsz, 1);
5010 #endif
5011
5012 /* Enable power-saving mode if requested by user. */
5013 if (sc->sc_ic.ic_flags & IEEE80211_F_PMGTON)
5014 (void)iwn_set_pslevel(sc, 0, 3, 1);
5015 }
5016
5017 static int
5018 iwn4965_init_gains(struct iwn_softc *sc)
5019 {
5020 struct iwn_phy_calib_gain cmd;
5021
5022 (void) memset(&cmd, 0, sizeof cmd);
5023 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5024 /* Differential gains initially set to 0 for all 3 antennas. */
5025 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5026 }
5027
5028 static int
5029 iwn5000_init_gains(struct iwn_softc *sc)
5030 {
5031 struct iwn_phy_calib cmd;
5032
5033 (void) memset(&cmd, 0, sizeof cmd);
5034 cmd.code = sc->reset_noise_gain;
5035 cmd.ngroups = 1;
5036 cmd.isvalid = 1;
5037 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5038 }
5039
5040 static int
5041 iwn4965_set_gains(struct iwn_softc *sc)
5042 {
5043 struct iwn_calib_state *calib = &sc->calib;
5044 struct iwn_phy_calib_gain cmd;
5045 int i, delta, noise;
5046
5047 /* Get minimal noise among connected antennas. */
5048 noise = INT_MAX; /* NB: There's at least one antenna. */
5049 for (i = 0; i < 3; i++)
5050 if (sc->chainmask & (1 << i))
5051 noise = MIN(calib->noise[i], noise);
5052
5053 (void) memset(&cmd, 0, sizeof cmd);
5054 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5055 /* Set differential gains for connected antennas. */
5056 for (i = 0; i < 3; i++) {
5057 if (sc->chainmask & (1 << i)) {
5058 /* Compute attenuation (in unit of 1.5dB). */
5059 delta = (noise - calib->noise[i]) / 30;
5060 /* NB: delta <= 0 */
5061 /* Limit to [-4.5dB,0]. */
5062 cmd.gain[i] = (uint8_t)MIN(abs(delta), 3);
5063 if (delta < 0)
5064 cmd.gain[i] |= 1 << 2; /* sign bit */
5065 sc->sc_ant->gain[i].value.ul = cmd.gain[i];
5066 }
5067 }
5068 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5069 }
5070
5071 static int
5072 iwn5000_set_gains(struct iwn_softc *sc)
5073 {
5074 struct iwn_calib_state *calib = &sc->calib;
5075 struct iwn_phy_calib_gain cmd;
5076 int i, ant, div, delta;
5077
5078 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
5079 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
5080
5081 (void) memset(&cmd, 0, sizeof cmd);
5082 cmd.code = sc->noise_gain;
5083 cmd.ngroups = 1;
5084 cmd.isvalid = 1;
5085 /* Get first available RX antenna as referential. */
5086 ant = IWN_LSB(sc->rxchainmask);
5087 /* Set differential gains for other antennas. */
5088 for (i = ant + 1; i < 3; i++) {
5089 if (sc->chainmask & (1 << i)) {
5090 /* The delta is relative to antenna "ant". */
5091 delta = (calib->noise[ant] - calib->noise[i]) / div;
5092 /* Limit to [-4.5dB,+4.5dB]. */
5093 cmd.gain[i - 1] = (uint8_t)MIN(abs(delta), 3);
5094 if (delta < 0)
5095 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
5096 sc->sc_ant->gain[i - 1].value.ul
5097 = cmd.gain[i - 1];
5098 }
5099 }
5100 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5101 }
5240 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
5241 /* Previous interval had many false alarms. */
5242 dec(calib->energy_cck, 8, energy_min);
5243 }
5244 calib->cck_state = IWN_CCK_STATE_INIT;
5245 }
5246
5247 if (needs_update)
5248 (void)iwn_send_sensitivity(sc);
5249 #undef dec
5250 #undef inc
5251 }
5252
5253 static int
5254 iwn_send_sensitivity(struct iwn_softc *sc)
5255 {
5256 struct iwn_calib_state *calib = &sc->calib;
5257 struct iwn_enhanced_sensitivity_cmd cmd;
5258 int len;
5259
5260 (void) memset(&cmd, 0, sizeof cmd);
5261 len = sizeof (struct iwn_sensitivity_cmd);
5262 cmd.which = IWN_SENSITIVITY_WORKTBL;
5263 /* OFDM modulation. */
5264 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
5265 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
5266 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
5267 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
5268 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
5269 cmd.energy_ofdm_th = htole16(62);
5270 /* CCK modulation. */
5271 cmd.corr_cck_x4 = htole16(calib->cck_x4);
5272 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
5273 cmd.energy_cck = htole16(calib->energy_cck);
5274 /* Barker modulation: use default values. */
5275 cmd.corr_barker = htole16(190);
5276 cmd.corr_barker_mrc = htole16(390);
5277 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))
5278 goto send;
5279 /* Enhanced sensitivity settings. */
5280 len = sizeof (struct iwn_enhanced_sensitivity_cmd);
5303 * Set STA mode power saving level (between 0 and 5).
5304 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
5305 */
5306 static int
5307 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
5308 {
5309 struct iwn_pmgt_cmd cmd;
5310 const struct iwn_pmgt *pmgt;
5311 uint32_t maxp, skip_dtim;
5312 uint32_t reg;
5313 int i;
5314
5315 /* Select which PS parameters to use. */
5316 if (dtim <= 2)
5317 pmgt = &iwn_pmgt[0][level];
5318 else if (dtim <= 10)
5319 pmgt = &iwn_pmgt[1][level];
5320 else
5321 pmgt = &iwn_pmgt[2][level];
5322
5323 (void) memset(&cmd, 0, sizeof cmd);
5324 if (level != 0) /* not CAM */
5325 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
5326 if (level == 5)
5327 cmd.flags |= htole16(IWN_PS_FAST_PD);
5328 /* Retrieve PCIe Active State Power Management (ASPM). */
5329 reg = pci_config_get32(sc->sc_pcih,
5330 sc->sc_cap_off + PCIE_LINKCTL);
5331 if (!(reg & PCIE_LINKCTL_ASPM_CTL_L0S)) /* L0s Entry disabled. */
5332 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
5333 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
5334 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
5335
5336 if (dtim == 0) {
5337 dtim = 1;
5338 skip_dtim = 0;
5339 } else
5340 skip_dtim = pmgt->skip_dtim;
5341 if (skip_dtim != 0) {
5342 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
5343 maxp = pmgt->intval[4];
5344 if (maxp == (uint32_t)-1)
5345 maxp = dtim * (skip_dtim + 1);
5346 else if (maxp > dtim)
5347 maxp = (maxp / dtim) * dtim;
5348 } else
5349 maxp = dtim;
5350 for (i = 0; i < 5; i++)
5351 cmd.intval[i] = htole32(MIN(maxp, pmgt->intval[i]));
5352
5353 sc->sc_misc->pslevel.value.ul = level;
5354 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
5355 }
5356
5357 int
5358 iwn5000_runtime_calib(struct iwn_softc *sc)
5359 {
5360 struct iwn5000_calib_config cmd;
5361
5362 (void) memset(&cmd, 0, sizeof cmd);
5363 cmd.ucode.once.enable = 0xffffffff;
5364 cmd.ucode.once.start = IWN5000_CALIB_DC;
5365 return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0);
5366 }
5367
5368 static int
5369 iwn_config_bt_coex_bluetooth(struct iwn_softc *sc)
5370 {
5371 struct iwn_bluetooth bluetooth;
5372
5373 (void) memset(&bluetooth, 0, sizeof bluetooth);
5374 bluetooth.flags = IWN_BT_COEX_ENABLE;
5375 bluetooth.lead_time = IWN_BT_LEAD_TIME_DEF;
5376 bluetooth.max_kill = IWN_BT_MAX_KILL_DEF;
5377
5378 return iwn_cmd(sc, IWN_CMD_BT_COEX, &bluetooth, sizeof bluetooth, 0);
5379 }
5380
5381 static int
5382 iwn_config_bt_coex_prio_table(struct iwn_softc *sc)
5383 {
5384 uint8_t prio_table[16];
5385
5386 (void) memset(&prio_table, 0, sizeof prio_table);
5387 prio_table[ 0] = 6; /* init calibration 1 */
5388 prio_table[ 1] = 7; /* init calibration 2 */
5389 prio_table[ 2] = 2; /* periodic calib low 1 */
5390 prio_table[ 3] = 3; /* periodic calib low 2 */
5391 prio_table[ 4] = 4; /* periodic calib high 1 */
5392 prio_table[ 5] = 5; /* periodic calib high 2 */
5393 prio_table[ 6] = 6; /* dtim */
5394 prio_table[ 7] = 8; /* scan52 */
5395 prio_table[ 8] = 10; /* scan24 */
5396
5397 return iwn_cmd(sc, IWN_CMD_BT_COEX_PRIO_TABLE,
5398 &prio_table, sizeof prio_table, 0);
5399 }
5400
5401 static int
5402 iwn_config_bt_coex_adv_config(struct iwn_softc *sc, struct iwn_bt_basic *basic,
5403 size_t len)
5404 {
5405 struct iwn_btcoex_prot btprot;
5406 int error;
5426 basic->bt3_lookup_table[10] = htole32(0xf0005000);
5427 basic->bt3_lookup_table[11] = htole32(0xf0005000);
5428 basic->reduce_txpower = 0; /* as not implemented */
5429 basic->valid = IWN_BT_ALL_VALID_MASK;
5430
5431 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &basic, len, 0);
5432 if (error != 0) {
5433 dev_err(sc->sc_dip, CE_WARN,
5434 "!could not configure advanced bluetooth coexistence");
5435 return error;
5436 }
5437
5438 error = iwn_config_bt_coex_prio_table(sc);
5439 if (error != 0) {
5440 dev_err(sc->sc_dip, CE_WARN,
5441 "!could not configure send BT priority table");
5442 return error;
5443 }
5444
5445 /* Force BT state machine change */
5446 (void) memset(&btprot, 0, sizeof btprot);
5447 btprot.open = 1;
5448 btprot.type = 1;
5449 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof btprot, 1);
5450 if (error != 0) {
5451 dev_err(sc->sc_dip, CE_WARN, "!could not open BT protcol");
5452 return error;
5453 }
5454
5455 btprot.open = 0;
5456 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof btprot, 1);
5457 if (error != 0) {
5458 dev_err(sc->sc_dip, CE_WARN, "!could not close BT protcol");
5459 return error;
5460 }
5461 return 0;
5462 }
5463
5464 static int
5465 iwn_config_bt_coex_adv1(struct iwn_softc *sc)
5466 {
5467 struct iwn_bt_adv1 d;
5468
5469 (void) memset(&d, 0, sizeof d);
5470 d.prio_boost = IWN_BT_PRIO_BOOST_DEF;
5471 d.tx_prio_boost = 0;
5472 d.rx_prio_boost = 0;
5473 return iwn_config_bt_coex_adv_config(sc, &d.basic, sizeof d);
5474 }
5475
5476 static int
5477 iwn_config_bt_coex_adv2(struct iwn_softc *sc)
5478 {
5479 struct iwn_bt_adv2 d;
5480
5481 (void) memset(&d, 0, sizeof d);
5482 d.prio_boost = IWN_BT_PRIO_BOOST_DEF;
5483 d.tx_prio_boost = 0;
5484 d.rx_prio_boost = 0;
5485 return iwn_config_bt_coex_adv_config(sc, &d.basic, sizeof d);
5486 }
5487
5488 static int
5489 iwn_config(struct iwn_softc *sc)
5490 {
5491 struct iwn_ops *ops = &sc->ops;
5492 struct ieee80211com *ic = &sc->sc_ic;
5493 uint32_t txmask;
5494 uint16_t rxchain;
5495 int error;
5496
5497 error = ops->config_bt_coex(sc);
5498 if (error != 0) {
5499 dev_err(sc->sc_dip, CE_WARN,
5500 "!could not configure bluetooth coexistence");
5501 return error;
5530 if (error != 0) {
5531 dev_err(sc->sc_dip, CE_WARN,
5532 "!could not configure runtime calibration");
5533 return error;
5534 }
5535 }
5536
5537 /* Configure valid TX chains for 5000 Series. */
5538 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
5539 txmask = htole32(sc->txchainmask);
5540 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
5541 sizeof txmask, 0);
5542 if (error != 0) {
5543 dev_err(sc->sc_dip, CE_WARN,
5544 "!could not configure valid TX chains");
5545 return error;
5546 }
5547 }
5548
5549 /* Set mode, channel, RX filter and enable RX. */
5550 (void) memset(&sc->rxon, 0, sizeof (struct iwn_rxon));
5551 IEEE80211_ADDR_COPY(sc->rxon.myaddr, ic->ic_macaddr);
5552 IEEE80211_ADDR_COPY(sc->rxon.wlap, ic->ic_macaddr);
5553 sc->rxon.chan = ieee80211_chan2ieee(ic, ic->ic_ibss_chan);
5554 sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
5555 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_ibss_chan))
5556 sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
5557 switch (ic->ic_opmode) {
5558 case IEEE80211_M_IBSS:
5559 sc->rxon.mode = IWN_MODE_IBSS;
5560 sc->rxon.filter = htole32(IWN_FILTER_MULTICAST);
5561 break;
5562 case IEEE80211_M_STA:
5563 sc->rxon.mode = IWN_MODE_STA;
5564 sc->rxon.filter = htole32(IWN_FILTER_MULTICAST);
5565 break;
5566 case IEEE80211_M_MONITOR:
5567 sc->rxon.mode = IWN_MODE_MONITOR;
5568 sc->rxon.filter = htole32(IWN_FILTER_MULTICAST |
5569 IWN_FILTER_CTL | IWN_FILTER_PROMISC);
5570 break;
5741 tx->plcp = iwn_rates[IWN_RIDX_CCK1].plcp;
5742 tx->rflags = IWN_RFLAG_CCK;
5743 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
5744 }
5745
5746 hdr->crc_threshold = 0xffff;
5747
5748 /* Use the first valid TX antenna. */
5749 txant = IWN_LSB(sc->txchainmask);
5750 tx->rflags |= IWN_RFLAG_ANT(txant);
5751
5752 /*
5753 * Only do active scanning if we're announcing a probe request
5754 * for a given SSID (or more, if we ever add it to the driver.)
5755 */
5756 is_active = 0;
5757
5758 essid = (struct iwn_scan_essid *)(tx + 1);
5759 if (ic->ic_des_esslen != 0) {
5760 char essidstr[IEEE80211_NWID_LEN+1];
5761 (void) memcpy(essidstr, ic->ic_des_essid, ic->ic_des_esslen);
5762 essidstr[ic->ic_des_esslen] = '\0';
5763
5764 DTRACE_PROBE1(scan__direct, char *, essidstr);
5765
5766 essid[0].id = IEEE80211_ELEMID_SSID;
5767 essid[0].len = ic->ic_des_esslen;
5768 (void) memcpy(essid[0].data, ic->ic_des_essid, ic->ic_des_esslen);
5769
5770 is_active = 1;
5771 /* hdr->crc_threshold = 0x1; */
5772 hdr->scan_flags = htole32(IWN_SCAN_PASSIVE2ACTIVE);
5773 }
5774 /*
5775 * Build a probe request frame. Most of the following code is a
5776 * copy & paste of what is done in net80211.
5777 */
5778 wh = (struct ieee80211_frame *)(essid + 20);
5779 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
5780 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
5781 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
5782 IEEE80211_ADDR_COPY(wh->i_addr1, etherbroadcastaddr);
5783 IEEE80211_ADDR_COPY(wh->i_addr2, ic->ic_macaddr);
5784 IEEE80211_ADDR_COPY(wh->i_addr3, etherbroadcastaddr);
5785 wh->i_dur[0] = wh->i_dur[1] = 0; /* filled by HW */
5786 wh->i_seq[0] = wh->i_seq[1] = 0; /* filled by HW */
5787
5788 frm = (uint8_t *)(wh + 1);
6022 DTRACE_PROBE2(rxon, struct iwn_rxon *, &sc->rxon, int, sc->rxonsz);
6023 error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, sc->rxonsz, 1);
6024 if (error != 0) {
6025 dev_err(sc->sc_dip, CE_WARN,
6026 "!could not update configuration");
6027 return error;
6028 }
6029
6030 /* Configuration has changed, set TX power accordingly. */
6031 if ((error = ops->set_txpower(sc, 1)) != 0) {
6032 dev_err(sc->sc_dip, CE_WARN,
6033 "!could not set TX power");
6034 return error;
6035 }
6036
6037 /* Fake a join to initialize the TX rate. */
6038 ((struct iwn_node *)ni)->id = IWN_ID_BSS;
6039 iwn_newassoc(ni, 1);
6040
6041 /* Add BSS node. */
6042 (void) memset(&node, 0, sizeof node);
6043 IEEE80211_ADDR_COPY(node.macaddr, ni->in_macaddr);
6044 node.id = IWN_ID_BSS;
6045 #ifdef notyet
6046 node.htflags = htole32(IWN_AMDPU_SIZE_FACTOR(3) |
6047 IWN_AMDPU_DENSITY(5)); /* 2us */
6048 #endif
6049 error = ops->add_node(sc, &node, 1);
6050 if (error != 0) {
6051 dev_err(sc->sc_dip, CE_WARN,
6052 "!could not add BSS node");
6053 return error;
6054 }
6055 if ((error = iwn_set_link_quality(sc, ni)) != 0) {
6056 dev_err(sc->sc_dip, CE_WARN,
6057 "!could not setup link quality for node %d", node.id);
6058 return error;
6059 }
6060
6061 if ((error = iwn_init_sensitivity(sc)) != 0) {
6062 dev_err(sc->sc_dip, CE_WARN,
6087 * HW support for TKIP really sucks. We should let TKIP die anyway.
6088 */
6089 static int
6090 iwn_set_key(struct ieee80211com *ic, struct ieee80211_node *ni,
6091 struct ieee80211_key *k)
6092 {
6093 struct iwn_softc *sc = ic->ic_softc;
6094 struct iwn_ops *ops = &sc->ops;
6095 struct iwn_node *wn = (void *)ni;
6096 struct iwn_node_info node;
6097 uint16_t kflags;
6098
6099 if ((k->k_flags & IEEE80211_KEY_GROUP) ||
6100 k->k_cipher != IEEE80211_CIPHER_CCMP)
6101 return ieee80211_set_key(ic, ni, k);
6102
6103 kflags = IWN_KFLAG_CCMP | IWN_KFLAG_MAP | IWN_KFLAG_KID(k->k_id);
6104 if (k->k_flags & IEEE80211_KEY_GROUP)
6105 kflags |= IWN_KFLAG_GROUP;
6106
6107 (void) memset(&node, 0, sizeof node);
6108 node.id = (k->k_flags & IEEE80211_KEY_GROUP) ?
6109 sc->broadcast_id : wn->id;
6110 node.control = IWN_NODE_UPDATE;
6111 node.flags = IWN_FLAG_SET_KEY;
6112 node.kflags = htole16(kflags);
6113 node.kid = k->k_id;
6114 (void) memcpy(node.key, k->k_key, k->k_len);
6115 DTRACE_PROBE2(set__key, int, k->k_id, int, node.id);
6116 return ops->add_node(sc, &node, 1);
6117 }
6118
6119 static void
6120 iwn_delete_key(struct ieee80211com *ic, struct ieee80211_node *ni,
6121 struct ieee80211_key *k)
6122 {
6123 struct iwn_softc *sc = ic->ic_softc;
6124 struct iwn_ops *ops = &sc->ops;
6125 struct iwn_node *wn = (void *)ni;
6126 struct iwn_node_info node;
6127
6128 if ((k->k_flags & IEEE80211_KEY_GROUP) ||
6129 k->k_cipher != IEEE80211_CIPHER_CCMP) {
6130 /* See comment about other ciphers above. */
6131 ieee80211_delete_key(ic, ni, k);
6132 return;
6133 }
6134 if (ic->ic_state != IEEE80211_S_RUN)
6135 return; /* Nothing to do. */
6136 (void) memset(&node, 0, sizeof node);
6137 node.id = (k->k_flags & IEEE80211_KEY_GROUP) ?
6138 sc->broadcast_id : wn->id;
6139 node.control = IWN_NODE_UPDATE;
6140 node.flags = IWN_FLAG_SET_KEY;
6141 node.kflags = htole16(IWN_KFLAG_INVALID);
6142 node.kid = 0xff;
6143 DTRACE_PROBE1(del__key, int, node.id);
6144 (void)ops->add_node(sc, &node, 1);
6145 }
6146 #endif
6147
6148 #ifndef IEEE80211_NO_HT
6149 /*
6150 * This function is called by upper layer when an ADDBA request is received
6151 * from another STA and before the ADDBA response is sent.
6152 */
6153 static int
6154 iwn_ampdu_rx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
6155 uint8_t tid)
6156 {
6157 struct ieee80211_rx_ba *ba = &ni->in_rx_ba[tid];
6158 struct iwn_softc *sc = ic->ic_softc;
6159 struct iwn_ops *ops = &sc->ops;
6160 struct iwn_node *wn = (void *)ni;
6161 struct iwn_node_info node;
6162
6163 (void) memset(&node, 0, sizeof node);
6164 node.id = wn->id;
6165 node.control = IWN_NODE_UPDATE;
6166 node.flags = IWN_FLAG_SET_ADDBA;
6167 node.addba_tid = tid;
6168 node.addba_ssn = htole16(ba->ba_winstart);
6169 DTRACE_PROBE3(addba, uint8_t, wn->id, uint8_t, tid, int, ba->ba_winstart);
6170 return ops->add_node(sc, &node, 1);
6171 }
6172
6173 /*
6174 * This function is called by upper layer on teardown of an HT-immediate
6175 * Block Ack agreement (eg. uppon receipt of a DELBA frame).
6176 */
6177 static void
6178 iwn_ampdu_rx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
6179 uint8_t tid)
6180 {
6181 struct iwn_softc *sc = ic->ic_softc;
6182 struct iwn_ops *ops = &sc->ops;
6183 struct iwn_node *wn = (void *)ni;
6184 struct iwn_node_info node;
6185
6186 (void) memset(&node, 0, sizeof node);
6187 node.id = wn->id;
6188 node.control = IWN_NODE_UPDATE;
6189 node.flags = IWN_FLAG_SET_DELBA;
6190 node.delba_tid = tid;
6191 DTRACE_PROBE2(delba, uint8_t, wn->id, uint8_t, tid);
6192 (void)ops->add_node(sc, &node, 1);
6193 }
6194
6195 /*
6196 * This function is called by upper layer when an ADDBA response is received
6197 * from another STA.
6198 */
6199 static int
6200 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
6201 uint8_t tid)
6202 {
6203 struct ieee80211_tx_ba *ba = &ni->in_tx_ba[tid];
6204 struct iwn_softc *sc = ic->ic_softc;
6205 struct iwn_ops *ops = &sc->ops;
6206 struct iwn_node *wn = (void *)ni;
6207 struct iwn_node_info node;
6208 int error;
6209
6210 /* Enable TX for the specified RA/TID. */
6211 wn->disable_tid &= ~(1 << tid);
6212 (void) memset(&node, 0, sizeof node);
6213 node.id = wn->id;
6214 node.control = IWN_NODE_UPDATE;
6215 node.flags = IWN_FLAG_SET_DISABLE_TID;
6216 node.disable_tid = htole16(wn->disable_tid);
6217 error = ops->add_node(sc, &node, 1);
6218 if (error != 0)
6219 return error;
6220
6221 if ((error = iwn_nic_lock(sc)) != 0)
6222 return error;
6223 ops->ampdu_tx_start(sc, ni, tid, ba->ba_winstart);
6224 iwn_nic_unlock(sc);
6225 return 0;
6226 }
6227
6228 static void
6229 iwn_ampdu_tx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
6230 uint8_t tid)
6231 {
6232 struct ieee80211_tx_ba *ba = &ni->in_tx_ba[tid];
6356
6357 /* Mark the queue as inactive. */
6358 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
6359 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
6360 }
6361 #endif /* !IEEE80211_NO_HT */
6362
6363 /*
6364 * Query calibration tables from the initialization firmware. We do this
6365 * only once at first boot. Called from a process context.
6366 */
6367 static int
6368 iwn5000_query_calibration(struct iwn_softc *sc)
6369 {
6370 struct iwn5000_calib_config cmd;
6371 int error;
6372 clock_t clk;
6373
6374 ASSERT(mutex_owned(&sc->sc_mtx));
6375
6376 (void) memset(&cmd, 0, sizeof cmd);
6377 cmd.ucode.once.enable = 0xffffffff;
6378 cmd.ucode.once.start = 0xffffffff;
6379 cmd.ucode.once.send = 0xffffffff;
6380 cmd.ucode.flags = 0xffffffff;
6381 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
6382 if (error != 0)
6383 return error;
6384
6385 /* Wait at most two seconds for calibration to complete. */
6386 clk = ddi_get_lbolt() + drv_usectohz(2000000);
6387 while (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))
6388 if (cv_timedwait(&sc->sc_calib_cv, &sc->sc_mtx, clk) < 0)
6389 return (IWN_FAIL);
6390
6391 return (IWN_SUCCESS);
6392 }
6393
6394 /*
6395 * Send calibration results to the runtime firmware. These results were
6396 * obtained on first boot from the initialization firmware.
6410 "!could not send calibration result");
6411 return error;
6412 }
6413 }
6414 return 0;
6415 }
6416
6417 static int
6418 iwn5000_send_wimax_coex(struct iwn_softc *sc)
6419 {
6420 struct iwn5000_wimax_coex wimax;
6421
6422 #ifdef notyet
6423 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
6424 /* Enable WiMAX coexistence for combo adapters. */
6425 wimax.flags =
6426 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
6427 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
6428 IWN_WIMAX_COEX_STA_TABLE_VALID |
6429 IWN_WIMAX_COEX_ENABLE;
6430 (void) memcpy(wimax.events, iwn6050_wimax_events,
6431 sizeof iwn6050_wimax_events);
6432 } else
6433 #endif
6434 {
6435 /* Disable WiMAX coexistence. */
6436 wimax.flags = 0;
6437 (void) memset(wimax.events, 0, sizeof wimax.events);
6438 }
6439 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
6440 }
6441
6442 static int
6443 iwn6000_temp_offset_calib(struct iwn_softc *sc)
6444 {
6445 struct iwn6000_phy_calib_temp_offset cmd;
6446
6447 (void) memset(&cmd, 0, sizeof cmd);
6448 cmd.code = IWN6000_PHY_CALIB_TEMP_OFFSET;
6449 cmd.ngroups = 1;
6450 cmd.isvalid = 1;
6451 if (sc->eeprom_temp != 0)
6452 cmd.offset = htole16(sc->eeprom_temp);
6453 else
6454 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
6455 sc->sc_toff.t6000->toff.value.l = le16toh(cmd.offset);
6456 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
6457 }
6458
6459 static int
6460 iwn2000_temp_offset_calib(struct iwn_softc *sc)
6461 {
6462 struct iwn2000_phy_calib_temp_offset cmd;
6463
6464 (void) memset(&cmd, 0, sizeof cmd);
6465 cmd.code = IWN2000_PHY_CALIB_TEMP_OFFSET;
6466 cmd.ngroups = 1;
6467 cmd.isvalid = 1;
6468 if (sc->eeprom_rawtemp != 0) {
6469 cmd.offset_low = htole16(sc->eeprom_rawtemp);
6470 cmd.offset_high = htole16(sc->eeprom_temp);
6471 } else {
6472 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET);
6473 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET);
6474 }
6475 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);
6476 sc->sc_toff.t2000->toff_lo.value.l = le16toh(cmd.offset_low);
6477 sc->sc_toff.t2000->toff_hi.value.l = le16toh(cmd.offset_high);
6478 sc->sc_toff.t2000->volt.value.l = le16toh(cmd.burnt_voltage_ref);
6479
6480 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
6481 }
6482
6483 /*
6484 * This function is called after the runtime firmware notifies us of its
6581
6582 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
6583 for (qid = 0; qid < 7; qid++) {
6584 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
6585 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
6586 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
6587 }
6588 iwn_nic_unlock(sc);
6589
6590 /* Configure WiMAX coexistence for combo adapters. */
6591 error = iwn5000_send_wimax_coex(sc);
6592 if (error != 0) {
6593 dev_err(sc->sc_dip, CE_WARN,
6594 "!could not configure WiMAX coexistence");
6595 return error;
6596 }
6597 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
6598 struct iwn5000_phy_calib_crystal cmd;
6599
6600 /* Perform crystal calibration. */
6601 (void) memset(&cmd, 0, sizeof cmd);
6602 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
6603 cmd.ngroups = 1;
6604 cmd.isvalid = 1;
6605 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
6606 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
6607 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
6608 if (error != 0) {
6609 dev_err(sc->sc_dip, CE_WARN,
6610 "!crystal calibration failed");
6611 return error;
6612 }
6613 }
6614 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
6615 /* Query calibration from the initialization firmware. */
6616 if ((error = iwn5000_query_calibration(sc)) != 0) {
6617 dev_err(sc->sc_dip, CE_WARN,
6618 "!could not query calibration");
6619 return error;
6620 }
6621 /*
6672 }
6673
6674 /* Enable boot after power up. */
6675 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
6676
6677 iwn_nic_unlock(sc);
6678 return 0;
6679 }
6680
6681 static int
6682 iwn4965_load_firmware(struct iwn_softc *sc)
6683 {
6684 struct iwn_fw_info *fw = &sc->fw;
6685 struct iwn_dma_info *dma = &sc->fw_dma;
6686 int error;
6687 clock_t clk;
6688
6689 ASSERT(mutex_owned(&sc->sc_mtx));
6690
6691 /* Copy initialization sections into pre-allocated DMA-safe memory. */
6692 (void) memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
6693 (void) memcpy((char *)dma->vaddr + IWN4965_FW_DATA_MAXSZ,
6694 fw->init.text, fw->init.textsz);
6695 (void) ddi_dma_sync(dma->dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV);
6696
6697 /* Tell adapter where to find initialization sections. */
6698 if ((error = iwn_nic_lock(sc)) != 0)
6699 return error;
6700 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
6701 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
6702 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
6703 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
6704 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
6705 iwn_nic_unlock(sc);
6706
6707 /* Load firmware boot code. */
6708 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
6709 if (error != 0) {
6710 dev_err(sc->sc_dip, CE_WARN,
6711 "!could not load boot firmware");
6712 return error;
6713 }
6714 /* Now press "execute". */
6715 IWN_WRITE(sc, IWN_RESET, 0);
6716
6717 /* Wait at most one second for first alive notification. */
6718 clk = ddi_get_lbolt() + drv_usectohz(1000000);
6719 while ((sc->sc_flags & IWN_FLAG_FW_ALIVE) == 0) {
6720 if (cv_timedwait(&sc->sc_alive_cv, &sc->sc_mtx, clk) < 0) {
6721 dev_err(sc->sc_dip, CE_WARN,
6722 "!timeout waiting for adapter to initialize");
6723 return (IWN_FAIL);
6724 }
6725 }
6726
6727 /* Retrieve current temperature for initial TX power calibration. */
6728 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
6729 sc->temp = iwn4965_get_temperature(sc);
6730 sc->sc_misc->temp.value.ul = sc->temp;
6731
6732 /* Copy runtime sections into pre-allocated DMA-safe memory. */
6733 (void) memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
6734 (void) memcpy((char *)dma->vaddr + IWN4965_FW_DATA_MAXSZ,
6735 fw->main.text, fw->main.textsz);
6736 (void) ddi_dma_sync(dma->dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV);
6737
6738 /* Tell adapter where to find runtime sections. */
6739 if ((error = iwn_nic_lock(sc)) != 0)
6740 return error;
6741 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
6742 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
6743 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
6744 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
6745 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
6746 IWN_FW_UPDATED | fw->main.textsz);
6747 iwn_nic_unlock(sc);
6748
6749 return 0;
6750 }
6751
6752 static int
6753 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
6754 const uint8_t *section, int size)
6755 {
6756 struct iwn_dma_info *dma = &sc->fw_dma;
6757 int error;
6758 clock_t clk;
6759
6760 ASSERT(mutex_owned(&sc->sc_mtx));
6761
6762 /* Copy firmware section into pre-allocated DMA-safe memory. */
6763 (void) memcpy(dma->vaddr, section, size);
6764 (void) ddi_dma_sync(dma->dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV);
6765
6766 if ((error = iwn_nic_lock(sc)) != 0)
6767 return error;
6768
6769 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
6770 IWN_FH_TX_CONFIG_DMA_PAUSE);
6771
6772 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
6773 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
6774 IWN_LOADDR(dma->paddr));
6775 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
6776 IWN_HIADDR(dma->paddr) << 28 | size);
6777 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
6778 IWN_FH_TXBUF_STATUS_TBNUM(1) |
6779 IWN_FH_TXBUF_STATUS_TBIDX(1) |
6780 IWN_FH_TXBUF_STATUS_TFBD_VALID);
6781
6782 /* Kick Flow Handler to start DMA transfer. */
6783 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
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